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7iwind
2026-08-13 09:11:30 +08:00
parent ab25f547ce
commit 725898f3f0
241 changed files with 222 additions and 586 deletions
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AllegroPCBFootprint/allegro.jrl,1
+53 -60
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@@ -1,61 +1,54 @@
\t (00:05:13) allegro 24.1 P001 (4234998) [9/4/2024] Windows SPB 64-bit Edition
\t (00:05:13) Journal start - Wed Aug 12 14:15:31 2026
\t (00:05:13) Host=WIND User=Hydro Pid=15212 CPUs=20
\t (00:05:13) CmdLine= D:\Tools\Cadence\SPB_24.1\tools\bin\allegro.exe
\t (00:05:13)
\d (00:05:13) 设计已打开：D:/Tools/Cadence/QF_CadenceLib/AllegroPCBFootprint/QFN24-6X6_MC_MCH-L.dra
\i (00:05:13) generaledit
\t (00:05:13) [14:15:31.181712] Periodic Lic check successful
[14:15:31.706000] Feature usage summary:
\t (00:00:01) allegro 24.1 P001 (4234998) [9/4/2024] Windows SPB 64-bit Edition
\t (00:00:01) Journal start - Thu Aug 13 01:39:38 2026
\t (00:00:01) Host=DESKTOP-4S5S7JF User=7iwind Pid=17604 CPUs=32
\t (00:00:01) CmdLine= W:\Tools\Cadence\SPB_24.1\tools\bin\allegro.exe
\t (00:00:01)
\t (00:00:01) Loading axlcore.cxt
\t (00:00:03) 正在打开现有设计...
\i (00:00:03) QtSignal SPBFoldDockArea FoldAreaTabWidget currentChanged "R0402_BGA"
\d (00:00:03) 设计已打开：W:/Tools/Cadence/QF_CadenceLib/AllegroPCBFootprint/R0402_BGA.dra
\i (00:00:04) trapsize 469
\i (00:00:04) trapsize 481
\i (00:00:04) trapsize 481
\i (00:00:04) generaledit
\t (00:00:04) [01:39:41.363000] Periodic Lic check successful
[01:39:41.363000] Feature usage summary:
\i (00:05:27) toolswap
\i (00:05:36) fillin
\t (00:05:36) 正在打开现有设计...
\i (00:05:36) trapsize 4238
\i (00:05:36) trapsize 4417
\i (00:05:36) trapsize 4238
\i (00:05:36) trapsize 4238
\i (00:05:36) generaledit
\i (00:05:42) open
\e (00:05:42) 是否要保存对 D:/Tools/Cadence/QF_CadenceLib/AllegroPCBFootprint/QFN24-6X6_MC_MCH-L.dra 做出的更改？
\i (00:05:44) fillin menu_cancel
\i (00:05:44) generaledit
\i (00:05:47) toolswap
\i (00:05:51) fillin
\i (00:05:51) generaledit
\i (00:05:55) open
\e (00:05:55) 是否要保存对 D:/Tools/Cadence/QF_CadenceLib/AllegroPCBFootprint/QFN24-6X6_MC_MCH-L.dra 做出的更改？
\i (00:05:56) fillin no
\i (00:06:08) fillin "D:/BaiduNetdiskDownload/Library/PCB/symbol/BGA96_080_900X1350.dra"
\i (00:06:08) cd "D:/BaiduNetdiskDownload/Library/PCB/symbol"
\t (00:06:08) 正在打开现有设计...
\e (00:06:08) ERROR(SPMHDB-181): The current version of software is unable to open design D:/BaiduNetdiskDownload/Library/PCB/symbol/BGA96_080_900X1350.dra.
The design was last saved using version 16.6 and must be updated using DB Doctor. [help]
\e (00:06:08) ERROR(SPMHDB-181): The current version of software is unable to open design D:/BaiduNetdiskDownload/Library/PCB/symbol/BGA96_080_900X1350.dra.
The design was last saved using version 16.6 and must be updated using DB Doctor. [help]
\i (00:06:15) fillin confirm
\t (00:06:15) 正在启动新设计...
\i (00:06:15) trapsize 1218
\i (00:06:16) trapsize 1349
\i (00:06:16) trapsize 1429
\i (00:06:16) trapsize 1349
\i (00:06:16) trapsize 1349
\i (00:06:23) fillin "CON_1X2_254_W_M.dra"
\t (00:06:23) 正在打开现有设计...
\e (00:06:23) ERROR(SPMHDB-181): The current version of software is unable to open design D:/BaiduNetdiskDownload/Library/PCB/symbol/CON_1X2_254_W_M.dra.
The design was last saved using version 16.6 and must be updated using DB Doctor. [help]
\e (00:06:23) ERROR(SPMHDB-181): The current version of software is unable to open design D:/BaiduNetdiskDownload/Library/PCB/symbol/CON_1X2_254_W_M.dra.
The design was last saved using version 16.6 and must be updated using DB Doctor. [help]
\i (00:06:26) fillin confirm
\t (00:06:26) 正在启动新设计...
\i (00:06:26) trapsize 1218
\i (00:06:26) trapsize 1270
\i (00:06:26) trapsize 1218
\i (00:06:26) trapsize 2291
\i (00:06:33) fillin "con_40P.dra"
\t (00:06:33) 正在打开现有设计...
\i (00:06:33) trapsize 2469
\i (00:06:33) trapsize 2574
\i (00:06:33) trapsize 2469
\i (00:06:33) trapsize 3858
\t (00:06:33) Journal end - Wed Aug 12 14:16:51 2026
\i (00:00:06) open
\i (00:00:10) fillin "C0603.dra"
\t (00:00:10) 正在打开现有设计...
\i (00:00:10) trapsize 124
\d (00:00:10) 设计已打开：W:/Tools/Cadence/QF_CadenceLib/AllegroPCBFootprint/C0603.dra
\i (00:00:10) generaledit
\i (00:00:17) pick grid 23.37 -6.54
\t (00:00:17) 上一个选取点：0.00 0.00
\i (00:01:58) 3d
\i (00:02:00) QtSignal 3DUniFilterDialog UniFilterOkButton clicked
\i (00:02:00) generaledit
\i (00:02:18) QtSignal pcb3dViewer pcb3dViewer closed
\i (00:02:22) pick grid -55.46 39.92
\t (00:02:22) 上一个选取点：-100.00 0.00
\i (00:02:23) pick grid -55.46 39.92
\t (00:02:23) 上一个选取点：-100.00 0.00
\i (00:02:24) pick grid -55.46 39.92
\t (00:02:24) 上一个选取点：-100.00 0.00
\i (00:02:45) show allpanes
\i (00:02:45) generaledit
\i (00:03:10) 3d
\i (00:03:14) QtSignal 3DUniFilterDialog UniFilterOkButton clicked
\i (00:03:15) generaledit
\i (00:03:35) QtSignal pcb3dViewer pcb3dViewer closed
\i (00:03:37) pick grid -91.14 40.73
\t (00:03:37) 上一个选取点：-100.00 0.00
\i (00:03:50) pick grid -145.35 49.93
\t (00:03:50) 上一个选取点：-100.00 0.00
\i (00:03:50) save
\i (00:03:52) fillin yes
\t (00:03:52) Symbol 'c0603.psm' 已创建。
\i (00:03:52) generaledit
\i (00:03:56) exit
\t (00:03:56) Lic Summary:
[01:43:33.340000] Cdslmd servers:
[01:43:33.340000] Feature usage summary:
\t (00:03:56) Journal end - Thu Aug 13 01:43:33 2026