diff --git a/RK3506_NAV.DSN b/RK3506_NAV.DSN index 468a787..af7ae5a 100644 Binary files a/RK3506_NAV.DSN and b/RK3506_NAV.DSN differ diff --git a/allegro/chipsview.dat b/allegro/chipsview.dat index b0e0bcf..0a55a3b 100644 --- a/allegro/chipsview.dat +++ b/allegro/chipsview.dat @@ -1,4 +1,820 @@ FILE_TYPE=LIBRARY_PARTS; +primitive 'CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q'; + pin + '\TEST\': + PIN_NUMBER='(0,0,0,0,17)'; + OUTPUT_LOAD='(1.0,-1.0)'; + '\NC9\': + PIN_NUMBER='(0,0,0,0,30)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '\NC8\': + PIN_NUMBER='(0,0,0,0,10)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '\NC7\': + PIN_NUMBER='(0,0,0,0,9)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '\NC6\': + PIN_NUMBER='(0,0,0,0,8)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '\NC5\': + PIN_NUMBER='(0,0,0,0,7)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '\NC4\': + PIN_NUMBER='(0,0,0,0,6)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '\NC3\': + PIN_NUMBER='(0,0,0,0,5)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '\NC2\': + PIN_NUMBER='(0,0,0,0,4)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '\NC1\': + PIN_NUMBER='(0,0,0,0,2)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '\XO\': + PIN_NUMBER='(0,0,0,28,0)'; + OUTPUT_LOAD='(1.0,-1.0)'; + '\XI\': + PIN_NUMBER='(0,0,0,29,0)'; + INPUT_LOAD='(-0.01,0.01)'; + '\UD-\': + PIN_NUMBER='(0,0,32,0,0)'; + BIDIRECTIONAL='TRUE'; + INPUT_LOAD='(-0.01,0.01)'; + OUTPUT_LOAD='(1.0,-1.0)'; + '\UD+\': + PIN_NUMBER='(0,0,31,0,0)'; + BIDIRECTIONAL='TRUE'; + INPUT_LOAD='(-0.01,0.01)'; + OUTPUT_LOAD='(1.0,-1.0)'; + '\RST#\': + PIN_NUMBER='(0,0,38,0,0)'; + INPUT_LOAD='(-0.01,0.01)'; + '\ISP\': + PIN_NUMBER='(0,0,37,0,0)'; + INPUT_LOAD='(-0.01,0.01)'; + '\TXD3\': + PIN_NUMBER='(0,41,0,0,0)'; + OUTPUT_LOAD='(1.0,-1.0)'; + '\TXD2\': + PIN_NUMBER='(0,43,0,0,0)'; + OUTPUT_LOAD='(1.0,-1.0)'; + '\TXD1\': + PIN_NUMBER='(0,45,0,0,0)'; + OUTPUT_LOAD='(1.0,-1.0)'; + '\TXD0\': + PIN_NUMBER='(0,19,0,0,0)'; + OUTPUT_LOAD='(1.0,-1.0)'; + '\TNOW3/GPIO11\': + PIN_NUMBER='(0,47,0,0,0)'; + BIDIRECTIONAL='TRUE'; + INPUT_LOAD='(-0.01,0.01)'; + OUTPUT_LOAD='(1.0,-1.0)'; + '\TNOW2/GPIO8\': + PIN_NUMBER='(0,46,0,0,0)'; + BIDIRECTIONAL='TRUE'; + INPUT_LOAD='(-0.01,0.01)'; + OUTPUT_LOAD='(1.0,-1.0)'; + '\TNOW1/GPIO5\': + PIN_NUMBER='(0,39,0,0,0)'; + BIDIRECTIONAL='TRUE'; + INPUT_LOAD='(-0.01,0.01)'; + OUTPUT_LOAD='(1.0,-1.0)'; + '\TNOW0/GPIO2\': + PIN_NUMBER='(0,36,0,0,0)'; + BIDIRECTIONAL='TRUE'; + INPUT_LOAD='(-0.01,0.01)'; + OUTPUT_LOAD='(1.0,-1.0)'; + '\RXD3\': + PIN_NUMBER='(0,40,0,0,0)'; + INPUT_LOAD='(-0.01,0.01)'; + '\RXD2\': + PIN_NUMBER='(0,42,0,0,0)'; + INPUT_LOAD='(-0.01,0.01)'; + '\RXD1\': + PIN_NUMBER='(0,44,0,0,0)'; + INPUT_LOAD='(-0.01,0.01)'; + '\RXD0\': + PIN_NUMBER='(0,22,0,0,0)'; + INPUT_LOAD='(-0.01,0.01)'; + '\RTS3/GPIO10\': + PIN_NUMBER='(0,16,0,0,0)'; + BIDIRECTIONAL='TRUE'; + INPUT_LOAD='(-0.01,0.01)'; + OUTPUT_LOAD='(1.0,-1.0)'; + '\RTS2/GPIO7\': + PIN_NUMBER='(0,14,0,0,0)'; + BIDIRECTIONAL='TRUE'; + INPUT_LOAD='(-0.01,0.01)'; + OUTPUT_LOAD='(1.0,-1.0)'; + '\RTS1/GPIO4\': + PIN_NUMBER='(0,12,0,0,0)'; + BIDIRECTIONAL='TRUE'; + INPUT_LOAD='(-0.01,0.01)'; + OUTPUT_LOAD='(1.0,-1.0)'; + '\RTS0/GPIO1\': + PIN_NUMBER='(0,20,0,0,0)'; + BIDIRECTIONAL='TRUE'; + INPUT_LOAD='(-0.01,0.01)'; + OUTPUT_LOAD='(1.0,-1.0)'; + '\RI0\': + PIN_NUMBER='(0,24,0,0,0)'; + INPUT_LOAD='(-0.01,0.01)'; + '\DTR0\': + PIN_NUMBER='(0,21,0,0,0)'; + OUTPUT_LOAD='(1.0,-1.0)'; + '\DSR0\': + PIN_NUMBER='(0,25,0,0,0)'; + INPUT_LOAD='(-0.01,0.01)'; + '\DCD0\': + PIN_NUMBER='(0,23,0,0,0)'; + INPUT_LOAD='(-0.01,0.01)'; + '\CTS3/GPIO9\': + PIN_NUMBER='(0,15,0,0,0)'; + BIDIRECTIONAL='TRUE'; + INPUT_LOAD='(-0.01,0.01)'; + OUTPUT_LOAD='(1.0,-1.0)'; + '\CTS2/GPIO6\': + PIN_NUMBER='(0,13,0,0,0)'; + BIDIRECTIONAL='TRUE'; + INPUT_LOAD='(-0.01,0.01)'; + OUTPUT_LOAD='(1.0,-1.0)'; + '\CTS1/GPIO3\': + PIN_NUMBER='(0,11,0,0,0)'; + BIDIRECTIONAL='TRUE'; + INPUT_LOAD='(-0.01,0.01)'; + OUTPUT_LOAD='(1.0,-1.0)'; + '\CTS0/GPIO0\': + PIN_NUMBER='(0,26,0,0,0)'; + BIDIRECTIONAL='TRUE'; + INPUT_LOAD='(-0.01,0.01)'; + OUTPUT_LOAD='(1.0,-1.0)'; + '\VIO#48\': + PIN_NUMBER='(48,0,0,0,0)'; + PINUSE='POWER'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '\VIO#2318\': + PIN_NUMBER='(18,0,0,0,0)'; + PINUSE='POWER'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '\VDDK#3\': + PIN_NUMBER='(3,0,0,0,0)'; + PINUSE='POWER'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '\VDDK#35\': + PIN_NUMBER='(35,0,0,0,0)'; + PINUSE='POWER'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '\VCC5\': + PIN_NUMBER='(27,0,0,0,0)'; + PINUSE='POWER'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '\VCC33\': + PIN_NUMBER='(33,0,0,0,0)'; + PINUSE='POWER'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '\GND#34\': + PIN_NUMBER='(34,0,0,0,0)'; + PINUSE='POWER'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '\GND#1\': + PIN_NUMBER='(1,0,0,0,0)'; + PINUSE='POWER'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + end_pin; + body + PART_NAME='CH9344Q'; + VALUE='CH9344Q'; + BODY_NAME='CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q'; + JEDEC_TYPE='LQFP48_050_700X700'; + PHYS_DES_PREFIX='U'; + CLASS='IC'; + end_body; +end_primitive; + +primitive 'CAP NP_C0402_DISCRETE_100PF'; + pin + '2': + PIN_NUMBER='(2)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '1': + PIN_NUMBER='(1)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + end_pin; + body + PART_NAME='CAP NP'; + VALUE='100pF'; + BODY_NAME='CAP NP_C0402_DISCRETE_100PF'; + JEDEC_TYPE='C0402'; + PHYS_DES_PREFIX='C'; + CLASS='DISCRETE'; + end_body; +end_primitive; + +primitive 'CAP NP_C0603_DISCRETE_10UF'; + pin + '2': + PIN_NUMBER='(2)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '1': + PIN_NUMBER='(1)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + end_pin; + body + PART_NAME='CAP NP'; + VALUE='10uF'; + BODY_NAME='CAP NP_C0603_DISCRETE_10UF'; + JEDEC_TYPE='C0603'; + PHYS_DES_PREFIX='C'; + CLASS='DISCRETE'; + end_body; +end_primitive; + +primitive 'CAP NP_C0402_BGA_DISCRETE_4.7NF'; + pin + '2': + PIN_NUMBER='(2)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '1': + PIN_NUMBER='(1)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + end_pin; + body + PART_NAME='CAP NP'; + VALUE='4.7nF'; + BODY_NAME='CAP NP_C0402_BGA_DISCRETE_4.7NF'; + JEDEC_TYPE='C0402_BGA'; + PHYS_DES_PREFIX='C'; + CLASS='DISCRETE'; + end_body; +end_primitive; + +primitive 'CAP NP_C0402_BGA_DISCRETE_1NF'; + pin + '2': + PIN_NUMBER='(2)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '1': + PIN_NUMBER='(1)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + end_pin; + body + PART_NAME='CAP NP'; + VALUE='1nF'; + BODY_NAME='CAP NP_C0402_BGA_DISCRETE_1NF'; + JEDEC_TYPE='C0402_BGA'; + PHYS_DES_PREFIX='C'; + CLASS='DISCRETE'; + end_body; +end_primitive; + +primitive 'CAP NP_C0402_BGA_DISCRETE_1UF'; + pin + '2': + PIN_NUMBER='(2)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '1': + PIN_NUMBER='(1)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + end_pin; + body + PART_NAME='CAP NP'; + VALUE='1uF'; + BODY_NAME='CAP NP_C0402_BGA_DISCRETE_1UF'; + JEDEC_TYPE='C0402_BGA'; + PHYS_DES_PREFIX='C'; + CLASS='DISCRETE'; + end_body; +end_primitive; + +primitive 'CAP NP_C0603_DISCRETE_100NF'; + pin + '2': + PIN_NUMBER='(2)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '1': + PIN_NUMBER='(1)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + end_pin; + body + PART_NAME='CAP NP'; + VALUE='100nF'; + BODY_NAME='CAP NP_C0603_DISCRETE_100NF'; + JEDEC_TYPE='C0603'; + PHYS_DES_PREFIX='C'; + CLASS='DISCRETE'; + end_body; +end_primitive; + +primitive 'CAP NP_C0402_DISCRETE_1NF'; + pin + '2': + PIN_NUMBER='(2)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '1': + PIN_NUMBER='(1)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + end_pin; + body + PART_NAME='CAP NP'; + VALUE='1nF'; + BODY_NAME='CAP NP_C0402_DISCRETE_1NF'; + JEDEC_TYPE='C0402'; + PHYS_DES_PREFIX='C'; + CLASS='DISCRETE'; + end_body; +end_primitive; + +primitive 'CAP NP_C0402_DISCRETE_1UF'; + pin + '2': + PIN_NUMBER='(2)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '1': + PIN_NUMBER='(1)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + end_pin; + body + PART_NAME='CAP NP'; + VALUE='1uF'; + BODY_NAME='CAP NP_C0402_DISCRETE_1UF'; + JEDEC_TYPE='C0402'; + PHYS_DES_PREFIX='C'; + CLASS='DISCRETE'; + end_body; +end_primitive; + +primitive 'CAP NP_C0603_DISCRETE_4.7UF'; + pin + '2': + PIN_NUMBER='(2)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '1': + PIN_NUMBER='(1)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + end_pin; + body + PART_NAME='CAP NP'; + VALUE='4.7uF'; + BODY_NAME='CAP NP_C0603_DISCRETE_4.7UF'; + JEDEC_TYPE='C0603'; + PHYS_DES_PREFIX='C'; + CLASS='DISCRETE'; + end_body; +end_primitive; + +primitive 'CAP NP_C0402_DISCRETE_4.7UF'; + pin + '2': + PIN_NUMBER='(2)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '1': + PIN_NUMBER='(1)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + end_pin; + body + PART_NAME='CAP NP'; + VALUE='4.7uF'; + BODY_NAME='CAP NP_C0402_DISCRETE_4.7UF'; + JEDEC_TYPE='C0402'; + PHYS_DES_PREFIX='C'; + CLASS='DISCRETE'; + end_body; +end_primitive; + +primitive 'CAP NP_NC_C0402_DISCRETE_10PF/NC'; + pin + '2': + PIN_NUMBER='(2)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '1': + PIN_NUMBER='(1)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + end_pin; + body + PART_NAME='CAP NP_NC'; + VALUE='10pF/NC'; + BODY_NAME='CAP NP_NC_C0402_DISCRETE_10PF/NC'; + JEDEC_TYPE='C0402'; + PHYS_DES_PREFIX='C'; + CLASS='DISCRETE'; + end_body; +end_primitive; + +primitive 'BEAD_L0603_0R'; + pin + '2': + PIN_NUMBER='(2)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '1': + PIN_NUMBER='(1)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + end_pin; + body + PART_NAME='BEAD'; + VALUE='0R'; + BODY_NAME='BEAD_L0603_0R'; + JEDEC_TYPE='L0603'; + PHYS_DES_PREFIX='FB'; + CLASS='IC'; + end_body; +end_primitive; + +primitive 'RESISTOR_R0402_DISCRETE_10K'; + pin + '2': + PIN_NUMBER='(2)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '1': + PIN_NUMBER='(1)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + end_pin; + body + PART_NAME='RESISTOR'; + VALUE='10K'; + BODY_NAME='RESISTOR_R0402_DISCRETE_10K'; + JEDEC_TYPE='R0402'; + PHYS_DES_PREFIX='R'; + CLASS='DISCRETE'; + end_body; +end_primitive; + +primitive 'RESISTOR_R0402_DISCRETE_12.1K'; + pin + '2': + PIN_NUMBER='(2)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '1': + PIN_NUMBER='(1)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + end_pin; + body + PART_NAME='RESISTOR'; + VALUE='12.1K'; + BODY_NAME='RESISTOR_R0402_DISCRETE_12.1K'; + JEDEC_TYPE='R0402'; + PHYS_DES_PREFIX='R'; + CLASS='DISCRETE'; + end_body; +end_primitive; + +primitive 'RESISTOR_R0402_DISCRETE_0R'; + pin + '2': + PIN_NUMBER='(2)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '1': + PIN_NUMBER='(1)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + end_pin; + body + PART_NAME='RESISTOR'; + VALUE='0R'; + BODY_NAME='RESISTOR_R0402_DISCRETE_0R'; + JEDEC_TYPE='R0402'; + PHYS_DES_PREFIX='R'; + CLASS='DISCRETE'; + end_body; +end_primitive; + +primitive 'RESISTOR_R0402_DISCRETE_240R'; + pin + '2': + PIN_NUMBER='(2)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '1': + PIN_NUMBER='(1)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + end_pin; + body + PART_NAME='RESISTOR'; + VALUE='240R'; + BODY_NAME='RESISTOR_R0402_DISCRETE_240R'; + JEDEC_TYPE='R0402'; + PHYS_DES_PREFIX='R'; + CLASS='DISCRETE'; + end_body; +end_primitive; + +primitive 'RESISTOR_NC_R0402_DISCRETE_10K/NC'; + pin + '2': + PIN_NUMBER='(2)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '1': + PIN_NUMBER='(1)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + end_pin; + body + PART_NAME='RESISTOR_NC'; + VALUE='10K/NC'; + BODY_NAME='RESISTOR_NC_R0402_DISCRETE_10K/NC'; + JEDEC_TYPE='R0402'; + PHYS_DES_PREFIX='R'; + CLASS='DISCRETE'; + end_body; +end_primitive; + +primitive 'MMCX-180_MMCX-180_50OHM'; + pin + '\SIG\': + PIN_NUMBER='(1)'; + PINUSE='UNSPEC'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '\GND#5\': + PIN_NUMBER='(5)'; + PINUSE='POWER'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '\GND#4\': + PIN_NUMBER='(4)'; + PINUSE='POWER'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '\GND#3\': + PIN_NUMBER='(3)'; + PINUSE='POWER'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + '\GND#2\': + PIN_NUMBER='(2)'; + PINUSE='POWER'; + NO_LOAD_CHECK='Both'; + NO_IO_CHECK='Both'; + NO_ASSERT_CHECK='TRUE'; + NO_DIR_CHECK='TRUE'; + ALLOW_CONNECT='TRUE'; + end_pin; + body + PART_NAME='MMCX-180'; + VALUE='50Ohm'; + BODY_NAME='MMCX-180_MMCX-180_50OHM'; + JEDEC_TYPE='MMCX-180'; + PHYS_DES_PREFIX='J'; + CLASS='IC'; + end_body; +end_primitive; + primitive 'TLV62569DBVR_SOT_23_5_TLV62569DBV'; pin '\VIN\': diff --git a/allegro/cmbcview.dat b/allegro/cmbcview.dat index fe6dfaa..20961ed 100644 Binary files a/allegro/cmbcview.dat and b/allegro/cmbcview.dat differ diff --git a/allegro/cmdbview.dat b/allegro/cmdbview.dat index eb557f0..644a08d 100644 Binary files a/allegro/cmdbview.dat and b/allegro/cmdbview.dat differ diff --git a/allegro/compview.dat b/allegro/compview.dat index a155709..82f1fed 100644 --- a/allegro/compview.dat +++ b/allegro/compview.dat @@ -1,5 +1,60 @@ A!REFDES!COMP_REUSE_ID!COMP_SIGNAL_MODEL!COMP_NO_XNET_CONNECTION!COMP_PARENT_PPT!COMP_SYMBOL_EDITED!COMP_PARENT_PPT_PART!COMP_EMBEDDED_PLACEMENT!COMP_RKO_NUM_LAYERS!COMP_RKO_SHORT_SIDE_OVERSIZE!COMP_RKO_LONG_SIDE_OVERSIZE!COMP_RKO_REF_LAYER!COMP_ASI_MODEL! -J!D:/POLARIS/RK3506_NAV/rk3506_nav.brd!Thu Aug 13 15:48:14 2026!-100.0000!-100.0000!100.0000!100.0000!0.0001!millimeters!RK3506_NAV!28.800000 mil!4!UP TO DATE! +J!D:/POLARIS/RK3506_NAV/rk3506_nav.brd!Sat Aug 15 10:52:42 2026!-100.0000!-100.0000!100.0000!100.0000!0.0001!millimeters!RK3506_NAV!28.800000 mil!4!UP TO DATE! +S!U19!!!!!!!!!!!!! +S!C11!!!!!!!!!!!!! +S!C12!!!!!!!!!!!!! +S!C28!!!!!!!!!!!!! +S!C14!!!!!!!!!!!!! +S!C29!!!!!!!!!!!!! +S!C30!!!!!!!!!!!!! +S!C31!!!!!!!!!!!!! +S!C17!!!!!!!!!!!!! +S!C18!!!!!!!!!!!!! +S!C19!!!!!!!!!!!!! +S!C20!!!!!!!!!!!!! +S!C21!!!!!!!!!!!!! +S!C22!!!!!!!!!!!!! +S!C23!!!!!!!!!!!!! +S!C24!!!!!!!!!!!!! +S!C25!!!!!!!!!!!!! +S!C26!!!!!!!!!!!!! +S!C27!!!!!!!!!!!!! +S!C32!!!!!!!!!!!!! +S!C43!!!!!!!!!!!!! +S!C53!!!!!!!!!!!!! +S!C62!!!!!!!!!!!!! +S!C46!!!!!!!!!!!!! +S!C48!!!!!!!!!!!!! +S!C51!!!!!!!!!!!!! +S!C55!!!!!!!!!!!!! +S!C58!!!!!!!!!!!!! +S!C61!!!!!!!!!!!!! +S!C63!!!!!!!!!!!!! +S!FB1!!!!!!!!!!!!! +S!FB2!!!!!!!!!!!!! +S!R10!!!!!!!!!!!!! +S!R11!!!!!!!!!!!!! +S!R12!!!!!!!!!!!!! +S!R14!!!!!!!!!!!!! +S!R16!!!!!!!!!!!!! +S!R17!!!!!!!!!!!!! +S!R19!!!!!!!!!!!!! +S!R20!!!!!!!!!!!!! +S!R21!!!!!!!!!!!!! +S!R13!!!!!!!!!!!!! +S!R7!!!!!!!!!!!!! +S!R15!!!!!!!!!!!!! +S!R18!!!!!!!!!!!!! +S!R2!!!!!!!!!!!!! +S!R3!!!!!!!!!!!!! +S!R4!!!!!!!!!!!!! +S!R5!!!!!!!!!!!!! +S!R6!!!!!!!!!!!!! +S!R23!!!!!!!!!!!!! +S!R24!!!!!!!!!!!!! +S!R25!!!!!!!!!!!!! +S!J2!!!!!!!!!!!!! +S!J3!!!!!!!!!!!!! S!U11!!!!!!!!!!!!! S!U12!!!!!!!!!!!!! S!U13!!!!!!!!!!!!! @@ -11,6 +66,26 @@ S!C1!!!!!!!!!!!!! S!C2!!!!!!!!!!!!! S!C10!!!!!!!!!!!!! S!C9!!!!!!!!!!!!! +S!C13!!!!!!!!!!!!! +S!C15!!!!!!!!!!!!! +S!C16!!!!!!!!!!!!! +S!C33!!!!!!!!!!!!! +S!C34!!!!!!!!!!!!! +S!C35!!!!!!!!!!!!! +S!C36!!!!!!!!!!!!! +S!C37!!!!!!!!!!!!! +S!C42!!!!!!!!!!!!! +S!C44!!!!!!!!!!!!! +S!C45!!!!!!!!!!!!! +S!C47!!!!!!!!!!!!! +S!C49!!!!!!!!!!!!! +S!C50!!!!!!!!!!!!! +S!C52!!!!!!!!!!!!! +S!C54!!!!!!!!!!!!! +S!C56!!!!!!!!!!!!! +S!C57!!!!!!!!!!!!! +S!C59!!!!!!!!!!!!! +S!C60!!!!!!!!!!!!! S!C3!!!!!!!!!!!!! S!C4!!!!!!!!!!!!! S!C5!!!!!!!!!!!!! @@ -20,7 +95,7 @@ S!C8!!!!!!!!!!!!! S!J1!!!!!!!!!!!!! S!R1!!!!!!!!!!!!! S!U1!!!!!!!!!!!!! -S!U2!!!!!!!!!!!!! -S!U3!!!!!!!!!!!!! +S!U17!!!!!!!!!!!!! +S!U18!!!!!!!!!!!!! S!U9!!!!!!!!!!!!! S!X1!!!!!!!!!!!!! diff --git a/allegro/feedbackview.cdsz b/allegro/feedbackview.cdsz index b4c3c52..1e27b88 100644 Binary files a/allegro/feedbackview.cdsz and b/allegro/feedbackview.cdsz differ diff --git a/allegro/funcView.dat b/allegro/funcView.dat index b226784..17bf6c7 100644 --- a/allegro/funcView.dat +++ b/allegro/funcView.dat @@ -1,42 +1,121 @@ A!FUNC_LOGICAL_PATH!COMP_DEVICE_TYPE!REFDES!FUNC_PRIM_FILE!COMP_PARENT_PPT!COMP_PARENT_PPT_PART!COMP_PARENT_PART_TYPE!FUNC_SCH_SIZE!FUNC_HAS_FIXED_SIZE!FUNC_DES!FUNC_GROUP!FUNC_ROOM!FUNC_TERM_IDENT!FUNC_CDS_FSP_INSTANCE_ID!FUNC_CDS_FSP_IS_FPGA!FUNC_CDS_FSP_UID! -J!D:/POLARIS/RK3506_NAV/rk3506_nav.brd!Thu Aug 13 15:48:14 2026!-100.0000!-100.0000!100.0000!100.0000!0.0001!millimeters!RK3506_NAV!28.800000 mil!4!UP TO DATE! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55441\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!U11!.\chipsView.dat!!!!!!F8!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55469\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!U12!.\chipsView.dat!!!!!!F7!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55497\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!U13!.\chipsView.dat!!!!!!F6!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55525\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!U14!.\chipsView.dat!!!!!!F5!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55553\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!U15!.\chipsView.dat!!!!!!F4!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!U16!.\chipsView.dat!!!!!!TF-40!!!!!!! +J!D:/POLARIS/RK3506_NAV/rk3506_nav.brd!Sat Aug 15 10:52:42 2026!-100.0000!-100.0000!100.0000!100.0000!0.0001!millimeters!RK3506_NAV!28.800000 mil!4!UP TO DATE! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793506\@\QF_IC\.\CH9344QA.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!U19!.\chipsView.dat!!!!!!F6!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!U19!.\chipsView.dat!!!!!!TF-127!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793582\@\QF_IC\.\CH9344QC.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!U19!.\chipsView.dat!!!!!!TF-126!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793591\@\QF_IC\.\CH9344QD.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!U19!.\chipsView.dat!!!!!!TF-125!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793606\@\QF_IC\.\CH9344QE.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!U19!.\chipsView.dat!!!!!!TF-124!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60874\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100PF!C11!.\chipsView.dat!!!!!!F105!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS61194\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100PF!C12!.\chipsView.dat!!!!!!F104!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16780189\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100PF!C28!.\chipsView.dat!!!!!!F103!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS64015\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_10UF!C14!.\chipsView.dat!!!!!!F80!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781112\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_10UF!C29!.\chipsView.dat!!!!!!F79!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781131\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_10UF!C30!.\chipsView.dat!!!!!!F78!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781150\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_10UF!C31!.\chipsView.dat!!!!!!F77!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16774421\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_4.7NF!C17!.\chipsView.dat!!!!!!F76!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16774477\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_1NF!C18!.\chipsView.dat!!!!!!F75!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16774613\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_1UF!C19!.\chipsView.dat!!!!!!F74!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16774705\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_100NF!C20!.\chipsView.dat!!!!!!F73!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16778769\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!C21!.\chipsView.dat!!!!!!F72!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16778930\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!C22!.\chipsView.dat!!!!!!F71!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16778954\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!C23!.\chipsView.dat!!!!!!F70!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779229\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!C24!.\chipsView.dat!!!!!!F69!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779248\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!C25!.\chipsView.dat!!!!!!F68!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779458\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!C26!.\chipsView.dat!!!!!!F67!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779568\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!C27!.\chipsView.dat!!!!!!F66!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781169\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!C32!.\chipsView.dat!!!!!!F65!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16788606\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!C43!.\chipsView.dat!!!!!!F64!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789896\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!C53!.\chipsView.dat!!!!!!F63!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16792411\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!C62!.\chipsView.dat!!!!!!F62!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16788776\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_4.7UF!C46!.\chipsView.dat!!!!!!F61!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789021\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_4.7UF!C48!.\chipsView.dat!!!!!!F60!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789838\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_4.7UF!C51!.\chipsView.dat!!!!!!F59!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789946\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_4.7UF!C55!.\chipsView.dat!!!!!!F58!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791417\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_4.7UF!C58!.\chipsView.dat!!!!!!F56!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791929\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_4.7UF!C61!.\chipsView.dat!!!!!!F55!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793157\@\QF_DISCRETE\.\CAP NP_NC.Normal\(chips)!CAP NP_NC_C0402_DISCRETE_10PF/NC!C63!.\chipsView.dat!!!!!!F53!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16790442\@\QF_DISCRETE\.\BEAD.Normal\(chips)!BEAD_L0603_0R!FB1!.\chipsView.dat!!!!!!F50!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16790635\@\QF_DISCRETE\.\BEAD.Normal\(chips)!BEAD_L0603_0R!FB2!.\chipsView.dat!!!!!!F49!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785432\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!R10!.\chipsView.dat!!!!!!F45!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785470\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!R11!.\chipsView.dat!!!!!!F44!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785611\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!R12!.\chipsView.dat!!!!!!F43!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785670\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!R14!.\chipsView.dat!!!!!!F42!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786089\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!R16!.\chipsView.dat!!!!!!F41!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786101\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!R17!.\chipsView.dat!!!!!!F40!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786347\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!R19!.\chipsView.dat!!!!!!F39!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786363\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!R20!.\chipsView.dat!!!!!!F38!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786462\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!R21!.\chipsView.dat!!!!!!F37!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785633\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_12.1K!R13!.\chipsView.dat!!!!!!F36!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16784995\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_12.1K!R7!.\chipsView.dat!!!!!!F35!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785907\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_0R!R15!.\chipsView.dat!!!!!!F34!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786204\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_0R!R18!.\chipsView.dat!!!!!!F33!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16777695\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_240R!R2!.\chipsView.dat!!!!!!F32!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779393\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_240R!R3!.\chipsView.dat!!!!!!F31!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779420\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_240R!R4!.\chipsView.dat!!!!!!F30!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16780784\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_240R!R5!.\chipsView.dat!!!!!!F29!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16780833\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_240R!R6!.\chipsView.dat!!!!!!F28!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16792656\@\QF_DISCRETE\.\RESISTOR_NC.Normal\(chips)!RESISTOR_NC_R0402_DISCRETE_10K/NC!R23!.\chipsView.dat!!!!!!F27!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16792697\@\QF_DISCRETE\.\RESISTOR_NC.Normal\(chips)!RESISTOR_NC_R0402_DISCRETE_10K/NC!R24!.\chipsView.dat!!!!!!F26!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16792716\@\QF_DISCRETE\.\RESISTOR_NC.Normal\(chips)!RESISTOR_NC_R0402_DISCRETE_10K/NC!R25!.\chipsView.dat!!!!!!F25!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60593\@\QF_ANT\.\MMCX-180.Normal\(chips)!MMCX-180_MMCX-180_50OHM!J2!.\chipsView.dat!!!!!!F48!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60619\@\QF_ANT\.\MMCX-180.Normal\(chips)!MMCX-180_MMCX-180_50OHM!J3!.\chipsView.dat!!!!!!F47!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55441\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!U11!.\chipsView.dat!!!!!!F16!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55469\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!U12!.\chipsView.dat!!!!!!F15!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55497\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!U13!.\chipsView.dat!!!!!!F14!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55525\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!U14!.\chipsView.dat!!!!!!F13!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55553\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!U15!.\chipsView.dat!!!!!!F12!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!U16!.\chipsView.dat!!!!!!F11!!!!!!! S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!U16!.\chipsView.dat!!!!!!TF-39!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!U10!.\chipsView.dat!!!!!!TF-38!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19387\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_18PF!C1!.\chipsView.dat!!!!!!F23!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19709\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_18PF!C2!.\chipsView.dat!!!!!!F22!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS41270\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_10UF!C10!.\chipsView.dat!!!!!!F21!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40428\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_10UF!C9!.\chipsView.dat!!!!!!F20!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19878\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C3!.\chipsView.dat!!!!!!F19!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35873\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C4!.\chipsView.dat!!!!!!F18!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35933\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_10UF!C5!.\chipsView.dat!!!!!!F17!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35977\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_22UF!C6!.\chipsView.dat!!!!!!F16!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40356\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_100NF!C7!.\chipsView.dat!!!!!!F15!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40392\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_100NF!C8!.\chipsView.dat!!!!!!F14!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!U10!.\chipsView.dat!!!!!!F17!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19387\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_18PF!C1!.\chipsView.dat!!!!!!F109!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19709\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_18PF!C2!.\chipsView.dat!!!!!!F108!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS41270\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_10UF!C10!.\chipsView.dat!!!!!!F107!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40428\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_10UF!C9!.\chipsView.dat!!!!!!F106!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS63979\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C13!.\chipsView.dat!!!!!!F102!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS69589\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C15!.\chipsView.dat!!!!!!F101!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS69901\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C16!.\chipsView.dat!!!!!!F100!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781188\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C33!.\chipsView.dat!!!!!!F98!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781207\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C34!.\chipsView.dat!!!!!!F97!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781226\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C35!.\chipsView.dat!!!!!!F96!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781245\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C36!.\chipsView.dat!!!!!!F95!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781264\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C37!.\chipsView.dat!!!!!!F94!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16787638\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C42!.\chipsView.dat!!!!!!F92!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16788730\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C44!.\chipsView.dat!!!!!!F91!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16788748\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C45!.\chipsView.dat!!!!!!F90!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789003\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C47!.\chipsView.dat!!!!!!F89!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789780\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C49!.\chipsView.dat!!!!!!F88!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789810\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C50!.\chipsView.dat!!!!!!F87!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789864\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C52!.\chipsView.dat!!!!!!F86!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789920\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C54!.\chipsView.dat!!!!!!F85!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791351\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C56!.\chipsView.dat!!!!!!F84!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791389\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C57!.\chipsView.dat!!!!!!F83!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791893\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C59!.\chipsView.dat!!!!!!F82!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791911\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C60!.\chipsView.dat!!!!!!F81!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19878\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C3!.\chipsView.dat!!!!!!F99!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35873\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C4!.\chipsView.dat!!!!!!F93!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35933\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_10UF!C5!.\chipsView.dat!!!!!!F57!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35977\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_22UF!C6!.\chipsView.dat!!!!!!F54!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40356\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_100NF!C7!.\chipsView.dat!!!!!!F52!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40392\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_100NF!C8!.\chipsView.dat!!!!!!F51!!!!!!! S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!J1!.\chipsView.dat!!!!!!TF-27!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19332\@\DISCRETE\.\R.Normal\(chips)!R_R0402_DISCRETE_1M!R1!.\chipsView.dat!!!!!!F13!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!F12!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19332\@\DISCRETE\.\R.Normal\(chips)!R_R0402_DISCRETE_1M!R1!.\chipsView.dat!!!!!!F46!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!F24!!!!!!! S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!TF-24!!!!!!! S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16199\@\LIBRARY\.\SOC_RK3506BC.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!TF-23!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!TF-22!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!TF-21!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!F23!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!F22!!!!!!! S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!TF-20!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!F11!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!TF-18!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!F10!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!F9!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS20987\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!U2!.\chipsView.dat!!!!!!TF-15!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21054\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!U2!.\chipsView.dat!!!!!!F3!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21176\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!U3!.\chipsView.dat!!!!!!TF-13!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21243\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!U3!.\chipsView.dat!!!!!!F2!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!U9!.\chipsView.dat!!!!!!F1!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!U9!.\chipsView.dat!!!!!!TF-5!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52850\@\QF_IC\.\K922C.Normal\(chips)!K922_K922_K922!U9!.\chipsView.dat!!!!!!TF-4!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52892\@\QF_IC\.\K922D.Normal\(chips)!K922_K922_K922!U9!.\chipsView.dat!!!!!!TF-3!!!!!!! -S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!U9!.\chipsView.dat!!!!!!TF-2!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!F21!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!F20!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!F19!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!F18!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!U17!.\chipsView.dat!!!!!!F10!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71271\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!U17!.\chipsView.dat!!!!!!F9!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!U18!.\chipsView.dat!!!!!!F8!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71476\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!U18!.\chipsView.dat!!!!!!F7!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!U9!.\chipsView.dat!!!!!!F5!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!U9!.\chipsView.dat!!!!!!F4!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52850\@\QF_IC\.\K922C.Normal\(chips)!K922_K922_K922!U9!.\chipsView.dat!!!!!!F3!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52892\@\QF_IC\.\K922D.Normal\(chips)!K922_K922_K922!U9!.\chipsView.dat!!!!!!F2!!!!!!! +S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!U9!.\chipsView.dat!!!!!!F1!!!!!!! S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19052\@\OTHER\.\CRYSTAL 1-3_4Pin.Normal\(chips)!CRYSTAL 1-3_4PIN_XTAL3225_CRYSTAL 1-3_4PIN!X1!.\chipsView.dat!!!!!!F0!!!!!!! diff --git a/allegro/netview.dat b/allegro/netview.dat index 9a8266d..e59dfe2 100644 --- a/allegro/netview.dat +++ b/allegro/netview.dat @@ -1,12 +1,126 @@ A!NET_NAME!NET_LOGICAL_PATH!NET_VOLTAGE! -J!D:/POLARIS/RK3506_NAV/rk3506_nav.brd!Thu Aug 13 15:48:14 2026!-100.0000!-100.0000!100.0000!100.0000!0.0001!millimeters!RK3506_NAV!28.800000 mil!4!UP TO DATE! +J!D:/POLARIS/RK3506_NAV/rk3506_nav.brd!Sat Aug 15 10:52:42 2026!-100.0000!-100.0000!100.0000!100.0000!0.0001!millimeters!RK3506_NAV!28.800000 mil!4!UP TO DATE! +S!VDDK!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDDK\!1.2V! +S!VCC33!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VCC33\!3.3V! +S!VCC5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VCC5\!3.3V! +S!VIO!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VIO\!3.3V! +S!DDR3_A7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A7\!! +S!DDR3_WEN!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_WEN\!! +S!DDR3_A4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A4\!! +S!DDR3_A9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A9\!! +S!DDR3_RASN!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_RASN\!! +S!DDR3_A12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A12\!! +S!DDR3_A15!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A15\!! +S!ETH_CLK0_25M_OUT!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\ETH_CLK0_25M_OUT\!! +S!DDR3_A14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A14\!! +S!DDR3_BA2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_BA2\!! +S!DDR3_A6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A6\!! +S!DDR3_A2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A2\!! +S!RMII0_RST!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII0_RST\!! +S!DDR3_ODT!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_ODT\!! +S!DDR3_A3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A3\!! +S!DDR3_BA1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_BA1\!! +S!DDR3_CSN!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_CSN\!! +S!VDDIO_RMII0!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDDIO_RMII0\!1.8V! +S!DDR3_A5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A5\!! +S!DDR3_A11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A11\!! +S!DDR3_A1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A1\!! +S!DDR3_A8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A8\!! +S!DDR3_A13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A13\!! +S!DDR3_CASN!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_CASN\!! +S!VDDIO_RMII1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDDIO_RMII1\!1.8V! +S!DDR3_A10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A10\!! +S!DDR3_BA0!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_BA0\!! +S!N16785709!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N16785709\!! +S!DDR3_RST!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_RST\!! +S!DDR3_CLKN!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_CLKN\!! +S!DDR3_A0!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A0\!! +S!N16785482!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N16785482\!! +S!N16785446!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N16785446\!! +S!RMII1_RST!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII1_RST\!! +S!ETH_CLK1_25M_OUT!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\ETH_CLK1_25M_OUT\!! +S!DDR3_CKE!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_CKE\!! +S!N16785007!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N16785007\!! +S!EMMC_RSTN!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\EMMC_RSTN\!! +S!VDD_1V8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDD_1V8\!1.8V! +S!N16792429!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N16792429\!! +S!DDR_D10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D10\!! +S!DDR_D9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D9\!! +S!DDR_D7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D7\!! +S!DDR_D3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D3\!! +S!RMII1_CLK!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII1_CLK\!! +S!DDR_D13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D13\!! +S!DDR_D8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D8\!! +S!DDR_DM1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_DM1\!! +S!DDR_D11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D11\!! +S!DDR_DQS1N!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_DQS1N\!! +S!DDR_D4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D4\!! +S!DDR_D14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D14\!! +S!DDR_DQS0P!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_DQS0P\!! +S!DDR_D15!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D15\!! +S!DDR_D0!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D0\!! +S!DDR_D6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D6\!! +S!DDR_DQS0N!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_DQS0N\!! +S!DDR_D12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D12\!! +S!DDR_DQS1P!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_DQS1P\!! +S!DDR_DM0!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_DM0\!! +S!DDR_D2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D2\!! +S!DDR_D1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D1\!! +S!DDR_D5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D5\!! +S!GNSS_COM1_TX!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\GNSS_COM1_TX\!! +S!N16780119!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N16780119\!! +S!DDR3_CLKP!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_CLKP\!! +S!GNSS_COM3_RX!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\GNSS_COM3_RX\!! +S!GNSS_COM1_RX!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\GNSS_COM1_RX\!! +S!GNSS_COM2_RX!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\GNSS_COM2_RX\!! +S!VDDCR_RMII1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDDCR_RMII1\!1.2V! +S!GNSS_COM3_TX!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\GNSS_COM3_TX\!! +S!GNSS_COM2_TX!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\GNSS_COM2_TX\!! +S!PPS!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\PPS\!! +S!VDD_GNSS!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDD_GNSS\!3.3V! +S!ANT2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\ANT2\!! +S!ANT1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\ANT1\!! +S!N61267!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N61267\!! +S!N16777370!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N16777370\!! +S!RMII0_RXDV_CRS!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII0_RXDV_CRS\!! +S!DDR3_VREF_CA!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_VREF_CA\!0.675V! +S!RMII0_MDIO!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII0_MDIO\!! +S!RMII0_MDC!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII0_MDC\!! +S!DDR3_VREF_DQ!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_VREF_DQ\!0.675V! +S!N61054!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N61054\!! +S!RMII0_TXEN!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII0_TXEN\!! +S!RMII0_TXD1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII0_TXD1\!! +S!RMII0_TXD0!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII0_TXD0\!! +S!VDDCR_RMII0!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDDCR_RMII0\!1.2V! +S!RMII0_CLK!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII0_CLK\!! +S!RMII0_RXD1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII0_RXD1\!! +S!RMII0_RXD0!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII0_RXD0\!! +S!RMII1_RXDV_CRS!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII1_RXDV_CRS\!! +S!RMII1_MDC!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII1_MDC\!! +S!RMII1_TXEN!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII1_TXEN\!! +S!RMII1_TXD1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII1_TXD1\!! +S!RMII1_TXD0!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII1_TXD0\!! +S!RMII1_RXD0!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII1_RXD0\!! +S!RMII1_RXD1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII1_RXD1\!! +S!RMII1_MDIO!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII1_MDIO\!! +S!EMMC_CLK!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\EMMC_CLK\!! +S!VDDA_RMII1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDDA_RMII1\!3.3V! +S!VCC_DDR!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VCC_DDR\!1.35V! +S!VDDA_RMII0!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDDA_RMII0\!3.3V! +S!VDD_3V3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDD_3V3\!3.3V! +S!EMMC_CMD!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\EMMC_CMD\!! +S!EMMC_D1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\EMMC_D1\!! +S!EMMC_D0!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\EMMC_D0\!! +S!EMMC_D3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\EMMC_D3\!! +S!N16786486!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N16786486\!! +S!EMMC_D2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\EMMC_D2\!! +S!EMMC_CLKOUT!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\EMMC_CLKOUT\!! +S!N16786382!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N16786382\!! +S!DDR_VREF_DQ!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_VREF_DQ\!! +S!DDR_VREF_CA!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_VREF_CA\!! +S!N16786362!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N16786362\!! S!VIN!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VIN\!5V! S!SW!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\SW\!3.3V! -S!VDDCR!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDDCR\!1.5V! -S!VDD2A!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDD2A\!1.5V! -S!VDDIO!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDDIO\!3.3! -S!VDD1A!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDD1A\!3.3V! -S!VCC!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VCC\!3.3V! S!V_BCKP!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\V_BCKP\!3.3V! S!VCC_1V8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VCC_1V8\!1.5V! S!VDD_0V9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDD_0V9\!0.9V! diff --git a/allegro/pinview.dat b/allegro/pinview.dat index 2852c53..94faf09 100644 --- a/allegro/pinview.dat +++ b/allegro/pinview.dat @@ -1,67 +1,229 @@ A!NET_NAME!REFDES!PIN_NUMBER!FUNC_LOGICAL_PATH!COMP_DEVICE_TYPE!FUNC_SCH_SIZE!FUNC_HAS_FIXED_SIZE!FUNC_DES!PIN_CDS_PINID!PIN_TERMINATION!PIN_TERM_IDENT!PIN_NET_SHORT!PIN_XNET_PINS!PIN_RKO_NUM_LAYERS!PIN_RKO_SHORT_SIDE_OVERSIZE!PIN_RKO_LONG_SIDE_OVERSIZE! -J!D:/POLARIS/RK3506_NAV/rk3506_nav.brd!Thu Aug 13 15:48:14 2026!-100.0000!-100.0000!100.0000!100.0000!0.0001!millimeters!RK3506_NAV!28.800000 mil!4!UP TO DATE! -S!!U11!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55441\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F8!\EN\!!!!!!!! -S!!U11!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55441\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F8!\FB\!!!!!!!! -S!GND!U11!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55441\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F8!\GND\!!!!!!!! -S!SW!U11!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55441\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F8!\SW\!!!!!!!! -S!VIN!U11!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55441\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F8!\VIN\!!!!!!!! -S!!U12!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55469\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F7!\EN\!!!!!!!! -S!!U12!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55469\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F7!\FB\!!!!!!!! -S!GND!U12!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55469\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F7!\GND\!!!!!!!! -S!SW!U12!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55469\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F7!\SW\!!!!!!!! -S!VIN!U12!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55469\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F7!\VIN\!!!!!!!! -S!!U13!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55497\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F6!\EN\!!!!!!!! -S!!U13!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55497\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F6!\FB\!!!!!!!! -S!GND!U13!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55497\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F6!\GND\!!!!!!!! -S!SW!U13!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55497\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F6!\SW\!!!!!!!! -S!VIN!U13!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55497\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F6!\VIN\!!!!!!!! -S!!U14!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55525\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F5!\EN\!!!!!!!! -S!!U14!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55525\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F5!\FB\!!!!!!!! -S!GND!U14!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55525\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F5!\GND\!!!!!!!! -S!SW!U14!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55525\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F5!\SW\!!!!!!!! -S!VIN!U14!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55525\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F5!\VIN\!!!!!!!! -S!!U15!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55553\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F4!\EN\!!!!!!!! -S!!U15!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55553\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F4!\FB\!!!!!!!! -S!GND!U15!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55553\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F4!\GND\!!!!!!!! -S!SW!U15!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55553\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F4!\SW\!!!!!!!! -S!VIN!U15!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55553\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F4!\VIN\!!!!!!!! -S!!U16!M6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\CLK\!!!!!!!! -S!!U16!M5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\CMD\!!!!!!!! -S!!U16!H5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\DATA STROBE\!!!!!!!! -S!!U16!A3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\DATA0\!!!!!!!! -S!!U16!A4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\DATA1\!!!!!!!! -S!!U16!A5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\DATA2\!!!!!!!! -S!!U16!B2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\DATA3\!!!!!!!! -S!!U16!B3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\DATA4\!!!!!!!! -S!!U16!B4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\DATA5\!!!!!!!! -S!!U16!B5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\DATA6\!!!!!!!! -S!!U16!B6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\DATA7\!!!!!!!! -S!!U16!K5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\RST_N\!!!!!!!! -S!!U16!E6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\VCC1\!!!!!!!! -S!!U16!F5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\VCC2\!!!!!!!! -S!!U16!J10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\VCC3\!!!!!!!! -S!!U16!K9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\VCC4\!!!!!!!! -S!!U16!C6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\VCCQ1\!!!!!!!! -S!!U16!M4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\VCCQ2\!!!!!!!! -S!!U16!N4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\VCCQ3\!!!!!!!! -S!!U16!P3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\VCCQ4\!!!!!!!! -S!!U16!P5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\VCCQ5\!!!!!!!! -S!!U16!C2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\VDDI\!!!!!!!! -S!!U16!E9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\VSF1\!!!!!!!! -S!!U16!E10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\VSF2\!!!!!!!! -S!!U16!F10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\VSF3\!!!!!!!! -S!!U16!K10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\VSF4\!!!!!!!! -S!!U16!J5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\VSS1\!!!!!!!! -S!!U16!A6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\VSS2\!!!!!!!! -S!!U16!C4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\VSS3\!!!!!!!! -S!!U16!E7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\VSS4\!!!!!!!! -S!!U16!G5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\VSS5\!!!!!!!! -S!!U16!H10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\VSS6\!!!!!!!! -S!!U16!K8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\VSSQ1\!!!!!!!! -S!!U16!N2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\VSSQ2\!!!!!!!! -S!!U16!N5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\VSSQ3\!!!!!!!! -S!!U16!P4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\VSSQ4\!!!!!!!! -S!!U16!P6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-40!\VSSQ5\!!!!!!!! +J!D:/POLARIS/RK3506_NAV/rk3506_nav.brd!Sat Aug 15 10:52:42 2026!-100.0000!-100.0000!100.0000!100.0000!0.0001!millimeters!RK3506_NAV!28.800000 mil!4!UP TO DATE! +S!GND!U19!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793506\@\QF_IC\.\CH9344QA.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F6!\GND#1\!!!!!!!! +S!GND!U19!34!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793506\@\QF_IC\.\CH9344QA.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F6!\GND#34\!!!!!!!! +S!VCC33!U19!33!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793506\@\QF_IC\.\CH9344QA.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F6!\VCC33\!!!!!!!! +S!VCC5!U19!27!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793506\@\QF_IC\.\CH9344QA.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F6!\VCC5\!!!!!!!! +S!VDDK!U19!35!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793506\@\QF_IC\.\CH9344QA.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F6!\VDDK#35\!!!!!!!! +S!VDDK!U19!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793506\@\QF_IC\.\CH9344QA.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F6!\VDDK#3\!!!!!!!! +S!VIO!U19!18!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793506\@\QF_IC\.\CH9344QA.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F6!\VIO#2318\!!!!!!!! +S!VIO!U19!48!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793506\@\QF_IC\.\CH9344QA.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F6!\VIO#48\!!!!!!!! +S!!U19!26!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-127!\CTS0/GPIO0\!!!!!!!! +S!!U19!11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-127!\CTS1/GPIO3\!!!!!!!! +S!!U19!13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-127!\CTS2/GPIO6\!!!!!!!! +S!!U19!15!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-127!\CTS3/GPIO9\!!!!!!!! +S!!U19!23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-127!\DCD0\!!!!!!!! +S!!U19!25!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-127!\DSR0\!!!!!!!! +S!!U19!21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-127!\DTR0\!!!!!!!! +S!!U19!24!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-127!\RI0\!!!!!!!! +S!!U19!20!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-127!\RTS0/GPIO1\!!!!!!!! +S!!U19!12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-127!\RTS1/GPIO4\!!!!!!!! +S!!U19!14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-127!\RTS2/GPIO7\!!!!!!!! +S!!U19!16!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-127!\RTS3/GPIO10\!!!!!!!! +S!!U19!22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-127!\RXD0\!!!!!!!! +S!!U19!44!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-127!\RXD1\!!!!!!!! +S!!U19!42!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-127!\RXD2\!!!!!!!! +S!!U19!40!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-127!\RXD3\!!!!!!!! +S!!U19!36!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-127!\TNOW0/GPIO2\!!!!!!!! +S!!U19!39!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-127!\TNOW1/GPIO5\!!!!!!!! +S!!U19!46!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-127!\TNOW2/GPIO8\!!!!!!!! +S!!U19!47!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-127!\TNOW3/GPIO11\!!!!!!!! +S!!U19!19!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-127!\TXD0\!!!!!!!! +S!!U19!45!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-127!\TXD1\!!!!!!!! +S!!U19!43!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-127!\TXD2\!!!!!!!! +S!!U19!41!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-127!\TXD3\!!!!!!!! +S!!U19!37!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793582\@\QF_IC\.\CH9344QC.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-126!\ISP\!!!!!!!! +S!!U19!38!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793582\@\QF_IC\.\CH9344QC.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-126!\RST#\!!!!!!!! +S!!U19!31!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793582\@\QF_IC\.\CH9344QC.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-126!\UD+\!!!!!!!! +S!!U19!32!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793582\@\QF_IC\.\CH9344QC.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-126!\UD-\!!!!!!!! +S!!U19!29!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793591\@\QF_IC\.\CH9344QD.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-125!\XI\!!!!!!!! +S!!U19!28!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793591\@\QF_IC\.\CH9344QD.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-125!\XO\!!!!!!!! +S!!U19!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793606\@\QF_IC\.\CH9344QE.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-124!\NC1\!!!!!!!! +S!!U19!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793606\@\QF_IC\.\CH9344QE.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-124!\NC2\!!!!!!!! +S!!U19!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793606\@\QF_IC\.\CH9344QE.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-124!\NC3\!!!!!!!! +S!!U19!6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793606\@\QF_IC\.\CH9344QE.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-124!\NC4\!!!!!!!! +S!!U19!7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793606\@\QF_IC\.\CH9344QE.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-124!\NC5\!!!!!!!! +S!!U19!8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793606\@\QF_IC\.\CH9344QE.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-124!\NC6\!!!!!!!! +S!!U19!9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793606\@\QF_IC\.\CH9344QE.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-124!\NC7\!!!!!!!! +S!!U19!10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793606\@\QF_IC\.\CH9344QE.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-124!\NC8\!!!!!!!! +S!!U19!30!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793606\@\QF_IC\.\CH9344QE.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-124!\NC9\!!!!!!!! +S!!U19!17!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793606\@\QF_IC\.\CH9344QE.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-124!\TEST\!!!!!!!! +S!ANT1!C11!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60874\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100PF!!!F105!\1\!!!!!!!! +S!N61054!C11!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60874\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100PF!!!F105!\2\!!!!!!!! +S!ANT2!C12!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS61194\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100PF!!!F104!\1\!!!!!!!! +S!N61267!C12!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS61194\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100PF!!!F104!\2\!!!!!!!! +S!N16780119!C28!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16780189\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100PF!!!F103!\1\!!!!!!!! +S!GND!C28!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16780189\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100PF!!!F103!\2\!!!!!!!! +S!VDD_GNSS!C14!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS64015\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_10UF!!!F80!\1\!!!!!!!! +S!GND!C14!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS64015\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_10UF!!!F80!\2\!!!!!!!! +S!VCC_DDR!C29!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781112\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_10UF!!!F79!\1\!!!!!!!! +S!GND!C29!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781112\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_10UF!!!F79!\2\!!!!!!!! +S!VCC_DDR!C30!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781131\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_10UF!!!F78!\1\!!!!!!!! +S!GND!C30!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781131\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_10UF!!!F78!\2\!!!!!!!! +S!VCC_DDR!C31!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781150\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_10UF!!!F77!\1\!!!!!!!! +S!GND!C31!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781150\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_10UF!!!F77!\2\!!!!!!!! +S!VCC_DDR!C17!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16774421\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_4.7NF!!!F76!\1\!!!!!!!! +S!GND!C17!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16774421\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_4.7NF!!!F76!\2\!!!!!!!! +S!VCC_DDR!C18!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16774477\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_1NF!!!F75!\1\!!!!!!!! +S!GND!C18!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16774477\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_1NF!!!F75!\2\!!!!!!!! +S!VCC_DDR!C19!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16774613\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_1UF!!!F74!\1\!!!!!!!! +S!GND!C19!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16774613\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_1UF!!!F74!\2\!!!!!!!! +S!VCC_DDR!C20!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16774705\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_100NF!!!F73!\1\!!!!!!!! +S!GND!C20!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16774705\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_100NF!!!F73!\2\!!!!!!!! +S!DDR3_RST!C21!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16778769\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F72!\1\!!!!!!!! +S!GND!C21!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16778769\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F72!\2\!!!!!!!! +S!DDR_VREF_DQ!C22!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16778930\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F71!\1\!!!!!!!! +S!GND!C22!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16778930\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F71!\2\!!!!!!!! +S!VCC_DDR!C23!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16778954\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F70!\1\!!!!!!!! +S!DDR_VREF_DQ!C23!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16778954\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F70!\2\!!!!!!!! +S!VCC_DDR!C24!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779229\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F69!\1\!!!!!!!! +S!DDR_VREF_CA!C24!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779229\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F69!\2\!!!!!!!! +S!DDR_VREF_CA!C25!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779248\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F68!\1\!!!!!!!! +S!GND!C25!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779248\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F68!\2\!!!!!!!! +S!DDR3_VREF_CA!C26!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779458\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F67!\1\!!!!!!!! +S!GND!C26!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779458\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F67!\2\!!!!!!!! +S!DDR3_VREF_DQ!C27!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779568\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F66!\1\!!!!!!!! +S!GND!C27!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779568\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F66!\2\!!!!!!!! +S!VCC_DDR!C32!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781169\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F65!\1\!!!!!!!! +S!GND!C32!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781169\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F65!\2\!!!!!!!! +S!VDDCR_RMII0!C43!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16788606\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F64!\1\!!!!!!!! +S!GND!C43!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16788606\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F64!\2\!!!!!!!! +S!VDDCR_RMII1!C53!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789896\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F63!\1\!!!!!!!! +S!GND!C53!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789896\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F63!\2\!!!!!!!! +S!N16792429!C62!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16792411\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F62!\1\!!!!!!!! +S!GND!C62!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16792411\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F62!\2\!!!!!!!! +S!VDDA_RMII0!C46!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16788776\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_4.7UF!!!F61!\1\!!!!!!!! +S!GND!C46!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16788776\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_4.7UF!!!F61!\2\!!!!!!!! +S!VDDIO_RMII0!C48!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789021\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_4.7UF!!!F60!\1\!!!!!!!! +S!GND!C48!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789021\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_4.7UF!!!F60!\2\!!!!!!!! +S!VDDA_RMII1!C51!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789838\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_4.7UF!!!F59!\1\!!!!!!!! +S!GND!C51!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789838\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_4.7UF!!!F59!\2\!!!!!!!! +S!VDDIO_RMII1!C55!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789946\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_4.7UF!!!F58!\1\!!!!!!!! +S!GND!C55!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789946\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_4.7UF!!!F58!\2\!!!!!!!! +S!VDD_1V8!C58!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791417\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_4.7UF!!!F56!\1\!!!!!!!! +S!GND!C58!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791417\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_4.7UF!!!F56!\2\!!!!!!!! +S!VDD_3V3!C61!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791929\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_4.7UF!!!F55!\1\!!!!!!!! +S!GND!C61!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791929\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_4.7UF!!!F55!\2\!!!!!!!! +S!EMMC_CLKOUT!C63!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793157\@\QF_DISCRETE\.\CAP NP_NC.Normal\(chips)!CAP NP_NC_C0402_DISCRETE_10PF/NC!!!F53!\1\!!!!!!!! +S!GND!C63!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793157\@\QF_DISCRETE\.\CAP NP_NC.Normal\(chips)!CAP NP_NC_C0402_DISCRETE_10PF/NC!!!F53!\2\!!!!!!!! +S!VDD_3V3!FB1!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16790442\@\QF_DISCRETE\.\BEAD.Normal\(chips)!BEAD_L0603_0R!!!F50!\1\!!!!!!!! +S!VDDA_RMII1!FB1!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16790442\@\QF_DISCRETE\.\BEAD.Normal\(chips)!BEAD_L0603_0R!!!F50!\2\!!!!!!!! +S!VDD_3V3!FB2!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16790635\@\QF_DISCRETE\.\BEAD.Normal\(chips)!BEAD_L0603_0R!!!F49!\1\!!!!!!!! +S!VDDA_RMII0!FB2!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16790635\@\QF_DISCRETE\.\BEAD.Normal\(chips)!BEAD_L0603_0R!!!F49!\2\!!!!!!!! +S!GND!R10!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785432\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F45!\1\!!!!!!!! +S!N16785446!R10!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785432\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F45!\2\!!!!!!!! +S!GND!R11!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785470\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F44!\1\!!!!!!!! +S!N16785482!R11!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785470\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F44!\2\!!!!!!!! +S!RMII0_RST!R12!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785611\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F43!\1\!!!!!!!! +S!VDDIO_RMII0!R12!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785611\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F43!\2\!!!!!!!! +S!RMII0_MDIO!R14!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785670\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F42!\1\!!!!!!!! +S!VDDIO_RMII0!R14!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785670\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F42!\2\!!!!!!!! +S!RMII1_MDIO!R16!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786089\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F41!\1\!!!!!!!! +S!VDDIO_RMII1!R16!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786089\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F41!\2\!!!!!!!! +S!RMII1_RST!R17!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786101\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F40!\1\!!!!!!!! +S!VDDIO_RMII1!R17!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786101\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F40!\2\!!!!!!!! +S!GND!R19!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786347\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F39!\1\!!!!!!!! +S!N16786362!R19!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786347\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F39!\2\!!!!!!!! +S!GND!R20!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786363\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F38!\1\!!!!!!!! +S!N16786382!R20!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786363\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F38!\2\!!!!!!!! +S!N16786486!R21!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786462\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F37!\1\!!!!!!!! +S!VDDIO_RMII0!R21!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786462\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F37!\2\!!!!!!!! +S!GND!R13!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785633\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_12.1K!!!F36!\1\!!!!!!!! +S!N16785709!R13!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785633\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_12.1K!!!F36!\2\!!!!!!!! +S!GND!R7!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16784995\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_12.1K!!!F35!\1\!!!!!!!! +S!N16785007!R7!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16784995\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_12.1K!!!F35!\2\!!!!!!!! +S!VDD_1V8!R15!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785907\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_0R!!!F34!\1\!!!!!!!! +S!VDDIO_RMII0!R15!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785907\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_0R!!!F34!\2\!!!!!!!! +S!VDD_1V8!R18!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786204\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_0R!!!F33!\1\!!!!!!!! +S!VDDIO_RMII1!R18!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786204\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_0R!!!F33!\2\!!!!!!!! +S!N16777370!R2!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16777695\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_240R!!!F32!\1\!!!!!!!! +S!GND!R2!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16777695\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_240R!!!F32!\2\!!!!!!!! +S!DDR_VREF_CA!R3!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779393\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_240R!!!F31!\1\!!!!!!!! +S!DDR3_VREF_CA!R3!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779393\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_240R!!!F31!\2\!!!!!!!! +S!DDR_VREF_DQ!R4!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779420\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_240R!!!F30!\1\!!!!!!!! +S!DDR3_VREF_DQ!R4!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779420\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_240R!!!F30!\2\!!!!!!!! +S!DDR3_CLKN!R5!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16780784\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_240R!!!F29!\1\!!!!!!!! +S!N16780119!R5!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16780784\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_240R!!!F29!\2\!!!!!!!! +S!DDR3_CLKP!R6!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16780833\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_240R!!!F28!\1\!!!!!!!! +S!N16780119!R6!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16780833\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_240R!!!F28!\2\!!!!!!!! +S!VDD_1V8!R23!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16792656\@\QF_DISCRETE\.\RESISTOR_NC.Normal\(chips)!RESISTOR_NC_R0402_DISCRETE_10K/NC!!!F27!\1\!!!!!!!! +S!EMMC_D0!R23!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16792656\@\QF_DISCRETE\.\RESISTOR_NC.Normal\(chips)!RESISTOR_NC_R0402_DISCRETE_10K/NC!!!F27!\2\!!!!!!!! +S!VDD_1V8!R24!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16792697\@\QF_DISCRETE\.\RESISTOR_NC.Normal\(chips)!RESISTOR_NC_R0402_DISCRETE_10K/NC!!!F26!\1\!!!!!!!! +S!EMMC_CMD!R24!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16792697\@\QF_DISCRETE\.\RESISTOR_NC.Normal\(chips)!RESISTOR_NC_R0402_DISCRETE_10K/NC!!!F26!\2\!!!!!!!! +S!VDD_1V8!R25!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16792716\@\QF_DISCRETE\.\RESISTOR_NC.Normal\(chips)!RESISTOR_NC_R0402_DISCRETE_10K/NC!!!F25!\1\!!!!!!!! +S!EMMC_RSTN!R25!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16792716\@\QF_DISCRETE\.\RESISTOR_NC.Normal\(chips)!RESISTOR_NC_R0402_DISCRETE_10K/NC!!!F25!\2\!!!!!!!! +S!GND!J2!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60593\@\QF_ANT\.\MMCX-180.Normal\(chips)!MMCX-180_MMCX-180_50OHM!!!F48!\GND#2\!!!!!!!! +S!GND!J2!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60593\@\QF_ANT\.\MMCX-180.Normal\(chips)!MMCX-180_MMCX-180_50OHM!!!F48!\GND#3\!!!!!!!! +S!GND!J2!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60593\@\QF_ANT\.\MMCX-180.Normal\(chips)!MMCX-180_MMCX-180_50OHM!!!F48!\GND#4\!!!!!!!! +S!GND!J2!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60593\@\QF_ANT\.\MMCX-180.Normal\(chips)!MMCX-180_MMCX-180_50OHM!!!F48!\GND#5\!!!!!!!! +S!N61054!J2!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60593\@\QF_ANT\.\MMCX-180.Normal\(chips)!MMCX-180_MMCX-180_50OHM!!!F48!\SIG\!!!!!!!! +S!GND!J3!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60619\@\QF_ANT\.\MMCX-180.Normal\(chips)!MMCX-180_MMCX-180_50OHM!!!F47!\GND#2\!!!!!!!! +S!GND!J3!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60619\@\QF_ANT\.\MMCX-180.Normal\(chips)!MMCX-180_MMCX-180_50OHM!!!F47!\GND#3\!!!!!!!! +S!GND!J3!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60619\@\QF_ANT\.\MMCX-180.Normal\(chips)!MMCX-180_MMCX-180_50OHM!!!F47!\GND#4\!!!!!!!! +S!GND!J3!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60619\@\QF_ANT\.\MMCX-180.Normal\(chips)!MMCX-180_MMCX-180_50OHM!!!F47!\GND#5\!!!!!!!! +S!N61267!J3!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60619\@\QF_ANT\.\MMCX-180.Normal\(chips)!MMCX-180_MMCX-180_50OHM!!!F47!\SIG\!!!!!!!! +S!!U11!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55441\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F16!\EN\!!!!!!!! +S!!U11!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55441\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F16!\FB\!!!!!!!! +S!GND!U11!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55441\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F16!\GND\!!!!!!!! +S!SW!U11!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55441\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F16!\SW\!!!!!!!! +S!VIN!U11!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55441\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F16!\VIN\!!!!!!!! +S!!U12!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55469\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F15!\EN\!!!!!!!! +S!!U12!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55469\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F15!\FB\!!!!!!!! +S!GND!U12!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55469\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F15!\GND\!!!!!!!! +S!SW!U12!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55469\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F15!\SW\!!!!!!!! +S!VIN!U12!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55469\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F15!\VIN\!!!!!!!! +S!!U13!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55497\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F14!\EN\!!!!!!!! +S!!U13!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55497\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F14!\FB\!!!!!!!! +S!GND!U13!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55497\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F14!\GND\!!!!!!!! +S!SW!U13!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55497\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F14!\SW\!!!!!!!! +S!VIN!U13!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55497\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F14!\VIN\!!!!!!!! +S!!U14!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55525\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F13!\EN\!!!!!!!! +S!!U14!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55525\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F13!\FB\!!!!!!!! +S!GND!U14!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55525\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F13!\GND\!!!!!!!! +S!SW!U14!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55525\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F13!\SW\!!!!!!!! +S!VIN!U14!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55525\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F13!\VIN\!!!!!!!! +S!!U15!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55553\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F12!\EN\!!!!!!!! +S!!U15!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55553\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F12!\FB\!!!!!!!! +S!GND!U15!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55553\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F12!\GND\!!!!!!!! +S!SW!U15!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55553\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F12!\SW\!!!!!!!! +S!VIN!U15!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55553\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F12!\VIN\!!!!!!!! +S!EMMC_CLKOUT!U16!M6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\CLK\!!!!!!!! +S!EMMC_CMD!U16!M5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\CMD\!!!!!!!! +S!!U16!H5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\DATA STROBE\!!!!!!!! +S!EMMC_D0!U16!A3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\DATA0\!!!!!!!! +S!EMMC_D1!U16!A4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\DATA1\!!!!!!!! +S!EMMC_D2!U16!A5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\DATA2\!!!!!!!! +S!EMMC_D3!U16!B2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\DATA3\!!!!!!!! +S!!U16!B3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\DATA4\!!!!!!!! +S!!U16!B4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\DATA5\!!!!!!!! +S!!U16!B5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\DATA6\!!!!!!!! +S!!U16!B6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\DATA7\!!!!!!!! +S!EMMC_RSTN!U16!K5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\RST_N\!!!!!!!! +S!VDD_3V3!U16!E6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\VCC1\!!!!!!!! +S!VDD_3V3!U16!F5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\VCC2\!!!!!!!! +S!VDD_3V3!U16!J10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\VCC3\!!!!!!!! +S!VDD_3V3!U16!K9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\VCC4\!!!!!!!! +S!VDD_1V8!U16!C6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\VCCQ1\!!!!!!!! +S!VDD_1V8!U16!M4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\VCCQ2\!!!!!!!! +S!VDD_1V8!U16!N4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\VCCQ3\!!!!!!!! +S!VDD_1V8!U16!P3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\VCCQ4\!!!!!!!! +S!VDD_1V8!U16!P5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\VCCQ5\!!!!!!!! +S!N16792429!U16!C2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\VDDI\!!!!!!!! +S!!U16!E9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\VSF1\!!!!!!!! +S!!U16!E10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\VSF2\!!!!!!!! +S!!U16!F10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\VSF3\!!!!!!!! +S!!U16!K10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\VSF4\!!!!!!!! +S!GND!U16!J5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\VSS1\!!!!!!!! +S!GND!U16!A6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\VSS2\!!!!!!!! +S!GND!U16!C4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\VSS3\!!!!!!!! +S!GND!U16!E7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\VSS4\!!!!!!!! +S!GND!U16!G5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\VSS5\!!!!!!!! +S!GND!U16!H10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\VSS6\!!!!!!!! +S!GND!U16!K8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\VSSQ1\!!!!!!!! +S!GND!U16!N2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\VSSQ2\!!!!!!!! +S!GND!U16!N5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\VSSQ3\!!!!!!!! +S!GND!U16!P4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\VSSQ4\!!!!!!!! +S!GND!U16!P6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F11!\VSSQ5\!!!!!!!! S!!U16!H2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC100\!!!!!!!! S!!U16!H3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC101\!!!!!!!! S!!U16!A10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC10\!!!!!!!! @@ -176,122 +338,162 @@ S!!U16!K6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2 S!!U16!K7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\RFU7\!!!!!!!! S!!U16!P7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\RFU8\!!!!!!!! S!!U16!P10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\RFU9\!!!!!!!! -S!!U10!N3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\A0\!!!!!!!! -S!!U10!L7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\A10/AP\!!!!!!!! -S!!U10!R7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\A11\!!!!!!!! -S!!U10!N7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\A12/BC#\!!!!!!!! -S!!U10!T3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\A13\!!!!!!!! -S!!U10!T7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\A14\!!!!!!!! -S!!U10!M7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\A15\!!!!!!!! -S!!U10!P7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\A1\!!!!!!!! -S!!U10!P3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\A2\!!!!!!!! -S!!U10!N2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\A3\!!!!!!!! -S!!U10!P8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\A4\!!!!!!!! -S!!U10!P2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\A5\!!!!!!!! -S!!U10!R8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\A6\!!!!!!!! -S!!U10!R2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\A7\!!!!!!!! -S!!U10!T8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\A8\!!!!!!!! -S!!U10!R3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\A9\!!!!!!!! -S!!U10!M2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\BA0\!!!!!!!! -S!!U10!N8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\BA1\!!!!!!!! -S!!U10!M3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\BA2\!!!!!!!! -S!!U10!K3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\CAS#\!!!!!!!! -S!!U10!K7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\CK#\!!!!!!!! -S!!U10!K9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\CKE0\!!!!!!!! -S!!U10!J9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\CKE1\!!!!!!!! -S!!U10!J7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\CK\!!!!!!!! -S!!U10!L2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\CS#0\!!!!!!!! -S!!U10!L1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\CS#1\!!!!!!!! -S!!U10!E3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\DQ0\!!!!!!!! -S!!U10!C8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\DQ10\!!!!!!!! -S!!U10!C2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\DQ11\!!!!!!!! -S!!U10!A7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\DQ12\!!!!!!!! -S!!U10!A2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\DQ13\!!!!!!!! -S!!U10!B8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\DQ14\!!!!!!!! -S!!U10!A3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\DQ15\!!!!!!!! -S!!U10!F7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\DQ1\!!!!!!!! -S!!U10!F2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\DQ2\!!!!!!!! -S!!U10!F8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\DQ3\!!!!!!!! -S!!U10!H3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\DQ4\!!!!!!!! -S!!U10!H8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\DQ5\!!!!!!!! -S!!U10!G2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\DQ6\!!!!!!!! -S!!U10!H7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\DQ7\!!!!!!!! -S!!U10!D7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\DQ8\!!!!!!!! -S!!U10!C3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\DQ9\!!!!!!!! -S!!U10!E7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\LDM\!!!!!!!! -S!!U10!G3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\LDQS#\!!!!!!!! -S!!U10!F3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\LDQS\!!!!!!!! -S!!U10!K1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\ODT0\!!!!!!!! -S!!U10!J1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\ODT1\!!!!!!!! -S!!U10!J3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\RAS#\!!!!!!!! -S!!U10!T2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\RESET#\!!!!!!!! -S!!U10!D3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\UDM\!!!!!!!! -S!!U10!B7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\UDQS#\!!!!!!!! -S!!U10!C7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\UDQS\!!!!!!!! -S!!U10!B2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VDD1\!!!!!!!! -S!!U10!D9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VDD2\!!!!!!!! -S!!U10!G7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VDD3\!!!!!!!! -S!!U10!K2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VDD4\!!!!!!!! -S!!U10!K8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VDD5\!!!!!!!! -S!!U10!N1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VDD6\!!!!!!!! -S!!U10!N9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VDD7\!!!!!!!! -S!!U10!R1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VDD8\!!!!!!!! -S!!U10!R9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VDD9\!!!!!!!! -S!!U10!A1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VDDQ1\!!!!!!!! -S!!U10!A8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VDDQ2\!!!!!!!! -S!!U10!C1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VDDQ3\!!!!!!!! -S!!U10!C9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VDDQ4\!!!!!!!! -S!!U10!D2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VDDQ5\!!!!!!!! -S!!U10!E9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VDDQ6\!!!!!!!! -S!!U10!F1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VDDQ7\!!!!!!!! -S!!U10!H2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VDDQ8\!!!!!!!! -S!!U10!H9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VDDQ9\!!!!!!!! -S!!U10!M8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VREFCA\!!!!!!!! -S!!U10!H1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VREFDQ\!!!!!!!! -S!!U10!P9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VSS10\!!!!!!!! -S!!U10!T1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VSS11\!!!!!!!! -S!!U10!T9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VSS12\!!!!!!!! -S!!U10!A9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VSS1\!!!!!!!! -S!!U10!B3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VSS2\!!!!!!!! -S!!U10!E1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VSS3\!!!!!!!! -S!!U10!G8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VSS4\!!!!!!!! -S!!U10!J2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VSS5\!!!!!!!! -S!!U10!J8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VSS6\!!!!!!!! -S!!U10!M1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VSS7\!!!!!!!! -S!!U10!M9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VSS8\!!!!!!!! -S!!U10!P1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VSS9\!!!!!!!! -S!!U10!B1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VSSQ1\!!!!!!!! -S!!U10!B9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VSSQ2\!!!!!!!! -S!!U10!D1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VSSQ3\!!!!!!!! -S!!U10!D8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VSSQ4\!!!!!!!! -S!!U10!E2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VSSQ5\!!!!!!!! -S!!U10!E8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VSSQ6\!!!!!!!! -S!!U10!F9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VSSQ7\!!!!!!!! -S!!U10!G1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VSSQ8\!!!!!!!! -S!!U10!G9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\VSSQ9\!!!!!!!! -S!!U10!L3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\WE#\!!!!!!!! -S!!U10!L8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\ZQ0\!!!!!!!! -S!!U10!L9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!TF-38!\ZQ1\!!!!!!!! -S!N19188!C1!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19387\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_18PF!!!F23!\1\!!!!!!!! -S!GND!C1!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19387\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_18PF!!!F23!\2\!!!!!!!! -S!N19203!C2!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19709\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_18PF!!!F22!\1\!!!!!!!! -S!GND!C2!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19709\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_18PF!!!F22!\2\!!!!!!!! -S!VDD_0V9!C10!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS41270\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_10UF!!!F21!\1\!!!!!!!! -S!GND!C10!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS41270\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_10UF!!!F21!\2\!!!!!!!! -S!VDD_0V9!C9!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40428\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_10UF!!!F20!\1\!!!!!!!! -S!GND!C9!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40428\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_10UF!!!F20!\2\!!!!!!!! -S!VCC_1V8!C3!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19878\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F19!\1\!!!!!!!! -S!GND!C3!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19878\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F19!\2\!!!!!!!! -S!VDD_CPU!C4!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35873\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F18!\1\!!!!!!!! -S!GND!C4!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35873\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F18!\2\!!!!!!!! -S!VDD_CPU!C5!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35933\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_10UF!!!F17!\1\!!!!!!!! -S!GND!C5!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35933\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_10UF!!!F17!\2\!!!!!!!! -S!VDD_CPU!C6!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35977\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_22UF!!!F16!\1\!!!!!!!! -S!GND!C6!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35977\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_22UF!!!F16!\2\!!!!!!!! -S!VDD_0V9!C7!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40356\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_100NF!!!F15!\1\!!!!!!!! -S!GND!C7!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40356\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_100NF!!!F15!\2\!!!!!!!! -S!VDD_0V9!C8!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40392\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_100NF!!!F14!\1\!!!!!!!! -S!GND!C8!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40392\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_100NF!!!F14!\2\!!!!!!!! +S!DDR3_A0!U10!N3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\A0\!!!!!!!! +S!DDR3_A10!U10!L7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\A10/AP\!!!!!!!! +S!DDR3_A11!U10!R7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\A11\!!!!!!!! +S!DDR3_A12!U10!N7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\A12/BC#\!!!!!!!! +S!DDR3_A13!U10!T3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\A13\!!!!!!!! +S!DDR3_A14!U10!T7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\A14\!!!!!!!! +S!DDR3_A15!U10!M7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\A15\!!!!!!!! +S!DDR3_A1!U10!P7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\A1\!!!!!!!! +S!DDR3_A2!U10!P3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\A2\!!!!!!!! +S!DDR3_A3!U10!N2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\A3\!!!!!!!! +S!DDR3_A4!U10!P8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\A4\!!!!!!!! +S!DDR3_A5!U10!P2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\A5\!!!!!!!! +S!DDR3_A6!U10!R8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\A6\!!!!!!!! +S!DDR3_A7!U10!R2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\A7\!!!!!!!! +S!DDR3_A8!U10!T8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\A8\!!!!!!!! +S!DDR3_A9!U10!R3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\A9\!!!!!!!! +S!DDR3_BA0!U10!M2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\BA0\!!!!!!!! +S!DDR3_BA1!U10!N8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\BA1\!!!!!!!! +S!DDR3_BA2!U10!M3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\BA2\!!!!!!!! +S!DDR3_CASN!U10!K3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\CAS#\!!!!!!!! +S!DDR3_CLKN!U10!K7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\CK#\!!!!!!!! +S!DDR3_CKE!U10!K9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\CKE0\!!!!!!!! +S!!U10!J9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\CKE1\!!!!!!!! +S!DDR3_CLKP!U10!J7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\CK\!!!!!!!! +S!DDR3_CSN!U10!L2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\CS#0\!!!!!!!! +S!!U10!L1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\CS#1\!!!!!!!! +S!DDR_D7!U10!E3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\DQ0\!!!!!!!! +S!DDR_D8!U10!C8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\DQ10\!!!!!!!! +S!DDR_D13!U10!C2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\DQ11\!!!!!!!! +S!DDR_D12!U10!A7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\DQ12\!!!!!!!! +S!DDR_D14!U10!A2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\DQ13\!!!!!!!! +S!DDR_D10!U10!B8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\DQ14\!!!!!!!! +S!DDR_D15!U10!A3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\DQ15\!!!!!!!! +S!DDR_D6!U10!F7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\DQ1\!!!!!!!! +S!DDR_D4!U10!F2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\DQ2\!!!!!!!! +S!DDR_D2!U10!F8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\DQ3\!!!!!!!! +S!DDR_D3!U10!H3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\DQ4\!!!!!!!! +S!DDR_D0!U10!H8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\DQ5\!!!!!!!! +S!DDR_D5!U10!G2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\DQ6\!!!!!!!! +S!DDR_D1!U10!H7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\DQ7\!!!!!!!! +S!DDR_D9!U10!D7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\DQ8\!!!!!!!! +S!DDR_D11!U10!C3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\DQ9\!!!!!!!! +S!DDR_DM0!U10!E7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\LDM\!!!!!!!! +S!DDR_DQS0N!U10!G3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\LDQS#\!!!!!!!! +S!DDR_DQS0P!U10!F3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\LDQS\!!!!!!!! +S!DDR3_ODT!U10!K1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\ODT0\!!!!!!!! +S!!U10!J1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\ODT1\!!!!!!!! +S!DDR3_RASN!U10!J3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\RAS#\!!!!!!!! +S!DDR3_RST!U10!T2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\RESET#\!!!!!!!! +S!DDR_DM1!U10!D3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\UDM\!!!!!!!! +S!DDR_DQS1N!U10!B7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\UDQS#\!!!!!!!! +S!DDR_DQS1P!U10!C7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\UDQS\!!!!!!!! +S!VCC_DDR!U10!B2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VDD1\!!!!!!!! +S!VCC_DDR!U10!D9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VDD2\!!!!!!!! +S!VCC_DDR!U10!G7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VDD3\!!!!!!!! +S!VCC_DDR!U10!K2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VDD4\!!!!!!!! +S!VCC_DDR!U10!K8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VDD5\!!!!!!!! +S!VCC_DDR!U10!N1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VDD6\!!!!!!!! +S!VCC_DDR!U10!N9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VDD7\!!!!!!!! +S!VCC_DDR!U10!R1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VDD8\!!!!!!!! +S!VCC_DDR!U10!R9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VDD9\!!!!!!!! +S!VCC_DDR!U10!A1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VDDQ1\!!!!!!!! +S!VCC_DDR!U10!A8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VDDQ2\!!!!!!!! +S!VCC_DDR!U10!C1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VDDQ3\!!!!!!!! +S!VCC_DDR!U10!C9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VDDQ4\!!!!!!!! +S!VCC_DDR!U10!D2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VDDQ5\!!!!!!!! +S!VCC_DDR!U10!E9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VDDQ6\!!!!!!!! +S!VCC_DDR!U10!F1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VDDQ7\!!!!!!!! +S!VCC_DDR!U10!H2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VDDQ8\!!!!!!!! +S!VCC_DDR!U10!H9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VDDQ9\!!!!!!!! +S!DDR3_VREF_CA!U10!M8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VREFCA\!!!!!!!! +S!DDR3_VREF_DQ!U10!H1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VREFDQ\!!!!!!!! +S!GND!U10!P9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VSS10\!!!!!!!! +S!GND!U10!T1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VSS11\!!!!!!!! +S!GND!U10!T9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VSS12\!!!!!!!! +S!GND!U10!A9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VSS1\!!!!!!!! +S!GND!U10!B3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VSS2\!!!!!!!! +S!GND!U10!E1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VSS3\!!!!!!!! +S!GND!U10!G8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VSS4\!!!!!!!! +S!GND!U10!J2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VSS5\!!!!!!!! +S!GND!U10!J8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VSS6\!!!!!!!! +S!GND!U10!M1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VSS7\!!!!!!!! +S!GND!U10!M9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VSS8\!!!!!!!! +S!GND!U10!P1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VSS9\!!!!!!!! +S!GND!U10!B1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VSSQ1\!!!!!!!! +S!GND!U10!B9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VSSQ2\!!!!!!!! +S!GND!U10!D1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VSSQ3\!!!!!!!! +S!GND!U10!D8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VSSQ4\!!!!!!!! +S!GND!U10!E2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VSSQ5\!!!!!!!! +S!GND!U10!E8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VSSQ6\!!!!!!!! +S!GND!U10!F9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VSSQ7\!!!!!!!! +S!GND!U10!G1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VSSQ8\!!!!!!!! +S!GND!U10!G9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\VSSQ9\!!!!!!!! +S!DDR3_WEN!U10!L3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\WE#\!!!!!!!! +S!N16777370!U10!L8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\ZQ0\!!!!!!!! +S!!U10!L9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F17!\ZQ1\!!!!!!!! +S!N19188!C1!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19387\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_18PF!!!F109!\1\!!!!!!!! +S!GND!C1!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19387\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_18PF!!!F109!\2\!!!!!!!! +S!N19203!C2!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19709\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_18PF!!!F108!\1\!!!!!!!! +S!GND!C2!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19709\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_18PF!!!F108!\2\!!!!!!!! +S!VDD_0V9!C10!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS41270\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_10UF!!!F107!\1\!!!!!!!! +S!GND!C10!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS41270\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_10UF!!!F107!\2\!!!!!!!! +S!VDD_0V9!C9!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40428\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_10UF!!!F106!\1\!!!!!!!! +S!GND!C9!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40428\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_10UF!!!F106!\2\!!!!!!!! +S!VDD_GNSS!C13!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS63979\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F102!\1\!!!!!!!! +S!GND!C13!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS63979\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F102!\2\!!!!!!!! +S!VDD_1V8!C15!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS69589\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F101!\1\!!!!!!!! +S!GND!C15!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS69589\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F101!\2\!!!!!!!! +S!VDD_1V8!C16!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS69901\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F100!\1\!!!!!!!! +S!GND!C16!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS69901\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F100!\2\!!!!!!!! +S!VCC_DDR!C33!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781188\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F98!\1\!!!!!!!! +S!GND!C33!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781188\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F98!\2\!!!!!!!! +S!VCC_DDR!C34!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781207\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F97!\1\!!!!!!!! +S!GND!C34!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781207\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F97!\2\!!!!!!!! +S!VCC_DDR!C35!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781226\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F96!\1\!!!!!!!! +S!GND!C35!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781226\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F96!\2\!!!!!!!! +S!VCC_DDR!C36!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781245\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F95!\1\!!!!!!!! +S!GND!C36!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781245\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F95!\2\!!!!!!!! +S!VCC_DDR!C37!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781264\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F94!\1\!!!!!!!! +S!GND!C37!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781264\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F94!\2\!!!!!!!! +S!VDDCR_RMII0!C42!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16787638\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F92!\1\!!!!!!!! +S!GND!C42!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16787638\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F92!\2\!!!!!!!! +S!VDDA_RMII0!C44!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16788730\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F91!\1\!!!!!!!! +S!GND!C44!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16788730\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F91!\2\!!!!!!!! +S!VDDA_RMII0!C45!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16788748\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F90!\1\!!!!!!!! +S!GND!C45!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16788748\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F90!\2\!!!!!!!! +S!VDDIO_RMII0!C47!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789003\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F89!\1\!!!!!!!! +S!GND!C47!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789003\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F89!\2\!!!!!!!! +S!VDDA_RMII1!C49!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789780\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F88!\1\!!!!!!!! +S!GND!C49!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789780\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F88!\2\!!!!!!!! +S!VDDA_RMII1!C50!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789810\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F87!\1\!!!!!!!! +S!GND!C50!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789810\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F87!\2\!!!!!!!! +S!VDDCR_RMII1!C52!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789864\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F86!\1\!!!!!!!! +S!GND!C52!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789864\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F86!\2\!!!!!!!! +S!VDDIO_RMII1!C54!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789920\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F85!\1\!!!!!!!! +S!GND!C54!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789920\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F85!\2\!!!!!!!! +S!VDD_1V8!C56!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791351\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F84!\1\!!!!!!!! +S!GND!C56!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791351\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F84!\2\!!!!!!!! +S!VDD_1V8!C57!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791389\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F83!\1\!!!!!!!! +S!GND!C57!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791389\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F83!\2\!!!!!!!! +S!VDD_3V3!C59!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791893\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F82!\1\!!!!!!!! +S!GND!C59!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791893\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F82!\2\!!!!!!!! +S!VDD_3V3!C60!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791911\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F81!\1\!!!!!!!! +S!GND!C60!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791911\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F81!\2\!!!!!!!! +S!VCC_1V8!C3!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19878\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F99!\1\!!!!!!!! +S!GND!C3!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19878\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F99!\2\!!!!!!!! +S!VDD_CPU!C4!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35873\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F93!\1\!!!!!!!! +S!GND!C4!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35873\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F93!\2\!!!!!!!! +S!VDD_CPU!C5!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35933\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_10UF!!!F57!\1\!!!!!!!! +S!GND!C5!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35933\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_10UF!!!F57!\2\!!!!!!!! +S!VDD_CPU!C6!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35977\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_22UF!!!F54!\1\!!!!!!!! +S!GND!C6!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35977\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_22UF!!!F54!\2\!!!!!!!! +S!VDD_0V9!C7!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40356\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_100NF!!!F52!\1\!!!!!!!! +S!GND!C7!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40356\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_100NF!!!F52!\2\!!!!!!!! +S!VDD_0V9!C8!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40392\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_100NF!!!F51!\1\!!!!!!!! +S!GND!C8!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40392\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_100NF!!!F51!\2\!!!!!!!! S!!J1!01!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\01\!!!!!!!! S!!J1!02!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\02\!!!!!!!! S!!J1!03!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\03\!!!!!!!! @@ -372,40 +574,40 @@ S!!J1!77!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-0 S!!J1!78!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\78\!!!!!!!! S!!J1!79!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\79\!!!!!!!! S!!J1!80!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\80\!!!!!!!! -S!N19203!R1!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19332\@\DISCRETE\.\R.Normal\(chips)!R_R0402_DISCRETE_1M!!!F13!\1\!!!!!!!! -S!N19188!R1!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19332\@\DISCRETE\.\R.Normal\(chips)!R_R0402_DISCRETE_1M!!!F13!\2\!!!!!!!! -S!!U1!T3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\NPOR\!!!!!!!! -S!N19188!U1!H3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\OSC_XIN\!!!!!!!! -S!N19203!U1!H2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\OSC_XOUT\!!!!!!!! -S!!U1!1L1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\PMUIO_VCC3V3\!!!!!!!! -S!!U1!1K2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\PMU_LOGIC_DVDD0V9\!!!!!!!! -S!!U1!G1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\REF_CLK0_OUT | OSC_CLK_OUT | GPIO0_D0_D\!!!!!!!! -S!!U1!1G2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\RFU\!!!!!!!! -S!!U1!V3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\RM_IO0 | -- | SAI0_LRCK | GPIO0_A0_U\!!!!!!!! -S!!U1!W1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\RM_IO1 | -- | SAI0_SCLK | GPIO0_A1_D\!!!!!!!! -S!!U1!R3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\RM_IO10 | SPI1_MISO | SAI1_LRCK | GPIO0_B2_D\!!!!!!!! -S!!U1!P2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\RM_IO11 | -- | SAI1_SDI | GPIO0_B3_D\!!!!!!!! -S!!U1!P3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\RM_IO12 | -- | SAI1_SDO0 | GPIO0_B4_D\!!!!!!!! -S!!U1!N1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\RM_IO13 | -- | SAI1_SDO1 | GPIO0_B5_D\!!!!!!!! -S!!U1!N3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\RM_IO14 | SPI1_CSN0 | SAI1_SDO2 | GPIO0_B6_D\!!!!!!!! -S!!U1!N2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\RM_IO15 | SPI0_CSN1 | SAI1_SDO3 | GPIO0_B7_D\!!!!!!!! -S!!U1!M2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\RM_IO16 | SPI0_CLK | -- | GPIO0_C0_D\!!!!!!!! -S!!U1!M3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\RM_IO17 | SPI0_MOSI | -- | GPIO0_C1_D\!!!!!!!! -S!!U1!L1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\RM_IO18 | SPI0_MISO | REF_CLK1_OUT | GPIO0_C2_D\!!!!!!!! -S!!U1!L2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\RM_IO19 | SPI0_CSN0 | ETH_CLK1_25M_OUT | GPIO0_C3_D\!!!!!!!! -S!!U1!W2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\RM_IO2 | -- | SAI0_MCLK | GPIO0_A2_U\!!!!!!!! -S!!U1!K2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\RM_IO20 | AUPLL_CLK_IN | ETH_CLK0_25M_OUT | GPIO0_C4_D\!!!!!!!! -S!!U1!K3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\RM_IO21 | -- | CPU_AVS | GPIO0_C5_Z\!!!!!!!! -S!!U1!J2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\RM_IO22 | JTAG_TCK_M1 | UART0_TX | GPIO0_C6_U\!!!!!!!! -S!!U1!J1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\RM_IO23 | JTAG_TMS_M1 | UART0_RX | GPIO0_C7_U\!!!!!!!! -S!!U1!V2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\RM_IO3 | -- | SAI0_SDO | GPIO0_A3_D\!!!!!!!! -S!!U1!U2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\RM_IO4 | -- | SAI0_SDI0 | GPIO0_A4_D\!!!!!!!! -S!!U1!U1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\RM_IO5 | -- | SAI0_SDI1 | GPIO0_A5_D\!!!!!!!! -S!!U1!U3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\RM_IO6 | -- | SAI0_SDI2 | GPIO0_A6_D\!!!!!!!! -S!!U1!T2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\RM_IO7 | SPI1_CSN1 | SAI0_SDI3 | GPIO0_A7_D\!!!!!!!! -S!!U1!R2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\RM_IO8 | SPI1_CLK | SAI1_MCLK | GPIO0_B0_D\!!!!!!!! -S!!U1!R1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\RM_IO9 | SPI1_MOSI | SAI1_SCLK | GPIO0_B1_D\!!!!!!!! -S!VCC_1V8!U1!1H1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F12!\SYS_PLL_AVDD1V8\!!!!!!!! +S!N19203!R1!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19332\@\DISCRETE\.\R.Normal\(chips)!R_R0402_DISCRETE_1M!!!F46!\1\!!!!!!!! +S!N19188!R1!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19332\@\DISCRETE\.\R.Normal\(chips)!R_R0402_DISCRETE_1M!!!F46!\2\!!!!!!!! +S!!U1!T3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\NPOR\!!!!!!!! +S!N19188!U1!H3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\OSC_XIN\!!!!!!!! +S!N19203!U1!H2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\OSC_XOUT\!!!!!!!! +S!!U1!1L1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\PMUIO_VCC3V3\!!!!!!!! +S!!U1!1K2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\PMU_LOGIC_DVDD0V9\!!!!!!!! +S!!U1!G1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\REF_CLK0_OUT | OSC_CLK_OUT | GPIO0_D0_D\!!!!!!!! +S!!U1!1G2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\RFU\!!!!!!!! +S!!U1!V3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\RM_IO0 | -- | SAI0_LRCK | GPIO0_A0_U\!!!!!!!! +S!!U1!W1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\RM_IO1 | -- | SAI0_SCLK | GPIO0_A1_D\!!!!!!!! +S!!U1!R3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\RM_IO10 | SPI1_MISO | SAI1_LRCK | GPIO0_B2_D\!!!!!!!! +S!!U1!P2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\RM_IO11 | -- | SAI1_SDI | GPIO0_B3_D\!!!!!!!! +S!!U1!P3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\RM_IO12 | -- | SAI1_SDO0 | GPIO0_B4_D\!!!!!!!! +S!!U1!N1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\RM_IO13 | -- | SAI1_SDO1 | GPIO0_B5_D\!!!!!!!! +S!!U1!N3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\RM_IO14 | SPI1_CSN0 | SAI1_SDO2 | GPIO0_B6_D\!!!!!!!! +S!!U1!N2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\RM_IO15 | SPI0_CSN1 | SAI1_SDO3 | GPIO0_B7_D\!!!!!!!! +S!!U1!M2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\RM_IO16 | SPI0_CLK | -- | GPIO0_C0_D\!!!!!!!! +S!!U1!M3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\RM_IO17 | SPI0_MOSI | -- | GPIO0_C1_D\!!!!!!!! +S!!U1!L1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\RM_IO18 | SPI0_MISO | REF_CLK1_OUT | GPIO0_C2_D\!!!!!!!! +S!!U1!L2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\RM_IO19 | SPI0_CSN0 | ETH_CLK1_25M_OUT | GPIO0_C3_D\!!!!!!!! +S!!U1!W2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\RM_IO2 | -- | SAI0_MCLK | GPIO0_A2_U\!!!!!!!! +S!!U1!K2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\RM_IO20 | AUPLL_CLK_IN | ETH_CLK0_25M_OUT | GPIO0_C4_D\!!!!!!!! +S!!U1!K3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\RM_IO21 | -- | CPU_AVS | GPIO0_C5_Z\!!!!!!!! +S!!U1!J2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\RM_IO22 | JTAG_TCK_M1 | UART0_TX | GPIO0_C6_U\!!!!!!!! +S!!U1!J1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\RM_IO23 | JTAG_TMS_M1 | UART0_RX | GPIO0_C7_U\!!!!!!!! +S!!U1!V2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\RM_IO3 | -- | SAI0_SDO | GPIO0_A3_D\!!!!!!!! +S!!U1!U2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\RM_IO4 | -- | SAI0_SDI0 | GPIO0_A4_D\!!!!!!!! +S!!U1!U1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\RM_IO5 | -- | SAI0_SDI1 | GPIO0_A5_D\!!!!!!!! +S!!U1!U3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\RM_IO6 | -- | SAI0_SDI2 | GPIO0_A6_D\!!!!!!!! +S!!U1!T2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\RM_IO7 | SPI1_CSN1 | SAI0_SDI3 | GPIO0_A7_D\!!!!!!!! +S!!U1!R2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\RM_IO8 | SPI1_CLK | SAI1_MCLK | GPIO0_B0_D\!!!!!!!! +S!!U1!R1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\RM_IO9 | SPI1_MOSI | SAI1_SCLK | GPIO0_B1_D\!!!!!!!! +S!VCC_1V8!U1!1H1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\SYS_PLL_AVDD1V8\!!!!!!!! S!!U1!B10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\-- | -- | -- | -- | -- | FLEXBUS1_D0 | DSMC_CLKP | VO_LCDC_DEN | GPIO1_A0_D\!!!!!!!! S!!U1!A9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\-- | -- | -- | -- | -- | FLEXBUS1_D2 | DSMC_DQS0 | VO_LCDC_HSYNC | GPIO1_A2_D\!!!!!!!! S!!U1!B9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\-- | -- | -- | -- | -- | FLEXBUS1_D3 | DSMC_D0 | VO_LCDC_CLK | GPIO1_A3_D\!!!!!!!! @@ -443,32 +645,32 @@ S!!U1!B22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16199\@\LIBRARY\.\SOC_RK3506BC.N S!!U1!C21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16199\@\LIBRARY\.\SOC_RK3506BC.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-23!\FSPI_D2 | GPIO2_A4_U\!!!!!!!! S!!U1!C23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16199\@\LIBRARY\.\SOC_RK3506BC.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-23!\FSPI_D3 | GPIO2_A5_U\!!!!!!!! S!!U1!1F14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16199\@\LIBRARY\.\SOC_RK3506BC.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-23!\VCCIO2_VCC\!!!!!!!! -S!!U1!D21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-22!\-- | SPI2_CLK | ETH_RMII0_RXD0 | GPIO2_B0_D\!!!!!!!! -S!!U1!D23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-22!\-- | SPI2_CSN | ETH_RMII0_RXD1 | GPIO2_B1_D\!!!!!!!! -S!!U1!E22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-22!\-- | SPI2_MISO | ETH_RMII0_TXD0 | GPIO2_B3_D\!!!!!!!! -S!!U1!E21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-22!\-- | SPI2_MOSI | ETH_RMII0_CLK | GPIO2_B2_D\!!!!!!!! -S!!U1!F23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-22!\SAI3_LRCK | DSM_AUD_RP_M1 | ETH_RMII0_TXEN | GPIO2_B5_D\!!!!!!!! -S!!U1!G22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-22!\SAI3_MCLK | -- | ETH_RMII0_RXDVCRS | GPIO2_C0_D\!!!!!!!! -S!!U1!F21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-22!\SAI3_SCLK | DSM_AUD_RN_M1 | ETH_RMII0_TXD1 | GPIO2_B4_D\!!!!!!!! -S!!U1!F22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-22!\SAI3_SDI | DSM_AUD_LN_M1 | ETH_RMII0_MDC | GPIO2_B6_D\!!!!!!!! -S!!U1!G21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-22!\SAI3_SDO | DSM_AUD_LP_M1 | ETH_RMII0_MDIO | GPIO2_B7_D\!!!!!!!! -S!!U1!1G14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-22!\VCCIO3_VCC\!!!!!!!! -S!!U1!K21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-21!\-- | SDMMC_CLK | GPIO3_A0_D\!!!!!!!! -S!!U1!J21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-21!\-- | SDMMC_CMD | GPIO3_A1_D\!!!!!!!! -S!!U1!K23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-21!\-- | SDMMC_D0 | GPIO3_A2_D\!!!!!!!! -S!!U1!M23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-21!\ETH_RMII1_CLK | SAI2_SDO_M0 | GPIO3_B0_D\!!!!!!!! -S!!U1!P23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-21!\ETH_RMII1_MDC | UART5_TX_M0 | GPIO3_B4_D\!!!!!!!! -S!!U1!P21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-21!\ETH_RMII1_MDIO | UART5_RTSN_M0 | GPIO3_B5_D\!!!!!!!! -S!!U1!L22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-21!\ETH_RMII1_RXD0 | SAI2_SDI_M0 | GPIO3_A6_D\!!!!!!!! -S!!U1!M22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-21!\ETH_RMII1_RXD1 | SAI2_SCLK_M0 | GPIO3_A7_D\!!!!!!!! -S!!U1!R22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-21!\ETH_RMII1_RXDVCRS | SAI2_MCLK_M0 | GPIO3_B6_D\!!!!!!!! -S!!U1!M21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-21!\ETH_RMII1_TXD0 | SAI2_LRCK_M0 | GPIO3_B1_D\!!!!!!!! -S!!U1!N21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-21!\ETH_RMII1_TXD1 | UART5_CTSN_M0 | GPIO3_B2_D\!!!!!!!! -S!!U1!P22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-21!\ETH_RMII1_TXEN | UART5_RX_M0 | GPIO3_B3_D\!!!!!!!! -S!!U1!H23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-21!\JTAG_TCK_M0 | SDMMC_D2 | GPIO3_A4_D\!!!!!!!! -S!!U1!H22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-21!\JTAG_TMS_M0 | SDMMC_D3 | GPIO3_A5_D\!!!!!!!! -S!!U1!K22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-21!\TEST_CLK_OUT | SDMMC_D1 | GPIO3_A3_D\!!!!!!!! -S!!U1!1H14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-21!\VCCIO4_VCC\!!!!!!!! +S!RMII0_RXD0!U1!D21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F23!\-- | SPI2_CLK | ETH_RMII0_RXD0 | GPIO2_B0_D\!!!!!!!! +S!RMII0_RXD1!U1!D23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F23!\-- | SPI2_CSN | ETH_RMII0_RXD1 | GPIO2_B1_D\!!!!!!!! +S!RMII0_TXD0!U1!E22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F23!\-- | SPI2_MISO | ETH_RMII0_TXD0 | GPIO2_B3_D\!!!!!!!! +S!RMII0_CLK!U1!E21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F23!\-- | SPI2_MOSI | ETH_RMII0_CLK | GPIO2_B2_D\!!!!!!!! +S!RMII0_TXEN!U1!F23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F23!\SAI3_LRCK | DSM_AUD_RP_M1 | ETH_RMII0_TXEN | GPIO2_B5_D\!!!!!!!! +S!RMII0_RXDV_CRS!U1!G22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F23!\SAI3_MCLK | -- | ETH_RMII0_RXDVCRS | GPIO2_C0_D\!!!!!!!! +S!RMII0_TXD1!U1!F21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F23!\SAI3_SCLK | DSM_AUD_RN_M1 | ETH_RMII0_TXD1 | GPIO2_B4_D\!!!!!!!! +S!RMII0_MDC!U1!F22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F23!\SAI3_SDI | DSM_AUD_LN_M1 | ETH_RMII0_MDC | GPIO2_B6_D\!!!!!!!! +S!RMII0_MDIO!U1!G21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F23!\SAI3_SDO | DSM_AUD_LP_M1 | ETH_RMII0_MDIO | GPIO2_B7_D\!!!!!!!! +S!VDD_1V8!U1!1G14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F23!\VCCIO3_VCC\!!!!!!!! +S!EMMC_CLK!U1!K21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F22!\-- | SDMMC_CLK | GPIO3_A0_D\!!!!!!!! +S!EMMC_CMD!U1!J21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F22!\-- | SDMMC_CMD | GPIO3_A1_D\!!!!!!!! +S!EMMC_D0!U1!K23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F22!\-- | SDMMC_D0 | GPIO3_A2_D\!!!!!!!! +S!RMII1_CLK!U1!M23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F22!\ETH_RMII1_CLK | SAI2_SDO_M0 | GPIO3_B0_D\!!!!!!!! +S!RMII1_MDC!U1!P23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F22!\ETH_RMII1_MDC | UART5_TX_M0 | GPIO3_B4_D\!!!!!!!! +S!RMII1_MDIO!U1!P21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F22!\ETH_RMII1_MDIO | UART5_RTSN_M0 | GPIO3_B5_D\!!!!!!!! +S!RMII1_RXD0!U1!L22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F22!\ETH_RMII1_RXD0 | SAI2_SDI_M0 | GPIO3_A6_D\!!!!!!!! +S!RMII1_RXD1!U1!M22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F22!\ETH_RMII1_RXD1 | SAI2_SCLK_M0 | GPIO3_A7_D\!!!!!!!! +S!RMII1_RXDV_CRS!U1!R22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F22!\ETH_RMII1_RXDVCRS | SAI2_MCLK_M0 | GPIO3_B6_D\!!!!!!!! +S!RMII1_TXD0!U1!M21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F22!\ETH_RMII1_TXD0 | SAI2_LRCK_M0 | GPIO3_B1_D\!!!!!!!! +S!RMII1_TXD1!U1!N21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F22!\ETH_RMII1_TXD1 | UART5_CTSN_M0 | GPIO3_B2_D\!!!!!!!! +S!RMII1_TXEN!U1!P22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F22!\ETH_RMII1_TXEN | UART5_RX_M0 | GPIO3_B3_D\!!!!!!!! +S!EMMC_D2!U1!H23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F22!\JTAG_TCK_M0 | SDMMC_D2 | GPIO3_A4_D\!!!!!!!! +S!EMMC_D3!U1!H22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F22!\JTAG_TMS_M0 | SDMMC_D3 | GPIO3_A5_D\!!!!!!!! +S!EMMC_D1!U1!K22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F22!\TEST_CLK_OUT | SDMMC_D1 | GPIO3_A3_D\!!!!!!!! +S!VDD_1V8!U1!1H14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F22!\VCCIO4_VCC\!!!!!!!! S!!U1!1B12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-20!\ACODEC_ADC_AVDD1V6\!!!!!!!! S!!U1!1B13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-20!\ACODEC_ADC_AVDD1V8\!!!!!!!! S!!U1!1A13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-20!\ACODEC_ADC_AVSS\!!!!!!!! @@ -498,348 +700,348 @@ S!!U1!B15!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.N S!!U1!1C8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-20!\USB20_OTG_AVDD0V9\!!!!!!!! S!!U1!1B9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-20!\USB20_OTG_AVDD1V8\!!!!!!!! S!!U1!1B10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-20!\USB20_OTG_AVDD3V3\!!!!!!!! -S!VDD_CPU!U1!1C2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F11!\CPU_DVDD_0\!!!!!!!! -S!VDD_CPU!U1!1C3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F11!\CPU_DVDD_1\!!!!!!!! -S!VDD_CPU!U1!1C4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F11!\CPU_DVDD_2\!!!!!!!! -S!VDD_0V9!U1!1E4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F11!\LOGIC_DVDD_0\!!!!!!!! -S!VDD_0V9!U1!1E5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F11!\LOGIC_DVDD_1\!!!!!!!! -S!VDD_0V9!U1!1E6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F11!\LOGIC_DVDD_2\!!!!!!!! -S!VDD_0V9!U1!1F11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F11!\LOGIC_DVDD_3\!!!!!!!! -S!VDD_0V9!U1!1G11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F11!\LOGIC_DVDD_4\!!!!!!!! -S!VDD_0V9!U1!1H11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F11!\LOGIC_DVDD_5\!!!!!!!! -S!VDD_0V9!U1!1J10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F11!\LOGIC_DVDD_6\!!!!!!!! -S!!U1!W23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR2_A0 | DDR3_A12\!!!!!!!! -S!!U1!1N13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR2_A1 | DDR3_A3\!!!!!!!! -S!!U1!1N12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR2_A10 | DDR3_BA0\!!!!!!!! -S!!U1!W22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR2_A11 | DDR3_A11\!!!!!!!! -S!!U1!U22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR2_A12 | DDR3_A9\!!!!!!!! -S!!U1!T23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR2_A13 | DDR3_A13\!!!!!!!! -S!!U1!Y22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR2_A14 | DDR3_A14\!!!!!!!! -S!!U1!Y17!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR2_A15 | DDR3_A15\!!!!!!!! -S!!U1!W18!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR2_A2 | DDR3_A4\!!!!!!!! -S!!U1!V23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR2_A3 | DDR3_A0\!!!!!!!! -S!!U1!W20!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR2_A4 | DDR3_A1\!!!!!!!! -S!!U1!1N14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR2_A5 | DDR3_A5\!!!!!!!! -S!!U1!Y20!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR2_A6 | DDR3_A6\!!!!!!!! -S!!U1!V22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR2_A7 | DDR3_A2\!!!!!!!! -S!!U1!Y21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR2_A8 | DDR3_A8\!!!!!!!! -S!!U1!T22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR2_A9 | DDR3_A7\!!!!!!!! -S!!U1!1N8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR2_BA0 | DDR3_CASN\!!!!!!!! -S!!U1!1M9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR2_BA1 | DDR3_WEN\!!!!!!!! -S!!U1!1N9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR2_BA2 | DDR3_BA2\!!!!!!!! -S!!U1!Y18!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR2_CASN | DDR3_BA1\!!!!!!!! -S!!U1!W17!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR2_RASN | DDR3_A10\!!!!!!!! -S!!U1!1M8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR2_WEN | DDR3_RASN\!!!!!!!! -S!!U1!1M13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR3_RESET\!!!!!!!! -S!!U1!W15!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_CKE\!!!!!!!! -S!!U1!W14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_CLKN\!!!!!!!! -S!!U1!Y14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_CLKP\!!!!!!!! -S!!U1!1M11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_CSN\!!!!!!!! -S!!U1!1N4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_DM0\!!!!!!!! -S!!U1!1M4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_DM1\!!!!!!!! -S!!U1!Y13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_DQ0\!!!!!!!! -S!!U1!Y6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_DQ10\!!!!!!!! -S!!U1!Y3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_DQ11\!!!!!!!! -S!!U1!W6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_DQ12\!!!!!!!! -S!!U1!Y2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_DQ13\!!!!!!!! -S!!U1!1N1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_DQ14\!!!!!!!! -S!!U1!1N2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_DQ15\!!!!!!!! -S!!U1!Y12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_DQ1\!!!!!!!! -S!!U1!Y11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_DQ2\!!!!!!!! -S!!U1!1M6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_DQ3\!!!!!!!! -S!!U1!1M5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_DQ4\!!!!!!!! -S!!U1!1N6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_DQ5\!!!!!!!! -S!!U1!W9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_DQ6\!!!!!!!! -S!!U1!1N5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_DQ7\!!!!!!!! -S!!U1!Y7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_DQ8\!!!!!!!! -S!!U1!W7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_DQ9\!!!!!!!! -S!!U1!W10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_DQS0N\!!!!!!!! -S!!U1!Y10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_DQS0P\!!!!!!!! -S!!U1!W4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_DQS1N\!!!!!!!! -S!!U1!Y4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_DQS1P\!!!!!!!! -S!!U1!1N10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_ODT\!!!!!!!! -S!!U1!1L6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_OPEN0\!!!!!!!! -S!!U1!1K5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_OPEN1\!!!!!!!! -S!!U1!1L8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_RZQ\!!!!!!!! -S!!U1!1K6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_VDDQ_0\!!!!!!!! -S!!U1!1K7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_VDDQ_1\!!!!!!!! -S!!U1!1K8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_VDDQ_2\!!!!!!!! -S!!U1!1K9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_VDDQ_3\!!!!!!!! -S!!U1!1K10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_VDDQ_4\!!!!!!!! -S!!U1!1L10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_VREF_CA\!!!!!!!! -S!!U1!1L11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-18!\DDR_VREF_DQ\!!!!!!!! -S!GND!U1!A1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_0\!!!!!!!! -S!GND!U1!J3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_10\!!!!!!!! -S!GND!U1!J22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_11\!!!!!!!! -S!GND!U1!L3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_12\!!!!!!!! -S!GND!U1!L21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_13\!!!!!!!! -S!GND!U1!N22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_14\!!!!!!!! -S!GND!U1!R21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_15\!!!!!!!! -S!GND!U1!T21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_16\!!!!!!!! -S!GND!U1!U21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_17\!!!!!!!! -S!GND!U1!V21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_18\!!!!!!!! -S!GND!U1!W3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_19\!!!!!!!! -S!GND!U1!A13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_1\!!!!!!!! -S!GND!U1!W5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_20\!!!!!!!! -S!GND!U1!W8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_21\!!!!!!!! -S!GND!U1!W11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_22\!!!!!!!! -S!GND!U1!W12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_23\!!!!!!!! -S!GND!U1!W13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_24\!!!!!!!! -S!GND!U1!W16!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_25\!!!!!!!! -S!GND!U1!W19!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_26\!!!!!!!! -S!GND!U1!W21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_27\!!!!!!!! -S!GND!U1!Y1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_28\!!!!!!!! -S!GND!U1!Y9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_29\!!!!!!!! -S!GND!U1!A17!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_2\!!!!!!!! -S!GND!U1!Y15!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_30\!!!!!!!! -S!GND!U1!Y23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_31\!!!!!!!! -S!GND!U1!1A6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_32\!!!!!!!! -S!GND!U1!1A7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_33\!!!!!!!! -S!GND!U1!1A8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_34\!!!!!!!! -S!GND!U1!1A9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_35\!!!!!!!! -S!GND!U1!1A10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_36\!!!!!!!! -S!GND!U1!1A11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_37\!!!!!!!! -S!GND!U1!1A12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_38\!!!!!!!! -S!GND!U1!1A14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_39\!!!!!!!! -S!GND!U1!A23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_3\!!!!!!!! -S!GND!U1!1B1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_40\!!!!!!!! -S!GND!U1!1B2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_41\!!!!!!!! -S!GND!U1!1B3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_42\!!!!!!!! -S!GND!U1!1B4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_43\!!!!!!!! -S!GND!U1!1B5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_44\!!!!!!!! -S!GND!U1!1B8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_45\!!!!!!!! -S!GND!U1!1C1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_46\!!!!!!!! -S!GND!U1!1C5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_47\!!!!!!!! -S!GND!U1!1C6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_48\!!!!!!!! -S!GND!U1!1C9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_49\!!!!!!!! -S!GND!U1!B4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_4\!!!!!!!! -S!GND!U1!1C10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_50\!!!!!!!! -S!GND!U1!1C11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_51\!!!!!!!! -S!GND!U1!1C12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_52\!!!!!!!! -S!GND!U1!1C13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_53\!!!!!!!! -S!GND!U1!1C14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_54\!!!!!!!! -S!GND!U1!1D1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_55\!!!!!!!! -S!GND!U1!1D2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_56\!!!!!!!! -S!GND!U1!1D3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_57\!!!!!!!! -S!GND!U1!1D4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_58\!!!!!!!! -S!GND!U1!1D5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_59\!!!!!!!! -S!GND!U1!B6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_5\!!!!!!!! -S!GND!U1!1D6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_60\!!!!!!!! -S!GND!U1!1D7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_61\!!!!!!!! -S!GND!U1!1D8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_62\!!!!!!!! -S!GND!U1!1D9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_63\!!!!!!!! -S!GND!U1!1D10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_64\!!!!!!!! -S!GND!U1!1D11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_65\!!!!!!!! -S!GND!U1!1D12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_66\!!!!!!!! -S!GND!U1!1D13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_67\!!!!!!!! -S!GND!U1!1D14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_68\!!!!!!!! -S!GND!U1!1E1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_69\!!!!!!!! -S!GND!U1!D2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_6\!!!!!!!! -S!GND!U1!D22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_7\!!!!!!!! -S!GND!U1!G2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_8\!!!!!!!! -S!GND!U1!H21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F10!\VSS_9\!!!!!!!! -S!GND!U1!1H6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_100\!!!!!!!! -S!GND!U1!1H7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_101\!!!!!!!! -S!GND!U1!1H8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_102\!!!!!!!! -S!GND!U1!1H9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_103\!!!!!!!! -S!GND!U1!1H10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_104\!!!!!!!! -S!GND!U1!1H12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_105\!!!!!!!! -S!GND!U1!1H13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_106\!!!!!!!! -S!GND!U1!1J1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_107\!!!!!!!! -S!GND!U1!1J2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_108\!!!!!!!! -S!GND!U1!1J3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_109\!!!!!!!! -S!GND!U1!1J4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_110\!!!!!!!! -S!GND!U1!1J5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_111\!!!!!!!! -S!GND!U1!1J6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_112\!!!!!!!! -S!GND!U1!1J7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_113\!!!!!!!! -S!GND!U1!1J8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_114\!!!!!!!! -S!GND!U1!1J9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_115\!!!!!!!! -S!GND!U1!1J11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_116\!!!!!!!! -S!GND!U1!1J13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_117\!!!!!!!! -S!GND!U1!1J14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_118\!!!!!!!! -S!GND!U1!1K1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_119\!!!!!!!! -S!GND!U1!1K4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_120\!!!!!!!! -S!GND!U1!1K14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_121\!!!!!!!! -S!GND!U1!1L2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_122\!!!!!!!! -S!GND!U1!1L3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_123\!!!!!!!! -S!GND!U1!1L4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_124\!!!!!!!! -S!GND!U1!1L5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_125\!!!!!!!! -S!GND!U1!1L7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_126\!!!!!!!! -S!GND!U1!1L9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_127\!!!!!!!! -S!GND!U1!1L14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_128\!!!!!!!! -S!GND!U1!1M1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_129\!!!!!!!! -S!GND!U1!1M2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_130\!!!!!!!! -S!GND!U1!1M3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_131\!!!!!!!! -S!GND!U1!1M7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_132\!!!!!!!! -S!GND!U1!1M10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_133\!!!!!!!! -S!GND!U1!1M12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_134\!!!!!!!! -S!GND!U1!1M14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_135\!!!!!!!! -S!GND!U1!1N3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_136\!!!!!!!! -S!GND!U1!1N7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_137\!!!!!!!! -S!GND!U1!1N11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_138\!!!!!!!! -S!GND!U1!1E2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_70\!!!!!!!! -S!GND!U1!1E12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_71\!!!!!!!! -S!GND!U1!1E13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_72\!!!!!!!! -S!GND!U1!1E14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_73\!!!!!!!! -S!GND!U1!1F1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_74\!!!!!!!! -S!GND!U1!1F2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_75\!!!!!!!! -S!GND!U1!1F4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_76\!!!!!!!! -S!GND!U1!1F5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_77\!!!!!!!! -S!GND!U1!1F6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_78\!!!!!!!! -S!GND!U1!1F7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_79\!!!!!!!! -S!GND!U1!1F8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_80\!!!!!!!! -S!GND!U1!1F9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_81\!!!!!!!! -S!GND!U1!1F10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_82\!!!!!!!! -S!GND!U1!1F12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_83\!!!!!!!! -S!GND!U1!1F13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_84\!!!!!!!! -S!GND!U1!1G1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_85\!!!!!!!! -S!GND!U1!1G3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_86\!!!!!!!! -S!GND!U1!1G4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_87\!!!!!!!! -S!GND!U1!1G5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_88\!!!!!!!! -S!GND!U1!1G6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_89\!!!!!!!! -S!GND!U1!1G7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_90\!!!!!!!! -S!GND!U1!1G8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_91\!!!!!!!! -S!GND!U1!1G9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_92\!!!!!!!! -S!GND!U1!1G10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_93\!!!!!!!! -S!GND!U1!1G12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_94\!!!!!!!! -S!GND!U1!1G13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_95\!!!!!!!! -S!GND!U1!1H2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_96\!!!!!!!! -S!GND!U1!1H3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_97\!!!!!!!! -S!GND!U1!1H4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_98\!!!!!!!! -S!GND!U1!1H5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F9!\VSS_99\!!!!!!!! -S!!U2!11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS20987\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-15!\CRS_DV/*MODE2\!!!!!!!! -S!!U2!25!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS20987\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-15!\EPAD\!!!!!!!! -S!!U2!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS20987\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-15!\LED1/*REGOFF\!!!!!!!! -S!!U2!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS20987\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-15!\LED2/*NINTSEL\!!!!!!!! -S!!U2!13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS20987\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-15!\MDC\!!!!!!!! -S!!U2!12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS20987\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-15!\MDIO\!!!!!!!! -S!!U2!14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS20987\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-15!\NINT/REFCLKO\!!!!!!!! -S!!U2!15!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS20987\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-15!\NRST\!!!!!!!! -S!!U2!24!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS20987\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-15!\RBIAS\!!!!!!!! -S!!U2!8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS20987\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-15!\RXD0/*MODE0\!!!!!!!! -S!!U2!7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS20987\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-15!\RXD1/*MODE1\!!!!!!!! -S!!U2!10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS20987\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-15!\RXER/*PHYAD0\!!!!!!!! -S!!U2!22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS20987\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-15!\RXN\!!!!!!!! -S!!U2!23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS20987\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-15!\RXP\!!!!!!!! -S!!U2!17!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS20987\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-15!\TXD0\!!!!!!!! -S!!U2!18!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS20987\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-15!\TXD1\!!!!!!!! -S!!U2!16!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS20987\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-15!\TXEN\!!!!!!!! -S!!U2!20!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS20987\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-15!\TXN\!!!!!!!! -S!!U2!21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS20987\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-15!\TXP\!!!!!!!! -S!!U2!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS20987\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-15!\XTAL1/CLKIN\!!!!!!!! -S!!U2!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS20987\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-15!\XTAL2\!!!!!!!! -S!VDD1A!U2!19!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21054\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F3!\VDD1A\!!!!!!!! -S!VDD2A!U2!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21054\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F3!\VDD2A\!!!!!!!! -S!VDDCR!U2!6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21054\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F3!\VDDCR\!!!!!!!! -S!VDDIO!U2!9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21054\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F3!\VDDIO\!!!!!!!! -S!!U3!11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21176\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-13!\CRS_DV/*MODE2\!!!!!!!! -S!!U3!25!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21176\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-13!\EPAD\!!!!!!!! -S!!U3!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21176\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-13!\LED1/*REGOFF\!!!!!!!! -S!!U3!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21176\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-13!\LED2/*NINTSEL\!!!!!!!! -S!!U3!13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21176\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-13!\MDC\!!!!!!!! -S!!U3!12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21176\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-13!\MDIO\!!!!!!!! -S!!U3!14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21176\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-13!\NINT/REFCLKO\!!!!!!!! -S!!U3!15!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21176\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-13!\NRST\!!!!!!!! -S!!U3!24!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21176\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-13!\RBIAS\!!!!!!!! -S!!U3!8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21176\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-13!\RXD0/*MODE0\!!!!!!!! -S!!U3!7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21176\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-13!\RXD1/*MODE1\!!!!!!!! -S!!U3!10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21176\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-13!\RXER/*PHYAD0\!!!!!!!! -S!!U3!22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21176\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-13!\RXN\!!!!!!!! -S!!U3!23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21176\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-13!\RXP\!!!!!!!! -S!!U3!17!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21176\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-13!\TXD0\!!!!!!!! -S!!U3!18!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21176\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-13!\TXD1\!!!!!!!! -S!!U3!16!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21176\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-13!\TXEN\!!!!!!!! -S!!U3!20!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21176\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-13!\TXN\!!!!!!!! -S!!U3!21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21176\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-13!\TXP\!!!!!!!! -S!!U3!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21176\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-13!\XTAL1/CLKIN\!!!!!!!! -S!!U3!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21176\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!TF-13!\XTAL2\!!!!!!!! -S!VDD1A!U3!19!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21243\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F2!\VDD1A\!!!!!!!! -S!VDD2A!U3!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21243\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F2!\VDD2A\!!!!!!!! -S!VDDCR!U3!6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21243\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F2!\VDDCR\!!!!!!!! -S!VDDIO!U3!9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS21243\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F2!\VDDIO\!!!!!!!! -S!GND!U9!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F1!\GND#1\!!!!!!!! -S!GND!U9!34!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F1!\GND#34\!!!!!!!! -S!GND!U9!35!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F1!\GND#35\!!!!!!!! -S!GND!U9!37!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F1!\GND#37\!!!!!!!! -S!GND!U9!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F1!\GND#3\!!!!!!!! -S!GND!U9!41!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F1!\GND#41\!!!!!!!! -S!GND!U9!43!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F1!\GND#43\!!!!!!!! -S!GND!U9!45!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F1!\GND#45\!!!!!!!! -S!GND!U9!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F1!\GND#4\!!!!!!!! -S!VCC!U9!23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F1!\VCC#23\!!!!!!!! -S!VCC!U9!24!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F1!\VCC#24\!!!!!!!! -S!V_BCKP!U9!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F1!\V_BCKP\!!!!!!!! -S!!U9!17!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!TF-5!\COM1_RXD\!!!!!!!! -S!!U9!18!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!TF-5!\COM1_TXD\!!!!!!!! -S!!U9!19!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!TF-5!\COM2_RXD\!!!!!!!! -S!!U9!20!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!TF-5!\COM2_TXD\!!!!!!!! -S!!U9!28!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!TF-5!\COM3_RXD/CAN_RXD\!!!!!!!! -S!!U9!27!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!TF-5!\COM3_TXD/CAN_TXD\!!!!!!!! -S!!U9!21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!TF-5!\I2C_SCL\!!!!!!!! -S!!U9!22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!TF-5!\I2C_SDA\!!!!!!!! -S!!U9!8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!TF-5!\SPI_CLK\!!!!!!!! -S!!U9!6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!TF-5!\SPI_CS\!!!!!!!! -S!!U9!9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!TF-5!\SPI_MISO\!!!!!!!! -S!!U9!7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!TF-5!\SPI_MOSI\!!!!!!!! -S!!U9!14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52850\@\QF_IC\.\K922C.Normal\(chips)!K922_K922_K922!!!TF-4!\ERR_STAT\!!!!!!!! -S!!U9!32!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52850\@\QF_IC\.\K922C.Normal\(chips)!K922_K922_K922!!!TF-4!\EVENT\!!!!!!!! -S!!U9!30!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52850\@\QF_IC\.\K922C.Normal\(chips)!K922_K922_K922!!!TF-4!\PPS\!!!!!!!! -S!!U9!15!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52850\@\QF_IC\.\K922C.Normal\(chips)!K922_K922_K922!!!TF-4!\PVT_STAT\!!!!!!!! -S!!U9!16!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52850\@\QF_IC\.\K922C.Normal\(chips)!K922_K922_K922!!!TF-4!\RTK_STAT\!!!!!!!! -S!!U9!33!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52850\@\QF_IC\.\K922C.Normal\(chips)!K922_K922_K922!!!TF-4!\SYS_RSTN\!!!!!!!! -S!!U9!36!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52892\@\QF_IC\.\K922D.Normal\(chips)!K922_K922_K922!!!TF-3!\ANT_IN_HEAD\!!!!!!!! -S!!U9!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52892\@\QF_IC\.\K922D.Normal\(chips)!K922_K922_K922!!!TF-3!\ANT_IN_POS\!!!!!!!! -S!!U9!58!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP10\!!!!!!!! -S!!U9!59!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP11\!!!!!!!! -S!!U9!60!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP12\!!!!!!!! -S!!U9!61!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP13\!!!!!!!! -S!!U9!62!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP14\!!!!!!!! -S!!U9!63!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP15\!!!!!!!! -S!!U9!64!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP16\!!!!!!!! -S!!U9!65!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP17\!!!!!!!! -S!!U9!66!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP18\!!!!!!!! -S!!U9!67!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP19\!!!!!!!! -S!!U9!49!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP1\!!!!!!!! -S!!U9!68!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP20\!!!!!!!! -S!!U9!69!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP21\!!!!!!!! -S!!U9!70!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP22\!!!!!!!! -S!!U9!71!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP23\!!!!!!!! -S!!U9!72!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP24\!!!!!!!! -S!!U9!73!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP25\!!!!!!!! -S!!U9!74!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP26\!!!!!!!! -S!!U9!75!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP27\!!!!!!!! -S!!U9!76!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP28\!!!!!!!! -S!!U9!77!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP29\!!!!!!!! -S!!U9!50!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP2\!!!!!!!! -S!!U9!78!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP30\!!!!!!!! -S!!U9!79!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP31\!!!!!!!! -S!!U9!80!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP32\!!!!!!!! -S!!U9!81!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP33\!!!!!!!! -S!!U9!82!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP34\!!!!!!!! -S!!U9!83!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP35\!!!!!!!! -S!!U9!51!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP3\!!!!!!!! -S!!U9!52!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP4\!!!!!!!! -S!!U9!53!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP5\!!!!!!!! -S!!U9!54!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP6\!!!!!!!! -S!!U9!55!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP7\!!!!!!!! -S!!U9!56!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP8\!!!!!!!! -S!!U9!57!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\EP9\!!!!!!!! -S!!U9!40!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\RSV10\!!!!!!!! -S!!U9!42!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\RSV11\!!!!!!!! -S!!U9!44!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\RSV12\!!!!!!!! -S!!U9!46!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\RSV13\!!!!!!!! -S!!U9!47!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\RSV14\!!!!!!!! -S!!U9!48!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\RSV15\!!!!!!!! -S!!U9!31!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\RSV16\!!!!!!!! -S!!U9!10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\RSV1\!!!!!!!! -S!!U9!11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\RSV2\!!!!!!!! -S!!U9!12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\RSV3\!!!!!!!! -S!!U9!13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\RSV4\!!!!!!!! -S!!U9!25!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\RSV5\!!!!!!!! -S!!U9!26!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\RSV6\!!!!!!!! -S!!U9!29!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\RSV7\!!!!!!!! -S!!U9!38!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\RSV8\!!!!!!!! -S!!U9!39!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!TF-2!\RSV9\!!!!!!!! +S!VDD_CPU!U1!1C2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F21!\CPU_DVDD_0\!!!!!!!! +S!VDD_CPU!U1!1C3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F21!\CPU_DVDD_1\!!!!!!!! +S!VDD_CPU!U1!1C4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F21!\CPU_DVDD_2\!!!!!!!! +S!VDD_0V9!U1!1E4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F21!\LOGIC_DVDD_0\!!!!!!!! +S!VDD_0V9!U1!1E5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F21!\LOGIC_DVDD_1\!!!!!!!! +S!VDD_0V9!U1!1E6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F21!\LOGIC_DVDD_2\!!!!!!!! +S!VDD_0V9!U1!1F11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F21!\LOGIC_DVDD_3\!!!!!!!! +S!VDD_0V9!U1!1G11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F21!\LOGIC_DVDD_4\!!!!!!!! +S!VDD_0V9!U1!1H11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F21!\LOGIC_DVDD_5\!!!!!!!! +S!VDD_0V9!U1!1J10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F21!\LOGIC_DVDD_6\!!!!!!!! +S!DDR3_A12!U1!W23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR2_A0 | DDR3_A12\!!!!!!!! +S!DDR3_A3!U1!1N13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR2_A1 | DDR3_A3\!!!!!!!! +S!DDR3_BA0!U1!1N12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR2_A10 | DDR3_BA0\!!!!!!!! +S!DDR3_A11!U1!W22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR2_A11 | DDR3_A11\!!!!!!!! +S!DDR3_A9!U1!U22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR2_A12 | DDR3_A9\!!!!!!!! +S!DDR3_A13!U1!T23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR2_A13 | DDR3_A13\!!!!!!!! +S!DDR3_A14!U1!Y22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR2_A14 | DDR3_A14\!!!!!!!! +S!DDR3_A15!U1!Y17!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR2_A15 | DDR3_A15\!!!!!!!! +S!DDR3_A4!U1!W18!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR2_A2 | DDR3_A4\!!!!!!!! +S!DDR3_A0!U1!V23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR2_A3 | DDR3_A0\!!!!!!!! +S!DDR3_A1!U1!W20!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR2_A4 | DDR3_A1\!!!!!!!! +S!DDR3_A5!U1!1N14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR2_A5 | DDR3_A5\!!!!!!!! +S!DDR3_A6!U1!Y20!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR2_A6 | DDR3_A6\!!!!!!!! +S!DDR3_A2!U1!V22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR2_A7 | DDR3_A2\!!!!!!!! +S!DDR3_A8!U1!Y21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR2_A8 | DDR3_A8\!!!!!!!! +S!DDR3_A7!U1!T22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR2_A9 | DDR3_A7\!!!!!!!! +S!DDR3_CASN!U1!1N8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR2_BA0 | DDR3_CASN\!!!!!!!! +S!DDR3_WEN!U1!1M9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR2_BA1 | DDR3_WEN\!!!!!!!! +S!DDR3_BA2!U1!1N9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR2_BA2 | DDR3_BA2\!!!!!!!! +S!DDR3_BA1!U1!Y18!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR2_CASN | DDR3_BA1\!!!!!!!! +S!DDR3_A10!U1!W17!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR2_RASN | DDR3_A10\!!!!!!!! +S!DDR3_RASN!U1!1M8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR2_WEN | DDR3_RASN\!!!!!!!! +S!DDR3_RST!U1!1M13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR3_RESET\!!!!!!!! +S!DDR3_CKE!U1!W15!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_CKE\!!!!!!!! +S!DDR3_CLKN!U1!W14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_CLKN\!!!!!!!! +S!DDR3_CLKP!U1!Y14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_CLKP\!!!!!!!! +S!DDR3_CSN!U1!1M11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_CSN\!!!!!!!! +S!DDR_DM0!U1!1N4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_DM0\!!!!!!!! +S!DDR_DM1!U1!1M4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_DM1\!!!!!!!! +S!DDR_D0!U1!Y13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_DQ0\!!!!!!!! +S!DDR_D10!U1!Y6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_DQ10\!!!!!!!! +S!DDR_D11!U1!Y3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_DQ11\!!!!!!!! +S!DDR_D12!U1!W6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_DQ12\!!!!!!!! +S!DDR_D13!U1!Y2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_DQ13\!!!!!!!! +S!DDR_D14!U1!1N1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_DQ14\!!!!!!!! +S!DDR_D15!U1!1N2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_DQ15\!!!!!!!! +S!DDR_D1!U1!Y12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_DQ1\!!!!!!!! +S!DDR_D2!U1!Y11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_DQ2\!!!!!!!! +S!DDR_D3!U1!1M6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_DQ3\!!!!!!!! +S!DDR_D4!U1!1M5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_DQ4\!!!!!!!! +S!DDR_D5!U1!1N6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_DQ5\!!!!!!!! +S!DDR_D6!U1!W9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_DQ6\!!!!!!!! +S!DDR_D7!U1!1N5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_DQ7\!!!!!!!! +S!DDR_D8!U1!Y7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_DQ8\!!!!!!!! +S!DDR_D9!U1!W7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_DQ9\!!!!!!!! +S!DDR_DQS0N!U1!W10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_DQS0N\!!!!!!!! +S!DDR_DQS0P!U1!Y10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_DQS0P\!!!!!!!! +S!DDR_DQS1N!U1!W4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_DQS1N\!!!!!!!! +S!DDR_DQS1P!U1!Y4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_DQS1P\!!!!!!!! +S!DDR3_ODT!U1!1N10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_ODT\!!!!!!!! +S!!U1!1L6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_OPEN0\!!!!!!!! +S!!U1!1K5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_OPEN1\!!!!!!!! +S!!U1!1L8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_RZQ\!!!!!!!! +S!VCC_DDR!U1!1K6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_VDDQ_0\!!!!!!!! +S!VCC_DDR!U1!1K7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_VDDQ_1\!!!!!!!! +S!VCC_DDR!U1!1K8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_VDDQ_2\!!!!!!!! +S!VCC_DDR!U1!1K9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_VDDQ_3\!!!!!!!! +S!VCC_DDR!U1!1K10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_VDDQ_4\!!!!!!!! +S!DDR_VREF_CA!U1!1L10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_VREF_CA\!!!!!!!! +S!DDR_VREF_DQ!U1!1L11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F20!\DDR_VREF_DQ\!!!!!!!! +S!GND!U1!A1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_0\!!!!!!!! +S!GND!U1!J3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_10\!!!!!!!! +S!GND!U1!J22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_11\!!!!!!!! +S!GND!U1!L3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_12\!!!!!!!! +S!GND!U1!L21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_13\!!!!!!!! +S!GND!U1!N22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_14\!!!!!!!! +S!GND!U1!R21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_15\!!!!!!!! +S!GND!U1!T21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_16\!!!!!!!! +S!GND!U1!U21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_17\!!!!!!!! +S!GND!U1!V21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_18\!!!!!!!! +S!GND!U1!W3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_19\!!!!!!!! +S!GND!U1!A13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_1\!!!!!!!! +S!GND!U1!W5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_20\!!!!!!!! +S!GND!U1!W8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_21\!!!!!!!! +S!GND!U1!W11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_22\!!!!!!!! +S!GND!U1!W12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_23\!!!!!!!! +S!GND!U1!W13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_24\!!!!!!!! +S!GND!U1!W16!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_25\!!!!!!!! +S!GND!U1!W19!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_26\!!!!!!!! +S!GND!U1!W21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_27\!!!!!!!! +S!GND!U1!Y1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_28\!!!!!!!! +S!GND!U1!Y9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_29\!!!!!!!! +S!GND!U1!A17!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_2\!!!!!!!! +S!GND!U1!Y15!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_30\!!!!!!!! +S!GND!U1!Y23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_31\!!!!!!!! +S!GND!U1!1A6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_32\!!!!!!!! +S!GND!U1!1A7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_33\!!!!!!!! +S!GND!U1!1A8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_34\!!!!!!!! +S!GND!U1!1A9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_35\!!!!!!!! +S!GND!U1!1A10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_36\!!!!!!!! +S!GND!U1!1A11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_37\!!!!!!!! +S!GND!U1!1A12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_38\!!!!!!!! +S!GND!U1!1A14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_39\!!!!!!!! +S!GND!U1!A23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_3\!!!!!!!! +S!GND!U1!1B1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_40\!!!!!!!! +S!GND!U1!1B2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_41\!!!!!!!! +S!GND!U1!1B3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_42\!!!!!!!! +S!GND!U1!1B4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_43\!!!!!!!! +S!GND!U1!1B5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_44\!!!!!!!! +S!GND!U1!1B8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_45\!!!!!!!! +S!GND!U1!1C1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_46\!!!!!!!! +S!GND!U1!1C5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_47\!!!!!!!! +S!GND!U1!1C6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_48\!!!!!!!! +S!GND!U1!1C9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_49\!!!!!!!! +S!GND!U1!B4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_4\!!!!!!!! +S!GND!U1!1C10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_50\!!!!!!!! +S!GND!U1!1C11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_51\!!!!!!!! +S!GND!U1!1C12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_52\!!!!!!!! +S!GND!U1!1C13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_53\!!!!!!!! +S!GND!U1!1C14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_54\!!!!!!!! +S!GND!U1!1D1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_55\!!!!!!!! +S!GND!U1!1D2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_56\!!!!!!!! +S!GND!U1!1D3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_57\!!!!!!!! +S!GND!U1!1D4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_58\!!!!!!!! +S!GND!U1!1D5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_59\!!!!!!!! +S!GND!U1!B6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_5\!!!!!!!! +S!GND!U1!1D6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_60\!!!!!!!! +S!GND!U1!1D7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_61\!!!!!!!! +S!GND!U1!1D8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_62\!!!!!!!! +S!GND!U1!1D9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_63\!!!!!!!! +S!GND!U1!1D10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_64\!!!!!!!! +S!GND!U1!1D11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_65\!!!!!!!! +S!GND!U1!1D12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_66\!!!!!!!! +S!GND!U1!1D13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_67\!!!!!!!! +S!GND!U1!1D14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_68\!!!!!!!! +S!GND!U1!1E1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_69\!!!!!!!! +S!GND!U1!D2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_6\!!!!!!!! +S!GND!U1!D22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_7\!!!!!!!! +S!GND!U1!G2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_8\!!!!!!!! +S!GND!U1!H21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F19!\VSS_9\!!!!!!!! +S!GND!U1!1H6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_100\!!!!!!!! +S!GND!U1!1H7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_101\!!!!!!!! +S!GND!U1!1H8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_102\!!!!!!!! +S!GND!U1!1H9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_103\!!!!!!!! +S!GND!U1!1H10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_104\!!!!!!!! +S!GND!U1!1H12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_105\!!!!!!!! +S!GND!U1!1H13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_106\!!!!!!!! +S!GND!U1!1J1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_107\!!!!!!!! +S!GND!U1!1J2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_108\!!!!!!!! +S!GND!U1!1J3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_109\!!!!!!!! +S!GND!U1!1J4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_110\!!!!!!!! +S!GND!U1!1J5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_111\!!!!!!!! +S!GND!U1!1J6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_112\!!!!!!!! +S!GND!U1!1J7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_113\!!!!!!!! +S!GND!U1!1J8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_114\!!!!!!!! +S!GND!U1!1J9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_115\!!!!!!!! +S!GND!U1!1J11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_116\!!!!!!!! +S!GND!U1!1J13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_117\!!!!!!!! +S!GND!U1!1J14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_118\!!!!!!!! +S!GND!U1!1K1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_119\!!!!!!!! +S!GND!U1!1K4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_120\!!!!!!!! +S!GND!U1!1K14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_121\!!!!!!!! +S!GND!U1!1L2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_122\!!!!!!!! +S!GND!U1!1L3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_123\!!!!!!!! +S!GND!U1!1L4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_124\!!!!!!!! +S!GND!U1!1L5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_125\!!!!!!!! +S!GND!U1!1L7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_126\!!!!!!!! +S!GND!U1!1L9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_127\!!!!!!!! +S!GND!U1!1L14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_128\!!!!!!!! +S!GND!U1!1M1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_129\!!!!!!!! +S!GND!U1!1M2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_130\!!!!!!!! +S!GND!U1!1M3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_131\!!!!!!!! +S!GND!U1!1M7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_132\!!!!!!!! +S!GND!U1!1M10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_133\!!!!!!!! +S!GND!U1!1M12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_134\!!!!!!!! +S!GND!U1!1M14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_135\!!!!!!!! +S!GND!U1!1N3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_136\!!!!!!!! +S!GND!U1!1N7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_137\!!!!!!!! +S!GND!U1!1N11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_138\!!!!!!!! +S!GND!U1!1E2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_70\!!!!!!!! +S!GND!U1!1E12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_71\!!!!!!!! +S!GND!U1!1E13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_72\!!!!!!!! +S!GND!U1!1E14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_73\!!!!!!!! +S!GND!U1!1F1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_74\!!!!!!!! +S!GND!U1!1F2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_75\!!!!!!!! +S!GND!U1!1F4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_76\!!!!!!!! +S!GND!U1!1F5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_77\!!!!!!!! +S!GND!U1!1F6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_78\!!!!!!!! +S!GND!U1!1F7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_79\!!!!!!!! +S!GND!U1!1F8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_80\!!!!!!!! +S!GND!U1!1F9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_81\!!!!!!!! +S!GND!U1!1F10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_82\!!!!!!!! +S!GND!U1!1F12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_83\!!!!!!!! +S!GND!U1!1F13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_84\!!!!!!!! +S!GND!U1!1G1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_85\!!!!!!!! +S!GND!U1!1G3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_86\!!!!!!!! +S!GND!U1!1G4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_87\!!!!!!!! +S!GND!U1!1G5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_88\!!!!!!!! +S!GND!U1!1G6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_89\!!!!!!!! +S!GND!U1!1G7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_90\!!!!!!!! +S!GND!U1!1G8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_91\!!!!!!!! +S!GND!U1!1G9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_92\!!!!!!!! +S!GND!U1!1G10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_93\!!!!!!!! +S!GND!U1!1G12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_94\!!!!!!!! +S!GND!U1!1G13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_95\!!!!!!!! +S!GND!U1!1H2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_96\!!!!!!!! +S!GND!U1!1H3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_97\!!!!!!!! +S!GND!U1!1H4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_98\!!!!!!!! +S!GND!U1!1H5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F18!\VSS_99\!!!!!!!! +S!RMII1_RXDV_CRS!U17!11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F10!\CRS_DV/*MODE2\!!!!!!!! +S!GND!U17!25!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F10!\EPAD\!!!!!!!! +S!N16785482!U17!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F10!\LED1/*REGOFF\!!!!!!!! +S!N16785446!U17!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F10!\LED2/*NINTSEL\!!!!!!!! +S!RMII1_MDC!U17!13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F10!\MDC\!!!!!!!! +S!RMII1_MDIO!U17!12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F10!\MDIO\!!!!!!!! +S!RMII1_CLK!U17!14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F10!\NINT/REFCLKO\!!!!!!!! +S!RMII1_RST!U17!15!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F10!\NRST\!!!!!!!! +S!N16785007!U17!24!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F10!\RBIAS\!!!!!!!! +S!RMII1_TXD0!U17!8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F10!\RXD0/*MODE0\!!!!!!!! +S!RMII1_TXD1!U17!7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F10!\RXD1/*MODE1\!!!!!!!! +S!!U17!10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F10!\RXER/*PHYAD0\!!!!!!!! +S!!U17!22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F10!\RXN\!!!!!!!! +S!!U17!23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F10!\RXP\!!!!!!!! +S!RMII1_TXD0!U17!17!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F10!\TXD0\!!!!!!!! +S!RMII1_TXD1!U17!18!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F10!\TXD1\!!!!!!!! +S!RMII1_TXEN!U17!16!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F10!\TXEN\!!!!!!!! +S!!U17!20!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F10!\TXN\!!!!!!!! +S!!U17!21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F10!\TXP\!!!!!!!! +S!ETH_CLK1_25M_OUT!U17!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F10!\XTAL1/CLKIN\!!!!!!!! +S!!U17!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F10!\XTAL2\!!!!!!!! +S!VDDA_RMII1!U17!19!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71271\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F9!\VDD1A\!!!!!!!! +S!VDDA_RMII1!U17!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71271\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F9!\VDD2A\!!!!!!!! +S!VDDCR_RMII1!U17!6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71271\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F9!\VDDCR\!!!!!!!! +S!VDDIO_RMII1!U17!9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71271\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F9!\VDDIO\!!!!!!!! +S!RMII0_RXDV_CRS!U18!11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F8!\CRS_DV/*MODE2\!!!!!!!! +S!GND!U18!25!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F8!\EPAD\!!!!!!!! +S!N16786362!U18!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F8!\LED1/*REGOFF\!!!!!!!! +S!N16786382!U18!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F8!\LED2/*NINTSEL\!!!!!!!! +S!RMII0_MDC!U18!13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F8!\MDC\!!!!!!!! +S!RMII0_MDIO!U18!12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F8!\MDIO\!!!!!!!! +S!RMII0_CLK!U18!14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F8!\NINT/REFCLKO\!!!!!!!! +S!RMII0_RST!U18!15!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F8!\NRST\!!!!!!!! +S!N16785709!U18!24!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F8!\RBIAS\!!!!!!!! +S!RMII0_TXD0!U18!8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F8!\RXD0/*MODE0\!!!!!!!! +S!RMII0_TXD1!U18!7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F8!\RXD1/*MODE1\!!!!!!!! +S!N16786486!U18!10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F8!\RXER/*PHYAD0\!!!!!!!! +S!!U18!22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F8!\RXN\!!!!!!!! +S!!U18!23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F8!\RXP\!!!!!!!! +S!RMII0_TXD0!U18!17!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F8!\TXD0\!!!!!!!! +S!RMII0_TXD1!U18!18!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F8!\TXD1\!!!!!!!! +S!RMII0_TXEN!U18!16!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F8!\TXEN\!!!!!!!! +S!!U18!20!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F8!\TXN\!!!!!!!! +S!!U18!21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F8!\TXP\!!!!!!!! +S!ETH_CLK0_25M_OUT!U18!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F8!\XTAL1/CLKIN\!!!!!!!! +S!!U18!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F8!\XTAL2\!!!!!!!! +S!VDDA_RMII0!U18!19!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71476\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F7!\VDD1A\!!!!!!!! +S!VDDA_RMII0!U18!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71476\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F7!\VDD2A\!!!!!!!! +S!VDDCR_RMII0!U18!6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71476\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F7!\VDDCR\!!!!!!!! +S!VDDIO_RMII0!U18!9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71476\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F7!\VDDIO\!!!!!!!! +S!GND!U9!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F5!\GND#1\!!!!!!!! +S!GND!U9!34!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F5!\GND#34\!!!!!!!! +S!GND!U9!35!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F5!\GND#35\!!!!!!!! +S!GND!U9!37!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F5!\GND#37\!!!!!!!! +S!GND!U9!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F5!\GND#3\!!!!!!!! +S!GND!U9!41!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F5!\GND#41\!!!!!!!! +S!GND!U9!43!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F5!\GND#43\!!!!!!!! +S!GND!U9!45!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F5!\GND#45\!!!!!!!! +S!GND!U9!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F5!\GND#4\!!!!!!!! +S!VDD_GNSS!U9!23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F5!\VCC#23\!!!!!!!! +S!VDD_GNSS!U9!24!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F5!\VCC#24\!!!!!!!! +S!V_BCKP!U9!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F5!\V_BCKP\!!!!!!!! +S!GNSS_COM1_RX!U9!17!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!F4!\COM1_RXD\!!!!!!!! +S!GNSS_COM1_TX!U9!18!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!F4!\COM1_TXD\!!!!!!!! +S!GNSS_COM2_RX!U9!19!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!F4!\COM2_RXD\!!!!!!!! +S!GNSS_COM2_TX!U9!20!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!F4!\COM2_TXD\!!!!!!!! +S!GNSS_COM3_RX!U9!28!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!F4!\COM3_RXD/CAN_RXD\!!!!!!!! +S!GNSS_COM3_TX!U9!27!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!F4!\COM3_TXD/CAN_TXD\!!!!!!!! +S!!U9!21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!F4!\I2C_SCL\!!!!!!!! +S!!U9!22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!F4!\I2C_SDA\!!!!!!!! +S!!U9!8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!F4!\SPI_CLK\!!!!!!!! +S!!U9!6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!F4!\SPI_CS\!!!!!!!! +S!!U9!9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!F4!\SPI_MISO\!!!!!!!! +S!!U9!7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!F4!\SPI_MOSI\!!!!!!!! +S!!U9!14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52850\@\QF_IC\.\K922C.Normal\(chips)!K922_K922_K922!!!F3!\ERR_STAT\!!!!!!!! +S!!U9!32!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52850\@\QF_IC\.\K922C.Normal\(chips)!K922_K922_K922!!!F3!\EVENT\!!!!!!!! +S!PPS!U9!30!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52850\@\QF_IC\.\K922C.Normal\(chips)!K922_K922_K922!!!F3!\PPS\!!!!!!!! +S!!U9!15!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52850\@\QF_IC\.\K922C.Normal\(chips)!K922_K922_K922!!!F3!\PVT_STAT\!!!!!!!! +S!!U9!16!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52850\@\QF_IC\.\K922C.Normal\(chips)!K922_K922_K922!!!F3!\RTK_STAT\!!!!!!!! +S!!U9!33!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52850\@\QF_IC\.\K922C.Normal\(chips)!K922_K922_K922!!!F3!\SYS_RSTN\!!!!!!!! +S!ANT2!U9!36!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52892\@\QF_IC\.\K922D.Normal\(chips)!K922_K922_K922!!!F2!\ANT_IN_HEAD\!!!!!!!! +S!ANT1!U9!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52892\@\QF_IC\.\K922D.Normal\(chips)!K922_K922_K922!!!F2!\ANT_IN_POS\!!!!!!!! +S!GND!U9!58!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP10\!!!!!!!! +S!GND!U9!59!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP11\!!!!!!!! +S!GND!U9!60!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP12\!!!!!!!! +S!GND!U9!61!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP13\!!!!!!!! +S!GND!U9!62!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP14\!!!!!!!! +S!GND!U9!63!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP15\!!!!!!!! +S!GND!U9!64!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP16\!!!!!!!! +S!GND!U9!65!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP17\!!!!!!!! +S!GND!U9!66!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP18\!!!!!!!! +S!GND!U9!67!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP19\!!!!!!!! +S!GND!U9!49!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP1\!!!!!!!! +S!GND!U9!68!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP20\!!!!!!!! +S!GND!U9!69!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP21\!!!!!!!! +S!GND!U9!70!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP22\!!!!!!!! +S!GND!U9!71!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP23\!!!!!!!! +S!GND!U9!72!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP24\!!!!!!!! +S!GND!U9!73!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP25\!!!!!!!! +S!GND!U9!74!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP26\!!!!!!!! +S!GND!U9!75!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP27\!!!!!!!! +S!GND!U9!76!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP28\!!!!!!!! +S!GND!U9!77!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP29\!!!!!!!! +S!GND!U9!50!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP2\!!!!!!!! +S!GND!U9!78!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP30\!!!!!!!! +S!GND!U9!79!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP31\!!!!!!!! +S!GND!U9!80!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP32\!!!!!!!! +S!GND!U9!81!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP33\!!!!!!!! +S!GND!U9!82!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP34\!!!!!!!! +S!GND!U9!83!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP35\!!!!!!!! +S!GND!U9!51!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP3\!!!!!!!! +S!GND!U9!52!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP4\!!!!!!!! +S!GND!U9!53!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP5\!!!!!!!! +S!GND!U9!54!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP6\!!!!!!!! +S!GND!U9!55!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP7\!!!!!!!! +S!GND!U9!56!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP8\!!!!!!!! +S!GND!U9!57!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\EP9\!!!!!!!! +S!!U9!40!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\RSV10\!!!!!!!! +S!!U9!42!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\RSV11\!!!!!!!! +S!!U9!44!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\RSV12\!!!!!!!! +S!!U9!46!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\RSV13\!!!!!!!! +S!!U9!47!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\RSV14\!!!!!!!! +S!!U9!48!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\RSV15\!!!!!!!! +S!!U9!31!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\RSV16\!!!!!!!! +S!!U9!10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\RSV1\!!!!!!!! +S!!U9!11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\RSV2\!!!!!!!! +S!!U9!12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\RSV3\!!!!!!!! +S!!U9!13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\RSV4\!!!!!!!! +S!!U9!25!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\RSV5\!!!!!!!! +S!!U9!26!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\RSV6\!!!!!!!! +S!!U9!29!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\RSV7\!!!!!!!! +S!!U9!38!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\RSV8\!!!!!!!! +S!!U9!39!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F1!\RSV9\!!!!!!!! S!GND!X1!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19052\@\OTHER\.\CRYSTAL 1-3_4Pin.Normal\(chips)!CRYSTAL 1-3_4PIN_XTAL3225_CRYSTAL 1-3_4PIN!!!F0!\GND#2\!!!!!!!! S!GND!X1!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19052\@\OTHER\.\CRYSTAL 1-3_4Pin.Normal\(chips)!CRYSTAL 1-3_4PIN_XTAL3225_CRYSTAL 1-3_4PIN!!!F0!\GND#4\!!!!!!!! S!N19188!X1!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19052\@\OTHER\.\CRYSTAL 1-3_4Pin.Normal\(chips)!CRYSTAL 1-3_4PIN_XTAL3225_CRYSTAL 1-3_4PIN!!!F0!\X1\!!!!!!!! diff --git a/allegro/pstdedb.cdsz b/allegro/pstdedb.cdsz index e1d9fbf..d0c1d99 100644 Binary files a/allegro/pstdedb.cdsz and b/allegro/pstdedb.cdsz differ diff --git a/allegro/rk3506_nav_rk3506_nav.json b/allegro/rk3506_nav_rk3506_nav.json index 6ab8060..9d1f06e 100644 --- a/allegro/rk3506_nav_rk3506_nav.json +++ b/allegro/rk3506_nav_rk3506_nav.json @@ -7,66 +7,49 @@ "Pin Property" : [], "Component" : [ { - "Name" : "J2", - "C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS60593\\@\\QF_ANT\\.\\MMCX-180.Normal\\(chips)", - "Logical" : "J2", + "Name" : "U20", + "C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS16795323\\@\\QF_IC\\.\\CH334P.Normal\\(chips)", + "Logical" : "U20", "Physical" : null + } + ], + "Net" : [ + { + "Name" : "VDD33", + "C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\VDD33\\", + "Logical" : "VDD33", + "Physical" : null + }, + { + "Name" : "EP", + "C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\EP\\", + "Logical" : "EP", + "Physical" : null }, { - "Name" : "J3", - "C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS60619\\@\\QF_ANT\\.\\MMCX-180.Normal\\(chips)", - "Logical" : "J3", + "Name" : "V5", + "C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\V5\\", + "Logical" : "V5", "Physical" : null } ], - "Net" : [], "Connection" : [ { - "Name" : "J2.3", - "C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS60593\\@\\QF_ANT\\.\\MMCX-180.Normal\\(chips):\\GND#3\\", - "Logical" : "GND", + "Name" : "U20.16", + "C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS16795323\\@\\QF_IC\\.\\CH334P.Normal\\(chips):\\VDD33\\", + "Logical" : "VDD33", "Physical" : null }, { - "Name" : "J2.4", - "C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS60593\\@\\QF_ANT\\.\\MMCX-180.Normal\\(chips):\\GND#4\\", - "Logical" : "GND", + "Name" : "U20.17", + "C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS16795323\\@\\QF_IC\\.\\CH334P.Normal\\(chips):\\EP\\", + "Logical" : "EP", "Physical" : null }, { - "Name" : "J2.2", - "C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS60593\\@\\QF_ANT\\.\\MMCX-180.Normal\\(chips):\\GND#2\\", - "Logical" : "GND", - "Physical" : null - }, - { - "Name" : "J2.5", - "C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS60593\\@\\QF_ANT\\.\\MMCX-180.Normal\\(chips):\\GND#5\\", - "Logical" : "GND", - "Physical" : null - }, - { - "Name" : "J3.2", - "C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS60619\\@\\QF_ANT\\.\\MMCX-180.Normal\\(chips):\\GND#2\\", - "Logical" : "GND", - "Physical" : null - }, - { - "Name" : "J3.3", - "C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS60619\\@\\QF_ANT\\.\\MMCX-180.Normal\\(chips):\\GND#3\\", - "Logical" : "GND", - "Physical" : null - }, - { - "Name" : "J3.4", - "C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS60619\\@\\QF_ANT\\.\\MMCX-180.Normal\\(chips):\\GND#4\\", - "Logical" : "GND", - "Physical" : null - }, - { - "Name" : "J3.5", - "C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS60619\\@\\QF_ANT\\.\\MMCX-180.Normal\\(chips):\\GND#5\\", - "Logical" : "GND", + "Name" : "U20.15", + "C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS16795323\\@\\QF_IC\\.\\CH334P.Normal\\(chips):\\V5\\", + "Logical" : "V5", "Physical" : null } ] diff --git a/rk3506_nav.brd b/rk3506_nav.brd index d4822b3..522cea1 100644 Binary files a/rk3506_nav.brd and b/rk3506_nav.brd differ