diff --git a/.gitignore b/.gitignore
index 4dd382c..81dc65b 100644
--- a/.gitignore
+++ b/.gitignore
@@ -39,4 +39,7 @@ Desktop.ini
 *.log*
 *.rpt
 *.rpt*
-*.tag
\ No newline at end of file
+*.tag
+
+
+allegro/*.dat
\ No newline at end of file
diff --git a/RK3506_NAV.DSN b/RK3506_NAV.DSN
index fb3f831..bddd292 100644
Binary files a/RK3506_NAV.DSN and b/RK3506_NAV.DSN differ
diff --git a/allegro/chipsview.dat b/allegro/chipsview.dat
deleted file mode 100644
index e3235c9..0000000
--- a/allegro/chipsview.dat
+++ /dev/null
@@ -1,7670 +0,0 @@
-FILE_TYPE=LIBRARY_PARTS;
-primitive 'BEAD_L0402_6.8NH';
-  pin
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='BEAD';
-	 VALUE='6.8nH';
-	 BODY_NAME='BEAD_L0402_6.8NH';
-	 JEDEC_TYPE='L0402';
-	 PHYS_DES_PREFIX='FB';
-	 CLASS='IC';
-  end_body;
-end_primitive;
-
-primitive 'RESISTOR_R0402_DISCRETE_49.9R';
-  pin
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='RESISTOR';
-	 VALUE='49.9R';
-	 BODY_NAME='RESISTOR_R0402_DISCRETE_49.9R';
-	 JEDEC_TYPE='R0402';
-	 PHYS_DES_PREFIX='R';
-	 CLASS='DISCRETE';
-  end_body;
-end_primitive;
-
-primitive 'XTAL-4P_XTAL3225_12MHZ';
-  pin
-	 '4':
-	   PIN_NUMBER='(4)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '3':
-	   PIN_NUMBER='(3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='XTAL-4P';
-	 VALUE='12Mhz';
-	 BODY_NAME='XTAL-4P_XTAL3225_12MHZ';
-	 JEDEC_TYPE='XTAL3225';
-	 PHYS_DES_PREFIX='X';
-	 CLASS='IC';
-  end_body;
-end_primitive;
-
-primitive 'XTAL-4P_XTAL3225_30MHZ';
-  pin
-	 '4':
-	   PIN_NUMBER='(4)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '3':
-	   PIN_NUMBER='(3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='XTAL-4P';
-	 VALUE='30Mhz';
-	 BODY_NAME='XTAL-4P_XTAL3225_30MHZ';
-	 JEDEC_TYPE='XTAL3225';
-	 PHYS_DES_PREFIX='X';
-	 CLASS='IC';
-  end_body;
-end_primitive;
-
-primitive 'CH334P_QFN16_050_300X300_CH334P';
-  pin
-	 '\XO\':
-	   PIN_NUMBER='(1)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\XI\':
-	   PIN_NUMBER='(2)';
-	   INPUT_LOAD='(-0.01,0.01)';
-	 '\VDD33\':
-	   PIN_NUMBER='(16)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\V5\':
-	   PIN_NUMBER='(15)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RESET#/CDP\':
-	   PIN_NUMBER='(13)';
-	   INPUT_LOAD='(-0.01,0.01)';
-	 '\PGANG\':
-	   PIN_NUMBER='(14)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\EP\':
-	   PIN_NUMBER='(17)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DPU\':
-	   PIN_NUMBER='(12)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\DP4\':
-	   PIN_NUMBER='(4)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\DP3\':
-	   PIN_NUMBER='(6)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\DP2\':
-	   PIN_NUMBER='(8)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\DP1\':
-	   PIN_NUMBER='(10)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\DMU\':
-	   PIN_NUMBER='(11)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\DM4\':
-	   PIN_NUMBER='(3)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\DM3\':
-	   PIN_NUMBER='(5)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\DM2\':
-	   PIN_NUMBER='(7)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\DM1\':
-	   PIN_NUMBER='(9)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-  end_pin;
-  body
-	 PART_NAME='CH334P';
-	 VALUE='CH334P';
-	 BODY_NAME='CH334P_QFN16_050_300X300_CH334P';
-	 JEDEC_TYPE='QFN16_050_300X300';
-	 PHYS_DES_PREFIX='U';
-	 CLASS='IC';
-  end_body;
-end_primitive;
-
-primitive 'CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q';
-  pin
-	 '\TEST\':
-	   PIN_NUMBER='(0,0,0,0,17)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\NC9\':
-	   PIN_NUMBER='(0,0,0,0,30)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC8\':
-	   PIN_NUMBER='(0,0,0,0,10)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC7\':
-	   PIN_NUMBER='(0,0,0,0,9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC6\':
-	   PIN_NUMBER='(0,0,0,0,8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC5\':
-	   PIN_NUMBER='(0,0,0,0,7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC4\':
-	   PIN_NUMBER='(0,0,0,0,6)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC3\':
-	   PIN_NUMBER='(0,0,0,0,5)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC2\':
-	   PIN_NUMBER='(0,0,0,0,4)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC1\':
-	   PIN_NUMBER='(0,0,0,0,2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\XO\':
-	   PIN_NUMBER='(0,0,0,28,0)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\XI\':
-	   PIN_NUMBER='(0,0,0,29,0)';
-	   INPUT_LOAD='(-0.01,0.01)';
-	 '\UD-\':
-	   PIN_NUMBER='(0,0,32,0,0)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\UD+\':
-	   PIN_NUMBER='(0,0,31,0,0)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\RST#\':
-	   PIN_NUMBER='(0,0,38,0,0)';
-	   INPUT_LOAD='(-0.01,0.01)';
-	 '\ISP\':
-	   PIN_NUMBER='(0,0,37,0,0)';
-	   INPUT_LOAD='(-0.01,0.01)';
-	 '\TXD3\':
-	   PIN_NUMBER='(0,41,0,0,0)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\TXD2\':
-	   PIN_NUMBER='(0,43,0,0,0)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\TXD1\':
-	   PIN_NUMBER='(0,45,0,0,0)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\TXD0\':
-	   PIN_NUMBER='(0,19,0,0,0)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\TNOW3/GPIO11\':
-	   PIN_NUMBER='(0,47,0,0,0)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\TNOW2/GPIO8\':
-	   PIN_NUMBER='(0,46,0,0,0)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\TNOW1/GPIO5\':
-	   PIN_NUMBER='(0,39,0,0,0)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\TNOW0/GPIO2\':
-	   PIN_NUMBER='(0,36,0,0,0)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\RXD3\':
-	   PIN_NUMBER='(0,40,0,0,0)';
-	   INPUT_LOAD='(-0.01,0.01)';
-	 '\RXD2\':
-	   PIN_NUMBER='(0,42,0,0,0)';
-	   INPUT_LOAD='(-0.01,0.01)';
-	 '\RXD1\':
-	   PIN_NUMBER='(0,44,0,0,0)';
-	   INPUT_LOAD='(-0.01,0.01)';
-	 '\RXD0\':
-	   PIN_NUMBER='(0,22,0,0,0)';
-	   INPUT_LOAD='(-0.01,0.01)';
-	 '\RTS3/GPIO10\':
-	   PIN_NUMBER='(0,16,0,0,0)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\RTS2/GPIO7\':
-	   PIN_NUMBER='(0,14,0,0,0)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\RTS1/GPIO4\':
-	   PIN_NUMBER='(0,12,0,0,0)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\RTS0/GPIO1\':
-	   PIN_NUMBER='(0,20,0,0,0)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\RI0\':
-	   PIN_NUMBER='(0,24,0,0,0)';
-	   INPUT_LOAD='(-0.01,0.01)';
-	 '\DTR0\':
-	   PIN_NUMBER='(0,21,0,0,0)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\DSR0\':
-	   PIN_NUMBER='(0,25,0,0,0)';
-	   INPUT_LOAD='(-0.01,0.01)';
-	 '\DCD0\':
-	   PIN_NUMBER='(0,23,0,0,0)';
-	   INPUT_LOAD='(-0.01,0.01)';
-	 '\CTS3/GPIO9\':
-	   PIN_NUMBER='(0,15,0,0,0)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\CTS2/GPIO6\':
-	   PIN_NUMBER='(0,13,0,0,0)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\CTS1/GPIO3\':
-	   PIN_NUMBER='(0,11,0,0,0)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\CTS0/GPIO0\':
-	   PIN_NUMBER='(0,26,0,0,0)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\VIO#48\':
-	   PIN_NUMBER='(48,0,0,0,0)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VIO#2318\':
-	   PIN_NUMBER='(18,0,0,0,0)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VDDK#3\':
-	   PIN_NUMBER='(3,0,0,0,0)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VDDK#35\':
-	   PIN_NUMBER='(35,0,0,0,0)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VCC5\':
-	   PIN_NUMBER='(27,0,0,0,0)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VCC33\':
-	   PIN_NUMBER='(33,0,0,0,0)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\GND#34\':
-	   PIN_NUMBER='(34,0,0,0,0)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\GND#1\':
-	   PIN_NUMBER='(1,0,0,0,0)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='CH9344Q';
-	 VALUE='CH9344Q';
-	 BODY_NAME='CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q';
-	 JEDEC_TYPE='LQFP48_050_700X700';
-	 PHYS_DES_PREFIX='U';
-	 CLASS='IC';
-  end_body;
-end_primitive;
-
-primitive 'CAP NP_C0402_DISCRETE_100PF';
-  pin
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='CAP NP';
-	 VALUE='100pF';
-	 BODY_NAME='CAP NP_C0402_DISCRETE_100PF';
-	 JEDEC_TYPE='C0402';
-	 PHYS_DES_PREFIX='C';
-	 CLASS='DISCRETE';
-  end_body;
-end_primitive;
-
-primitive 'CAP NP_C0603_DISCRETE_10UF';
-  pin
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='CAP NP';
-	 VALUE='10uF';
-	 BODY_NAME='CAP NP_C0603_DISCRETE_10UF';
-	 JEDEC_TYPE='C0603';
-	 PHYS_DES_PREFIX='C';
-	 CLASS='DISCRETE';
-  end_body;
-end_primitive;
-
-primitive 'CAP NP_C0402_BGA_DISCRETE_4.7NF';
-  pin
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='CAP NP';
-	 VALUE='4.7nF';
-	 BODY_NAME='CAP NP_C0402_BGA_DISCRETE_4.7NF';
-	 JEDEC_TYPE='C0402_BGA';
-	 PHYS_DES_PREFIX='C';
-	 CLASS='DISCRETE';
-  end_body;
-end_primitive;
-
-primitive 'CAP NP_C0402_BGA_DISCRETE_1NF';
-  pin
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='CAP NP';
-	 VALUE='1nF';
-	 BODY_NAME='CAP NP_C0402_BGA_DISCRETE_1NF';
-	 JEDEC_TYPE='C0402_BGA';
-	 PHYS_DES_PREFIX='C';
-	 CLASS='DISCRETE';
-  end_body;
-end_primitive;
-
-primitive 'CAP NP_C0402_BGA_DISCRETE_1UF';
-  pin
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='CAP NP';
-	 VALUE='1uF';
-	 BODY_NAME='CAP NP_C0402_BGA_DISCRETE_1UF';
-	 JEDEC_TYPE='C0402_BGA';
-	 PHYS_DES_PREFIX='C';
-	 CLASS='DISCRETE';
-  end_body;
-end_primitive;
-
-primitive 'CAP NP_C0603_DISCRETE_100NF';
-  pin
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='CAP NP';
-	 VALUE='100nF';
-	 BODY_NAME='CAP NP_C0603_DISCRETE_100NF';
-	 JEDEC_TYPE='C0603';
-	 PHYS_DES_PREFIX='C';
-	 CLASS='DISCRETE';
-  end_body;
-end_primitive;
-
-primitive 'CAP NP_C0402_DISCRETE_1NF';
-  pin
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='CAP NP';
-	 VALUE='1nF';
-	 BODY_NAME='CAP NP_C0402_DISCRETE_1NF';
-	 JEDEC_TYPE='C0402';
-	 PHYS_DES_PREFIX='C';
-	 CLASS='DISCRETE';
-  end_body;
-end_primitive;
-
-primitive 'CAP NP_C0402_DISCRETE_1UF';
-  pin
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='CAP NP';
-	 VALUE='1uF';
-	 BODY_NAME='CAP NP_C0402_DISCRETE_1UF';
-	 JEDEC_TYPE='C0402';
-	 PHYS_DES_PREFIX='C';
-	 CLASS='DISCRETE';
-  end_body;
-end_primitive;
-
-primitive 'CAP NP_C0603_DISCRETE_4.7UF';
-  pin
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='CAP NP';
-	 VALUE='4.7uF';
-	 BODY_NAME='CAP NP_C0603_DISCRETE_4.7UF';
-	 JEDEC_TYPE='C0603';
-	 PHYS_DES_PREFIX='C';
-	 CLASS='DISCRETE';
-  end_body;
-end_primitive;
-
-primitive 'CAP NP_C0402_DISCRETE_4.7UF';
-  pin
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='CAP NP';
-	 VALUE='4.7uF';
-	 BODY_NAME='CAP NP_C0402_DISCRETE_4.7UF';
-	 JEDEC_TYPE='C0402';
-	 PHYS_DES_PREFIX='C';
-	 CLASS='DISCRETE';
-  end_body;
-end_primitive;
-
-primitive 'CAP NP_NC_C0402_DISCRETE_10PF/NC';
-  pin
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='CAP NP_NC';
-	 VALUE='10pF/NC';
-	 BODY_NAME='CAP NP_NC_C0402_DISCRETE_10PF/NC';
-	 JEDEC_TYPE='C0402';
-	 PHYS_DES_PREFIX='C';
-	 CLASS='DISCRETE';
-  end_body;
-end_primitive;
-
-primitive 'BEAD_L0603_0R';
-  pin
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='BEAD';
-	 VALUE='0R';
-	 BODY_NAME='BEAD_L0603_0R';
-	 JEDEC_TYPE='L0603';
-	 PHYS_DES_PREFIX='FB';
-	 CLASS='IC';
-  end_body;
-end_primitive;
-
-primitive 'RESISTOR_R0402_DISCRETE_10K';
-  pin
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='RESISTOR';
-	 VALUE='10K';
-	 BODY_NAME='RESISTOR_R0402_DISCRETE_10K';
-	 JEDEC_TYPE='R0402';
-	 PHYS_DES_PREFIX='R';
-	 CLASS='DISCRETE';
-  end_body;
-end_primitive;
-
-primitive 'RESISTOR_R0402_DISCRETE_12.1K';
-  pin
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='RESISTOR';
-	 VALUE='12.1K';
-	 BODY_NAME='RESISTOR_R0402_DISCRETE_12.1K';
-	 JEDEC_TYPE='R0402';
-	 PHYS_DES_PREFIX='R';
-	 CLASS='DISCRETE';
-  end_body;
-end_primitive;
-
-primitive 'RESISTOR_R0402_DISCRETE_0R';
-  pin
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='RESISTOR';
-	 VALUE='0R';
-	 BODY_NAME='RESISTOR_R0402_DISCRETE_0R';
-	 JEDEC_TYPE='R0402';
-	 PHYS_DES_PREFIX='R';
-	 CLASS='DISCRETE';
-  end_body;
-end_primitive;
-
-primitive 'RESISTOR_R0402_DISCRETE_240R';
-  pin
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='RESISTOR';
-	 VALUE='240R';
-	 BODY_NAME='RESISTOR_R0402_DISCRETE_240R';
-	 JEDEC_TYPE='R0402';
-	 PHYS_DES_PREFIX='R';
-	 CLASS='DISCRETE';
-  end_body;
-end_primitive;
-
-primitive 'RESISTOR_NC_R0402_DISCRETE_10K/NC';
-  pin
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='RESISTOR_NC';
-	 VALUE='10K/NC';
-	 BODY_NAME='RESISTOR_NC_R0402_DISCRETE_10K/NC';
-	 JEDEC_TYPE='R0402';
-	 PHYS_DES_PREFIX='R';
-	 CLASS='DISCRETE';
-  end_body;
-end_primitive;
-
-primitive 'MMCX-180_MMCX-180_50OHM';
-  pin
-	 '\SIG\':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\GND#5\':
-	   PIN_NUMBER='(5)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\GND#4\':
-	   PIN_NUMBER='(4)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\GND#3\':
-	   PIN_NUMBER='(3)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\GND#2\':
-	   PIN_NUMBER='(2)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='MMCX-180';
-	 VALUE='50Ohm';
-	 BODY_NAME='MMCX-180_MMCX-180_50OHM';
-	 JEDEC_TYPE='MMCX-180';
-	 PHYS_DES_PREFIX='J';
-	 CLASS='IC';
-  end_body;
-end_primitive;
-
-primitive 'TLV62569DBVR_SOT_23_5_TLV62569DBV';
-  pin
-	 '\VIN\':
-	   PIN_NUMBER='(4)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\SW\':
-	   PIN_NUMBER='(3)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\GND\':
-	   PIN_NUMBER='(2)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\FB\':
-	   PIN_NUMBER='(5)';
-	   INPUT_LOAD='(-0.01,0.01)';
-	 '\EN\':
-	   PIN_NUMBER='(1)';
-	   INPUT_LOAD='(-0.01,0.01)';
-  end_pin;
-  body
-	 PART_NAME='TLV62569DBVR';
-	 VALUE='TLV62569DBV';
-	 BODY_NAME='TLV62569DBVR_SOT_23_5_TLV62569DBV';
-	 JEDEC_TYPE='SOT_23_5';
-	 PHYS_DES_PREFIX='U';
-	 CLASS='IC';
-  end_body;
-end_primitive;
-
-primitive 'INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L';
-  pin
-	 '\RFU9\':
-	   PIN_NUMBER='(0,P10)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RFU8\':
-	   PIN_NUMBER='(0,P7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RFU7\':
-	   PIN_NUMBER='(0,K7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RFU6\':
-	   PIN_NUMBER='(0,K6)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RFU5\':
-	   PIN_NUMBER='(0,G10)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RFU4\':
-	   PIN_NUMBER='(0,G3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RFU3\':
-	   PIN_NUMBER='(0,E8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RFU2\':
-	   PIN_NUMBER='(0,E5)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RFU1\':
-	   PIN_NUMBER='(0,A7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC9\':
-	   PIN_NUMBER='(0,A9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC99\':
-	   PIN_NUMBER='(0,H1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC98\':
-	   PIN_NUMBER='(0,G14)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC97\':
-	   PIN_NUMBER='(0,G13)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC96\':
-	   PIN_NUMBER='(0,G12)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC8\':
-	   PIN_NUMBER='(0,A8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC86\':
-	   PIN_NUMBER='(0,G2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC85\':
-	   PIN_NUMBER='(0,G1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC84\':
-	   PIN_NUMBER='(0,F14)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC83\':
-	   PIN_NUMBER='(0,F13)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC82\':
-	   PIN_NUMBER='(0,F12)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC73\':
-	   PIN_NUMBER='(0,F3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC72\':
-	   PIN_NUMBER='(0,F2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC71\':
-	   PIN_NUMBER='(0,F1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC70\':
-	   PIN_NUMBER='(0,E14)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC69\':
-	   PIN_NUMBER='(0,E13)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC68\':
-	   PIN_NUMBER='(0,E12)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC59\':
-	   PIN_NUMBER='(0,E3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC58\':
-	   PIN_NUMBER='(0,E2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC57\':
-	   PIN_NUMBER='(0,E1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC56\':
-	   PIN_NUMBER='(0,D14)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC55\':
-	   PIN_NUMBER='(0,D13)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC54\':
-	   PIN_NUMBER='(0,D12)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC46\':
-	   PIN_NUMBER='(0,D4)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC45\':
-	   PIN_NUMBER='(0,D3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC44\':
-	   PIN_NUMBER='(0,D2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC43\':
-	   PIN_NUMBER='(0,D1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC42\':
-	   PIN_NUMBER='(0,C14)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC41\':
-	   PIN_NUMBER='(0,C13)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC40\':
-	   PIN_NUMBER='(0,C12)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC39\':
-	   PIN_NUMBER='(0,C11)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC38\':
-	   PIN_NUMBER='(0,C10)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC37\':
-	   PIN_NUMBER='(0,C9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC36\':
-	   PIN_NUMBER='(0,C8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC35\':
-	   PIN_NUMBER='(0,C7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC31\':
-	   PIN_NUMBER='(0,C3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC2\':
-	   PIN_NUMBER='(0,A2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC29\':
-	   PIN_NUMBER='(0,C1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC28\':
-	   PIN_NUMBER='(0,B14)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC27\':
-	   PIN_NUMBER='(0,B13)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC26\':
-	   PIN_NUMBER='(0,B12)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC25\':
-	   PIN_NUMBER='(0,B11)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC24\':
-	   PIN_NUMBER='(0,B10)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC23\':
-	   PIN_NUMBER='(0,B9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC22\':
-	   PIN_NUMBER='(0,B8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC21\':
-	   PIN_NUMBER='(0,B7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC196\':
-	   PIN_NUMBER='(0,P14)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC195\':
-	   PIN_NUMBER='(0,P13)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC194\':
-	   PIN_NUMBER='(0,P12)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC193\':
-	   PIN_NUMBER='(0,P11)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC191\':
-	   PIN_NUMBER='(0,P9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC190\':
-	   PIN_NUMBER='(0,P8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC184\':
-	   PIN_NUMBER='(0,P2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC183\':
-	   PIN_NUMBER='(0,P1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC182\':
-	   PIN_NUMBER='(0,N14)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC181\':
-	   PIN_NUMBER='(0,N13)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC180\':
-	   PIN_NUMBER='(0,N12)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC179\':
-	   PIN_NUMBER='(0,N11)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC178\':
-	   PIN_NUMBER='(0,N10)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC177\':
-	   PIN_NUMBER='(0,N9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC176\':
-	   PIN_NUMBER='(0,N8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC175\':
-	   PIN_NUMBER='(0,N7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC174\':
-	   PIN_NUMBER='(0,N6)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC171\':
-	   PIN_NUMBER='(0,N3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC169\':
-	   PIN_NUMBER='(0,N1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC168\':
-	   PIN_NUMBER='(0,M14)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC167\':
-	   PIN_NUMBER='(0,M13)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC166\':
-	   PIN_NUMBER='(0,M12)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC165\':
-	   PIN_NUMBER='(0,M11)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC164\':
-	   PIN_NUMBER='(0,M10)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC163\':
-	   PIN_NUMBER='(0,M9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC162\':
-	   PIN_NUMBER='(0,M8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC161\':
-	   PIN_NUMBER='(0,M7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC15\':
-	   PIN_NUMBER='(0,B1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC157\':
-	   PIN_NUMBER='(0,M3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC156\':
-	   PIN_NUMBER='(0,M2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC155\':
-	   PIN_NUMBER='(0,M1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC154\':
-	   PIN_NUMBER='(0,L14)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC153\':
-	   PIN_NUMBER='(0,L13)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC152\':
-	   PIN_NUMBER='(0,L12)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC14\':
-	   PIN_NUMBER='(0,A14)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC143\':
-	   PIN_NUMBER='(0,L3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC142\':
-	   PIN_NUMBER='(0,L2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC141\':
-	   PIN_NUMBER='(0,L1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC140\':
-	   PIN_NUMBER='(0,K14)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC13\':
-	   PIN_NUMBER='(0,A13)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC139\':
-	   PIN_NUMBER='(0,K13)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC138\':
-	   PIN_NUMBER='(0,K12)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC12\':
-	   PIN_NUMBER='(0,A12)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC129\':
-	   PIN_NUMBER='(0,K3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC128\':
-	   PIN_NUMBER='(0,K2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC127\':
-	   PIN_NUMBER='(0,K1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC126\':
-	   PIN_NUMBER='(0,J14)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC125\':
-	   PIN_NUMBER='(0,J13)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC124\':
-	   PIN_NUMBER='(0,J12)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC11\':
-	   PIN_NUMBER='(0,A11)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC115\':
-	   PIN_NUMBER='(0,J3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC114\':
-	   PIN_NUMBER='(0,J2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC113\':
-	   PIN_NUMBER='(0,J1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC112\':
-	   PIN_NUMBER='(0,H14)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC111\':
-	   PIN_NUMBER='(0,H13)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC110\':
-	   PIN_NUMBER='(0,H12)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC10\':
-	   PIN_NUMBER='(0,A10)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC101\':
-	   PIN_NUMBER='(0,H3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NC100\':
-	   PIN_NUMBER='(0,H2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSSQ5\':
-	   PIN_NUMBER='(P6,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSSQ4\':
-	   PIN_NUMBER='(P4,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSSQ3\':
-	   PIN_NUMBER='(N5,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSSQ2\':
-	   PIN_NUMBER='(N2,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSSQ1\':
-	   PIN_NUMBER='(K8,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS6\':
-	   PIN_NUMBER='(H10,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS5\':
-	   PIN_NUMBER='(G5,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS4\':
-	   PIN_NUMBER='(E7,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS3\':
-	   PIN_NUMBER='(C4,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS2\':
-	   PIN_NUMBER='(A6,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS1\':
-	   PIN_NUMBER='(J5,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSF4\':
-	   PIN_NUMBER='(K10,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSF3\':
-	   PIN_NUMBER='(F10,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSF2\':
-	   PIN_NUMBER='(E10,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSF1\':
-	   PIN_NUMBER='(E9,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VDDI\':
-	   PIN_NUMBER='(C2,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VCCQ5\':
-	   PIN_NUMBER='(P5,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VCCQ4\':
-	   PIN_NUMBER='(P3,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VCCQ3\':
-	   PIN_NUMBER='(N4,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VCCQ2\':
-	   PIN_NUMBER='(M4,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VCCQ1\':
-	   PIN_NUMBER='(C6,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VCC4\':
-	   PIN_NUMBER='(K9,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VCC3\':
-	   PIN_NUMBER='(J10,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VCC2\':
-	   PIN_NUMBER='(F5,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VCC1\':
-	   PIN_NUMBER='(E6,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RST_N\':
-	   PIN_NUMBER='(K5,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DATA7\':
-	   PIN_NUMBER='(B6,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DATA6\':
-	   PIN_NUMBER='(B5,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DATA5\':
-	   PIN_NUMBER='(B4,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DATA4\':
-	   PIN_NUMBER='(B3,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DATA3\':
-	   PIN_NUMBER='(B2,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DATA2\':
-	   PIN_NUMBER='(A5,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DATA1\':
-	   PIN_NUMBER='(A4,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DATA0\':
-	   PIN_NUMBER='(A3,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DATA STROBE\':
-	   PIN_NUMBER='(H5,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\CMD\':
-	   PIN_NUMBER='(M5,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\CLK\':
-	   PIN_NUMBER='(M6,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='INAND_EMMC_153_2L';
-	 VALUE='INAND_EMMC_153_2L';
-	 BODY_NAME='INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L';
-	 JEDEC_TYPE='BGA153_050_1150X1300';
-	 PHYS_DES_PREFIX='U';
-	 CLASS='IC';
-  end_body;
-end_primitive;
-
-primitive 'DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT';
-  pin
-	 '\ZQ1\':
-	   PIN_NUMBER='(L9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\ZQ0\':
-	   PIN_NUMBER='(L8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\WE#\':
-	   PIN_NUMBER='(L3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSSQ9\':
-	   PIN_NUMBER='(G9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSSQ8\':
-	   PIN_NUMBER='(G1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSSQ7\':
-	   PIN_NUMBER='(F9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSSQ6\':
-	   PIN_NUMBER='(E8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSSQ5\':
-	   PIN_NUMBER='(E2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSSQ4\':
-	   PIN_NUMBER='(D8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSSQ3\':
-	   PIN_NUMBER='(D1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSSQ2\':
-	   PIN_NUMBER='(B9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSSQ1\':
-	   PIN_NUMBER='(B1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS9\':
-	   PIN_NUMBER='(P1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS8\':
-	   PIN_NUMBER='(M9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS7\':
-	   PIN_NUMBER='(M1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS6\':
-	   PIN_NUMBER='(J8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS5\':
-	   PIN_NUMBER='(J2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS4\':
-	   PIN_NUMBER='(G8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS3\':
-	   PIN_NUMBER='(E1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS2\':
-	   PIN_NUMBER='(B3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS1\':
-	   PIN_NUMBER='(A9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS12\':
-	   PIN_NUMBER='(T9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS11\':
-	   PIN_NUMBER='(T1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS10\':
-	   PIN_NUMBER='(P9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VREFDQ\':
-	   PIN_NUMBER='(H1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VREFCA\':
-	   PIN_NUMBER='(M8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VDDQ9\':
-	   PIN_NUMBER='(H9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VDDQ8\':
-	   PIN_NUMBER='(H2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VDDQ7\':
-	   PIN_NUMBER='(F1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VDDQ6\':
-	   PIN_NUMBER='(E9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VDDQ5\':
-	   PIN_NUMBER='(D2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VDDQ4\':
-	   PIN_NUMBER='(C9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VDDQ3\':
-	   PIN_NUMBER='(C1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VDDQ2\':
-	   PIN_NUMBER='(A8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VDDQ1\':
-	   PIN_NUMBER='(A1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VDD9\':
-	   PIN_NUMBER='(R9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VDD8\':
-	   PIN_NUMBER='(R1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VDD7\':
-	   PIN_NUMBER='(N9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VDD6\':
-	   PIN_NUMBER='(N1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VDD5\':
-	   PIN_NUMBER='(K8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VDD4\':
-	   PIN_NUMBER='(K2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VDD3\':
-	   PIN_NUMBER='(G7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VDD2\':
-	   PIN_NUMBER='(D9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VDD1\':
-	   PIN_NUMBER='(B2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\UDQS\':
-	   PIN_NUMBER='(C7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\UDQS#\':
-	   PIN_NUMBER='(B7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\UDM\':
-	   PIN_NUMBER='(D3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RESET#\':
-	   PIN_NUMBER='(T2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RAS#\':
-	   PIN_NUMBER='(J3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\ODT1\':
-	   PIN_NUMBER='(J1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\ODT0\':
-	   PIN_NUMBER='(K1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\LDQS\':
-	   PIN_NUMBER='(F3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\LDQS#\':
-	   PIN_NUMBER='(G3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\LDM\':
-	   PIN_NUMBER='(E7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DQ9\':
-	   PIN_NUMBER='(C3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DQ8\':
-	   PIN_NUMBER='(D7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DQ7\':
-	   PIN_NUMBER='(H7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DQ6\':
-	   PIN_NUMBER='(G2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DQ5\':
-	   PIN_NUMBER='(H8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DQ4\':
-	   PIN_NUMBER='(H3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DQ3\':
-	   PIN_NUMBER='(F8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DQ2\':
-	   PIN_NUMBER='(F2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DQ1\':
-	   PIN_NUMBER='(F7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DQ15\':
-	   PIN_NUMBER='(A3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DQ14\':
-	   PIN_NUMBER='(B8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DQ13\':
-	   PIN_NUMBER='(A2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DQ12\':
-	   PIN_NUMBER='(A7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DQ11\':
-	   PIN_NUMBER='(C2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DQ10\':
-	   PIN_NUMBER='(C8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DQ0\':
-	   PIN_NUMBER='(E3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\CS#1\':
-	   PIN_NUMBER='(L1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\CS#0\':
-	   PIN_NUMBER='(L2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\CK\':
-	   PIN_NUMBER='(J7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\CKE1\':
-	   PIN_NUMBER='(J9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\CKE0\':
-	   PIN_NUMBER='(K9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\CK#\':
-	   PIN_NUMBER='(K7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\CAS#\':
-	   PIN_NUMBER='(K3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\BA2\':
-	   PIN_NUMBER='(M3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\BA1\':
-	   PIN_NUMBER='(N8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\BA0\':
-	   PIN_NUMBER='(M2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\A9\':
-	   PIN_NUMBER='(R3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\A8\':
-	   PIN_NUMBER='(T8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\A7\':
-	   PIN_NUMBER='(R2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\A6\':
-	   PIN_NUMBER='(R8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\A5\':
-	   PIN_NUMBER='(P2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\A4\':
-	   PIN_NUMBER='(P8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\A3\':
-	   PIN_NUMBER='(N2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\A2\':
-	   PIN_NUMBER='(P3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\A1\':
-	   PIN_NUMBER='(P7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\A15\':
-	   PIN_NUMBER='(M7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\A14\':
-	   PIN_NUMBER='(T7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\A13\':
-	   PIN_NUMBER='(T3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\A12/BC#\':
-	   PIN_NUMBER='(N7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\A11\':
-	   PIN_NUMBER='(R7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\A10/AP\':
-	   PIN_NUMBER='(L7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\A0\':
-	   PIN_NUMBER='(N3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='DDR3_16bit';
-	 VALUE='DDR3_16bit';
-	 BODY_NAME='DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT';
-	 JEDEC_TYPE='FBGA96_14R00X11R00X1R20';
-	 PHYS_DES_PREFIX='U';
-	 CLASS='IC';
-  end_body;
-end_primitive;
-
-primitive 'CAP NP_C0402_DISCRETE_18PF';
-  pin
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='CAP NP';
-	 VALUE='18pF';
-	 BODY_NAME='CAP NP_C0402_DISCRETE_18PF';
-	 JEDEC_TYPE='C0402';
-	 PHYS_DES_PREFIX='C';
-	 CLASS='DISCRETE';
-  end_body;
-end_primitive;
-
-primitive 'CAP NP_C0402_BGA_DISCRETE_10UF';
-  pin
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='CAP NP';
-	 VALUE='10uF';
-	 BODY_NAME='CAP NP_C0402_BGA_DISCRETE_10UF';
-	 JEDEC_TYPE='C0402_BGA';
-	 PHYS_DES_PREFIX='C';
-	 CLASS='DISCRETE';
-  end_body;
-end_primitive;
-
-primitive 'CAP NP_C0402_DISCRETE_100NF';
-  pin
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='CAP NP';
-	 VALUE='100nF';
-	 BODY_NAME='CAP NP_C0402_DISCRETE_100NF';
-	 JEDEC_TYPE='C0402';
-	 PHYS_DES_PREFIX='C';
-	 CLASS='DISCRETE';
-  end_body;
-end_primitive;
-
-primitive 'CAP NP_C0402_DISCRETE_10UF';
-  pin
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='CAP NP';
-	 VALUE='10uF';
-	 BODY_NAME='CAP NP_C0402_DISCRETE_10UF';
-	 JEDEC_TYPE='C0402';
-	 PHYS_DES_PREFIX='C';
-	 CLASS='DISCRETE';
-  end_body;
-end_primitive;
-
-primitive 'CAP NP_C0603_DISCRETE_22UF';
-  pin
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='CAP NP';
-	 VALUE='22uF';
-	 BODY_NAME='CAP NP_C0603_DISCRETE_22UF';
-	 JEDEC_TYPE='C0603';
-	 PHYS_DES_PREFIX='C';
-	 CLASS='DISCRETE';
-  end_body;
-end_primitive;
-
-primitive 'CAP NP_C0402_BGA_DISCRETE_100NF';
-  pin
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='CAP NP';
-	 VALUE='100nF';
-	 BODY_NAME='CAP NP_C0402_BGA_DISCRETE_100NF';
-	 JEDEC_TYPE='C0402_BGA';
-	 PHYS_DES_PREFIX='C';
-	 CLASS='DISCRETE';
-  end_body;
-end_primitive;
-
-primitive 'LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR';
-  pin
-	 '80':
-	   PIN_NUMBER='(80)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '79':
-	   PIN_NUMBER='(79)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '78':
-	   PIN_NUMBER='(78)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '77':
-	   PIN_NUMBER='(77)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '76':
-	   PIN_NUMBER='(76)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '75':
-	   PIN_NUMBER='(75)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '74':
-	   PIN_NUMBER='(74)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '73':
-	   PIN_NUMBER='(73)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '72':
-	   PIN_NUMBER='(72)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '71':
-	   PIN_NUMBER='(71)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '70':
-	   PIN_NUMBER='(70)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '69':
-	   PIN_NUMBER='(69)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '68':
-	   PIN_NUMBER='(68)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '67':
-	   PIN_NUMBER='(67)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '66':
-	   PIN_NUMBER='(66)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '65':
-	   PIN_NUMBER='(65)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '64':
-	   PIN_NUMBER='(64)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '63':
-	   PIN_NUMBER='(63)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '62':
-	   PIN_NUMBER='(62)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '61':
-	   PIN_NUMBER='(61)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '60':
-	   PIN_NUMBER='(60)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '59':
-	   PIN_NUMBER='(59)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '58':
-	   PIN_NUMBER='(58)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '57':
-	   PIN_NUMBER='(57)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '56':
-	   PIN_NUMBER='(56)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '55':
-	   PIN_NUMBER='(55)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '54':
-	   PIN_NUMBER='(54)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '53':
-	   PIN_NUMBER='(53)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '52':
-	   PIN_NUMBER='(52)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '51':
-	   PIN_NUMBER='(51)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '50':
-	   PIN_NUMBER='(50)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '49':
-	   PIN_NUMBER='(49)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '48':
-	   PIN_NUMBER='(48)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '47':
-	   PIN_NUMBER='(47)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '46':
-	   PIN_NUMBER='(46)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '45':
-	   PIN_NUMBER='(45)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '44':
-	   PIN_NUMBER='(44)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '43':
-	   PIN_NUMBER='(43)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '42':
-	   PIN_NUMBER='(42)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '41':
-	   PIN_NUMBER='(41)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '40':
-	   PIN_NUMBER='(40)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '39':
-	   PIN_NUMBER='(39)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '38':
-	   PIN_NUMBER='(38)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '37':
-	   PIN_NUMBER='(37)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '36':
-	   PIN_NUMBER='(36)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '35':
-	   PIN_NUMBER='(35)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '34':
-	   PIN_NUMBER='(34)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '33':
-	   PIN_NUMBER='(33)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '32':
-	   PIN_NUMBER='(32)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '31':
-	   PIN_NUMBER='(31)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '30':
-	   PIN_NUMBER='(30)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '29':
-	   PIN_NUMBER='(29)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '28':
-	   PIN_NUMBER='(28)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '27':
-	   PIN_NUMBER='(27)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '26':
-	   PIN_NUMBER='(26)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '25':
-	   PIN_NUMBER='(25)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '24':
-	   PIN_NUMBER='(24)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '23':
-	   PIN_NUMBER='(23)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '22':
-	   PIN_NUMBER='(22)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '21':
-	   PIN_NUMBER='(21)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '20':
-	   PIN_NUMBER='(20)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '19':
-	   PIN_NUMBER='(19)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '18':
-	   PIN_NUMBER='(18)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '17':
-	   PIN_NUMBER='(17)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '16':
-	   PIN_NUMBER='(16)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '15':
-	   PIN_NUMBER='(15)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '14':
-	   PIN_NUMBER='(14)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '13':
-	   PIN_NUMBER='(13)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '12':
-	   PIN_NUMBER='(12)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '11':
-	   PIN_NUMBER='(11)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '10':
-	   PIN_NUMBER='(10)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '09':
-	   PIN_NUMBER='(09)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '08':
-	   PIN_NUMBER='(08)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '07':
-	   PIN_NUMBER='(07)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '06':
-	   PIN_NUMBER='(06)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '05':
-	   PIN_NUMBER='(05)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '04':
-	   PIN_NUMBER='(04)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '03':
-	   PIN_NUMBER='(03)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '02':
-	   PIN_NUMBER='(02)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '01':
-	   PIN_NUMBER='(01)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='LSHM-140-030-L-DV-A-N-TR';
-	 VALUE='LSHM-140-030-L-DV-A-N-TR';
-	 BODY_NAME='LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR';
-	 JEDEC_TYPE='SAMTEC_LSHM-140-030-L-DV-A-N-TR';
-	 PHYS_DES_PREFIX='J';
-	 CLASS='IC';
-  end_body;
-end_primitive;
-
-primitive 'R_R0402_DISCRETE_1M';
-  pin
-	 '2':
-	   PIN_NUMBER='(2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '1':
-	   PIN_NUMBER='(1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='R';
-	 VALUE='1M';
-	 BODY_NAME='R_R0402_DISCRETE_1M';
-	 JEDEC_TYPE='R0402';
-	 PHYS_DES_PREFIX='R';
-	 CLASS='DISCRETE';
-  end_body;
-end_primitive;
-
-primitive 'SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B';
-  pin
-	 '\VSS_99\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1H5)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_98\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1H4)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_97\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1H3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_96\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1H2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_95\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1G13)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_94\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1G12)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_93\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1G10)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_92\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1G9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_91\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1G8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_90\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1G7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_89\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1G6)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_88\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1G5)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_87\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1G4)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_86\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1G3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_85\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1G1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_84\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1F13)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_83\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1F12)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_82\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1F10)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_81\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1F9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_80\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1F8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_79\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1F7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_78\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1F6)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_77\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1F5)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_76\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1F4)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_75\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1F2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_74\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1F1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_73\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1E14)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_72\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1E13)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_71\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1E12)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_70\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1E2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_138\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1N11)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_137\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1N7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_136\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1N3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_135\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1M14)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_134\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1M12)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_133\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1M10)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_132\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1M7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_131\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1M3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_130\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1M2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_129\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1M1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_128\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1L14)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_127\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1L9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_126\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1L7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_125\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1L5)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_124\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1L4)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_123\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1L3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_122\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1L2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_121\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1K14)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_120\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1K4)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_119\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1K1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_118\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1J14)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_117\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1J13)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_116\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1J11)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_115\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1J9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_114\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1J8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_113\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1J7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_112\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1J6)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_111\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1J5)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_110\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1J4)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_109\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1J3)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_108\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1J2)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_107\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1J1)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_106\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1H13)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_105\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1H12)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_104\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1H10)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_103\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1H9)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_102\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1H8)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_101\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1H7)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_100\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,0,1H6)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_9\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,H21,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_8\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,G2,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_7\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,D22,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_6\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,D2,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_69\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1E1,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_68\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1D14,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_67\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1D13,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_66\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1D12,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_65\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1D11,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_64\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1D10,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_63\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1D9,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_62\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1D8,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_61\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1D7,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_60\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1D6,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_5\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,B6,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_59\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1D5,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_58\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1D4,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_57\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1D3,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_56\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1D2,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_55\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1D1,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_54\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1C14,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_53\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1C13,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_52\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1C12,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_51\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1C11,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_50\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1C10,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_4\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,B4,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_49\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1C9,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_48\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1C6,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_47\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1C5,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_46\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1C1,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_45\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1B8,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_44\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1B5,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_43\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1B4,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_42\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1B3,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_41\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1B2,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_40\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1B1,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_3\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,A23,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_39\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1A14,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_38\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1A12,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_37\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1A11,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_36\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1A10,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_35\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1A9,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_34\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1A8,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_33\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1A7,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_32\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,1A6,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_31\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,Y23,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_30\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,Y15,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_2\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,A17,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_29\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,Y9,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_28\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,Y1,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_27\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,W21,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_26\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,W19,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_25\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,W16,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_24\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,W13,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_23\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,W12,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_22\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,W11,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_21\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,W8,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_20\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,W5,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_1\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,A13,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_19\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,W3,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_18\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,V21,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_17\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,U21,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_16\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,T21,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_15\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,R21,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_14\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,N22,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_13\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,L21,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_12\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,L3,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_11\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,J22,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_10\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,J3,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VSS_0\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,0,A1,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_VREF_DQ\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1L11,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_VREF_CA\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1L10,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_VDDQ_4\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1K10,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_VDDQ_3\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1K9,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_VDDQ_2\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1K8,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_VDDQ_1\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1K7,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_VDDQ_0\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1K6,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_RZQ\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1L8,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_OPEN1\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1K5,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_OPEN0\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1L6,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_ODT\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1N10,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_DQS1P\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,Y4,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_DQS1N\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,W4,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_DQS0P\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,Y10,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_DQS0N\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,W10,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_DQ9\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,W7,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_DQ8\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,Y7,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_DQ7\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1N5,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_DQ6\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,W9,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_DQ5\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1N6,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_DQ4\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1M5,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_DQ3\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1M6,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_DQ2\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,Y11,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_DQ1\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,Y12,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_DQ15\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1N2,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_DQ14\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1N1,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_DQ13\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,Y2,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_DQ12\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,W6,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_DQ11\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,Y3,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_DQ10\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,Y6,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_DQ0\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,Y13,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_DM1\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1M4,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_DM0\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1N4,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_CSN\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1M11,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_CLKP\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,Y14,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_CLKN\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,W14,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR_CKE\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,W15,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR3_RESET\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1M13,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR2_WEN  |  DDR3_RASN\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1M8,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR2_RASN |   DDR3_A10\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,W17,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR2_CASN |   DDR3_BA1\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,Y18,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR2_BA2  |   DDR3_BA2\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1N9,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR2_BA1  |   DDR3_WEN\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1M9,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR2_BA0  |  DDR3_CASN\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1N8,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR2_A9   |    DDR3_A7\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,T22,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR2_A8   |    DDR3_A8\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,Y21,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR2_A7   |    DDR3_A2\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,V22,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR2_A6   |    DDR3_A6\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,Y20,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR2_A5   |    DDR3_A5\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1N14,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR2_A4   |    DDR3_A1\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,W20,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR2_A3   |    DDR3_A0\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,V23,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR2_A2   |    DDR3_A4\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,W18,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR2_A15  |   DDR3_A15\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,Y17,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR2_A14  |   DDR3_A14\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,Y22,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR2_A13  |   DDR3_A13\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,T23,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR2_A12  |    DDR3_A9\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,U22,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR2_A11  |   DDR3_A11\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,W22,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR2_A10  |   DDR3_BA0\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1N12,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR2_A1   |    DDR3_A3\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,1N13,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DDR2_A0   |   DDR3_A12\':
-	   PIN_NUMBER='(0,0,0,0,0,0,0,W23,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\LOGIC_DVDD_6\':
-	   PIN_NUMBER='(0,0,0,0,0,0,1J10,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\LOGIC_DVDD_5\':
-	   PIN_NUMBER='(0,0,0,0,0,0,1H11,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\LOGIC_DVDD_4\':
-	   PIN_NUMBER='(0,0,0,0,0,0,1G11,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\LOGIC_DVDD_3\':
-	   PIN_NUMBER='(0,0,0,0,0,0,1F11,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\LOGIC_DVDD_2\':
-	   PIN_NUMBER='(0,0,0,0,0,0,1E6,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\LOGIC_DVDD_1\':
-	   PIN_NUMBER='(0,0,0,0,0,0,1E5,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\LOGIC_DVDD_0\':
-	   PIN_NUMBER='(0,0,0,0,0,0,1E4,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\CPU_DVDD_2\':
-	   PIN_NUMBER='(0,0,0,0,0,0,1C4,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\CPU_DVDD_1\':
-	   PIN_NUMBER='(0,0,0,0,0,0,1C3,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\CPU_DVDD_0\':
-	   PIN_NUMBER='(0,0,0,0,0,0,1C2,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\USB20_OTG_AVDD3V3\':
-	   PIN_NUMBER='(0,0,0,0,0,1B10,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\USB20_OTG_AVDD1V8\':
-	   PIN_NUMBER='(0,0,0,0,0,1B9,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\USB20_OTG_AVDD0V9\':
-	   PIN_NUMBER='(0,0,0,0,0,1C8,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\USB20_OTG1_DP\':
-	   PIN_NUMBER='(0,0,0,0,0,B15,0,0,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\USB20_OTG1_DM\':
-	   PIN_NUMBER='(0,0,0,0,0,A15,0,0,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\USB20_OTG0_VBUSDET\':
-	   PIN_NUMBER='(0,0,0,0,0,B18,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\USB20_OTG0_ID\':
-	   PIN_NUMBER='(0,0,0,0,0,B17,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\USB20_OTG0_DP\':
-	   PIN_NUMBER='(0,0,0,0,0,A16,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\USB20_OTG0_DM\':
-	   PIN_NUMBER='(0,0,0,0,0,B16,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\TSADC_VCC1V8\':
-	   PIN_NUMBER='(0,0,0,0,0,1B6,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\SARADC_IN3 |  GPIO4_B3_Z\':
-	   PIN_NUMBER='(0,0,0,0,0,B21,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\SARADC_IN2 |  GPIO4_B2_Z\':
-	   PIN_NUMBER='(0,0,0,0,0,A21,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\SARADC_IN1 |  GPIO4_B1_Z\':
-	   PIN_NUMBER='(0,0,0,0,0,B20,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\SARADC_IN0 |  GPIO4_B0_Z\':
-	   PIN_NUMBER='(0,0,0,0,0,A20,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\OTP_AVDD1V8 |  SARADC_AVDD1V8\':
-	   PIN_NUMBER='(0,0,0,0,0,1B14,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\MIPI_DPHY_DSI_TX_D1P  |  GPO4_A3_Z\':
-	   PIN_NUMBER='(0,0,0,0,0,A12,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\MIPI_DPHY_DSI_TX_D1N  |  GPO4_A2_Z\':
-	   PIN_NUMBER='(0,0,0,0,0,B12,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\MIPI_DPHY_DSI_TX_D0P  |  GPO4_A1_Z\':
-	   PIN_NUMBER='(0,0,0,0,0,B11,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\MIPI_DPHY_DSI_TX_D0N  |  GPO4_A0_Z\':
-	   PIN_NUMBER='(0,0,0,0,0,A11,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\MIPI_DPHY_DSI_TX_CLKP |  GPO4_A5_Z\':
-	   PIN_NUMBER='(0,0,0,0,0,B13,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\MIPI_DPHY_DSI_TX_CLKN |  GPO4_A4_Z\':
-	   PIN_NUMBER='(0,0,0,0,0,B14,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\MIPI_DPHY_AVDD1V8\':
-	   PIN_NUMBER='(0,0,0,0,0,1B7,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\MIPI_DPHY_AVDD0V9\':
-	   PIN_NUMBER='(0,0,0,0,0,1C7,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\ACODEC_ADC_VCM\':
-	   PIN_NUMBER='(0,0,0,0,0,1B11,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\ACODEC_ADC_INP\':
-	   PIN_NUMBER='(0,0,0,0,0,A19,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\ACODEC_ADC_INN\':
-	   PIN_NUMBER='(0,0,0,0,0,B19,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\ACODEC_ADC_AVSS\':
-	   PIN_NUMBER='(0,0,0,0,0,1A13,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\ACODEC_ADC_AVDD1V8\':
-	   PIN_NUMBER='(0,0,0,0,0,1B13,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\ACODEC_ADC_AVDD1V6\':
-	   PIN_NUMBER='(0,0,0,0,0,1B12,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VCCIO4_VCC\':
-	   PIN_NUMBER='(0,0,0,0,1H14,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\TEST_CLK_OUT      |  SDMMC_D1      |  GPIO3_A3_D\':
-	   PIN_NUMBER='(0,0,0,0,K22,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\JTAG_TMS_M0       |  SDMMC_D3      |  GPIO3_A5_D\':
-	   PIN_NUMBER='(0,0,0,0,H22,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\JTAG_TCK_M0       |  SDMMC_D2      |  GPIO3_A4_D\':
-	   PIN_NUMBER='(0,0,0,0,H23,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\ETH_RMII1_TXEN    |  UART5_RX_M0   |  GPIO3_B3_D\':
-	   PIN_NUMBER='(0,0,0,0,P22,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\ETH_RMII1_TXD1    |  UART5_CTSN_M0 |  GPIO3_B2_D\':
-	   PIN_NUMBER='(0,0,0,0,N21,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\ETH_RMII1_TXD0    |  SAI2_LRCK_M0  |  GPIO3_B1_D\':
-	   PIN_NUMBER='(0,0,0,0,M21,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\ETH_RMII1_RXDVCRS |  SAI2_MCLK_M0  |  GPIO3_B6_D\':
-	   PIN_NUMBER='(0,0,0,0,R22,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\ETH_RMII1_RXD1    |  SAI2_SCLK_M0  |  GPIO3_A7_D\':
-	   PIN_NUMBER='(0,0,0,0,M22,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\ETH_RMII1_RXD0    |  SAI2_SDI_M0   |  GPIO3_A6_D\':
-	   PIN_NUMBER='(0,0,0,0,L22,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\ETH_RMII1_MDIO    |  UART5_RTSN_M0 |  GPIO3_B5_D\':
-	   PIN_NUMBER='(0,0,0,0,P21,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\ETH_RMII1_MDC     |  UART5_TX_M0   |  GPIO3_B4_D\':
-	   PIN_NUMBER='(0,0,0,0,P23,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\ETH_RMII1_CLK     |  SAI2_SDO_M0   |  GPIO3_B0_D\':
-	   PIN_NUMBER='(0,0,0,0,M23,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\--                |  SDMMC_D0      |  GPIO3_A2_D\':
-	   PIN_NUMBER='(0,0,0,0,K23,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\--                |  SDMMC_CMD     |  GPIO3_A1_D\':
-	   PIN_NUMBER='(0,0,0,0,J21,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\--                |  SDMMC_CLK     |  GPIO3_A0_D\':
-	   PIN_NUMBER='(0,0,0,0,K21,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VCCIO3_VCC\':
-	   PIN_NUMBER='(0,0,0,1G14,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\SAI3_SDO  |  DSM_AUD_LP_M1 |  ETH_RMII0_MDIO    |  GPIO2_B7_D\':
-	   PIN_NUMBER='(0,0,0,G21,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\SAI3_SDI  |  DSM_AUD_LN_M1 |  ETH_RMII0_MDC     |  GPIO2_B6_D\':
-	   PIN_NUMBER='(0,0,0,F22,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\SAI3_SCLK |  DSM_AUD_RN_M1 |  ETH_RMII0_TXD1    |  GPIO2_B4_D\':
-	   PIN_NUMBER='(0,0,0,F21,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\SAI3_MCLK |  --            |  ETH_RMII0_RXDVCRS |  GPIO2_C0_D\':
-	   PIN_NUMBER='(0,0,0,G22,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\SAI3_LRCK |  DSM_AUD_RP_M1 |  ETH_RMII0_TXEN    |  GPIO2_B5_D\':
-	   PIN_NUMBER='(0,0,0,F23,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\--        |  SPI2_MOSI     |  ETH_RMII0_CLK     |  GPIO2_B2_D\':
-	   PIN_NUMBER='(0,0,0,E21,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\--        |  SPI2_MISO     |  ETH_RMII0_TXD0    |  GPIO2_B3_D\':
-	   PIN_NUMBER='(0,0,0,E22,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\--        |  SPI2_CSN      |  ETH_RMII0_RXD1    |  GPIO2_B1_D\':
-	   PIN_NUMBER='(0,0,0,D23,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\--        |  SPI2_CLK      |  ETH_RMII0_RXD0    |  GPIO2_B0_D\':
-	   PIN_NUMBER='(0,0,0,D21,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VCCIO2_VCC\':
-	   PIN_NUMBER='(0,0,1F14,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\FSPI_D3  |  GPIO2_A5_U\':
-	   PIN_NUMBER='(0,0,C23,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\FSPI_D2  |  GPIO2_A4_U\':
-	   PIN_NUMBER='(0,0,C21,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\FSPI_D1  |  GPIO2_A3_U\':
-	   PIN_NUMBER='(0,0,B22,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\FSPI_D0  |  GPIO2_A2_U\':
-	   PIN_NUMBER='(0,0,B23,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\FSPI_CSN |  GPIO2_A0_U\':
-	   PIN_NUMBER='(0,0,A22,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\FSPI_CLK |  GPIO2_A1_D\':
-	   PIN_NUMBER='(0,0,C22,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VCCIO1_VCC_1\':
-	   PIN_NUMBER='(0,1F3,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VCCIO1_VCC_0\':
-	   PIN_NUMBER='(0,1E3,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DSMC_SLV_RDYN |  RM_IO31 |  UART5_RX_M1   |  --              |  --            |  FLEXBUS0_D0  |  DSMC_CSN3   |  VO_LCDC_D0    |  GPIO1_D3_D\':
-	   PIN_NUMBER='(0,G3,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DSMC_SLV_INT  |  --      |  --            |  --              |  DSMC_INT0     |  FLEXBUS1_D1  |  DSMC_CLKN   |  VO_LCDC_VSYNC |  GPIO1_A1_D\':
-	   PIN_NUMBER='(0,1A5,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DSMC_SLV_DQS0 |  --      |  SAI2_MCLK_M1  |  FLEXBUS1_CSN_M4 |  DSM_AUD_RN_M0 |  FLEXBUS0_CLK |  DSMC_D8     |  VO_LCDC_D10   |  GPIO1_C1_D\':
-	   PIN_NUMBER='(0,B2,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DSMC_SLV_D7   |  RM_IO29 |  UART5_RTSN_M1 |  --              |  DSM_AUD_LP_M0 |  FLEXBUS0_D2  |  DSMC_DQS1   |  VO_LCDC_D2    |  GPIO1_D1_D\':
-	   PIN_NUMBER='(0,F3,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DSMC_SLV_D6   |  --      |  --            |  --              |  DSM_AUD_LN_M0 |  FLEXBUS0_D3  |  DSMC_D15    |  VO_LCDC_D3    |  GPIO1_D0_D\':
-	   PIN_NUMBER='(0,E1,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DSMC_SLV_D5   |  --      |  --            |  --              |  --            |  FLEXBUS0_D4  |  DSMC_D14    |  VO_LCDC_D4    |  GPIO1_C7_D\':
-	   PIN_NUMBER='(0,E2,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DSMC_SLV_D4   |  --      |  --            |  --              |  --            |  FLEXBUS0_D5  |  DSMC_D13    |  VO_LCDC_D5    |  GPIO1_C6_D\':
-	   PIN_NUMBER='(0,E3,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DSMC_SLV_D3   |  --      |  --            |  --              |  --            |  FLEXBUS0_D6  |  DSMC_D12    |  VO_LCDC_D6    |  GPIO1_C5_D\':
-	   PIN_NUMBER='(0,D3,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DSMC_SLV_D2   |  --      |  --            |  --              |  --            |  FLEXBUS0_D7  |  DSMC_D11    |  VO_LCDC_D7    |  GPIO1_C4_D\':
-	   PIN_NUMBER='(0,C1,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DSMC_SLV_D1   |  RM_IO28 |  SAI2_SDO_M1   |  FLEXBUS1_CSN_M5 |  --            |  FLEXBUS0_D8  |  DSMC_D10    |  VO_LCDC_D8    |  GPIO1_C3_D\':
-	   PIN_NUMBER='(0,C2,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DSMC_SLV_D0   |  RM_IO27 |  SAI2_SDI_M1   |  FLEXBUS0_CSN_M5 |  DSM_AUD_RP_M0 |  FLEXBUS0_D9  |  DSMC_D9     |  VO_LCDC_D9    |  GPIO1_C2_D\':
-	   PIN_NUMBER='(0,B1,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DSMC_SLV_CSN0 |  RM_IO30 |  UART5_TX_M1   |  --              |  --            |  FLEXBUS0_D1  |  DSMC_CSN2   |  VO_LCDC_D1    |  GPIO1_D2_D\':
-	   PIN_NUMBER='(0,F2,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\DSMC_SLV_CLK  |  --      |  --            |  FLEXBUS0_CSN_M4 |  DSMC_INT1     |  FLEXBUS1_CLK |  DSMC_RESETN |  VO_LCDC_D11   |  GPIO1_C0_D\':
-	   PIN_NUMBER='(0,A2,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\--            |  RM_IO26 |  SAI2_LRCK_M1  |  FLEXBUS1_CSN_M1 |  FLEXBUS0_D14  |  FLEXBUS1_D11 |  DSMC_INT3   |  VO_LCDC_D16   |  GPIO1_B3_D\':
-	   PIN_NUMBER='(0,B5,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\--            |  RM_IO25 |  SAI2_SCLK_M1  |  FLEXBUS0_CSN_M1 |  FLEXBUS0_D15  |  FLEXBUS1_D10 |  DSMC_INT2   |  VO_LCDC_D17   |  GPIO1_B2_D\':
-	   PIN_NUMBER='(0,A5,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\--            |  RM_IO24 |  UART5_CTSN_M1 |  FLEXBUS1_CSN_M0 |  --            |  FLEXBUS1_D9  |  DSMC_CSN1   |  VO_LCDC_D18   |  GPIO1_B1_D\':
-	   PIN_NUMBER='(0,1A2,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\--            |  --      |  --            |  FLEXBUS1_CSN_M3 |  FLEXBUS0_D10  |  FLEXBUS1_D15 |  DSMC_RDYN   |  VO_LCDC_D12   |  GPIO1_B7_D\':
-	   PIN_NUMBER='(0,B3,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\--            |  --      |  --            |  FLEXBUS1_CSN_M2 |  FLEXBUS0_D12  |  FLEXBUS1_D13 |  DSMC_D7     |  VO_LCDC_D14   |  GPIO1_B5_D\':
-	   PIN_NUMBER='(0,C3,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\--            |  --      |  --            |  FLEXBUS0_CSN_M3 |  FLEXBUS0_D11  |  FLEXBUS1_D14 |  DSMC_CSN0   |  VO_LCDC_D13   |  GPIO1_B6_D\':
-	   PIN_NUMBER='(0,A3,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\--            |  --      |  --            |  FLEXBUS0_CSN_M2 |  FLEXBUS0_D13  |  FLEXBUS1_D12 |  DSMC_D6     |  VO_LCDC_D15   |  GPIO1_B4_D\':
-	   PIN_NUMBER='(0,1A1,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\--            |  --      |  --            |  FLEXBUS0_CSN_M0 |  --            |  FLEXBUS1_D8  |  DSMC_D5     |  VO_LCDC_D19   |  GPIO1_B0_D\':
-	   PIN_NUMBER='(0,1A3,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\--            |  --      |  --            |  --              |  --            |  FLEXBUS1_D7  |  DSMC_D4     |  VO_LCDC_D20   |  GPIO1_A7_D\':
-	   PIN_NUMBER='(0,B7,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\--            |  --      |  --            |  --              |  --            |  FLEXBUS1_D6  |  DSMC_D3     |  VO_LCDC_D21   |  GPIO1_A6_D\':
-	   PIN_NUMBER='(0,A7,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\--            |  --      |  --            |  --              |  --            |  FLEXBUS1_D5  |  DSMC_D2     |  VO_LCDC_D22   |  GPIO1_A5_D\':
-	   PIN_NUMBER='(0,1A4,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\--            |  --      |  --            |  --              |  --            |  FLEXBUS1_D4  |  DSMC_D1     |  VO_LCDC_D23   |  GPIO1_A4_D\':
-	   PIN_NUMBER='(0,B8,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\--            |  --      |  --            |  --              |  --            |  FLEXBUS1_D3  |  DSMC_D0     |  VO_LCDC_CLK   |  GPIO1_A3_D\':
-	   PIN_NUMBER='(0,B9,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\--            |  --      |  --            |  --              |  --            |  FLEXBUS1_D2  |  DSMC_DQS0   |  VO_LCDC_HSYNC |  GPIO1_A2_D\':
-	   PIN_NUMBER='(0,A9,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\--            |  --      |  --            |  --              |  --            |  FLEXBUS1_D0  |  DSMC_CLKP   |  VO_LCDC_DEN   |  GPIO1_A0_D\':
-	   PIN_NUMBER='(0,B10,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\SYS_PLL_AVDD1V8\':
-	   PIN_NUMBER='(1H1,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RM_IO9  |  SPI1_MOSI    |  SAI1_SCLK        |  GPIO0_B1_D\':
-	   PIN_NUMBER='(R1,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RM_IO8  |  SPI1_CLK     |  SAI1_MCLK        |  GPIO0_B0_D\':
-	   PIN_NUMBER='(R2,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RM_IO7  |  SPI1_CSN1    |  SAI0_SDI3        |  GPIO0_A7_D\':
-	   PIN_NUMBER='(T2,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RM_IO6  |  --           |  SAI0_SDI2        |  GPIO0_A6_D\':
-	   PIN_NUMBER='(U3,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RM_IO5  |  --           |  SAI0_SDI1        |  GPIO0_A5_D\':
-	   PIN_NUMBER='(U1,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RM_IO4  |  --           |  SAI0_SDI0        |  GPIO0_A4_D\':
-	   PIN_NUMBER='(U2,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RM_IO3  |  --           |  SAI0_SDO         |  GPIO0_A3_D\':
-	   PIN_NUMBER='(V2,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RM_IO23 |  JTAG_TMS_M1  |  UART0_RX         |  GPIO0_C7_U\':
-	   PIN_NUMBER='(J1,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RM_IO22 |  JTAG_TCK_M1  |  UART0_TX         |  GPIO0_C6_U\':
-	   PIN_NUMBER='(J2,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RM_IO21 |  --           |  CPU_AVS          |  GPIO0_C5_Z\':
-	   PIN_NUMBER='(K3,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RM_IO20 |  AUPLL_CLK_IN |  ETH_CLK0_25M_OUT |  GPIO0_C4_D\':
-	   PIN_NUMBER='(K2,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RM_IO2  |  --           |  SAI0_MCLK        |  GPIO0_A2_U\':
-	   PIN_NUMBER='(W2,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RM_IO19 |  SPI0_CSN0    |  ETH_CLK1_25M_OUT |  GPIO0_C3_D\':
-	   PIN_NUMBER='(L2,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RM_IO18 |  SPI0_MISO    |  REF_CLK1_OUT     |  GPIO0_C2_D\':
-	   PIN_NUMBER='(L1,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RM_IO17 |  SPI0_MOSI    |  --               |  GPIO0_C1_D\':
-	   PIN_NUMBER='(M3,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RM_IO16 |  SPI0_CLK     |  --               |  GPIO0_C0_D\':
-	   PIN_NUMBER='(M2,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RM_IO15 |  SPI0_CSN1    |  SAI1_SDO3        |  GPIO0_B7_D\':
-	   PIN_NUMBER='(N2,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RM_IO14 |  SPI1_CSN0    |  SAI1_SDO2        |  GPIO0_B6_D\':
-	   PIN_NUMBER='(N3,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RM_IO13 |  --           |  SAI1_SDO1        |  GPIO0_B5_D\':
-	   PIN_NUMBER='(N1,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RM_IO12 |  --           |  SAI1_SDO0        |  GPIO0_B4_D\':
-	   PIN_NUMBER='(P3,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RM_IO11 |  --           |  SAI1_SDI         |  GPIO0_B3_D\':
-	   PIN_NUMBER='(P2,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RM_IO10 |  SPI1_MISO    |  SAI1_LRCK        |  GPIO0_B2_D\':
-	   PIN_NUMBER='(R3,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RM_IO1  |  --           |  SAI0_SCLK        |  GPIO0_A1_D\':
-	   PIN_NUMBER='(W1,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RM_IO0  |  --           |  SAI0_LRCK        |  GPIO0_A0_U\':
-	   PIN_NUMBER='(V3,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RFU\':
-	   PIN_NUMBER='(1G2,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\REF_CLK0_OUT |  OSC_CLK_OUT      |  GPIO0_D0_D\':
-	   PIN_NUMBER='(G1,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\PMU_LOGIC_DVDD0V9\':
-	   PIN_NUMBER='(1K2,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\PMUIO_VCC3V3\':
-	   PIN_NUMBER='(1L1,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\OSC_XOUT\':
-	   PIN_NUMBER='(H2,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\OSC_XIN\':
-	   PIN_NUMBER='(H3,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\NPOR\':
-	   PIN_NUMBER='(T3,0,0,0,0,0,0,0,0,0)';
-	   PIN_GROUP='1';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='SOC_RK3506B';
-	 VALUE='SOC_RK3506B';
-	 BODY_NAME='SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B';
-	 JEDEC_TYPE='BGA333_13R30X11R30X1R25';
-	 PHYS_DES_PREFIX='U';
-	 CLASS='IC';
-  end_body;
-end_primitive;
-
-primitive 'LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC';
-  pin
-	 '\VDDIO\':
-	   PIN_NUMBER='(0,9)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VDDCR\':
-	   PIN_NUMBER='(0,6)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VDD2A\':
-	   PIN_NUMBER='(0,1)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VDD1A\':
-	   PIN_NUMBER='(0,19)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\XTAL2\':
-	   PIN_NUMBER='(4,0)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\XTAL1/CLKIN\':
-	   PIN_NUMBER='(5,0)';
-	   INPUT_LOAD='(-0.01,0.01)';
-	 '\TXP\':
-	   PIN_NUMBER='(21,0)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\TXN\':
-	   PIN_NUMBER='(20,0)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\TXEN\':
-	   PIN_NUMBER='(16,0)';
-	   INPUT_LOAD='(-0.01,0.01)';
-	 '\TXD1\':
-	   PIN_NUMBER='(18,0)';
-	   INPUT_LOAD='(-0.01,0.01)';
-	 '\TXD0\':
-	   PIN_NUMBER='(17,0)';
-	   INPUT_LOAD='(-0.01,0.01)';
-	 '\RXP\':
-	   PIN_NUMBER='(23,0)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\RXN\':
-	   PIN_NUMBER='(22,0)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\RXER/*PHYAD0\':
-	   PIN_NUMBER='(10,0)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\RXD1/*MODE1\':
-	   PIN_NUMBER='(7,0)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\RXD0/*MODE0\':
-	   PIN_NUMBER='(8,0)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\RBIAS\':
-	   PIN_NUMBER='(24,0)';
-	   INPUT_LOAD='(-0.01,0.01)';
-	 '\NRST\':
-	   PIN_NUMBER='(15,0)';
-	   INPUT_LOAD='(-0.01,0.01)';
-	 '\NINT/REFCLKO\':
-	   PIN_NUMBER='(14,0)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\MDIO\':
-	   PIN_NUMBER='(12,0)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\MDC\':
-	   PIN_NUMBER='(13,0)';
-	   INPUT_LOAD='(-0.01,0.01)';
-	 '\LED2/*NINTSEL\':
-	   PIN_NUMBER='(2,0)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\LED1/*REGOFF\':
-	   PIN_NUMBER='(3,0)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-	 '\EPAD\':
-	   PIN_NUMBER='(25,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\CRS_DV/*MODE2\':
-	   PIN_NUMBER='(11,0)';
-	   BIDIRECTIONAL='TRUE';
-	   INPUT_LOAD='(-0.01,0.01)';
-	   OUTPUT_LOAD='(1.0,-1.0)';
-  end_pin;
-  body
-	 PART_NAME='LAN8720A-CP-ABC';
-	 VALUE='LAN8720A-CP-ABC';
-	 BODY_NAME='LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC';
-	 JEDEC_TYPE='QFN24-6X6_MC_MCH';
-	 PHYS_DES_PREFIX='U';
-	 CLASS='IC';
-  end_body;
-end_primitive;
-
-primitive 'K922_K922_K922';
-  pin
-	 '\RSV9\':
-	   PIN_NUMBER='(0,0,0,0,39)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RSV8\':
-	   PIN_NUMBER='(0,0,0,0,38)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RSV7\':
-	   PIN_NUMBER='(0,0,0,0,29)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RSV6\':
-	   PIN_NUMBER='(0,0,0,0,26)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RSV5\':
-	   PIN_NUMBER='(0,0,0,0,25)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RSV4\':
-	   PIN_NUMBER='(0,0,0,0,13)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RSV3\':
-	   PIN_NUMBER='(0,0,0,0,12)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RSV2\':
-	   PIN_NUMBER='(0,0,0,0,11)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RSV1\':
-	   PIN_NUMBER='(0,0,0,0,10)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RSV16\':
-	   PIN_NUMBER='(0,0,0,0,31)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RSV15\':
-	   PIN_NUMBER='(0,0,0,0,48)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RSV14\':
-	   PIN_NUMBER='(0,0,0,0,47)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RSV13\':
-	   PIN_NUMBER='(0,0,0,0,46)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RSV12\':
-	   PIN_NUMBER='(0,0,0,0,44)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RSV11\':
-	   PIN_NUMBER='(0,0,0,0,42)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RSV10\':
-	   PIN_NUMBER='(0,0,0,0,40)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP9\':
-	   PIN_NUMBER='(0,0,0,0,57)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP8\':
-	   PIN_NUMBER='(0,0,0,0,56)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP7\':
-	   PIN_NUMBER='(0,0,0,0,55)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP6\':
-	   PIN_NUMBER='(0,0,0,0,54)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP5\':
-	   PIN_NUMBER='(0,0,0,0,53)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP4\':
-	   PIN_NUMBER='(0,0,0,0,52)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP3\':
-	   PIN_NUMBER='(0,0,0,0,51)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP35\':
-	   PIN_NUMBER='(0,0,0,0,83)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP34\':
-	   PIN_NUMBER='(0,0,0,0,82)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP33\':
-	   PIN_NUMBER='(0,0,0,0,81)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP32\':
-	   PIN_NUMBER='(0,0,0,0,80)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP31\':
-	   PIN_NUMBER='(0,0,0,0,79)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP30\':
-	   PIN_NUMBER='(0,0,0,0,78)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP2\':
-	   PIN_NUMBER='(0,0,0,0,50)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP29\':
-	   PIN_NUMBER='(0,0,0,0,77)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP28\':
-	   PIN_NUMBER='(0,0,0,0,76)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP27\':
-	   PIN_NUMBER='(0,0,0,0,75)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP26\':
-	   PIN_NUMBER='(0,0,0,0,74)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP25\':
-	   PIN_NUMBER='(0,0,0,0,73)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP24\':
-	   PIN_NUMBER='(0,0,0,0,72)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP23\':
-	   PIN_NUMBER='(0,0,0,0,71)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP22\':
-	   PIN_NUMBER='(0,0,0,0,70)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP21\':
-	   PIN_NUMBER='(0,0,0,0,69)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP20\':
-	   PIN_NUMBER='(0,0,0,0,68)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP1\':
-	   PIN_NUMBER='(0,0,0,0,49)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP19\':
-	   PIN_NUMBER='(0,0,0,0,67)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP18\':
-	   PIN_NUMBER='(0,0,0,0,66)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP17\':
-	   PIN_NUMBER='(0,0,0,0,65)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP16\':
-	   PIN_NUMBER='(0,0,0,0,64)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP15\':
-	   PIN_NUMBER='(0,0,0,0,63)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP14\':
-	   PIN_NUMBER='(0,0,0,0,62)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP13\':
-	   PIN_NUMBER='(0,0,0,0,61)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP12\':
-	   PIN_NUMBER='(0,0,0,0,60)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP11\':
-	   PIN_NUMBER='(0,0,0,0,59)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EP10\':
-	   PIN_NUMBER='(0,0,0,0,58)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\ANT_IN_POS\':
-	   PIN_NUMBER='(0,0,0,2,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\ANT_IN_HEAD\':
-	   PIN_NUMBER='(0,0,0,36,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\SYS_RSTN\':
-	   PIN_NUMBER='(0,0,33,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\RTK_STAT\':
-	   PIN_NUMBER='(0,0,16,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\PVT_STAT\':
-	   PIN_NUMBER='(0,0,15,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\PPS\':
-	   PIN_NUMBER='(0,0,30,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\EVENT\':
-	   PIN_NUMBER='(0,0,32,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\ERR_STAT\':
-	   PIN_NUMBER='(0,0,14,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\SPI_MOSI\':
-	   PIN_NUMBER='(0,7,0,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\SPI_MISO\':
-	   PIN_NUMBER='(0,9,0,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\SPI_CS\':
-	   PIN_NUMBER='(0,6,0,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\SPI_CLK\':
-	   PIN_NUMBER='(0,8,0,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\I2C_SDA\':
-	   PIN_NUMBER='(0,22,0,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\I2C_SCL\':
-	   PIN_NUMBER='(0,21,0,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\COM3_TXD/CAN_TXD\':
-	   PIN_NUMBER='(0,27,0,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\COM3_RXD/CAN_RXD\':
-	   PIN_NUMBER='(0,28,0,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\COM2_TXD\':
-	   PIN_NUMBER='(0,20,0,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\COM2_RXD\':
-	   PIN_NUMBER='(0,19,0,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\COM1_TXD\':
-	   PIN_NUMBER='(0,18,0,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\COM1_RXD\':
-	   PIN_NUMBER='(0,17,0,0,0)';
-	   PINUSE='UNSPEC';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\V_BCKP\':
-	   PIN_NUMBER='(5,0,0,0,0)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VCC#24\':
-	   PIN_NUMBER='(24,0,0,0,0)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\VCC#23\':
-	   PIN_NUMBER='(23,0,0,0,0)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\GND#4\':
-	   PIN_NUMBER='(4,0,0,0,0)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\GND#45\':
-	   PIN_NUMBER='(45,0,0,0,0)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\GND#43\':
-	   PIN_NUMBER='(43,0,0,0,0)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\GND#41\':
-	   PIN_NUMBER='(41,0,0,0,0)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\GND#3\':
-	   PIN_NUMBER='(3,0,0,0,0)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\GND#37\':
-	   PIN_NUMBER='(37,0,0,0,0)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\GND#35\':
-	   PIN_NUMBER='(35,0,0,0,0)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\GND#34\':
-	   PIN_NUMBER='(34,0,0,0,0)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\GND#1\':
-	   PIN_NUMBER='(1,0,0,0,0)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='K922';
-	 VALUE='K922';
-	 BODY_NAME='K922_K922_K922';
-	 JEDEC_TYPE='K922';
-	 PHYS_DES_PREFIX='U';
-	 CLASS='IC';
-  end_body;
-end_primitive;
-
-primitive 'CRYSTAL 1-3_4PIN_XTAL3225_CRYSTAL 1-3_4PIN';
-  pin
-	 '\X3\':
-	   PIN_NUMBER='(3)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\X1\':
-	   PIN_NUMBER='(1)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\GND#4\':
-	   PIN_NUMBER='(4)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-	 '\GND#2\':
-	   PIN_NUMBER='(2)';
-	   PINUSE='POWER';
-	   NO_LOAD_CHECK='Both';
-	   NO_IO_CHECK='Both';
-	   NO_ASSERT_CHECK='TRUE';
-	   NO_DIR_CHECK='TRUE';
-	   ALLOW_CONNECT='TRUE';
-  end_pin;
-  body
-	 PART_NAME='CRYSTAL 1-3_4Pin';
-	 VALUE='CRYSTAL 1-3_4Pin';
-	 BODY_NAME='CRYSTAL 1-3_4PIN_XTAL3225_CRYSTAL 1-3_4PIN';
-	 JEDEC_TYPE='XTAL3225';
-	 PHYS_DES_PREFIX='X';
-	 CLASS='IC';
-  end_body;
-end_primitive;
-
-END.
\ No newline at end of file
diff --git a/allegro/cmbcview.dat b/allegro/cmbcview.dat
deleted file mode 100644
index decce9e..0000000
Binary files a/allegro/cmbcview.dat and /dev/null differ
diff --git a/allegro/cmdbview.dat b/allegro/cmdbview.dat
deleted file mode 100644
index 17b41f4..0000000
Binary files a/allegro/cmdbview.dat and /dev/null differ
diff --git a/allegro/compview.dat b/allegro/compview.dat
deleted file mode 100644
index ff456c4..0000000
--- a/allegro/compview.dat
+++ /dev/null
@@ -1,121 +0,0 @@
-A!REFDES!COMP_REUSE_ID!COMP_SIGNAL_MODEL!COMP_NO_XNET_CONNECTION!COMP_PARENT_PPT!COMP_SYMBOL_EDITED!COMP_PARENT_PPT_PART!COMP_EMBEDDED_PLACEMENT!COMP_RKO_NUM_LAYERS!COMP_RKO_SHORT_SIDE_OVERSIZE!COMP_RKO_LONG_SIDE_OVERSIZE!COMP_RKO_REF_LAYER!COMP_ASI_MODEL!
-J!w:/rk3506_nav/rk3506_nav.brd!Sun Aug 16 23:49:47 2026!-100.0000!-100.0000!100.0000!100.0000!0.0001!millimeters!RK3506_NAV!28.800000 mil!4!OUT OF DATE!
-S!FB3!!!!!!!!!!!!!
-S!FB4!!!!!!!!!!!!!
-S!R5!!!!!!!!!!!!!
-S!R6!!!!!!!!!!!!!
-S!X2!!!!!!!!!!!!!
-S!X3!!!!!!!!!!!!!
-S!U20!!!!!!!!!!!!!
-S!U19!!!!!!!!!!!!!
-S!C11!!!!!!!!!!!!!
-S!C12!!!!!!!!!!!!!
-S!C28!!!!!!!!!!!!!
-S!C14!!!!!!!!!!!!!
-S!C29!!!!!!!!!!!!!
-S!C30!!!!!!!!!!!!!
-S!C31!!!!!!!!!!!!!
-S!C17!!!!!!!!!!!!!
-S!C18!!!!!!!!!!!!!
-S!C19!!!!!!!!!!!!!
-S!C20!!!!!!!!!!!!!
-S!C21!!!!!!!!!!!!!
-S!C22!!!!!!!!!!!!!
-S!C23!!!!!!!!!!!!!
-S!C24!!!!!!!!!!!!!
-S!C25!!!!!!!!!!!!!
-S!C26!!!!!!!!!!!!!
-S!C27!!!!!!!!!!!!!
-S!C65!!!!!!!!!!!!!
-S!C67!!!!!!!!!!!!!
-S!C68!!!!!!!!!!!!!
-S!C69!!!!!!!!!!!!!
-S!C70!!!!!!!!!!!!!
-S!C71!!!!!!!!!!!!!
-S!C72!!!!!!!!!!!!!
-S!C73!!!!!!!!!!!!!
-S!C32!!!!!!!!!!!!!
-S!C43!!!!!!!!!!!!!
-S!C53!!!!!!!!!!!!!
-S!C62!!!!!!!!!!!!!
-S!C46!!!!!!!!!!!!!
-S!C48!!!!!!!!!!!!!
-S!C51!!!!!!!!!!!!!
-S!C55!!!!!!!!!!!!!
-S!C58!!!!!!!!!!!!!
-S!C61!!!!!!!!!!!!!
-S!C63!!!!!!!!!!!!!
-S!FB1!!!!!!!!!!!!!
-S!FB2!!!!!!!!!!!!!
-S!R10!!!!!!!!!!!!!
-S!R11!!!!!!!!!!!!!
-S!R12!!!!!!!!!!!!!
-S!R14!!!!!!!!!!!!!
-S!R16!!!!!!!!!!!!!
-S!R17!!!!!!!!!!!!!
-S!R19!!!!!!!!!!!!!
-S!R20!!!!!!!!!!!!!
-S!R21!!!!!!!!!!!!!
-S!R13!!!!!!!!!!!!!
-S!R7!!!!!!!!!!!!!
-S!R15!!!!!!!!!!!!!
-S!R18!!!!!!!!!!!!!
-S!R2!!!!!!!!!!!!!
-S!R3!!!!!!!!!!!!!
-S!R4!!!!!!!!!!!!!
-S!R23!!!!!!!!!!!!!
-S!R24!!!!!!!!!!!!!
-S!R25!!!!!!!!!!!!!
-S!J2!!!!!!!!!!!!!
-S!J3!!!!!!!!!!!!!
-S!U11!!!!!!!!!!!!!
-S!U12!!!!!!!!!!!!!
-S!U13!!!!!!!!!!!!!
-S!U14!!!!!!!!!!!!!
-S!U15!!!!!!!!!!!!!
-S!U16!!!!!!!!!!!!!
-S!U10!!!!!!!!!!!!!
-S!C1!!!!!!!!!!!!!
-S!C2!!!!!!!!!!!!!
-S!C10!!!!!!!!!!!!!
-S!C9!!!!!!!!!!!!!
-S!C64!!!!!!!!!!!!!
-S!C66!!!!!!!!!!!!!
-S!C74!!!!!!!!!!!!!
-S!C75!!!!!!!!!!!!!
-S!C76!!!!!!!!!!!!!
-S!C77!!!!!!!!!!!!!
-S!C78!!!!!!!!!!!!!
-S!C13!!!!!!!!!!!!!
-S!C15!!!!!!!!!!!!!
-S!C16!!!!!!!!!!!!!
-S!C33!!!!!!!!!!!!!
-S!C34!!!!!!!!!!!!!
-S!C35!!!!!!!!!!!!!
-S!C36!!!!!!!!!!!!!
-S!C37!!!!!!!!!!!!!
-S!C42!!!!!!!!!!!!!
-S!C44!!!!!!!!!!!!!
-S!C45!!!!!!!!!!!!!
-S!C47!!!!!!!!!!!!!
-S!C49!!!!!!!!!!!!!
-S!C50!!!!!!!!!!!!!
-S!C52!!!!!!!!!!!!!
-S!C54!!!!!!!!!!!!!
-S!C56!!!!!!!!!!!!!
-S!C57!!!!!!!!!!!!!
-S!C59!!!!!!!!!!!!!
-S!C60!!!!!!!!!!!!!
-S!C3!!!!!!!!!!!!!
-S!C4!!!!!!!!!!!!!
-S!C5!!!!!!!!!!!!!
-S!C6!!!!!!!!!!!!!
-S!C7!!!!!!!!!!!!!
-S!C8!!!!!!!!!!!!!
-S!J1!!!!!!!!!!!!!
-S!R1!!!!!!!!!!!!!
-S!U1!!!!!!!!!!!!!
-S!U17!!!!!!!!!!!!!
-S!U18!!!!!!!!!!!!!
-S!U9!!!!!!!!!!!!!
-S!X1!!!!!!!!!!!!!
diff --git a/allegro/feedbackview.cdsz b/allegro/feedbackview.cdsz
deleted file mode 100644
index 6a3b809..0000000
Binary files a/allegro/feedbackview.cdsz and /dev/null differ
diff --git a/allegro/funcView.dat b/allegro/funcView.dat
deleted file mode 100644
index 188d627..0000000
--- a/allegro/funcView.dat
+++ /dev/null
@@ -1,141 +0,0 @@
-A!FUNC_LOGICAL_PATH!COMP_DEVICE_TYPE!REFDES!FUNC_PRIM_FILE!COMP_PARENT_PPT!COMP_PARENT_PPT_PART!COMP_PARENT_PART_TYPE!FUNC_SCH_SIZE!FUNC_HAS_FIXED_SIZE!FUNC_DES!FUNC_GROUP!FUNC_ROOM!FUNC_TERM_IDENT!FUNC_CDS_FSP_INSTANCE_ID!FUNC_CDS_FSP_IS_FPGA!FUNC_CDS_FSP_UID!
-J!w:/rk3506_nav/rk3506_nav.brd!Sun Aug 16 23:49:47 2026!-100.0000!-100.0000!100.0000!100.0000!0.0001!millimeters!RK3506_NAV!28.800000 mil!4!OUT OF DATE!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16795380\@\QF_DISCRETE\.\BEAD.Normal\(chips)!BEAD_L0402_6.8NH!FB3!.\chipsView.dat!!!!!!F57!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16798413\@\QF_DISCRETE\.\BEAD.Normal\(chips)!BEAD_L0402_6.8NH!FB4!.\chipsView.dat!!!!!!F56!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16780784\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_49.9R!R5!.\chipsView.dat!!!!!!F33!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16780833\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_49.9R!R6!.\chipsView.dat!!!!!!F32!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16802710\@\QF_XTAL\.\XTAL-4P.Normal\(chips)!XTAL-4P_XTAL3225_12MHZ!X2!.\chipsView.dat!!!!!!F1!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16813509\@\QF_XTAL\.\XTAL-4P.Normal\(chips)!XTAL-4P_XTAL3225_30MHZ!X3!.\chipsView.dat!!!!!!F0!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16795323\@\QF_IC\.\CH334P.Normal\(chips)!CH334P_QFN16_050_300X300_CH334P!U20!.\chipsView.dat!!!!!!F8!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793506\@\QF_IC\.\CH9344QA.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!U19!.\chipsView.dat!!!!!!F12!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!U19!.\chipsView.dat!!!!!!F11!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793582\@\QF_IC\.\CH9344QC.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!U19!.\chipsView.dat!!!!!!F10!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793591\@\QF_IC\.\CH9344QD.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!U19!.\chipsView.dat!!!!!!F9!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793606\@\QF_IC\.\CH9344QE.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!U19!.\chipsView.dat!!!!!!TF-124!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60874\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100PF!C11!.\chipsView.dat!!!!!!F129!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS61194\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100PF!C12!.\chipsView.dat!!!!!!F128!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16780189\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100PF!C28!.\chipsView.dat!!!!!!F127!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS64015\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_10UF!C14!.\chipsView.dat!!!!!!F97!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781112\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_10UF!C29!.\chipsView.dat!!!!!!F96!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781131\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_10UF!C30!.\chipsView.dat!!!!!!F95!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781150\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_10UF!C31!.\chipsView.dat!!!!!!F94!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16774421\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_4.7NF!C17!.\chipsView.dat!!!!!!F93!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16774477\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_1NF!C18!.\chipsView.dat!!!!!!F92!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16774613\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_1UF!C19!.\chipsView.dat!!!!!!F91!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16774705\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_100NF!C20!.\chipsView.dat!!!!!!F90!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16778769\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!C21!.\chipsView.dat!!!!!!F89!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16778930\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!C22!.\chipsView.dat!!!!!!F88!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16778954\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!C23!.\chipsView.dat!!!!!!F87!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779229\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!C24!.\chipsView.dat!!!!!!F86!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779248\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!C25!.\chipsView.dat!!!!!!F85!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779458\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!C26!.\chipsView.dat!!!!!!F84!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779568\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!C27!.\chipsView.dat!!!!!!F83!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16798096\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!C65!.\chipsView.dat!!!!!!F78!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16798457\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!C67!.\chipsView.dat!!!!!!F77!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16801052\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!C68!.\chipsView.dat!!!!!!F76!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16801070\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!C69!.\chipsView.dat!!!!!!F75!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16814832\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!C70!.\chipsView.dat!!!!!!F74!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16814921\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!C71!.\chipsView.dat!!!!!!F73!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16814989\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!C72!.\chipsView.dat!!!!!!F72!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16815011\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!C73!.\chipsView.dat!!!!!!F71!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781169\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!C32!.\chipsView.dat!!!!!!F82!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16788606\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!C43!.\chipsView.dat!!!!!!F81!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789896\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!C53!.\chipsView.dat!!!!!!F80!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16792411\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!C62!.\chipsView.dat!!!!!!F79!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16788776\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_4.7UF!C46!.\chipsView.dat!!!!!!F70!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789021\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_4.7UF!C48!.\chipsView.dat!!!!!!F69!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789838\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_4.7UF!C51!.\chipsView.dat!!!!!!F68!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789946\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_4.7UF!C55!.\chipsView.dat!!!!!!F67!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791417\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_4.7UF!C58!.\chipsView.dat!!!!!!F65!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791929\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_4.7UF!C61!.\chipsView.dat!!!!!!F64!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793157\@\QF_DISCRETE\.\CAP NP_NC.Normal\(chips)!CAP NP_NC_C0402_DISCRETE_10PF/NC!C63!.\chipsView.dat!!!!!!F62!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16790442\@\QF_DISCRETE\.\BEAD.Normal\(chips)!BEAD_L0603_0R!FB1!.\chipsView.dat!!!!!!F59!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16790635\@\QF_DISCRETE\.\BEAD.Normal\(chips)!BEAD_L0603_0R!FB2!.\chipsView.dat!!!!!!F58!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785432\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!R10!.\chipsView.dat!!!!!!F52!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785470\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!R11!.\chipsView.dat!!!!!!F51!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785611\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!R12!.\chipsView.dat!!!!!!F50!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785670\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!R14!.\chipsView.dat!!!!!!F49!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786089\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!R16!.\chipsView.dat!!!!!!F48!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786101\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!R17!.\chipsView.dat!!!!!!F47!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786347\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!R19!.\chipsView.dat!!!!!!F46!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786363\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!R20!.\chipsView.dat!!!!!!F45!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786462\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!R21!.\chipsView.dat!!!!!!F44!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785633\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_12.1K!R13!.\chipsView.dat!!!!!!F43!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16784995\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_12.1K!R7!.\chipsView.dat!!!!!!F42!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785907\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_0R!R15!.\chipsView.dat!!!!!!F41!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786204\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_0R!R18!.\chipsView.dat!!!!!!F40!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16777695\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_240R!R2!.\chipsView.dat!!!!!!F39!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779393\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_240R!R3!.\chipsView.dat!!!!!!F38!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779420\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_240R!R4!.\chipsView.dat!!!!!!F37!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16792656\@\QF_DISCRETE\.\RESISTOR_NC.Normal\(chips)!RESISTOR_NC_R0402_DISCRETE_10K/NC!R23!.\chipsView.dat!!!!!!F36!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16792697\@\QF_DISCRETE\.\RESISTOR_NC.Normal\(chips)!RESISTOR_NC_R0402_DISCRETE_10K/NC!R24!.\chipsView.dat!!!!!!F35!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16792716\@\QF_DISCRETE\.\RESISTOR_NC.Normal\(chips)!RESISTOR_NC_R0402_DISCRETE_10K/NC!R25!.\chipsView.dat!!!!!!F34!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60593\@\QF_ANT\.\MMCX-180.Normal\(chips)!MMCX-180_MMCX-180_50OHM!J2!.\chipsView.dat!!!!!!F55!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60619\@\QF_ANT\.\MMCX-180.Normal\(chips)!MMCX-180_MMCX-180_50OHM!J3!.\chipsView.dat!!!!!!F54!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55441\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!U11!.\chipsView.dat!!!!!!F22!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55469\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!U12!.\chipsView.dat!!!!!!F21!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55497\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!U13!.\chipsView.dat!!!!!!F20!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55525\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!U14!.\chipsView.dat!!!!!!F19!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55553\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!U15!.\chipsView.dat!!!!!!F18!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!U16!.\chipsView.dat!!!!!!F17!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!U16!.\chipsView.dat!!!!!!TF-39!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!U10!.\chipsView.dat!!!!!!F23!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19387\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_18PF!C1!.\chipsView.dat!!!!!!F133!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19709\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_18PF!C2!.\chipsView.dat!!!!!!F132!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS41270\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_10UF!C10!.\chipsView.dat!!!!!!F131!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40428\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_10UF!C9!.\chipsView.dat!!!!!!F130!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16798073\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C64!.\chipsView.dat!!!!!!F104!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16798427\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C66!.\chipsView.dat!!!!!!F103!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16815092\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C74!.\chipsView.dat!!!!!!F102!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16815114\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C75!.\chipsView.dat!!!!!!F101!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16815620\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C76!.\chipsView.dat!!!!!!F100!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16815666\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C77!.\chipsView.dat!!!!!!F99!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16815701\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C78!.\chipsView.dat!!!!!!F98!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS63979\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C13!.\chipsView.dat!!!!!!F126!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS69589\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C15!.\chipsView.dat!!!!!!F125!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS69901\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C16!.\chipsView.dat!!!!!!F124!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781188\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C33!.\chipsView.dat!!!!!!F122!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781207\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C34!.\chipsView.dat!!!!!!F121!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781226\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C35!.\chipsView.dat!!!!!!F120!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781245\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C36!.\chipsView.dat!!!!!!F119!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781264\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C37!.\chipsView.dat!!!!!!F118!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16787638\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C42!.\chipsView.dat!!!!!!F116!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16788730\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C44!.\chipsView.dat!!!!!!F115!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16788748\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C45!.\chipsView.dat!!!!!!F114!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789003\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C47!.\chipsView.dat!!!!!!F113!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789780\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C49!.\chipsView.dat!!!!!!F112!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789810\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C50!.\chipsView.dat!!!!!!F111!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789864\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C52!.\chipsView.dat!!!!!!F110!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789920\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C54!.\chipsView.dat!!!!!!F109!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791351\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C56!.\chipsView.dat!!!!!!F108!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791389\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C57!.\chipsView.dat!!!!!!F107!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791893\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C59!.\chipsView.dat!!!!!!F106!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791911\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C60!.\chipsView.dat!!!!!!F105!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19878\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C3!.\chipsView.dat!!!!!!F123!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35873\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!C4!.\chipsView.dat!!!!!!F117!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35933\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_10UF!C5!.\chipsView.dat!!!!!!F66!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35977\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_22UF!C6!.\chipsView.dat!!!!!!F63!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40356\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_100NF!C7!.\chipsView.dat!!!!!!F61!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40392\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_100NF!C8!.\chipsView.dat!!!!!!F60!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!J1!.\chipsView.dat!!!!!!TF-27!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19332\@\DISCRETE\.\R.Normal\(chips)!R_R0402_DISCRETE_1M!R1!.\chipsView.dat!!!!!!F53!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!F31!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!TF-24!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16199\@\LIBRARY\.\SOC_RK3506BC.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!TF-23!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!F30!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!F29!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!F28!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!F27!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!F26!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!F25!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!U1!.\chipsView.dat!!!!!!F24!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!U17!.\chipsView.dat!!!!!!F16!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71271\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!U17!.\chipsView.dat!!!!!!F15!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!U18!.\chipsView.dat!!!!!!F14!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71476\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!U18!.\chipsView.dat!!!!!!F13!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!U9!.\chipsView.dat!!!!!!F7!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!U9!.\chipsView.dat!!!!!!F6!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52850\@\QF_IC\.\K922C.Normal\(chips)!K922_K922_K922!U9!.\chipsView.dat!!!!!!F5!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52892\@\QF_IC\.\K922D.Normal\(chips)!K922_K922_K922!U9!.\chipsView.dat!!!!!!F4!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!U9!.\chipsView.dat!!!!!!F3!!!!!!!
-S!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19052\@\OTHER\.\CRYSTAL 1-3_4Pin.Normal\(chips)!CRYSTAL 1-3_4PIN_XTAL3225_CRYSTAL 1-3_4PIN!X1!.\chipsView.dat!!!!!!F2!!!!!!!
diff --git a/allegro/netview.dat b/allegro/netview.dat
deleted file mode 100644
index d117046..0000000
--- a/allegro/netview.dat
+++ /dev/null
@@ -1,145 +0,0 @@
-A!NET_NAME!NET_LOGICAL_PATH!NET_VOLTAGE!
-J!w:/rk3506_nav/rk3506_nav.brd!Sun Aug 16 23:49:47 2026!-100.0000!-100.0000!100.0000!100.0000!0.0001!millimeters!RK3506_NAV!28.800000 mil!4!OUT OF DATE!
-S!COM4_TXD!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\COM4_TXD\!!
-S!COM3_RXD!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\COM3_RXD\!!
-S!COM3_TXD!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\COM3_TXD\!!
-S!COM2_RXD!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\COM2_RXD\!!
-S!COM2_TXD!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\COM2_TXD\!!
-S!COM1_RXD!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\COM1_RXD\!!
-S!COM1_TXD!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\COM1_TXD\!!
-S!N16813506!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N16813506\!!
-S!N16813508!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N16813508\!!
-S!N16813046!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N16813046\!!
-S!USB_UART_DP!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\USB_UART_DP\!!
-S!N16805354!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N16805354\!!
-S!USB_USER_DM!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\USB_USER_DM\!!
-S!USB_USER_DP!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\USB_USER_DP\!!
-S!USB_UART_DM!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\USB_UART_DM\!!
-S!USB_OTG1_DP!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\USB_OTG1_DP\!!
-S!USB_OTG1_DM!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\USB_OTG1_DM\!!
-S!VDDK_USB!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDDK_USB\!1.2V!
-S!COM4_RXD!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\COM4_RXD\!!
-S!DDR3_A7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A7\!!
-S!DDR3_WEN!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_WEN\!!
-S!DDR3_A4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A4\!!
-S!DDR3_A9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A9\!!
-S!DDR3_RASN!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_RASN\!!
-S!DDR3_A12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A12\!!
-S!DDR3_A15!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A15\!!
-S!ETH_CLK0_25M_OUT!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\ETH_CLK0_25M_OUT\!!
-S!DDR3_A14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A14\!!
-S!DDR3_BA2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_BA2\!!
-S!DDR3_A6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A6\!!
-S!DDR3_A2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A2\!!
-S!RMII0_RST!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII0_RST\!!
-S!DDR3_ODT!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_ODT\!!
-S!DDR3_A3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A3\!!
-S!DDR3_BA1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_BA1\!!
-S!DDR3_CSN!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_CSN\!!
-S!VDDIO_RMII0!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDDIO_RMII0\!1.8V!
-S!DDR3_A5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A5\!!
-S!DDR3_A11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A11\!!
-S!DDR3_A1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A1\!!
-S!DDR3_A8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A8\!!
-S!DDR3_A13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A13\!!
-S!DDR3_CASN!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_CASN\!!
-S!VDDIO_RMII1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDDIO_RMII1\!1.8V!
-S!DDR3_A10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A10\!!
-S!DDR3_BA0!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_BA0\!!
-S!N16785709!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N16785709\!!
-S!DDR3_RST!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_RST\!!
-S!DDR3_CLKN!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_CLKN\!!
-S!DDR3_A0!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_A0\!!
-S!N16785482!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N16785482\!!
-S!N16785446!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N16785446\!!
-S!RMII1_RST!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII1_RST\!!
-S!ETH_CLK1_25M_OUT!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\ETH_CLK1_25M_OUT\!!
-S!DDR3_CKE!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_CKE\!!
-S!N16785007!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N16785007\!!
-S!EMMC_RSTN!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\EMMC_RSTN\!!
-S!VDD_1V8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDD_1V8\!1.8V!
-S!N16792429!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N16792429\!!
-S!DDR_D10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D10\!!
-S!DDR_D9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D9\!!
-S!DDR_D7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D7\!!
-S!DDR_D3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D3\!!
-S!RMII1_CLK!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII1_CLK\!!
-S!DDR_D13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D13\!!
-S!DDR_D8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D8\!!
-S!DDR_DM1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_DM1\!!
-S!DDR_D11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D11\!!
-S!DDR_DQS1N!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_DQS1N\!!
-S!DDR_D4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D4\!!
-S!DDR_D14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D14\!!
-S!DDR_DQS0P!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_DQS0P\!!
-S!DDR_D15!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D15\!!
-S!DDR_D0!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D0\!!
-S!DDR_D6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D6\!!
-S!DDR_DQS0N!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_DQS0N\!!
-S!DDR_D12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D12\!!
-S!DDR_DQS1P!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_DQS1P\!!
-S!DDR_DM0!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_DM0\!!
-S!DDR_D2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D2\!!
-S!DDR_D1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D1\!!
-S!DDR_D5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_D5\!!
-S!GNSS_COM1_TX!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\GNSS_COM1_TX\!!
-S!N16780119!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N16780119\!!
-S!DDR3_CLKP!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_CLKP\!!
-S!GNSS_COM3_RX!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\GNSS_COM3_RX\!!
-S!GNSS_COM1_RX!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\GNSS_COM1_RX\!!
-S!GNSS_COM2_RX!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\GNSS_COM2_RX\!!
-S!VDDCR_RMII1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDDCR_RMII1\!1.2V!
-S!GNSS_COM3_TX!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\GNSS_COM3_TX\!!
-S!GNSS_COM2_TX!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\GNSS_COM2_TX\!!
-S!PPS!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\PPS\!!
-S!VDD_GNSS!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDD_GNSS\!3.3V!
-S!ANT2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\ANT2\!!
-S!ANT1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\ANT1\!!
-S!N61267!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N61267\!!
-S!N16777370!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N16777370\!!
-S!RMII0_RXDV_CRS!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII0_RXDV_CRS\!!
-S!DDR3_VREF_CA!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_VREF_CA\!0.675V!
-S!RMII0_MDIO!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII0_MDIO\!!
-S!RMII0_MDC!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII0_MDC\!!
-S!DDR3_VREF_DQ!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR3_VREF_DQ\!0.675V!
-S!N61054!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N61054\!!
-S!RMII0_TXEN!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII0_TXEN\!!
-S!RMII0_TXD1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII0_TXD1\!!
-S!RMII0_TXD0!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII0_TXD0\!!
-S!VDDCR_RMII0!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDDCR_RMII0\!1.2V!
-S!RMII0_CLK!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII0_CLK\!!
-S!RMII0_RXD1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII0_RXD1\!!
-S!RMII0_RXD0!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII0_RXD0\!!
-S!RMII1_RXDV_CRS!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII1_RXDV_CRS\!!
-S!RMII1_MDC!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII1_MDC\!!
-S!RMII1_TXEN!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII1_TXEN\!!
-S!RMII1_TXD1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII1_TXD1\!!
-S!RMII1_TXD0!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII1_TXD0\!!
-S!RMII1_RXD0!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII1_RXD0\!!
-S!RMII1_RXD1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII1_RXD1\!!
-S!RMII1_MDIO!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\RMII1_MDIO\!!
-S!EMMC_CLK!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\EMMC_CLK\!!
-S!VDDA_RMII1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDDA_RMII1\!3.3V!
-S!VCC_DDR!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VCC_DDR\!1.35V!
-S!VDDA_RMII0!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDDA_RMII0\!3.3V!
-S!VDD_3V3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDD_3V3\!3.3V!
-S!EMMC_CMD!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\EMMC_CMD\!!
-S!EMMC_D1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\EMMC_D1\!!
-S!EMMC_D0!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\EMMC_D0\!!
-S!EMMC_D3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\EMMC_D3\!!
-S!N16786486!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N16786486\!!
-S!EMMC_D2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\EMMC_D2\!!
-S!EMMC_CLKOUT!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\EMMC_CLKOUT\!!
-S!N16786382!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N16786382\!!
-S!DDR_VREF_DQ!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_VREF_DQ\!!
-S!DDR_VREF_CA!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\DDR_VREF_CA\!!
-S!N16786362!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N16786362\!!
-S!VIN!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VIN\!5V!
-S!SW!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\SW\!3.3V!
-S!V_BCKP!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\V_BCKP\!3.3V!
-S!VCC_1V8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VCC_1V8\!1.5V!
-S!VDD_0V9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDD_0V9\!0.9V!
-S!N19203!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N19203\!1.5V!
-S!N19188!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\N19188\!1.5V!
-S!VDD_CPU!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\VDD_CPU\!0.95V!
-S!GND!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\GND\!0.0V!
diff --git a/allegro/pinview.dat b/allegro/pinview.dat
deleted file mode 100644
index 6755d7c..0000000
--- a/allegro/pinview.dat
+++ /dev/null
@@ -1,1107 +0,0 @@
-A!NET_NAME!REFDES!PIN_NUMBER!FUNC_LOGICAL_PATH!COMP_DEVICE_TYPE!FUNC_SCH_SIZE!FUNC_HAS_FIXED_SIZE!FUNC_DES!PIN_CDS_PINID!PIN_TERMINATION!PIN_TERM_IDENT!PIN_NET_SHORT!PIN_XNET_PINS!PIN_RKO_NUM_LAYERS!PIN_RKO_SHORT_SIDE_OVERSIZE!PIN_RKO_LONG_SIDE_OVERSIZE!
-J!w:/rk3506_nav/rk3506_nav.brd!Sun Aug 16 23:49:47 2026!-100.0000!-100.0000!100.0000!100.0000!0.0001!millimeters!RK3506_NAV!28.800000 mil!4!OUT OF DATE!
-S!N61267!FB3!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16795380\@\QF_DISCRETE\.\BEAD.Normal\(chips)!BEAD_L0402_6.8NH!!!F57!\1\!!!!!!!!
-S!VDD_GNSS!FB3!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16795380\@\QF_DISCRETE\.\BEAD.Normal\(chips)!BEAD_L0402_6.8NH!!!F57!\2\!!!!!!!!
-S!N61054!FB4!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16798413\@\QF_DISCRETE\.\BEAD.Normal\(chips)!BEAD_L0402_6.8NH!!!F56!\1\!!!!!!!!
-S!VDD_GNSS!FB4!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16798413\@\QF_DISCRETE\.\BEAD.Normal\(chips)!BEAD_L0402_6.8NH!!!F56!\2\!!!!!!!!
-S!DDR3_CLKN!R5!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16780784\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_49.9R!!!F33!\1\!!!!!!!!
-S!N16780119!R5!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16780784\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_49.9R!!!F33!\2\!!!!!!!!
-S!DDR3_CLKP!R6!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16780833\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_49.9R!!!F32!\1\!!!!!!!!
-S!N16780119!R6!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16780833\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_49.9R!!!F32!\2\!!!!!!!!
-S!N16813046!X2!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16802710\@\QF_XTAL\.\XTAL-4P.Normal\(chips)!XTAL-4P_XTAL3225_12MHZ!!!F1!\1\!!!!!!!!
-S!GND!X2!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16802710\@\QF_XTAL\.\XTAL-4P.Normal\(chips)!XTAL-4P_XTAL3225_12MHZ!!!F1!\2\!!!!!!!!
-S!N16805354!X2!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16802710\@\QF_XTAL\.\XTAL-4P.Normal\(chips)!XTAL-4P_XTAL3225_12MHZ!!!F1!\3\!!!!!!!!
-S!GND!X2!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16802710\@\QF_XTAL\.\XTAL-4P.Normal\(chips)!XTAL-4P_XTAL3225_12MHZ!!!F1!\4\!!!!!!!!
-S!N16813506!X3!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16813509\@\QF_XTAL\.\XTAL-4P.Normal\(chips)!XTAL-4P_XTAL3225_30MHZ!!!F0!\1\!!!!!!!!
-S!GND!X3!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16813509\@\QF_XTAL\.\XTAL-4P.Normal\(chips)!XTAL-4P_XTAL3225_30MHZ!!!F0!\2\!!!!!!!!
-S!N16813508!X3!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16813509\@\QF_XTAL\.\XTAL-4P.Normal\(chips)!XTAL-4P_XTAL3225_30MHZ!!!F0!\3\!!!!!!!!
-S!GND!X3!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16813509\@\QF_XTAL\.\XTAL-4P.Normal\(chips)!XTAL-4P_XTAL3225_30MHZ!!!F0!\4\!!!!!!!!
-S!!U20!9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16795323\@\QF_IC\.\CH334P.Normal\(chips)!CH334P_QFN16_050_300X300_CH334P!!!F8!\DM1\!!!!!!!!
-S!USB_USER_DM!U20!7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16795323\@\QF_IC\.\CH334P.Normal\(chips)!CH334P_QFN16_050_300X300_CH334P!!!F8!\DM2\!!!!!!!!
-S!USB_UART_DM!U20!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16795323\@\QF_IC\.\CH334P.Normal\(chips)!CH334P_QFN16_050_300X300_CH334P!!!F8!\DM3\!!!!!!!!
-S!!U20!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16795323\@\QF_IC\.\CH334P.Normal\(chips)!CH334P_QFN16_050_300X300_CH334P!!!F8!\DM4\!!!!!!!!
-S!USB_OTG1_DM!U20!11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16795323\@\QF_IC\.\CH334P.Normal\(chips)!CH334P_QFN16_050_300X300_CH334P!!!F8!\DMU\!!!!!!!!
-S!!U20!10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16795323\@\QF_IC\.\CH334P.Normal\(chips)!CH334P_QFN16_050_300X300_CH334P!!!F8!\DP1\!!!!!!!!
-S!USB_USER_DP!U20!8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16795323\@\QF_IC\.\CH334P.Normal\(chips)!CH334P_QFN16_050_300X300_CH334P!!!F8!\DP2\!!!!!!!!
-S!USB_UART_DP!U20!6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16795323\@\QF_IC\.\CH334P.Normal\(chips)!CH334P_QFN16_050_300X300_CH334P!!!F8!\DP3\!!!!!!!!
-S!!U20!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16795323\@\QF_IC\.\CH334P.Normal\(chips)!CH334P_QFN16_050_300X300_CH334P!!!F8!\DP4\!!!!!!!!
-S!USB_OTG1_DP!U20!12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16795323\@\QF_IC\.\CH334P.Normal\(chips)!CH334P_QFN16_050_300X300_CH334P!!!F8!\DPU\!!!!!!!!
-S!GND!U20!17!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16795323\@\QF_IC\.\CH334P.Normal\(chips)!CH334P_QFN16_050_300X300_CH334P!!!F8!\EP\!!!!!!!!
-S!!U20!14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16795323\@\QF_IC\.\CH334P.Normal\(chips)!CH334P_QFN16_050_300X300_CH334P!!!F8!\PGANG\!!!!!!!!
-S!!U20!13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16795323\@\QF_IC\.\CH334P.Normal\(chips)!CH334P_QFN16_050_300X300_CH334P!!!F8!\RESET#/CDP\!!!!!!!!
-S!VDD_3V3!U20!15!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16795323\@\QF_IC\.\CH334P.Normal\(chips)!CH334P_QFN16_050_300X300_CH334P!!!F8!\V5\!!!!!!!!
-S!VDD_3V3!U20!16!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16795323\@\QF_IC\.\CH334P.Normal\(chips)!CH334P_QFN16_050_300X300_CH334P!!!F8!\VDD33\!!!!!!!!
-S!N16805354!U20!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16795323\@\QF_IC\.\CH334P.Normal\(chips)!CH334P_QFN16_050_300X300_CH334P!!!F8!\XI\!!!!!!!!
-S!N16813046!U20!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16795323\@\QF_IC\.\CH334P.Normal\(chips)!CH334P_QFN16_050_300X300_CH334P!!!F8!\XO\!!!!!!!!
-S!GND!U19!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793506\@\QF_IC\.\CH9344QA.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F12!\GND#1\!!!!!!!!
-S!GND!U19!34!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793506\@\QF_IC\.\CH9344QA.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F12!\GND#34\!!!!!!!!
-S!VDD_3V3!U19!33!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793506\@\QF_IC\.\CH9344QA.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F12!\VCC33\!!!!!!!!
-S!VDD_3V3!U19!27!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793506\@\QF_IC\.\CH9344QA.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F12!\VCC5\!!!!!!!!
-S!VDDK_USB!U19!35!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793506\@\QF_IC\.\CH9344QA.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F12!\VDDK#35\!!!!!!!!
-S!VDDK_USB!U19!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793506\@\QF_IC\.\CH9344QA.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F12!\VDDK#3\!!!!!!!!
-S!VDD_3V3!U19!18!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793506\@\QF_IC\.\CH9344QA.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F12!\VIO#2318\!!!!!!!!
-S!VDD_3V3!U19!48!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793506\@\QF_IC\.\CH9344QA.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F12!\VIO#48\!!!!!!!!
-S!!U19!26!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F11!\CTS0/GPIO0\!!!!!!!!
-S!!U19!11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F11!\CTS1/GPIO3\!!!!!!!!
-S!!U19!13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F11!\CTS2/GPIO6\!!!!!!!!
-S!!U19!15!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F11!\CTS3/GPIO9\!!!!!!!!
-S!!U19!23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F11!\DCD0\!!!!!!!!
-S!!U19!25!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F11!\DSR0\!!!!!!!!
-S!!U19!21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F11!\DTR0\!!!!!!!!
-S!!U19!24!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F11!\RI0\!!!!!!!!
-S!!U19!20!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F11!\RTS0/GPIO1\!!!!!!!!
-S!!U19!12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F11!\RTS1/GPIO4\!!!!!!!!
-S!!U19!14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F11!\RTS2/GPIO7\!!!!!!!!
-S!!U19!16!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F11!\RTS3/GPIO10\!!!!!!!!
-S!COM1_RXD!U19!22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F11!\RXD0\!!!!!!!!
-S!COM2_RXD!U19!44!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F11!\RXD1\!!!!!!!!
-S!COM3_RXD!U19!42!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F11!\RXD2\!!!!!!!!
-S!COM4_RXD!U19!40!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F11!\RXD3\!!!!!!!!
-S!!U19!36!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F11!\TNOW0/GPIO2\!!!!!!!!
-S!!U19!39!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F11!\TNOW1/GPIO5\!!!!!!!!
-S!!U19!46!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F11!\TNOW2/GPIO8\!!!!!!!!
-S!!U19!47!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F11!\TNOW3/GPIO11\!!!!!!!!
-S!COM1_TXD!U19!19!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F11!\TXD0\!!!!!!!!
-S!COM2_TXD!U19!45!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F11!\TXD1\!!!!!!!!
-S!COM3_TXD!U19!43!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F11!\TXD2\!!!!!!!!
-S!COM4_TXD!U19!41!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793551\@\QF_IC\.\CH9344QB.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F11!\TXD3\!!!!!!!!
-S!!U19!37!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793582\@\QF_IC\.\CH9344QC.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F10!\ISP\!!!!!!!!
-S!!U19!38!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793582\@\QF_IC\.\CH9344QC.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F10!\RST#\!!!!!!!!
-S!USB_UART_DP!U19!31!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793582\@\QF_IC\.\CH9344QC.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F10!\UD+\!!!!!!!!
-S!USB_UART_DM!U19!32!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793582\@\QF_IC\.\CH9344QC.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F10!\UD-\!!!!!!!!
-S!N16813508!U19!29!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793591\@\QF_IC\.\CH9344QD.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F9!\XI\!!!!!!!!
-S!N16813506!U19!28!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793591\@\QF_IC\.\CH9344QD.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!F9!\XO\!!!!!!!!
-S!!U19!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793606\@\QF_IC\.\CH9344QE.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-124!\NC1\!!!!!!!!
-S!!U19!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793606\@\QF_IC\.\CH9344QE.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-124!\NC2\!!!!!!!!
-S!!U19!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793606\@\QF_IC\.\CH9344QE.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-124!\NC3\!!!!!!!!
-S!!U19!6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793606\@\QF_IC\.\CH9344QE.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-124!\NC4\!!!!!!!!
-S!!U19!7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793606\@\QF_IC\.\CH9344QE.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-124!\NC5\!!!!!!!!
-S!!U19!8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793606\@\QF_IC\.\CH9344QE.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-124!\NC6\!!!!!!!!
-S!!U19!9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793606\@\QF_IC\.\CH9344QE.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-124!\NC7\!!!!!!!!
-S!!U19!10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793606\@\QF_IC\.\CH9344QE.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-124!\NC8\!!!!!!!!
-S!!U19!30!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793606\@\QF_IC\.\CH9344QE.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-124!\NC9\!!!!!!!!
-S!!U19!17!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793606\@\QF_IC\.\CH9344QE.Normal\(chips)!CH9344Q_LQFP48_050_700X700_(S1+S2+S3+S4+S5)_CH9344Q!!!TF-124!\TEST\!!!!!!!!
-S!ANT1!C11!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60874\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100PF!!!F129!\1\!!!!!!!!
-S!N61054!C11!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60874\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100PF!!!F129!\2\!!!!!!!!
-S!ANT2!C12!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS61194\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100PF!!!F128!\1\!!!!!!!!
-S!N61267!C12!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS61194\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100PF!!!F128!\2\!!!!!!!!
-S!N16780119!C28!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16780189\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100PF!!!F127!\1\!!!!!!!!
-S!GND!C28!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16780189\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100PF!!!F127!\2\!!!!!!!!
-S!VDD_GNSS!C14!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS64015\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_10UF!!!F97!\1\!!!!!!!!
-S!GND!C14!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS64015\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_10UF!!!F97!\2\!!!!!!!!
-S!VCC_DDR!C29!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781112\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_10UF!!!F96!\1\!!!!!!!!
-S!GND!C29!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781112\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_10UF!!!F96!\2\!!!!!!!!
-S!VCC_DDR!C30!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781131\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_10UF!!!F95!\1\!!!!!!!!
-S!GND!C30!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781131\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_10UF!!!F95!\2\!!!!!!!!
-S!VCC_DDR!C31!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781150\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_10UF!!!F94!\1\!!!!!!!!
-S!GND!C31!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781150\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_10UF!!!F94!\2\!!!!!!!!
-S!VCC_DDR!C17!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16774421\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_4.7NF!!!F93!\1\!!!!!!!!
-S!GND!C17!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16774421\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_4.7NF!!!F93!\2\!!!!!!!!
-S!VCC_DDR!C18!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16774477\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_1NF!!!F92!\1\!!!!!!!!
-S!GND!C18!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16774477\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_1NF!!!F92!\2\!!!!!!!!
-S!VCC_DDR!C19!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16774613\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_1UF!!!F91!\1\!!!!!!!!
-S!GND!C19!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16774613\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_1UF!!!F91!\2\!!!!!!!!
-S!VCC_DDR!C20!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16774705\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_100NF!!!F90!\1\!!!!!!!!
-S!GND!C20!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16774705\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_100NF!!!F90!\2\!!!!!!!!
-S!DDR3_RST!C21!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16778769\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F89!\1\!!!!!!!!
-S!GND!C21!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16778769\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F89!\2\!!!!!!!!
-S!DDR_VREF_DQ!C22!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16778930\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F88!\1\!!!!!!!!
-S!GND!C22!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16778930\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F88!\2\!!!!!!!!
-S!VCC_DDR!C23!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16778954\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F87!\1\!!!!!!!!
-S!DDR_VREF_DQ!C23!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16778954\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F87!\2\!!!!!!!!
-S!VCC_DDR!C24!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779229\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F86!\1\!!!!!!!!
-S!DDR_VREF_CA!C24!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779229\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F86!\2\!!!!!!!!
-S!DDR_VREF_CA!C25!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779248\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F85!\1\!!!!!!!!
-S!GND!C25!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779248\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F85!\2\!!!!!!!!
-S!DDR3_VREF_CA!C26!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779458\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F84!\1\!!!!!!!!
-S!GND!C26!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779458\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F84!\2\!!!!!!!!
-S!DDR3_VREF_DQ!C27!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779568\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F83!\1\!!!!!!!!
-S!GND!C27!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779568\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1NF!!!F83!\2\!!!!!!!!
-S!GND!C65!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16798096\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F78!\1\!!!!!!!!
-S!VDD_GNSS!C65!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16798096\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F78!\2\!!!!!!!!
-S!GND!C67!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16798457\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F77!\1\!!!!!!!!
-S!VDD_GNSS!C67!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16798457\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F77!\2\!!!!!!!!
-S!VDD_3V3!C68!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16801052\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F76!\1\!!!!!!!!
-S!GND!C68!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16801052\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F76!\2\!!!!!!!!
-S!VDD_3V3!C69!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16801070\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F75!\1\!!!!!!!!
-S!GND!C69!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16801070\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F75!\2\!!!!!!!!
-S!VDDK_USB!C70!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16814832\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F74!\1\!!!!!!!!
-S!GND!C70!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16814832\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F74!\2\!!!!!!!!
-S!VDDK_USB!C71!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16814921\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F73!\1\!!!!!!!!
-S!GND!C71!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16814921\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F73!\2\!!!!!!!!
-S!VDD_3V3!C72!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16814989\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F72!\1\!!!!!!!!
-S!GND!C72!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16814989\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F72!\2\!!!!!!!!
-S!VDD_3V3!C73!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16815011\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F71!\1\!!!!!!!!
-S!GND!C73!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16815011\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F71!\2\!!!!!!!!
-S!VCC_DDR!C32!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781169\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F82!\1\!!!!!!!!
-S!GND!C32!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781169\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F82!\2\!!!!!!!!
-S!VDDCR_RMII0!C43!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16788606\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F81!\1\!!!!!!!!
-S!GND!C43!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16788606\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F81!\2\!!!!!!!!
-S!VDDCR_RMII1!C53!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789896\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F80!\1\!!!!!!!!
-S!GND!C53!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789896\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F80!\2\!!!!!!!!
-S!N16792429!C62!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16792411\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F79!\1\!!!!!!!!
-S!GND!C62!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16792411\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_1UF!!!F79!\2\!!!!!!!!
-S!VDDA_RMII0!C46!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16788776\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_4.7UF!!!F70!\1\!!!!!!!!
-S!GND!C46!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16788776\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_4.7UF!!!F70!\2\!!!!!!!!
-S!VDDIO_RMII0!C48!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789021\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_4.7UF!!!F69!\1\!!!!!!!!
-S!GND!C48!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789021\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_4.7UF!!!F69!\2\!!!!!!!!
-S!VDDA_RMII1!C51!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789838\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_4.7UF!!!F68!\1\!!!!!!!!
-S!GND!C51!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789838\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_4.7UF!!!F68!\2\!!!!!!!!
-S!VDDIO_RMII1!C55!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789946\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_4.7UF!!!F67!\1\!!!!!!!!
-S!GND!C55!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789946\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_4.7UF!!!F67!\2\!!!!!!!!
-S!VDD_1V8!C58!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791417\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_4.7UF!!!F65!\1\!!!!!!!!
-S!GND!C58!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791417\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_4.7UF!!!F65!\2\!!!!!!!!
-S!VDD_3V3!C61!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791929\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_4.7UF!!!F64!\1\!!!!!!!!
-S!GND!C61!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791929\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_4.7UF!!!F64!\2\!!!!!!!!
-S!EMMC_CLKOUT!C63!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793157\@\QF_DISCRETE\.\CAP NP_NC.Normal\(chips)!CAP NP_NC_C0402_DISCRETE_10PF/NC!!!F62!\1\!!!!!!!!
-S!GND!C63!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16793157\@\QF_DISCRETE\.\CAP NP_NC.Normal\(chips)!CAP NP_NC_C0402_DISCRETE_10PF/NC!!!F62!\2\!!!!!!!!
-S!VDD_3V3!FB1!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16790442\@\QF_DISCRETE\.\BEAD.Normal\(chips)!BEAD_L0603_0R!!!F59!\1\!!!!!!!!
-S!VDDA_RMII1!FB1!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16790442\@\QF_DISCRETE\.\BEAD.Normal\(chips)!BEAD_L0603_0R!!!F59!\2\!!!!!!!!
-S!VDD_3V3!FB2!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16790635\@\QF_DISCRETE\.\BEAD.Normal\(chips)!BEAD_L0603_0R!!!F58!\1\!!!!!!!!
-S!VDDA_RMII0!FB2!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16790635\@\QF_DISCRETE\.\BEAD.Normal\(chips)!BEAD_L0603_0R!!!F58!\2\!!!!!!!!
-S!GND!R10!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785432\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F52!\1\!!!!!!!!
-S!N16785446!R10!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785432\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F52!\2\!!!!!!!!
-S!GND!R11!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785470\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F51!\1\!!!!!!!!
-S!N16785482!R11!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785470\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F51!\2\!!!!!!!!
-S!RMII0_RST!R12!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785611\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F50!\1\!!!!!!!!
-S!VDDIO_RMII0!R12!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785611\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F50!\2\!!!!!!!!
-S!RMII0_MDIO!R14!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785670\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F49!\1\!!!!!!!!
-S!VDDIO_RMII0!R14!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785670\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F49!\2\!!!!!!!!
-S!RMII1_MDIO!R16!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786089\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F48!\1\!!!!!!!!
-S!VDDIO_RMII1!R16!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786089\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F48!\2\!!!!!!!!
-S!RMII1_RST!R17!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786101\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F47!\1\!!!!!!!!
-S!VDDIO_RMII1!R17!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786101\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F47!\2\!!!!!!!!
-S!GND!R19!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786347\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F46!\1\!!!!!!!!
-S!N16786362!R19!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786347\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F46!\2\!!!!!!!!
-S!GND!R20!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786363\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F45!\1\!!!!!!!!
-S!N16786382!R20!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786363\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F45!\2\!!!!!!!!
-S!N16786486!R21!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786462\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F44!\1\!!!!!!!!
-S!VDDIO_RMII0!R21!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786462\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_10K!!!F44!\2\!!!!!!!!
-S!GND!R13!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785633\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_12.1K!!!F43!\1\!!!!!!!!
-S!N16785709!R13!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785633\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_12.1K!!!F43!\2\!!!!!!!!
-S!GND!R7!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16784995\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_12.1K!!!F42!\1\!!!!!!!!
-S!N16785007!R7!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16784995\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_12.1K!!!F42!\2\!!!!!!!!
-S!VDD_1V8!R15!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785907\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_0R!!!F41!\1\!!!!!!!!
-S!VDDIO_RMII0!R15!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16785907\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_0R!!!F41!\2\!!!!!!!!
-S!VDD_1V8!R18!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786204\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_0R!!!F40!\1\!!!!!!!!
-S!VDDIO_RMII1!R18!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16786204\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_0R!!!F40!\2\!!!!!!!!
-S!N16777370!R2!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16777695\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_240R!!!F39!\1\!!!!!!!!
-S!GND!R2!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16777695\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_240R!!!F39!\2\!!!!!!!!
-S!DDR_VREF_CA!R3!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779393\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_240R!!!F38!\1\!!!!!!!!
-S!DDR3_VREF_CA!R3!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779393\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_240R!!!F38!\2\!!!!!!!!
-S!DDR_VREF_DQ!R4!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779420\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_240R!!!F37!\1\!!!!!!!!
-S!DDR3_VREF_DQ!R4!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16779420\@\QF_DISCRETE\.\RESISTOR.Normal\(chips)!RESISTOR_R0402_DISCRETE_240R!!!F37!\2\!!!!!!!!
-S!VDD_1V8!R23!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16792656\@\QF_DISCRETE\.\RESISTOR_NC.Normal\(chips)!RESISTOR_NC_R0402_DISCRETE_10K/NC!!!F36!\1\!!!!!!!!
-S!EMMC_D0!R23!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16792656\@\QF_DISCRETE\.\RESISTOR_NC.Normal\(chips)!RESISTOR_NC_R0402_DISCRETE_10K/NC!!!F36!\2\!!!!!!!!
-S!VDD_1V8!R24!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16792697\@\QF_DISCRETE\.\RESISTOR_NC.Normal\(chips)!RESISTOR_NC_R0402_DISCRETE_10K/NC!!!F35!\1\!!!!!!!!
-S!EMMC_CMD!R24!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16792697\@\QF_DISCRETE\.\RESISTOR_NC.Normal\(chips)!RESISTOR_NC_R0402_DISCRETE_10K/NC!!!F35!\2\!!!!!!!!
-S!VDD_1V8!R25!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16792716\@\QF_DISCRETE\.\RESISTOR_NC.Normal\(chips)!RESISTOR_NC_R0402_DISCRETE_10K/NC!!!F34!\1\!!!!!!!!
-S!EMMC_RSTN!R25!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16792716\@\QF_DISCRETE\.\RESISTOR_NC.Normal\(chips)!RESISTOR_NC_R0402_DISCRETE_10K/NC!!!F34!\2\!!!!!!!!
-S!GND!J2!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60593\@\QF_ANT\.\MMCX-180.Normal\(chips)!MMCX-180_MMCX-180_50OHM!!!F55!\GND#2\!!!!!!!!
-S!GND!J2!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60593\@\QF_ANT\.\MMCX-180.Normal\(chips)!MMCX-180_MMCX-180_50OHM!!!F55!\GND#3\!!!!!!!!
-S!GND!J2!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60593\@\QF_ANT\.\MMCX-180.Normal\(chips)!MMCX-180_MMCX-180_50OHM!!!F55!\GND#4\!!!!!!!!
-S!GND!J2!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60593\@\QF_ANT\.\MMCX-180.Normal\(chips)!MMCX-180_MMCX-180_50OHM!!!F55!\GND#5\!!!!!!!!
-S!N61054!J2!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60593\@\QF_ANT\.\MMCX-180.Normal\(chips)!MMCX-180_MMCX-180_50OHM!!!F55!\SIG\!!!!!!!!
-S!GND!J3!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60619\@\QF_ANT\.\MMCX-180.Normal\(chips)!MMCX-180_MMCX-180_50OHM!!!F54!\GND#2\!!!!!!!!
-S!GND!J3!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60619\@\QF_ANT\.\MMCX-180.Normal\(chips)!MMCX-180_MMCX-180_50OHM!!!F54!\GND#3\!!!!!!!!
-S!GND!J3!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60619\@\QF_ANT\.\MMCX-180.Normal\(chips)!MMCX-180_MMCX-180_50OHM!!!F54!\GND#4\!!!!!!!!
-S!GND!J3!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60619\@\QF_ANT\.\MMCX-180.Normal\(chips)!MMCX-180_MMCX-180_50OHM!!!F54!\GND#5\!!!!!!!!
-S!N61267!J3!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS60619\@\QF_ANT\.\MMCX-180.Normal\(chips)!MMCX-180_MMCX-180_50OHM!!!F54!\SIG\!!!!!!!!
-S!!U11!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55441\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F22!\EN\!!!!!!!!
-S!!U11!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55441\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F22!\FB\!!!!!!!!
-S!GND!U11!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55441\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F22!\GND\!!!!!!!!
-S!SW!U11!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55441\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F22!\SW\!!!!!!!!
-S!VIN!U11!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55441\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F22!\VIN\!!!!!!!!
-S!!U12!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55469\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F21!\EN\!!!!!!!!
-S!!U12!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55469\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F21!\FB\!!!!!!!!
-S!GND!U12!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55469\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F21!\GND\!!!!!!!!
-S!SW!U12!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55469\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F21!\SW\!!!!!!!!
-S!VIN!U12!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55469\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F21!\VIN\!!!!!!!!
-S!!U13!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55497\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F20!\EN\!!!!!!!!
-S!!U13!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55497\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F20!\FB\!!!!!!!!
-S!GND!U13!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55497\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F20!\GND\!!!!!!!!
-S!SW!U13!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55497\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F20!\SW\!!!!!!!!
-S!VIN!U13!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55497\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F20!\VIN\!!!!!!!!
-S!!U14!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55525\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F19!\EN\!!!!!!!!
-S!!U14!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55525\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F19!\FB\!!!!!!!!
-S!GND!U14!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55525\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F19!\GND\!!!!!!!!
-S!SW!U14!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55525\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F19!\SW\!!!!!!!!
-S!VIN!U14!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55525\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F19!\VIN\!!!!!!!!
-S!!U15!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55553\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F18!\EN\!!!!!!!!
-S!!U15!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55553\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F18!\FB\!!!!!!!!
-S!GND!U15!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55553\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F18!\GND\!!!!!!!!
-S!SW!U15!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55553\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F18!\SW\!!!!!!!!
-S!VIN!U15!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55553\@d.s(v)!TLV62569DBVR_SOT_23_5_TLV62569DBV!!!F18!\VIN\!!!!!!!!
-S!EMMC_CLKOUT!U16!M6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\CLK\!!!!!!!!
-S!EMMC_CMD!U16!M5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\CMD\!!!!!!!!
-S!!U16!H5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\DATA STROBE\!!!!!!!!
-S!EMMC_D0!U16!A3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\DATA0\!!!!!!!!
-S!EMMC_D1!U16!A4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\DATA1\!!!!!!!!
-S!EMMC_D2!U16!A5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\DATA2\!!!!!!!!
-S!EMMC_D3!U16!B2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\DATA3\!!!!!!!!
-S!!U16!B3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\DATA4\!!!!!!!!
-S!!U16!B4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\DATA5\!!!!!!!!
-S!!U16!B5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\DATA6\!!!!!!!!
-S!!U16!B6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\DATA7\!!!!!!!!
-S!EMMC_RSTN!U16!K5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\RST_N\!!!!!!!!
-S!VDD_3V3!U16!E6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\VCC1\!!!!!!!!
-S!VDD_3V3!U16!F5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\VCC2\!!!!!!!!
-S!VDD_3V3!U16!J10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\VCC3\!!!!!!!!
-S!VDD_3V3!U16!K9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\VCC4\!!!!!!!!
-S!VDD_1V8!U16!C6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\VCCQ1\!!!!!!!!
-S!VDD_1V8!U16!M4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\VCCQ2\!!!!!!!!
-S!VDD_1V8!U16!N4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\VCCQ3\!!!!!!!!
-S!VDD_1V8!U16!P3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\VCCQ4\!!!!!!!!
-S!VDD_1V8!U16!P5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\VCCQ5\!!!!!!!!
-S!N16792429!U16!C2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\VDDI\!!!!!!!!
-S!!U16!E9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\VSF1\!!!!!!!!
-S!!U16!E10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\VSF2\!!!!!!!!
-S!!U16!F10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\VSF3\!!!!!!!!
-S!!U16!K10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\VSF4\!!!!!!!!
-S!GND!U16!J5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\VSS1\!!!!!!!!
-S!GND!U16!A6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\VSS2\!!!!!!!!
-S!GND!U16!C4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\VSS3\!!!!!!!!
-S!GND!U16!E7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\VSS4\!!!!!!!!
-S!GND!U16!G5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\VSS5\!!!!!!!!
-S!GND!U16!H10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\VSS6\!!!!!!!!
-S!GND!U16!K8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\VSSQ1\!!!!!!!!
-S!GND!U16!N2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\VSSQ2\!!!!!!!!
-S!GND!U16!N5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\VSSQ3\!!!!!!!!
-S!GND!U16!P4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\VSSQ4\!!!!!!!!
-S!GND!U16!P6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS57948\@\QF_IC\.\INAND_EMMC_153_2LA.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!F17!\VSSQ5\!!!!!!!!
-S!!U16!H2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC100\!!!!!!!!
-S!!U16!H3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC101\!!!!!!!!
-S!!U16!A10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC10\!!!!!!!!
-S!!U16!H12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC110\!!!!!!!!
-S!!U16!H13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC111\!!!!!!!!
-S!!U16!H14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC112\!!!!!!!!
-S!!U16!J1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC113\!!!!!!!!
-S!!U16!J2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC114\!!!!!!!!
-S!!U16!J3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC115\!!!!!!!!
-S!!U16!A11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC11\!!!!!!!!
-S!!U16!J12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC124\!!!!!!!!
-S!!U16!J13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC125\!!!!!!!!
-S!!U16!J14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC126\!!!!!!!!
-S!!U16!K1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC127\!!!!!!!!
-S!!U16!K2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC128\!!!!!!!!
-S!!U16!K3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC129\!!!!!!!!
-S!!U16!A12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC12\!!!!!!!!
-S!!U16!K12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC138\!!!!!!!!
-S!!U16!K13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC139\!!!!!!!!
-S!!U16!A13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC13\!!!!!!!!
-S!!U16!K14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC140\!!!!!!!!
-S!!U16!L1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC141\!!!!!!!!
-S!!U16!L2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC142\!!!!!!!!
-S!!U16!L3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC143\!!!!!!!!
-S!!U16!A14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC14\!!!!!!!!
-S!!U16!L12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC152\!!!!!!!!
-S!!U16!L13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC153\!!!!!!!!
-S!!U16!L14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC154\!!!!!!!!
-S!!U16!M1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC155\!!!!!!!!
-S!!U16!M2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC156\!!!!!!!!
-S!!U16!M3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC157\!!!!!!!!
-S!!U16!B1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC15\!!!!!!!!
-S!!U16!M7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC161\!!!!!!!!
-S!!U16!M8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC162\!!!!!!!!
-S!!U16!M9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC163\!!!!!!!!
-S!!U16!M10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC164\!!!!!!!!
-S!!U16!M11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC165\!!!!!!!!
-S!!U16!M12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC166\!!!!!!!!
-S!!U16!M13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC167\!!!!!!!!
-S!!U16!M14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC168\!!!!!!!!
-S!!U16!N1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC169\!!!!!!!!
-S!!U16!N3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC171\!!!!!!!!
-S!!U16!N6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC174\!!!!!!!!
-S!!U16!N7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC175\!!!!!!!!
-S!!U16!N8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC176\!!!!!!!!
-S!!U16!N9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC177\!!!!!!!!
-S!!U16!N10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC178\!!!!!!!!
-S!!U16!N11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC179\!!!!!!!!
-S!!U16!N12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC180\!!!!!!!!
-S!!U16!N13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC181\!!!!!!!!
-S!!U16!N14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC182\!!!!!!!!
-S!!U16!P1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC183\!!!!!!!!
-S!!U16!P2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC184\!!!!!!!!
-S!!U16!P8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC190\!!!!!!!!
-S!!U16!P9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC191\!!!!!!!!
-S!!U16!P11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC193\!!!!!!!!
-S!!U16!P12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC194\!!!!!!!!
-S!!U16!P13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC195\!!!!!!!!
-S!!U16!P14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC196\!!!!!!!!
-S!!U16!B7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC21\!!!!!!!!
-S!!U16!B8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC22\!!!!!!!!
-S!!U16!B9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC23\!!!!!!!!
-S!!U16!B10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC24\!!!!!!!!
-S!!U16!B11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC25\!!!!!!!!
-S!!U16!B12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC26\!!!!!!!!
-S!!U16!B13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC27\!!!!!!!!
-S!!U16!B14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC28\!!!!!!!!
-S!!U16!C1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC29\!!!!!!!!
-S!!U16!A2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC2\!!!!!!!!
-S!!U16!C3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC31\!!!!!!!!
-S!!U16!C7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC35\!!!!!!!!
-S!!U16!C8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC36\!!!!!!!!
-S!!U16!C9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC37\!!!!!!!!
-S!!U16!C10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC38\!!!!!!!!
-S!!U16!C11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC39\!!!!!!!!
-S!!U16!C12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC40\!!!!!!!!
-S!!U16!C13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC41\!!!!!!!!
-S!!U16!C14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC42\!!!!!!!!
-S!!U16!D1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC43\!!!!!!!!
-S!!U16!D2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC44\!!!!!!!!
-S!!U16!D3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC45\!!!!!!!!
-S!!U16!D4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC46\!!!!!!!!
-S!!U16!D12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC54\!!!!!!!!
-S!!U16!D13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC55\!!!!!!!!
-S!!U16!D14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC56\!!!!!!!!
-S!!U16!E1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC57\!!!!!!!!
-S!!U16!E2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC58\!!!!!!!!
-S!!U16!E3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC59\!!!!!!!!
-S!!U16!E12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC68\!!!!!!!!
-S!!U16!E13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC69\!!!!!!!!
-S!!U16!E14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC70\!!!!!!!!
-S!!U16!F1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC71\!!!!!!!!
-S!!U16!F2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC72\!!!!!!!!
-S!!U16!F3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC73\!!!!!!!!
-S!!U16!F12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC82\!!!!!!!!
-S!!U16!F13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC83\!!!!!!!!
-S!!U16!F14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC84\!!!!!!!!
-S!!U16!G1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC85\!!!!!!!!
-S!!U16!G2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC86\!!!!!!!!
-S!!U16!A8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC8\!!!!!!!!
-S!!U16!G12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC96\!!!!!!!!
-S!!U16!G13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC97\!!!!!!!!
-S!!U16!G14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC98\!!!!!!!!
-S!!U16!H1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC99\!!!!!!!!
-S!!U16!A9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\NC9\!!!!!!!!
-S!!U16!A7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\RFU1\!!!!!!!!
-S!!U16!E5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\RFU2\!!!!!!!!
-S!!U16!E8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\RFU3\!!!!!!!!
-S!!U16!G3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\RFU4\!!!!!!!!
-S!!U16!G10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\RFU5\!!!!!!!!
-S!!U16!K6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\RFU6\!!!!!!!!
-S!!U16!K7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\RFU7\!!!!!!!!
-S!!U16!P7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\RFU8\!!!!!!!!
-S!!U16!P10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS58273\@\QF_IC\.\INAND_EMMC_153_2LB.Normal\(chips)!INAND_EMMC_153_2L_BGA153_050_1150X1300_INAND_EMMC_153_2L!!!TF-39!\RFU9\!!!!!!!!
-S!DDR3_A0!U10!N3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\A0\!!!!!!!!
-S!DDR3_A10!U10!L7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\A10/AP\!!!!!!!!
-S!DDR3_A11!U10!R7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\A11\!!!!!!!!
-S!DDR3_A12!U10!N7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\A12/BC#\!!!!!!!!
-S!DDR3_A13!U10!T3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\A13\!!!!!!!!
-S!DDR3_A14!U10!T7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\A14\!!!!!!!!
-S!DDR3_A15!U10!M7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\A15\!!!!!!!!
-S!DDR3_A1!U10!P7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\A1\!!!!!!!!
-S!DDR3_A2!U10!P3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\A2\!!!!!!!!
-S!DDR3_A3!U10!N2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\A3\!!!!!!!!
-S!DDR3_A4!U10!P8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\A4\!!!!!!!!
-S!DDR3_A5!U10!P2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\A5\!!!!!!!!
-S!DDR3_A6!U10!R8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\A6\!!!!!!!!
-S!DDR3_A7!U10!R2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\A7\!!!!!!!!
-S!DDR3_A8!U10!T8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\A8\!!!!!!!!
-S!DDR3_A9!U10!R3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\A9\!!!!!!!!
-S!DDR3_BA0!U10!M2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\BA0\!!!!!!!!
-S!DDR3_BA1!U10!N8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\BA1\!!!!!!!!
-S!DDR3_BA2!U10!M3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\BA2\!!!!!!!!
-S!DDR3_CASN!U10!K3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\CAS#\!!!!!!!!
-S!DDR3_CLKN!U10!K7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\CK#\!!!!!!!!
-S!DDR3_CKE!U10!K9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\CKE0\!!!!!!!!
-S!!U10!J9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\CKE1\!!!!!!!!
-S!DDR3_CLKP!U10!J7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\CK\!!!!!!!!
-S!DDR3_CSN!U10!L2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\CS#0\!!!!!!!!
-S!!U10!L1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\CS#1\!!!!!!!!
-S!DDR_D7!U10!E3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\DQ0\!!!!!!!!
-S!DDR_D8!U10!C8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\DQ10\!!!!!!!!
-S!DDR_D13!U10!C2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\DQ11\!!!!!!!!
-S!DDR_D12!U10!A7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\DQ12\!!!!!!!!
-S!DDR_D14!U10!A2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\DQ13\!!!!!!!!
-S!DDR_D10!U10!B8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\DQ14\!!!!!!!!
-S!DDR_D15!U10!A3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\DQ15\!!!!!!!!
-S!DDR_D6!U10!F7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\DQ1\!!!!!!!!
-S!DDR_D4!U10!F2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\DQ2\!!!!!!!!
-S!DDR_D2!U10!F8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\DQ3\!!!!!!!!
-S!DDR_D3!U10!H3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\DQ4\!!!!!!!!
-S!DDR_D0!U10!H8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\DQ5\!!!!!!!!
-S!DDR_D5!U10!G2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\DQ6\!!!!!!!!
-S!DDR_D1!U10!H7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\DQ7\!!!!!!!!
-S!DDR_D9!U10!D7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\DQ8\!!!!!!!!
-S!DDR_D11!U10!C3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\DQ9\!!!!!!!!
-S!DDR_DM0!U10!E7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\LDM\!!!!!!!!
-S!DDR_DQS0N!U10!G3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\LDQS#\!!!!!!!!
-S!DDR_DQS0P!U10!F3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\LDQS\!!!!!!!!
-S!DDR3_ODT!U10!K1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\ODT0\!!!!!!!!
-S!!U10!J1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\ODT1\!!!!!!!!
-S!DDR3_RASN!U10!J3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\RAS#\!!!!!!!!
-S!DDR3_RST!U10!T2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\RESET#\!!!!!!!!
-S!DDR_DM1!U10!D3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\UDM\!!!!!!!!
-S!DDR_DQS1N!U10!B7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\UDQS#\!!!!!!!!
-S!DDR_DQS1P!U10!C7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\UDQS\!!!!!!!!
-S!VCC_DDR!U10!B2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VDD1\!!!!!!!!
-S!VCC_DDR!U10!D9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VDD2\!!!!!!!!
-S!VCC_DDR!U10!G7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VDD3\!!!!!!!!
-S!VCC_DDR!U10!K2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VDD4\!!!!!!!!
-S!VCC_DDR!U10!K8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VDD5\!!!!!!!!
-S!VCC_DDR!U10!N1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VDD6\!!!!!!!!
-S!VCC_DDR!U10!N9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VDD7\!!!!!!!!
-S!VCC_DDR!U10!R1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VDD8\!!!!!!!!
-S!VCC_DDR!U10!R9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VDD9\!!!!!!!!
-S!VCC_DDR!U10!A1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VDDQ1\!!!!!!!!
-S!VCC_DDR!U10!A8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VDDQ2\!!!!!!!!
-S!VCC_DDR!U10!C1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VDDQ3\!!!!!!!!
-S!VCC_DDR!U10!C9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VDDQ4\!!!!!!!!
-S!VCC_DDR!U10!D2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VDDQ5\!!!!!!!!
-S!VCC_DDR!U10!E9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VDDQ6\!!!!!!!!
-S!VCC_DDR!U10!F1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VDDQ7\!!!!!!!!
-S!VCC_DDR!U10!H2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VDDQ8\!!!!!!!!
-S!VCC_DDR!U10!H9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VDDQ9\!!!!!!!!
-S!DDR3_VREF_CA!U10!M8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VREFCA\!!!!!!!!
-S!DDR3_VREF_DQ!U10!H1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VREFDQ\!!!!!!!!
-S!GND!U10!P9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VSS10\!!!!!!!!
-S!GND!U10!T1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VSS11\!!!!!!!!
-S!GND!U10!T9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VSS12\!!!!!!!!
-S!GND!U10!A9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VSS1\!!!!!!!!
-S!GND!U10!B3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VSS2\!!!!!!!!
-S!GND!U10!E1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VSS3\!!!!!!!!
-S!GND!U10!G8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VSS4\!!!!!!!!
-S!GND!U10!J2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VSS5\!!!!!!!!
-S!GND!U10!J8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VSS6\!!!!!!!!
-S!GND!U10!M1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VSS7\!!!!!!!!
-S!GND!U10!M9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VSS8\!!!!!!!!
-S!GND!U10!P1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VSS9\!!!!!!!!
-S!GND!U10!B1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VSSQ1\!!!!!!!!
-S!GND!U10!B9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VSSQ2\!!!!!!!!
-S!GND!U10!D1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VSSQ3\!!!!!!!!
-S!GND!U10!D8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VSSQ4\!!!!!!!!
-S!GND!U10!E2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VSSQ5\!!!!!!!!
-S!GND!U10!E8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VSSQ6\!!!!!!!!
-S!GND!U10!F9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VSSQ7\!!!!!!!!
-S!GND!U10!G1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VSSQ8\!!!!!!!!
-S!GND!U10!G9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\VSSQ9\!!!!!!!!
-S!DDR3_WEN!U10!L3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\WE#\!!!!!!!!
-S!N16777370!U10!L8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\ZQ0\!!!!!!!!
-S!!U10!L9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS55212\@\QF_IC\.\DDR3_16bit.Normal\(chips)!DDR3_16BIT_FBGA96_14R00X11R00X1R20_DDR3_16BIT!!!F23!\ZQ1\!!!!!!!!
-S!N19188!C1!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19387\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_18PF!!!F133!\1\!!!!!!!!
-S!GND!C1!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19387\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_18PF!!!F133!\2\!!!!!!!!
-S!N19203!C2!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19709\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_18PF!!!F132!\1\!!!!!!!!
-S!GND!C2!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19709\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_18PF!!!F132!\2\!!!!!!!!
-S!VDD_0V9!C10!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS41270\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_10UF!!!F131!\1\!!!!!!!!
-S!GND!C10!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS41270\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_10UF!!!F131!\2\!!!!!!!!
-S!VDD_0V9!C9!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40428\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_10UF!!!F130!\1\!!!!!!!!
-S!GND!C9!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40428\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_10UF!!!F130!\2\!!!!!!!!
-S!GND!C64!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16798073\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F104!\1\!!!!!!!!
-S!VDD_GNSS!C64!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16798073\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F104!\2\!!!!!!!!
-S!GND!C66!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16798427\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F103!\1\!!!!!!!!
-S!VDD_GNSS!C66!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16798427\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F103!\2\!!!!!!!!
-S!VDD_3V3!C74!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16815092\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F102!\1\!!!!!!!!
-S!GND!C74!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16815092\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F102!\2\!!!!!!!!
-S!VDD_3V3!C75!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16815114\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F101!\1\!!!!!!!!
-S!GND!C75!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16815114\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F101!\2\!!!!!!!!
-S!VDD_3V3!C76!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16815620\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F100!\1\!!!!!!!!
-S!GND!C76!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16815620\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F100!\2\!!!!!!!!
-S!VDD_1V8!C77!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16815666\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F99!\1\!!!!!!!!
-S!GND!C77!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16815666\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F99!\2\!!!!!!!!
-S!VDD_0V9!C78!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16815701\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F98!\1\!!!!!!!!
-S!GND!C78!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16815701\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F98!\2\!!!!!!!!
-S!VDD_GNSS!C13!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS63979\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F126!\1\!!!!!!!!
-S!GND!C13!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS63979\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F126!\2\!!!!!!!!
-S!VDD_1V8!C15!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS69589\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F125!\1\!!!!!!!!
-S!GND!C15!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS69589\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F125!\2\!!!!!!!!
-S!VDD_1V8!C16!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS69901\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F124!\1\!!!!!!!!
-S!GND!C16!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS69901\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F124!\2\!!!!!!!!
-S!VCC_DDR!C33!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781188\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F122!\1\!!!!!!!!
-S!GND!C33!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781188\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F122!\2\!!!!!!!!
-S!VCC_DDR!C34!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781207\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F121!\1\!!!!!!!!
-S!GND!C34!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781207\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F121!\2\!!!!!!!!
-S!VCC_DDR!C35!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781226\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F120!\1\!!!!!!!!
-S!GND!C35!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781226\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F120!\2\!!!!!!!!
-S!VCC_DDR!C36!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781245\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F119!\1\!!!!!!!!
-S!GND!C36!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781245\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F119!\2\!!!!!!!!
-S!VCC_DDR!C37!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781264\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F118!\1\!!!!!!!!
-S!GND!C37!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16781264\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F118!\2\!!!!!!!!
-S!VDDCR_RMII0!C42!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16787638\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F116!\1\!!!!!!!!
-S!GND!C42!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16787638\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F116!\2\!!!!!!!!
-S!VDDA_RMII0!C44!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16788730\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F115!\1\!!!!!!!!
-S!GND!C44!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16788730\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F115!\2\!!!!!!!!
-S!VDDA_RMII0!C45!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16788748\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F114!\1\!!!!!!!!
-S!GND!C45!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16788748\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F114!\2\!!!!!!!!
-S!VDDIO_RMII0!C47!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789003\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F113!\1\!!!!!!!!
-S!GND!C47!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789003\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F113!\2\!!!!!!!!
-S!VDDA_RMII1!C49!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789780\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F112!\1\!!!!!!!!
-S!GND!C49!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789780\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F112!\2\!!!!!!!!
-S!VDDA_RMII1!C50!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789810\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F111!\1\!!!!!!!!
-S!GND!C50!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789810\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F111!\2\!!!!!!!!
-S!VDDCR_RMII1!C52!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789864\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F110!\1\!!!!!!!!
-S!GND!C52!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789864\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F110!\2\!!!!!!!!
-S!VDDIO_RMII1!C54!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789920\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F109!\1\!!!!!!!!
-S!GND!C54!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16789920\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F109!\2\!!!!!!!!
-S!VDD_1V8!C56!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791351\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F108!\1\!!!!!!!!
-S!GND!C56!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791351\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F108!\2\!!!!!!!!
-S!VDD_1V8!C57!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791389\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F107!\1\!!!!!!!!
-S!GND!C57!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791389\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F107!\2\!!!!!!!!
-S!VDD_3V3!C59!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791893\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F106!\1\!!!!!!!!
-S!GND!C59!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791893\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F106!\2\!!!!!!!!
-S!VDD_3V3!C60!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791911\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F105!\1\!!!!!!!!
-S!GND!C60!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16791911\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F105!\2\!!!!!!!!
-S!VCC_1V8!C3!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19878\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F123!\1\!!!!!!!!
-S!GND!C3!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19878\@\DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F123!\2\!!!!!!!!
-S!VDD_CPU!C4!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35873\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F117!\1\!!!!!!!!
-S!GND!C4!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35873\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_100NF!!!F117!\2\!!!!!!!!
-S!VDD_CPU!C5!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35933\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_10UF!!!F66!\1\!!!!!!!!
-S!GND!C5!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35933\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_DISCRETE_10UF!!!F66!\2\!!!!!!!!
-S!VDD_CPU!C6!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35977\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_22UF!!!F63!\1\!!!!!!!!
-S!GND!C6!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS35977\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0603_DISCRETE_22UF!!!F63!\2\!!!!!!!!
-S!VDD_0V9!C7!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40356\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_100NF!!!F61!\1\!!!!!!!!
-S!GND!C7!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40356\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_100NF!!!F61!\2\!!!!!!!!
-S!VDD_0V9!C8!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40392\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_100NF!!!F60!\1\!!!!!!!!
-S!GND!C8!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS40392\@\QF_DISCRETE\.\CAP NP.Normal\(chips)!CAP NP_C0402_BGA_DISCRETE_100NF!!!F60!\2\!!!!!!!!
-S!!J1!01!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\01\!!!!!!!!
-S!!J1!02!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\02\!!!!!!!!
-S!!J1!03!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\03\!!!!!!!!
-S!!J1!04!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\04\!!!!!!!!
-S!!J1!05!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\05\!!!!!!!!
-S!!J1!06!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\06\!!!!!!!!
-S!!J1!07!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\07\!!!!!!!!
-S!!J1!08!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\08\!!!!!!!!
-S!!J1!09!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\09\!!!!!!!!
-S!!J1!10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\10\!!!!!!!!
-S!!J1!11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\11\!!!!!!!!
-S!!J1!12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\12\!!!!!!!!
-S!!J1!13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\13\!!!!!!!!
-S!!J1!14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\14\!!!!!!!!
-S!!J1!15!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\15\!!!!!!!!
-S!!J1!16!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\16\!!!!!!!!
-S!!J1!17!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\17\!!!!!!!!
-S!!J1!18!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\18\!!!!!!!!
-S!!J1!19!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\19\!!!!!!!!
-S!!J1!20!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\20\!!!!!!!!
-S!!J1!21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\21\!!!!!!!!
-S!!J1!22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\22\!!!!!!!!
-S!!J1!23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\23\!!!!!!!!
-S!!J1!24!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\24\!!!!!!!!
-S!!J1!25!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\25\!!!!!!!!
-S!!J1!26!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\26\!!!!!!!!
-S!!J1!27!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\27\!!!!!!!!
-S!!J1!28!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\28\!!!!!!!!
-S!!J1!29!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\29\!!!!!!!!
-S!!J1!30!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\30\!!!!!!!!
-S!!J1!31!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\31\!!!!!!!!
-S!!J1!32!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\32\!!!!!!!!
-S!!J1!33!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\33\!!!!!!!!
-S!!J1!34!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\34\!!!!!!!!
-S!!J1!35!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\35\!!!!!!!!
-S!!J1!36!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\36\!!!!!!!!
-S!!J1!37!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\37\!!!!!!!!
-S!!J1!38!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\38\!!!!!!!!
-S!!J1!39!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\39\!!!!!!!!
-S!!J1!40!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\40\!!!!!!!!
-S!!J1!41!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\41\!!!!!!!!
-S!!J1!42!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\42\!!!!!!!!
-S!!J1!43!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\43\!!!!!!!!
-S!!J1!44!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\44\!!!!!!!!
-S!!J1!45!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\45\!!!!!!!!
-S!!J1!46!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\46\!!!!!!!!
-S!!J1!47!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\47\!!!!!!!!
-S!!J1!48!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\48\!!!!!!!!
-S!!J1!49!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\49\!!!!!!!!
-S!!J1!50!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\50\!!!!!!!!
-S!!J1!51!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\51\!!!!!!!!
-S!!J1!52!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\52\!!!!!!!!
-S!!J1!53!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\53\!!!!!!!!
-S!!J1!54!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\54\!!!!!!!!
-S!!J1!55!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\55\!!!!!!!!
-S!!J1!56!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\56\!!!!!!!!
-S!!J1!57!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\57\!!!!!!!!
-S!!J1!58!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\58\!!!!!!!!
-S!!J1!59!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\59\!!!!!!!!
-S!!J1!60!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\60\!!!!!!!!
-S!!J1!61!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\61\!!!!!!!!
-S!!J1!62!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\62\!!!!!!!!
-S!!J1!63!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\63\!!!!!!!!
-S!!J1!64!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\64\!!!!!!!!
-S!!J1!65!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\65\!!!!!!!!
-S!!J1!66!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\66\!!!!!!!!
-S!!J1!67!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\67\!!!!!!!!
-S!!J1!68!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\68\!!!!!!!!
-S!!J1!69!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\69\!!!!!!!!
-S!!J1!70!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\70\!!!!!!!!
-S!!J1!71!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\71\!!!!!!!!
-S!!J1!72!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\72\!!!!!!!!
-S!!J1!73!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\73\!!!!!!!!
-S!!J1!74!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\74\!!!!!!!!
-S!!J1!75!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\75\!!!!!!!!
-S!!J1!76!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\76\!!!!!!!!
-S!!J1!77!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\77\!!!!!!!!
-S!!J1!78!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\78\!!!!!!!!
-S!!J1!79!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\79\!!!!!!!!
-S!!J1!80!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS33975\@\B2BCONNECTOR\.\LSHM-140-030-L-DV-A-N-TR.Normal\(chips)!LSHM-140-030-L-DV-A-N-TR_SAMTEC_LSHM-140-030-L-DV-A-N-TR_LSHM-140-030-L-DV-A-N-TR!!!TF-27!\80\!!!!!!!!
-S!N19203!R1!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19332\@\DISCRETE\.\R.Normal\(chips)!R_R0402_DISCRETE_1M!!!F53!\1\!!!!!!!!
-S!N19188!R1!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19332\@\DISCRETE\.\R.Normal\(chips)!R_R0402_DISCRETE_1M!!!F53!\2\!!!!!!!!
-S!!U1!T3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\NPOR\!!!!!!!!
-S!N19188!U1!H3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\OSC_XIN\!!!!!!!!
-S!N19203!U1!H2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\OSC_XOUT\!!!!!!!!
-S!!U1!1L1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\PMUIO_VCC3V3\!!!!!!!!
-S!!U1!1K2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\PMU_LOGIC_DVDD0V9\!!!!!!!!
-S!!U1!G1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\REF_CLK0_OUT |  OSC_CLK_OUT      |  GPIO0_D0_D\!!!!!!!!
-S!!U1!1G2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\RFU\!!!!!!!!
-S!!U1!V3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\RM_IO0  |  --           |  SAI0_LRCK        |  GPIO0_A0_U\!!!!!!!!
-S!!U1!W1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\RM_IO1  |  --           |  SAI0_SCLK        |  GPIO0_A1_D\!!!!!!!!
-S!!U1!R3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\RM_IO10 |  SPI1_MISO    |  SAI1_LRCK        |  GPIO0_B2_D\!!!!!!!!
-S!!U1!P2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\RM_IO11 |  --           |  SAI1_SDI         |  GPIO0_B3_D\!!!!!!!!
-S!!U1!P3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\RM_IO12 |  --           |  SAI1_SDO0        |  GPIO0_B4_D\!!!!!!!!
-S!!U1!N1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\RM_IO13 |  --           |  SAI1_SDO1        |  GPIO0_B5_D\!!!!!!!!
-S!!U1!N3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\RM_IO14 |  SPI1_CSN0    |  SAI1_SDO2        |  GPIO0_B6_D\!!!!!!!!
-S!!U1!N2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\RM_IO15 |  SPI0_CSN1    |  SAI1_SDO3        |  GPIO0_B7_D\!!!!!!!!
-S!!U1!M2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\RM_IO16 |  SPI0_CLK     |  --               |  GPIO0_C0_D\!!!!!!!!
-S!!U1!M3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\RM_IO17 |  SPI0_MOSI    |  --               |  GPIO0_C1_D\!!!!!!!!
-S!!U1!L1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\RM_IO18 |  SPI0_MISO    |  REF_CLK1_OUT     |  GPIO0_C2_D\!!!!!!!!
-S!!U1!L2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\RM_IO19 |  SPI0_CSN0    |  ETH_CLK1_25M_OUT |  GPIO0_C3_D\!!!!!!!!
-S!!U1!W2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\RM_IO2  |  --           |  SAI0_MCLK        |  GPIO0_A2_U\!!!!!!!!
-S!!U1!K2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\RM_IO20 |  AUPLL_CLK_IN |  ETH_CLK0_25M_OUT |  GPIO0_C4_D\!!!!!!!!
-S!!U1!K3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\RM_IO21 |  --           |  CPU_AVS          |  GPIO0_C5_Z\!!!!!!!!
-S!!U1!J2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\RM_IO22 |  JTAG_TCK_M1  |  UART0_TX         |  GPIO0_C6_U\!!!!!!!!
-S!!U1!J1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\RM_IO23 |  JTAG_TMS_M1  |  UART0_RX         |  GPIO0_C7_U\!!!!!!!!
-S!!U1!V2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\RM_IO3  |  --           |  SAI0_SDO         |  GPIO0_A3_D\!!!!!!!!
-S!!U1!U2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\RM_IO4  |  --           |  SAI0_SDI0        |  GPIO0_A4_D\!!!!!!!!
-S!!U1!U1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\RM_IO5  |  --           |  SAI0_SDI1        |  GPIO0_A5_D\!!!!!!!!
-S!!U1!U3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\RM_IO6  |  --           |  SAI0_SDI2        |  GPIO0_A6_D\!!!!!!!!
-S!!U1!T2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\RM_IO7  |  SPI1_CSN1    |  SAI0_SDI3        |  GPIO0_A7_D\!!!!!!!!
-S!!U1!R2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\RM_IO8  |  SPI1_CLK     |  SAI1_MCLK        |  GPIO0_B0_D\!!!!!!!!
-S!!U1!R1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\RM_IO9  |  SPI1_MOSI    |  SAI1_SCLK        |  GPIO0_B1_D\!!!!!!!!
-S!VCC_1V8!U1!1H1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS13961\@\LIBRARY\.\SOC_RK3506BA.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F31!\SYS_PLL_AVDD1V8\!!!!!!!!
-S!!U1!B10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\--            |  --      |  --            |  --              |  --            |  FLEXBUS1_D0  |  DSMC_CLKP   |  VO_LCDC_DEN   |  GPIO1_A0_D\!!!!!!!!
-S!!U1!A9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\--            |  --      |  --            |  --              |  --            |  FLEXBUS1_D2  |  DSMC_DQS0   |  VO_LCDC_HSYNC |  GPIO1_A2_D\!!!!!!!!
-S!!U1!B9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\--            |  --      |  --            |  --              |  --            |  FLEXBUS1_D3  |  DSMC_D0     |  VO_LCDC_CLK   |  GPIO1_A3_D\!!!!!!!!
-S!!U1!B8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\--            |  --      |  --            |  --              |  --            |  FLEXBUS1_D4  |  DSMC_D1     |  VO_LCDC_D23   |  GPIO1_A4_D\!!!!!!!!
-S!!U1!1A4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\--            |  --      |  --            |  --              |  --            |  FLEXBUS1_D5  |  DSMC_D2     |  VO_LCDC_D22   |  GPIO1_A5_D\!!!!!!!!
-S!!U1!A7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\--            |  --      |  --            |  --              |  --            |  FLEXBUS1_D6  |  DSMC_D3     |  VO_LCDC_D21   |  GPIO1_A6_D\!!!!!!!!
-S!!U1!B7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\--            |  --      |  --            |  --              |  --            |  FLEXBUS1_D7  |  DSMC_D4     |  VO_LCDC_D20   |  GPIO1_A7_D\!!!!!!!!
-S!!U1!1A3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\--            |  --      |  --            |  FLEXBUS0_CSN_M0 |  --            |  FLEXBUS1_D8  |  DSMC_D5     |  VO_LCDC_D19   |  GPIO1_B0_D\!!!!!!!!
-S!!U1!1A1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\--            |  --      |  --            |  FLEXBUS0_CSN_M2 |  FLEXBUS0_D13  |  FLEXBUS1_D12 |  DSMC_D6     |  VO_LCDC_D15   |  GPIO1_B4_D\!!!!!!!!
-S!!U1!A3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\--            |  --      |  --            |  FLEXBUS0_CSN_M3 |  FLEXBUS0_D11  |  FLEXBUS1_D14 |  DSMC_CSN0   |  VO_LCDC_D13   |  GPIO1_B6_D\!!!!!!!!
-S!!U1!C3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\--            |  --      |  --            |  FLEXBUS1_CSN_M2 |  FLEXBUS0_D12  |  FLEXBUS1_D13 |  DSMC_D7     |  VO_LCDC_D14   |  GPIO1_B5_D\!!!!!!!!
-S!!U1!B3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\--            |  --      |  --            |  FLEXBUS1_CSN_M3 |  FLEXBUS0_D10  |  FLEXBUS1_D15 |  DSMC_RDYN   |  VO_LCDC_D12   |  GPIO1_B7_D\!!!!!!!!
-S!!U1!1A2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\--            |  RM_IO24 |  UART5_CTSN_M1 |  FLEXBUS1_CSN_M0 |  --            |  FLEXBUS1_D9  |  DSMC_CSN1   |  VO_LCDC_D18   |  GPIO1_B1_D\!!!!!!!!
-S!!U1!A5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\--            |  RM_IO25 |  SAI2_SCLK_M1  |  FLEXBUS0_CSN_M1 |  FLEXBUS0_D15  |  FLEXBUS1_D10 |  DSMC_INT2   |  VO_LCDC_D17   |  GPIO1_B2_D\!!!!!!!!
-S!!U1!B5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\--            |  RM_IO26 |  SAI2_LRCK_M1  |  FLEXBUS1_CSN_M1 |  FLEXBUS0_D14  |  FLEXBUS1_D11 |  DSMC_INT3   |  VO_LCDC_D16   |  GPIO1_B3_D\!!!!!!!!
-S!!U1!A2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\DSMC_SLV_CLK  |  --      |  --            |  FLEXBUS0_CSN_M4 |  DSMC_INT1     |  FLEXBUS1_CLK |  DSMC_RESETN |  VO_LCDC_D11   |  GPIO1_C0_D\!!!!!!!!
-S!!U1!F2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\DSMC_SLV_CSN0 |  RM_IO30 |  UART5_TX_M1   |  --              |  --            |  FLEXBUS0_D1  |  DSMC_CSN2   |  VO_LCDC_D1    |  GPIO1_D2_D\!!!!!!!!
-S!!U1!B1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\DSMC_SLV_D0   |  RM_IO27 |  SAI2_SDI_M1   |  FLEXBUS0_CSN_M5 |  DSM_AUD_RP_M0 |  FLEXBUS0_D9  |  DSMC_D9     |  VO_LCDC_D9    |  GPIO1_C2_D\!!!!!!!!
-S!!U1!C2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\DSMC_SLV_D1   |  RM_IO28 |  SAI2_SDO_M1   |  FLEXBUS1_CSN_M5 |  --            |  FLEXBUS0_D8  |  DSMC_D10    |  VO_LCDC_D8    |  GPIO1_C3_D\!!!!!!!!
-S!!U1!C1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\DSMC_SLV_D2   |  --      |  --            |  --              |  --            |  FLEXBUS0_D7  |  DSMC_D11    |  VO_LCDC_D7    |  GPIO1_C4_D\!!!!!!!!
-S!!U1!D3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\DSMC_SLV_D3   |  --      |  --            |  --              |  --            |  FLEXBUS0_D6  |  DSMC_D12    |  VO_LCDC_D6    |  GPIO1_C5_D\!!!!!!!!
-S!!U1!E3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\DSMC_SLV_D4   |  --      |  --            |  --              |  --            |  FLEXBUS0_D5  |  DSMC_D13    |  VO_LCDC_D5    |  GPIO1_C6_D\!!!!!!!!
-S!!U1!E2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\DSMC_SLV_D5   |  --      |  --            |  --              |  --            |  FLEXBUS0_D4  |  DSMC_D14    |  VO_LCDC_D4    |  GPIO1_C7_D\!!!!!!!!
-S!!U1!E1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\DSMC_SLV_D6   |  --      |  --            |  --              |  DSM_AUD_LN_M0 |  FLEXBUS0_D3  |  DSMC_D15    |  VO_LCDC_D3    |  GPIO1_D0_D\!!!!!!!!
-S!!U1!F3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\DSMC_SLV_D7   |  RM_IO29 |  UART5_RTSN_M1 |  --              |  DSM_AUD_LP_M0 |  FLEXBUS0_D2  |  DSMC_DQS1   |  VO_LCDC_D2    |  GPIO1_D1_D\!!!!!!!!
-S!!U1!B2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\DSMC_SLV_DQS0 |  --      |  SAI2_MCLK_M1  |  FLEXBUS1_CSN_M4 |  DSM_AUD_RN_M0 |  FLEXBUS0_CLK |  DSMC_D8     |  VO_LCDC_D10   |  GPIO1_C1_D\!!!!!!!!
-S!!U1!1A5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\DSMC_SLV_INT  |  --      |  --            |  --              |  DSMC_INT0     |  FLEXBUS1_D1  |  DSMC_CLKN   |  VO_LCDC_VSYNC |  GPIO1_A1_D\!!!!!!!!
-S!!U1!G3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\DSMC_SLV_RDYN |  RM_IO31 |  UART5_RX_M1   |  --              |  --            |  FLEXBUS0_D0  |  DSMC_CSN3   |  VO_LCDC_D0    |  GPIO1_D3_D\!!!!!!!!
-S!!U1!1E3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\VCCIO1_VCC_0\!!!!!!!!
-S!!U1!1F3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16006\@\LIBRARY\.\SOC_RK3506BB.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-24!\VCCIO1_VCC_1\!!!!!!!!
-S!!U1!C22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16199\@\LIBRARY\.\SOC_RK3506BC.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-23!\FSPI_CLK |  GPIO2_A1_D\!!!!!!!!
-S!!U1!A22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16199\@\LIBRARY\.\SOC_RK3506BC.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-23!\FSPI_CSN |  GPIO2_A0_U\!!!!!!!!
-S!!U1!B23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16199\@\LIBRARY\.\SOC_RK3506BC.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-23!\FSPI_D0  |  GPIO2_A2_U\!!!!!!!!
-S!!U1!B22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16199\@\LIBRARY\.\SOC_RK3506BC.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-23!\FSPI_D1  |  GPIO2_A3_U\!!!!!!!!
-S!!U1!C21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16199\@\LIBRARY\.\SOC_RK3506BC.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-23!\FSPI_D2  |  GPIO2_A4_U\!!!!!!!!
-S!!U1!C23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16199\@\LIBRARY\.\SOC_RK3506BC.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-23!\FSPI_D3  |  GPIO2_A5_U\!!!!!!!!
-S!!U1!1F14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS16199\@\LIBRARY\.\SOC_RK3506BC.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!TF-23!\VCCIO2_VCC\!!!!!!!!
-S!RMII0_RXD0!U1!D21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F30!\--        |  SPI2_CLK      |  ETH_RMII0_RXD0    |  GPIO2_B0_D\!!!!!!!!
-S!RMII0_RXD1!U1!D23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F30!\--        |  SPI2_CSN      |  ETH_RMII0_RXD1    |  GPIO2_B1_D\!!!!!!!!
-S!RMII0_TXD0!U1!E22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F30!\--        |  SPI2_MISO     |  ETH_RMII0_TXD0    |  GPIO2_B3_D\!!!!!!!!
-S!RMII0_CLK!U1!E21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F30!\--        |  SPI2_MOSI     |  ETH_RMII0_CLK     |  GPIO2_B2_D\!!!!!!!!
-S!RMII0_TXEN!U1!F23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F30!\SAI3_LRCK |  DSM_AUD_RP_M1 |  ETH_RMII0_TXEN    |  GPIO2_B5_D\!!!!!!!!
-S!RMII0_RXDV_CRS!U1!G22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F30!\SAI3_MCLK |  --            |  ETH_RMII0_RXDVCRS |  GPIO2_C0_D\!!!!!!!!
-S!RMII0_TXD1!U1!F21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F30!\SAI3_SCLK |  DSM_AUD_RN_M1 |  ETH_RMII0_TXD1    |  GPIO2_B4_D\!!!!!!!!
-S!RMII0_MDC!U1!F22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F30!\SAI3_SDI  |  DSM_AUD_LN_M1 |  ETH_RMII0_MDC     |  GPIO2_B6_D\!!!!!!!!
-S!RMII0_MDIO!U1!G21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F30!\SAI3_SDO  |  DSM_AUD_LP_M1 |  ETH_RMII0_MDIO    |  GPIO2_B7_D\!!!!!!!!
-S!VDD_1V8!U1!1G14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15385\@\LIBRARY\.\SOC_RK3506BD.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F30!\VCCIO3_VCC\!!!!!!!!
-S!EMMC_CLK!U1!K21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F29!\--                |  SDMMC_CLK     |  GPIO3_A0_D\!!!!!!!!
-S!EMMC_CMD!U1!J21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F29!\--                |  SDMMC_CMD     |  GPIO3_A1_D\!!!!!!!!
-S!EMMC_D0!U1!K23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F29!\--                |  SDMMC_D0      |  GPIO3_A2_D\!!!!!!!!
-S!RMII1_CLK!U1!M23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F29!\ETH_RMII1_CLK     |  SAI2_SDO_M0   |  GPIO3_B0_D\!!!!!!!!
-S!RMII1_MDC!U1!P23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F29!\ETH_RMII1_MDC     |  UART5_TX_M0   |  GPIO3_B4_D\!!!!!!!!
-S!RMII1_MDIO!U1!P21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F29!\ETH_RMII1_MDIO    |  UART5_RTSN_M0 |  GPIO3_B5_D\!!!!!!!!
-S!RMII1_RXD0!U1!L22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F29!\ETH_RMII1_RXD0    |  SAI2_SDI_M0   |  GPIO3_A6_D\!!!!!!!!
-S!RMII1_RXD1!U1!M22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F29!\ETH_RMII1_RXD1    |  SAI2_SCLK_M0  |  GPIO3_A7_D\!!!!!!!!
-S!RMII1_RXDV_CRS!U1!R22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F29!\ETH_RMII1_RXDVCRS |  SAI2_MCLK_M0  |  GPIO3_B6_D\!!!!!!!!
-S!RMII1_TXD0!U1!M21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F29!\ETH_RMII1_TXD0    |  SAI2_LRCK_M0  |  GPIO3_B1_D\!!!!!!!!
-S!RMII1_TXD1!U1!N21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F29!\ETH_RMII1_TXD1    |  UART5_CTSN_M0 |  GPIO3_B2_D\!!!!!!!!
-S!RMII1_TXEN!U1!P22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F29!\ETH_RMII1_TXEN    |  UART5_RX_M0   |  GPIO3_B3_D\!!!!!!!!
-S!EMMC_D2!U1!H23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F29!\JTAG_TCK_M0       |  SDMMC_D2      |  GPIO3_A4_D\!!!!!!!!
-S!EMMC_D3!U1!H22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F29!\JTAG_TMS_M0       |  SDMMC_D3      |  GPIO3_A5_D\!!!!!!!!
-S!EMMC_D1!U1!K22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F29!\TEST_CLK_OUT      |  SDMMC_D1      |  GPIO3_A3_D\!!!!!!!!
-S!VDD_1V8!U1!1H14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15310\@\LIBRARY\.\SOC_RK3506BE.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F29!\VCCIO4_VCC\!!!!!!!!
-S!!U1!1B12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\ACODEC_ADC_AVDD1V6\!!!!!!!!
-S!!U1!1B13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\ACODEC_ADC_AVDD1V8\!!!!!!!!
-S!!U1!1A13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\ACODEC_ADC_AVSS\!!!!!!!!
-S!!U1!B19!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\ACODEC_ADC_INN\!!!!!!!!
-S!!U1!A19!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\ACODEC_ADC_INP\!!!!!!!!
-S!!U1!1B11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\ACODEC_ADC_VCM\!!!!!!!!
-S!!U1!1C7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\MIPI_DPHY_AVDD0V9\!!!!!!!!
-S!!U1!1B7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\MIPI_DPHY_AVDD1V8\!!!!!!!!
-S!!U1!B14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\MIPI_DPHY_DSI_TX_CLKN |  GPO4_A4_Z\!!!!!!!!
-S!!U1!B13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\MIPI_DPHY_DSI_TX_CLKP |  GPO4_A5_Z\!!!!!!!!
-S!!U1!A11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\MIPI_DPHY_DSI_TX_D0N  |  GPO4_A0_Z\!!!!!!!!
-S!!U1!B11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\MIPI_DPHY_DSI_TX_D0P  |  GPO4_A1_Z\!!!!!!!!
-S!!U1!B12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\MIPI_DPHY_DSI_TX_D1N  |  GPO4_A2_Z\!!!!!!!!
-S!!U1!A12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\MIPI_DPHY_DSI_TX_D1P  |  GPO4_A3_Z\!!!!!!!!
-S!!U1!1B14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\OTP_AVDD1V8 |  SARADC_AVDD1V8\!!!!!!!!
-S!!U1!A20!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\SARADC_IN0 |  GPIO4_B0_Z\!!!!!!!!
-S!!U1!B20!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\SARADC_IN1 |  GPIO4_B1_Z\!!!!!!!!
-S!!U1!A21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\SARADC_IN2 |  GPIO4_B2_Z\!!!!!!!!
-S!!U1!B21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\SARADC_IN3 |  GPIO4_B3_Z\!!!!!!!!
-S!!U1!1B6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\TSADC_VCC1V8\!!!!!!!!
-S!!U1!B16!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\USB20_OTG0_DM\!!!!!!!!
-S!!U1!A16!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\USB20_OTG0_DP\!!!!!!!!
-S!!U1!B17!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\USB20_OTG0_ID\!!!!!!!!
-S!!U1!B18!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\USB20_OTG0_VBUSDET\!!!!!!!!
-S!USB_OTG1_DM!U1!A15!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\USB20_OTG1_DM\!!!!!!!!
-S!USB_OTG1_DP!U1!B15!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\USB20_OTG1_DP\!!!!!!!!
-S!VDD_0V9!U1!1C8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\USB20_OTG_AVDD0V9\!!!!!!!!
-S!VDD_1V8!U1!1B9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\USB20_OTG_AVDD1V8\!!!!!!!!
-S!VDD_3V3!U1!1B10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15781\@\LIBRARY\.\SOC_RK3506BF.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F28!\USB20_OTG_AVDD3V3\!!!!!!!!
-S!VDD_CPU!U1!1C2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F27!\CPU_DVDD_0\!!!!!!!!
-S!VDD_CPU!U1!1C3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F27!\CPU_DVDD_1\!!!!!!!!
-S!VDD_CPU!U1!1C4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F27!\CPU_DVDD_2\!!!!!!!!
-S!VDD_0V9!U1!1E4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F27!\LOGIC_DVDD_0\!!!!!!!!
-S!VDD_0V9!U1!1E5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F27!\LOGIC_DVDD_1\!!!!!!!!
-S!VDD_0V9!U1!1E6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F27!\LOGIC_DVDD_2\!!!!!!!!
-S!VDD_0V9!U1!1F11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F27!\LOGIC_DVDD_3\!!!!!!!!
-S!VDD_0V9!U1!1G11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F27!\LOGIC_DVDD_4\!!!!!!!!
-S!VDD_0V9!U1!1H11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F27!\LOGIC_DVDD_5\!!!!!!!!
-S!VDD_0V9!U1!1J10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15156\@\LIBRARY\.\SOC_RK3506BG.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F27!\LOGIC_DVDD_6\!!!!!!!!
-S!DDR3_A12!U1!W23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR2_A0   |   DDR3_A12\!!!!!!!!
-S!DDR3_A3!U1!1N13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR2_A1   |    DDR3_A3\!!!!!!!!
-S!DDR3_BA0!U1!1N12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR2_A10  |   DDR3_BA0\!!!!!!!!
-S!DDR3_A11!U1!W22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR2_A11  |   DDR3_A11\!!!!!!!!
-S!DDR3_A9!U1!U22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR2_A12  |    DDR3_A9\!!!!!!!!
-S!DDR3_A13!U1!T23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR2_A13  |   DDR3_A13\!!!!!!!!
-S!DDR3_A14!U1!Y22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR2_A14  |   DDR3_A14\!!!!!!!!
-S!DDR3_A15!U1!Y17!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR2_A15  |   DDR3_A15\!!!!!!!!
-S!DDR3_A4!U1!W18!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR2_A2   |    DDR3_A4\!!!!!!!!
-S!DDR3_A0!U1!V23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR2_A3   |    DDR3_A0\!!!!!!!!
-S!DDR3_A1!U1!W20!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR2_A4   |    DDR3_A1\!!!!!!!!
-S!DDR3_A5!U1!1N14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR2_A5   |    DDR3_A5\!!!!!!!!
-S!DDR3_A6!U1!Y20!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR2_A6   |    DDR3_A6\!!!!!!!!
-S!DDR3_A2!U1!V22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR2_A7   |    DDR3_A2\!!!!!!!!
-S!DDR3_A8!U1!Y21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR2_A8   |    DDR3_A8\!!!!!!!!
-S!DDR3_A7!U1!T22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR2_A9   |    DDR3_A7\!!!!!!!!
-S!DDR3_CASN!U1!1N8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR2_BA0  |  DDR3_CASN\!!!!!!!!
-S!DDR3_WEN!U1!1M9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR2_BA1  |   DDR3_WEN\!!!!!!!!
-S!DDR3_BA2!U1!1N9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR2_BA2  |   DDR3_BA2\!!!!!!!!
-S!DDR3_BA1!U1!Y18!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR2_CASN |   DDR3_BA1\!!!!!!!!
-S!DDR3_A10!U1!W17!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR2_RASN |   DDR3_A10\!!!!!!!!
-S!DDR3_RASN!U1!1M8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR2_WEN  |  DDR3_RASN\!!!!!!!!
-S!DDR3_RST!U1!1M13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR3_RESET\!!!!!!!!
-S!DDR3_CKE!U1!W15!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_CKE\!!!!!!!!
-S!DDR3_CLKN!U1!W14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_CLKN\!!!!!!!!
-S!DDR3_CLKP!U1!Y14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_CLKP\!!!!!!!!
-S!DDR3_CSN!U1!1M11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_CSN\!!!!!!!!
-S!DDR_DM0!U1!1N4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_DM0\!!!!!!!!
-S!DDR_DM1!U1!1M4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_DM1\!!!!!!!!
-S!DDR_D0!U1!Y13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_DQ0\!!!!!!!!
-S!DDR_D10!U1!Y6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_DQ10\!!!!!!!!
-S!DDR_D11!U1!Y3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_DQ11\!!!!!!!!
-S!DDR_D12!U1!W6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_DQ12\!!!!!!!!
-S!DDR_D13!U1!Y2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_DQ13\!!!!!!!!
-S!DDR_D14!U1!1N1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_DQ14\!!!!!!!!
-S!DDR_D15!U1!1N2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_DQ15\!!!!!!!!
-S!DDR_D1!U1!Y12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_DQ1\!!!!!!!!
-S!DDR_D2!U1!Y11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_DQ2\!!!!!!!!
-S!DDR_D3!U1!1M6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_DQ3\!!!!!!!!
-S!DDR_D4!U1!1M5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_DQ4\!!!!!!!!
-S!DDR_D5!U1!1N6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_DQ5\!!!!!!!!
-S!DDR_D6!U1!W9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_DQ6\!!!!!!!!
-S!DDR_D7!U1!1N5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_DQ7\!!!!!!!!
-S!DDR_D8!U1!Y7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_DQ8\!!!!!!!!
-S!DDR_D9!U1!W7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_DQ9\!!!!!!!!
-S!DDR_DQS0N!U1!W10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_DQS0N\!!!!!!!!
-S!DDR_DQS0P!U1!Y10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_DQS0P\!!!!!!!!
-S!DDR_DQS1N!U1!W4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_DQS1N\!!!!!!!!
-S!DDR_DQS1P!U1!Y4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_DQS1P\!!!!!!!!
-S!DDR3_ODT!U1!1N10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_ODT\!!!!!!!!
-S!!U1!1L6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_OPEN0\!!!!!!!!
-S!!U1!1K5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_OPEN1\!!!!!!!!
-S!!U1!1L8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_RZQ\!!!!!!!!
-S!VCC_DDR!U1!1K6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_VDDQ_0\!!!!!!!!
-S!VCC_DDR!U1!1K7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_VDDQ_1\!!!!!!!!
-S!VCC_DDR!U1!1K8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_VDDQ_2\!!!!!!!!
-S!VCC_DDR!U1!1K9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_VDDQ_3\!!!!!!!!
-S!VCC_DDR!U1!1K10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_VDDQ_4\!!!!!!!!
-S!DDR_VREF_CA!U1!1L10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_VREF_CA\!!!!!!!!
-S!DDR_VREF_DQ!U1!1L11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS15564\@\LIBRARY\.\SOC_RK3506BH.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F26!\DDR_VREF_DQ\!!!!!!!!
-S!GND!U1!A1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_0\!!!!!!!!
-S!GND!U1!J3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_10\!!!!!!!!
-S!GND!U1!J22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_11\!!!!!!!!
-S!GND!U1!L3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_12\!!!!!!!!
-S!GND!U1!L21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_13\!!!!!!!!
-S!GND!U1!N22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_14\!!!!!!!!
-S!GND!U1!R21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_15\!!!!!!!!
-S!GND!U1!T21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_16\!!!!!!!!
-S!GND!U1!U21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_17\!!!!!!!!
-S!GND!U1!V21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_18\!!!!!!!!
-S!GND!U1!W3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_19\!!!!!!!!
-S!GND!U1!A13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_1\!!!!!!!!
-S!GND!U1!W5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_20\!!!!!!!!
-S!GND!U1!W8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_21\!!!!!!!!
-S!GND!U1!W11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_22\!!!!!!!!
-S!GND!U1!W12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_23\!!!!!!!!
-S!GND!U1!W13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_24\!!!!!!!!
-S!GND!U1!W16!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_25\!!!!!!!!
-S!GND!U1!W19!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_26\!!!!!!!!
-S!GND!U1!W21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_27\!!!!!!!!
-S!GND!U1!Y1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_28\!!!!!!!!
-S!GND!U1!Y9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_29\!!!!!!!!
-S!GND!U1!A17!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_2\!!!!!!!!
-S!GND!U1!Y15!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_30\!!!!!!!!
-S!GND!U1!Y23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_31\!!!!!!!!
-S!GND!U1!1A6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_32\!!!!!!!!
-S!GND!U1!1A7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_33\!!!!!!!!
-S!GND!U1!1A8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_34\!!!!!!!!
-S!GND!U1!1A9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_35\!!!!!!!!
-S!GND!U1!1A10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_36\!!!!!!!!
-S!GND!U1!1A11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_37\!!!!!!!!
-S!GND!U1!1A12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_38\!!!!!!!!
-S!GND!U1!1A14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_39\!!!!!!!!
-S!GND!U1!A23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_3\!!!!!!!!
-S!GND!U1!1B1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_40\!!!!!!!!
-S!GND!U1!1B2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_41\!!!!!!!!
-S!GND!U1!1B3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_42\!!!!!!!!
-S!GND!U1!1B4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_43\!!!!!!!!
-S!GND!U1!1B5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_44\!!!!!!!!
-S!GND!U1!1B8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_45\!!!!!!!!
-S!GND!U1!1C1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_46\!!!!!!!!
-S!GND!U1!1C5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_47\!!!!!!!!
-S!GND!U1!1C6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_48\!!!!!!!!
-S!GND!U1!1C9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_49\!!!!!!!!
-S!GND!U1!B4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_4\!!!!!!!!
-S!GND!U1!1C10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_50\!!!!!!!!
-S!GND!U1!1C11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_51\!!!!!!!!
-S!GND!U1!1C12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_52\!!!!!!!!
-S!GND!U1!1C13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_53\!!!!!!!!
-S!GND!U1!1C14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_54\!!!!!!!!
-S!GND!U1!1D1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_55\!!!!!!!!
-S!GND!U1!1D2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_56\!!!!!!!!
-S!GND!U1!1D3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_57\!!!!!!!!
-S!GND!U1!1D4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_58\!!!!!!!!
-S!GND!U1!1D5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_59\!!!!!!!!
-S!GND!U1!B6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_5\!!!!!!!!
-S!GND!U1!1D6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_60\!!!!!!!!
-S!GND!U1!1D7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_61\!!!!!!!!
-S!GND!U1!1D8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_62\!!!!!!!!
-S!GND!U1!1D9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_63\!!!!!!!!
-S!GND!U1!1D10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_64\!!!!!!!!
-S!GND!U1!1D11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_65\!!!!!!!!
-S!GND!U1!1D12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_66\!!!!!!!!
-S!GND!U1!1D13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_67\!!!!!!!!
-S!GND!U1!1D14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_68\!!!!!!!!
-S!GND!U1!1E1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_69\!!!!!!!!
-S!GND!U1!D2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_6\!!!!!!!!
-S!GND!U1!D22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_7\!!!!!!!!
-S!GND!U1!G2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_8\!!!!!!!!
-S!GND!U1!H21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14255\@\LIBRARY\.\SOC_RK3506BI.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F25!\VSS_9\!!!!!!!!
-S!GND!U1!1H6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_100\!!!!!!!!
-S!GND!U1!1H7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_101\!!!!!!!!
-S!GND!U1!1H8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_102\!!!!!!!!
-S!GND!U1!1H9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_103\!!!!!!!!
-S!GND!U1!1H10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_104\!!!!!!!!
-S!GND!U1!1H12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_105\!!!!!!!!
-S!GND!U1!1H13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_106\!!!!!!!!
-S!GND!U1!1J1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_107\!!!!!!!!
-S!GND!U1!1J2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_108\!!!!!!!!
-S!GND!U1!1J3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_109\!!!!!!!!
-S!GND!U1!1J4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_110\!!!!!!!!
-S!GND!U1!1J5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_111\!!!!!!!!
-S!GND!U1!1J6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_112\!!!!!!!!
-S!GND!U1!1J7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_113\!!!!!!!!
-S!GND!U1!1J8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_114\!!!!!!!!
-S!GND!U1!1J9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_115\!!!!!!!!
-S!GND!U1!1J11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_116\!!!!!!!!
-S!GND!U1!1J13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_117\!!!!!!!!
-S!GND!U1!1J14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_118\!!!!!!!!
-S!GND!U1!1K1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_119\!!!!!!!!
-S!GND!U1!1K4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_120\!!!!!!!!
-S!GND!U1!1K14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_121\!!!!!!!!
-S!GND!U1!1L2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_122\!!!!!!!!
-S!GND!U1!1L3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_123\!!!!!!!!
-S!GND!U1!1L4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_124\!!!!!!!!
-S!GND!U1!1L5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_125\!!!!!!!!
-S!GND!U1!1L7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_126\!!!!!!!!
-S!GND!U1!1L9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_127\!!!!!!!!
-S!GND!U1!1L14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_128\!!!!!!!!
-S!GND!U1!1M1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_129\!!!!!!!!
-S!GND!U1!1M2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_130\!!!!!!!!
-S!GND!U1!1M3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_131\!!!!!!!!
-S!GND!U1!1M7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_132\!!!!!!!!
-S!GND!U1!1M10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_133\!!!!!!!!
-S!GND!U1!1M12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_134\!!!!!!!!
-S!GND!U1!1M14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_135\!!!!!!!!
-S!GND!U1!1N3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_136\!!!!!!!!
-S!GND!U1!1N7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_137\!!!!!!!!
-S!GND!U1!1N11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_138\!!!!!!!!
-S!GND!U1!1E2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_70\!!!!!!!!
-S!GND!U1!1E12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_71\!!!!!!!!
-S!GND!U1!1E13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_72\!!!!!!!!
-S!GND!U1!1E14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_73\!!!!!!!!
-S!GND!U1!1F1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_74\!!!!!!!!
-S!GND!U1!1F2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_75\!!!!!!!!
-S!GND!U1!1F4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_76\!!!!!!!!
-S!GND!U1!1F5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_77\!!!!!!!!
-S!GND!U1!1F6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_78\!!!!!!!!
-S!GND!U1!1F7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_79\!!!!!!!!
-S!GND!U1!1F8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_80\!!!!!!!!
-S!GND!U1!1F9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_81\!!!!!!!!
-S!GND!U1!1F10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_82\!!!!!!!!
-S!GND!U1!1F12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_83\!!!!!!!!
-S!GND!U1!1F13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_84\!!!!!!!!
-S!GND!U1!1G1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_85\!!!!!!!!
-S!GND!U1!1G3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_86\!!!!!!!!
-S!GND!U1!1G4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_87\!!!!!!!!
-S!GND!U1!1G5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_88\!!!!!!!!
-S!GND!U1!1G6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_89\!!!!!!!!
-S!GND!U1!1G7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_90\!!!!!!!!
-S!GND!U1!1G8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_91\!!!!!!!!
-S!GND!U1!1G9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_92\!!!!!!!!
-S!GND!U1!1G10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_93\!!!!!!!!
-S!GND!U1!1G12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_94\!!!!!!!!
-S!GND!U1!1G13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_95\!!!!!!!!
-S!GND!U1!1H2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_96\!!!!!!!!
-S!GND!U1!1H3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_97\!!!!!!!!
-S!GND!U1!1H4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_98\!!!!!!!!
-S!GND!U1!1H5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS14712\@\LIBRARY\.\SOC_RK3506BJ.Normal\(chips)!SOC_RK3506B_BGA333_13R30X11R30X1R25__SOC_RK3506B!!!F24!\VSS_99\!!!!!!!!
-S!RMII1_RXDV_CRS!U17!11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F16!\CRS_DV/*MODE2\!!!!!!!!
-S!GND!U17!25!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F16!\EPAD\!!!!!!!!
-S!N16785482!U17!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F16!\LED1/*REGOFF\!!!!!!!!
-S!N16785446!U17!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F16!\LED2/*NINTSEL\!!!!!!!!
-S!RMII1_MDC!U17!13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F16!\MDC\!!!!!!!!
-S!RMII1_MDIO!U17!12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F16!\MDIO\!!!!!!!!
-S!RMII1_CLK!U17!14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F16!\NINT/REFCLKO\!!!!!!!!
-S!RMII1_RST!U17!15!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F16!\NRST\!!!!!!!!
-S!N16785007!U17!24!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F16!\RBIAS\!!!!!!!!
-S!RMII1_TXD0!U17!8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F16!\RXD0/*MODE0\!!!!!!!!
-S!RMII1_TXD1!U17!7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F16!\RXD1/*MODE1\!!!!!!!!
-S!!U17!10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F16!\RXER/*PHYAD0\!!!!!!!!
-S!!U17!22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F16!\RXN\!!!!!!!!
-S!!U17!23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F16!\RXP\!!!!!!!!
-S!RMII1_TXD0!U17!17!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F16!\TXD0\!!!!!!!!
-S!RMII1_TXD1!U17!18!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F16!\TXD1\!!!!!!!!
-S!RMII1_TXEN!U17!16!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F16!\TXEN\!!!!!!!!
-S!!U17!20!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F16!\TXN\!!!!!!!!
-S!!U17!21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F16!\TXP\!!!!!!!!
-S!ETH_CLK1_25M_OUT!U17!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F16!\XTAL1/CLKIN\!!!!!!!!
-S!!U17!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71204\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F16!\XTAL2\!!!!!!!!
-S!VDDA_RMII1!U17!19!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71271\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F15!\VDD1A\!!!!!!!!
-S!VDDA_RMII1!U17!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71271\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F15!\VDD2A\!!!!!!!!
-S!VDDCR_RMII1!U17!6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71271\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F15!\VDDCR\!!!!!!!!
-S!VDDIO_RMII1!U17!9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71271\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F15!\VDDIO\!!!!!!!!
-S!RMII0_RXDV_CRS!U18!11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F14!\CRS_DV/*MODE2\!!!!!!!!
-S!GND!U18!25!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F14!\EPAD\!!!!!!!!
-S!N16786362!U18!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F14!\LED1/*REGOFF\!!!!!!!!
-S!N16786382!U18!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F14!\LED2/*NINTSEL\!!!!!!!!
-S!RMII0_MDC!U18!13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F14!\MDC\!!!!!!!!
-S!RMII0_MDIO!U18!12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F14!\MDIO\!!!!!!!!
-S!RMII0_CLK!U18!14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F14!\NINT/REFCLKO\!!!!!!!!
-S!RMII0_RST!U18!15!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F14!\NRST\!!!!!!!!
-S!N16785709!U18!24!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F14!\RBIAS\!!!!!!!!
-S!RMII0_TXD0!U18!8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F14!\RXD0/*MODE0\!!!!!!!!
-S!RMII0_TXD1!U18!7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F14!\RXD1/*MODE1\!!!!!!!!
-S!N16786486!U18!10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F14!\RXER/*PHYAD0\!!!!!!!!
-S!!U18!22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F14!\RXN\!!!!!!!!
-S!!U18!23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F14!\RXP\!!!!!!!!
-S!RMII0_TXD0!U18!17!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F14!\TXD0\!!!!!!!!
-S!RMII0_TXD1!U18!18!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F14!\TXD1\!!!!!!!!
-S!RMII0_TXEN!U18!16!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F14!\TXEN\!!!!!!!!
-S!!U18!20!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F14!\TXN\!!!!!!!!
-S!!U18!21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F14!\TXP\!!!!!!!!
-S!ETH_CLK0_25M_OUT!U18!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F14!\XTAL1/CLKIN\!!!!!!!!
-S!!U18!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71409\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F14!\XTAL2\!!!!!!!!
-S!VDDA_RMII0!U18!19!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71476\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F13!\VDD1A\!!!!!!!!
-S!VDDA_RMII0!U18!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71476\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F13!\VDD2A\!!!!!!!!
-S!VDDCR_RMII0!U18!6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71476\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F13!\VDDCR\!!!!!!!!
-S!VDDIO_RMII0!U18!9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS71476\@d.s(v)!LAN8720A-CP-ABC_QFN24-6X6_MC_MCH_LAN8720A-CP-ABC!!!F13!\VDDIO\!!!!!!!!
-S!GND!U9!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F7!\GND#1\!!!!!!!!
-S!GND!U9!34!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F7!\GND#34\!!!!!!!!
-S!GND!U9!35!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F7!\GND#35\!!!!!!!!
-S!GND!U9!37!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F7!\GND#37\!!!!!!!!
-S!GND!U9!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F7!\GND#3\!!!!!!!!
-S!GND!U9!41!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F7!\GND#41\!!!!!!!!
-S!GND!U9!43!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F7!\GND#43\!!!!!!!!
-S!GND!U9!45!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F7!\GND#45\!!!!!!!!
-S!GND!U9!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F7!\GND#4\!!!!!!!!
-S!VDD_GNSS!U9!23!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F7!\VCC#23\!!!!!!!!
-S!VDD_GNSS!U9!24!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F7!\VCC#24\!!!!!!!!
-S!V_BCKP!U9!5!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52680\@\QF_IC\.\K922A.Normal\(chips)!K922_K922_K922!!!F7!\V_BCKP\!!!!!!!!
-S!GNSS_COM1_RX!U9!17!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!F6!\COM1_RXD\!!!!!!!!
-S!GNSS_COM1_TX!U9!18!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!F6!\COM1_TXD\!!!!!!!!
-S!GNSS_COM2_RX!U9!19!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!F6!\COM2_RXD\!!!!!!!!
-S!GNSS_COM2_TX!U9!20!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!F6!\COM2_TXD\!!!!!!!!
-S!GNSS_COM3_RX!U9!28!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!F6!\COM3_RXD/CAN_RXD\!!!!!!!!
-S!GNSS_COM3_TX!U9!27!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!F6!\COM3_TXD/CAN_TXD\!!!!!!!!
-S!!U9!21!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!F6!\I2C_SCL\!!!!!!!!
-S!!U9!22!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!F6!\I2C_SDA\!!!!!!!!
-S!!U9!8!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!F6!\SPI_CLK\!!!!!!!!
-S!!U9!6!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!F6!\SPI_CS\!!!!!!!!
-S!!U9!9!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!F6!\SPI_MISO\!!!!!!!!
-S!!U9!7!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52780\@\QF_IC\.\K922B.Normal\(chips)!K922_K922_K922!!!F6!\SPI_MOSI\!!!!!!!!
-S!!U9!14!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52850\@\QF_IC\.\K922C.Normal\(chips)!K922_K922_K922!!!F5!\ERR_STAT\!!!!!!!!
-S!!U9!32!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52850\@\QF_IC\.\K922C.Normal\(chips)!K922_K922_K922!!!F5!\EVENT\!!!!!!!!
-S!PPS!U9!30!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52850\@\QF_IC\.\K922C.Normal\(chips)!K922_K922_K922!!!F5!\PPS\!!!!!!!!
-S!!U9!15!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52850\@\QF_IC\.\K922C.Normal\(chips)!K922_K922_K922!!!F5!\PVT_STAT\!!!!!!!!
-S!!U9!16!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52850\@\QF_IC\.\K922C.Normal\(chips)!K922_K922_K922!!!F5!\RTK_STAT\!!!!!!!!
-S!!U9!33!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52850\@\QF_IC\.\K922C.Normal\(chips)!K922_K922_K922!!!F5!\SYS_RSTN\!!!!!!!!
-S!ANT2!U9!36!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52892\@\QF_IC\.\K922D.Normal\(chips)!K922_K922_K922!!!F4!\ANT_IN_HEAD\!!!!!!!!
-S!ANT1!U9!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS52892\@\QF_IC\.\K922D.Normal\(chips)!K922_K922_K922!!!F4!\ANT_IN_POS\!!!!!!!!
-S!GND!U9!58!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP10\!!!!!!!!
-S!GND!U9!59!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP11\!!!!!!!!
-S!GND!U9!60!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP12\!!!!!!!!
-S!GND!U9!61!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP13\!!!!!!!!
-S!GND!U9!62!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP14\!!!!!!!!
-S!GND!U9!63!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP15\!!!!!!!!
-S!GND!U9!64!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP16\!!!!!!!!
-S!GND!U9!65!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP17\!!!!!!!!
-S!GND!U9!66!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP18\!!!!!!!!
-S!GND!U9!67!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP19\!!!!!!!!
-S!GND!U9!49!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP1\!!!!!!!!
-S!GND!U9!68!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP20\!!!!!!!!
-S!GND!U9!69!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP21\!!!!!!!!
-S!GND!U9!70!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP22\!!!!!!!!
-S!GND!U9!71!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP23\!!!!!!!!
-S!GND!U9!72!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP24\!!!!!!!!
-S!GND!U9!73!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP25\!!!!!!!!
-S!GND!U9!74!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP26\!!!!!!!!
-S!GND!U9!75!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP27\!!!!!!!!
-S!GND!U9!76!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP28\!!!!!!!!
-S!GND!U9!77!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP29\!!!!!!!!
-S!GND!U9!50!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP2\!!!!!!!!
-S!GND!U9!78!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP30\!!!!!!!!
-S!GND!U9!79!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP31\!!!!!!!!
-S!GND!U9!80!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP32\!!!!!!!!
-S!GND!U9!81!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP33\!!!!!!!!
-S!GND!U9!82!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP34\!!!!!!!!
-S!GND!U9!83!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP35\!!!!!!!!
-S!GND!U9!51!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP3\!!!!!!!!
-S!GND!U9!52!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP4\!!!!!!!!
-S!GND!U9!53!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP5\!!!!!!!!
-S!GND!U9!54!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP6\!!!!!!!!
-S!GND!U9!55!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP7\!!!!!!!!
-S!GND!U9!56!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP8\!!!!!!!!
-S!GND!U9!57!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\EP9\!!!!!!!!
-S!!U9!40!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\RSV10\!!!!!!!!
-S!!U9!42!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\RSV11\!!!!!!!!
-S!!U9!44!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\RSV12\!!!!!!!!
-S!!U9!46!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\RSV13\!!!!!!!!
-S!!U9!47!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\RSV14\!!!!!!!!
-S!!U9!48!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\RSV15\!!!!!!!!
-S!!U9!31!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\RSV16\!!!!!!!!
-S!!U9!10!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\RSV1\!!!!!!!!
-S!!U9!11!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\RSV2\!!!!!!!!
-S!!U9!12!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\RSV3\!!!!!!!!
-S!!U9!13!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\RSV4\!!!!!!!!
-S!!U9!25!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\RSV5\!!!!!!!!
-S!!U9!26!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\RSV6\!!!!!!!!
-S!!U9!29!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\RSV7\!!!!!!!!
-S!!U9!38!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\RSV8\!!!!!!!!
-S!!U9!39!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS53122\@\QF_IC\.\K922E.Normal\(chips)!K922_K922_K922!!!F3!\RSV9\!!!!!!!!
-S!GND!X1!2!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19052\@\OTHER\.\CRYSTAL 1-3_4Pin.Normal\(chips)!CRYSTAL 1-3_4PIN_XTAL3225_CRYSTAL 1-3_4PIN!!!F2!\GND#2\!!!!!!!!
-S!GND!X1!4!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19052\@\OTHER\.\CRYSTAL 1-3_4Pin.Normal\(chips)!CRYSTAL 1-3_4PIN_XTAL3225_CRYSTAL 1-3_4PIN!!!F2!\GND#4\!!!!!!!!
-S!N19188!X1!1!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19052\@\OTHER\.\CRYSTAL 1-3_4Pin.Normal\(chips)!CRYSTAL 1-3_4PIN_XTAL3225_CRYSTAL 1-3_4PIN!!!F2!\X1\!!!!!!!!
-S!N19203!X1!3!@\RK3506_NAV\.\SCHEMATIC1\(sch_1):\INS19052\@\OTHER\.\CRYSTAL 1-3_4Pin.Normal\(chips)!CRYSTAL 1-3_4PIN_XTAL3225_CRYSTAL 1-3_4PIN!!!F2!\X3\!!!!!!!!
diff --git a/allegro/pstdedb.cdsz b/allegro/pstdedb.cdsz
deleted file mode 100644
index cedad0b..0000000
Binary files a/allegro/pstdedb.cdsz and /dev/null differ
diff --git a/allegro/rk3506_nav_rk3506_nav.json b/allegro/rk3506_nav_rk3506_nav.json
deleted file mode 100644
index 18210b3..0000000
--- a/allegro/rk3506_nav_rk3506_nav.json
+++ /dev/null
@@ -1,301 +0,0 @@
-{
-	"Gate Swap" : [],
-	"Ref Des" : [],
-	"Pin Swap" : [],
-	"Component Property" : [],
-	"Net Property" : [],
-	"Pin Property" : [],
-	"Component" : [],
-	"Net" : [
-		{
-			"Name" : "GNSS_COM1_TX",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\GNSS_COM1_TX\\",
-			"Logical" : null,
-			"Physical" : "GNSS_COM1_TX"
-		},
-		{
-			"Name" : "GNSS_COM3_RX",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\GNSS_COM3_RX\\",
-			"Logical" : null,
-			"Physical" : "GNSS_COM3_RX"
-		},
-		{
-			"Name" : "GNSS_COM1_RX",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\GNSS_COM1_RX\\",
-			"Logical" : null,
-			"Physical" : "GNSS_COM1_RX"
-		},
-		{
-			"Name" : "GNSS_COM2_RX",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\GNSS_COM2_RX\\",
-			"Logical" : null,
-			"Physical" : "GNSS_COM2_RX"
-		},
-		{
-			"Name" : "GNSS_COM3_TX",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\GNSS_COM3_TX\\",
-			"Logical" : null,
-			"Physical" : "GNSS_COM3_TX"
-		},
-		{
-			"Name" : "GNSS_COM2_TX",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\GNSS_COM2_TX\\",
-			"Logical" : null,
-			"Physical" : "GNSS_COM2_TX"
-		},
-		{
-			"Name" : "DEBUG_TXD",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\DEBUG_TXD\\",
-			"Logical" : "DEBUG_TXD",
-			"Physical" : null
-		},
-		{
-			"Name" : "DEBUG_RXD",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\DEBUG_RXD\\",
-			"Logical" : "DEBUG_RXD",
-			"Physical" : null
-		},
-		{
-			"Name" : "GNSS_COM3_TXD",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\GNSS_COM3_TXD\\",
-			"Logical" : "GNSS_COM3_TXD",
-			"Physical" : null
-		},
-		{
-			"Name" : "GNSS_COM3_RXD",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\GNSS_COM3_RXD\\",
-			"Logical" : "GNSS_COM3_RXD",
-			"Physical" : null
-		},
-		{
-			"Name" : "UART2_RXD",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\UART2_RXD\\",
-			"Logical" : "UART2_RXD",
-			"Physical" : null
-		},
-		{
-			"Name" : "UART3_TXD",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\UART3_TXD\\",
-			"Logical" : "UART3_TXD",
-			"Physical" : null
-		},
-		{
-			"Name" : "UART3_RXD",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\UART3_RXD\\",
-			"Logical" : "UART3_RXD",
-			"Physical" : null
-		},
-		{
-			"Name" : "UART2_TXD",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\UART2_TXD\\",
-			"Logical" : "UART2_TXD",
-			"Physical" : null
-		},
-		{
-			"Name" : "UART4_TXD",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\UART4_TXD\\",
-			"Logical" : "UART4_TXD",
-			"Physical" : null
-		},
-		{
-			"Name" : "UART4_RXD",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\UART4_RXD\\",
-			"Logical" : "UART4_RXD",
-			"Physical" : null
-		},
-		{
-			"Name" : "UART5_TXD",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\UART5_TXD\\",
-			"Logical" : "UART5_TXD",
-			"Physical" : null
-		},
-		{
-			"Name" : "UART5_RXD",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\UART5_RXD\\",
-			"Logical" : "UART5_RXD",
-			"Physical" : null
-		},
-		{
-			"Name" : "CAN0_TXD",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\CAN0_TXD\\",
-			"Logical" : "CAN0_TXD",
-			"Physical" : null
-		},
-		{
-			"Name" : "CAN0_RXD",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\CAN0_RXD\\",
-			"Logical" : "CAN0_RXD",
-			"Physical" : null
-		},
-		{
-			"Name" : "CAN1_TXD",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\CAN1_TXD\\",
-			"Logical" : "CAN1_TXD",
-			"Physical" : null
-		},
-		{
-			"Name" : "CAN1_RXD",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\CAN1_RXD\\",
-			"Logical" : "CAN1_RXD",
-			"Physical" : null
-		},
-		{
-			"Name" : "UART1_RXD",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\UART1_RXD\\",
-			"Logical" : "UART1_RXD",
-			"Physical" : null
-		},
-		{
-			"Name" : "UART1_TXD",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\UART1_TXD\\",
-			"Logical" : "UART1_TXD",
-			"Physical" : null
-		}
-	],
-	"Connection" : [
-		{
-			"Name" : "U1.L2",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS13961\\@\\LIBRARY\\.\\SOC_RK3506BA.Normal\\(chips):\\RM_IO19 |  SPI0_CSN0    |  ETH_CLK1_25M_OUT |  GPIO0_C3_D\\",
-			"Logical" : "ETH_CLK1_25M_OUT",
-			"Physical" : "NC"
-		},
-		{
-			"Name" : "U1.J2",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS13961\\@\\LIBRARY\\.\\SOC_RK3506BA.Normal\\(chips):\\RM_IO22 |  JTAG_TCK_M1  |  UART0_TX         |  GPIO0_C6_U\\",
-			"Logical" : "DEBUG_TXD",
-			"Physical" : "NC"
-		},
-		{
-			"Name" : "U1.J1",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS13961\\@\\LIBRARY\\.\\SOC_RK3506BA.Normal\\(chips):\\RM_IO23 |  JTAG_TMS_M1  |  UART0_RX         |  GPIO0_C7_U\\",
-			"Logical" : "DEBUG_RXD",
-			"Physical" : "NC"
-		},
-		{
-			"Name" : "U1.V3",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS13961\\@\\LIBRARY\\.\\SOC_RK3506BA.Normal\\(chips):\\RM_IO0  |  --           |  SAI0_LRCK        |  GPIO0_A0_U\\",
-			"Logical" : "UART2_RXD",
-			"Physical" : "NC"
-		},
-		{
-			"Name" : "U1.N3",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS13961\\@\\LIBRARY\\.\\SOC_RK3506BA.Normal\\(chips):\\RM_IO14 |  SPI1_CSN0    |  SAI1_SDO2        |  GPIO0_B6_D\\",
-			"Logical" : "UART3_TXD",
-			"Physical" : "NC"
-		},
-		{
-			"Name" : "U1.N2",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS13961\\@\\LIBRARY\\.\\SOC_RK3506BA.Normal\\(chips):\\RM_IO15 |  SPI0_CSN1    |  SAI1_SDO3        |  GPIO0_B7_D\\",
-			"Logical" : "UART3_RXD",
-			"Physical" : "NC"
-		},
-		{
-			"Name" : "U1.W2",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS13961\\@\\LIBRARY\\.\\SOC_RK3506BA.Normal\\(chips):\\RM_IO2  |  --           |  SAI0_MCLK        |  GPIO0_A2_U\\",
-			"Logical" : "UART2_TXD",
-			"Physical" : "NC"
-		},
-		{
-			"Name" : "U1.W1",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS13961\\@\\LIBRARY\\.\\SOC_RK3506BA.Normal\\(chips):\\RM_IO1  |  --           |  SAI0_SCLK        |  GPIO0_A1_D\\",
-			"Logical" : "UART4_TXD",
-			"Physical" : "NC"
-		},
-		{
-			"Name" : "U1.V2",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS13961\\@\\LIBRARY\\.\\SOC_RK3506BA.Normal\\(chips):\\RM_IO3  |  --           |  SAI0_SDO         |  GPIO0_A3_D\\",
-			"Logical" : "UART4_RXD",
-			"Physical" : "NC"
-		},
-		{
-			"Name" : "U1.R1",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS13961\\@\\LIBRARY\\.\\SOC_RK3506BA.Normal\\(chips):\\RM_IO9  |  SPI1_MOSI    |  SAI1_SCLK        |  GPIO0_B1_D\\",
-			"Logical" : "CAN0_TXD",
-			"Physical" : "NC"
-		},
-		{
-			"Name" : "U1.R3",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS13961\\@\\LIBRARY\\.\\SOC_RK3506BA.Normal\\(chips):\\RM_IO10 |  SPI1_MISO    |  SAI1_LRCK        |  GPIO0_B2_D\\",
-			"Logical" : "CAN0_RXD",
-			"Physical" : "NC"
-		},
-		{
-			"Name" : "U1.P2",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS13961\\@\\LIBRARY\\.\\SOC_RK3506BA.Normal\\(chips):\\RM_IO11 |  --           |  SAI1_SDI         |  GPIO0_B3_D\\",
-			"Logical" : "CAN1_TXD",
-			"Physical" : "NC"
-		},
-		{
-			"Name" : "U1.P3",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS13961\\@\\LIBRARY\\.\\SOC_RK3506BA.Normal\\(chips):\\RM_IO12 |  --           |  SAI1_SDO0        |  GPIO0_B4_D\\",
-			"Logical" : "CAN1_RXD",
-			"Physical" : "NC"
-		},
-		{
-			"Name" : "U1.M2",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS13961\\@\\LIBRARY\\.\\SOC_RK3506BA.Normal\\(chips):\\RM_IO16 |  SPI0_CLK     |  --               |  GPIO0_C0_D\\",
-			"Logical" : "UART1_RXD",
-			"Physical" : "NC"
-		},
-		{
-			"Name" : "U1.M3",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS13961\\@\\LIBRARY\\.\\SOC_RK3506BA.Normal\\(chips):\\RM_IO17 |  SPI0_MOSI    |  --               |  GPIO0_C1_D\\",
-			"Logical" : "UART1_TXD",
-			"Physical" : "NC"
-		},
-		{
-			"Name" : "U1.K2",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS13961\\@\\LIBRARY\\.\\SOC_RK3506BA.Normal\\(chips):\\RM_IO20 |  AUPLL_CLK_IN |  ETH_CLK0_25M_OUT |  GPIO0_C4_D\\",
-			"Logical" : "ETH_CLK0_25M_OUT",
-			"Physical" : "NC"
-		},
-		{
-			"Name" : "U1.F2",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS16006\\@\\LIBRARY\\.\\SOC_RK3506BB.Normal\\(chips):\\DSMC_SLV_CSN0 |  RM_IO30 |  UART5_TX_M1   |  --              |  --            |  FLEXBUS0_D1  |  DSMC_CSN2   |  VO_LCDC_D1    |  GPIO1_D2_D\\",
-			"Logical" : "UART5_TXD",
-			"Physical" : "NC"
-		},
-		{
-			"Name" : "U1.G3",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS16006\\@\\LIBRARY\\.\\SOC_RK3506BB.Normal\\(chips):\\DSMC_SLV_RDYN |  RM_IO31 |  UART5_RX_M1   |  --              |  --            |  FLEXBUS0_D0  |  DSMC_CSN3   |  VO_LCDC_D0    |  GPIO1_D3_D\\",
-			"Logical" : "UART5_RXD",
-			"Physical" : "NC"
-		},
-		{
-			"Name" : "U9.27",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS52780\\@\\QF_IC\\.\\K922B.Normal\\(chips):\\COM3_TXD\/CAN_TXD\\",
-			"Logical" : "GNSS_COM3_TXD",
-			"Physical" : "GNSS_COM3_TX"
-		},
-		{
-			"Name" : "U9.28",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS52780\\@\\QF_IC\\.\\K922B.Normal\\(chips):\\COM3_RXD\/CAN_RXD\\",
-			"Logical" : "GNSS_COM3_RXD",
-			"Physical" : "GNSS_COM3_RX"
-		},
-		{
-			"Name" : "U9.20",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS52780\\@\\QF_IC\\.\\K922B.Normal\\(chips):\\COM2_TXD\\",
-			"Logical" : "UART2_RXD",
-			"Physical" : "GNSS_COM2_TX"
-		},
-		{
-			"Name" : "U9.19",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS52780\\@\\QF_IC\\.\\K922B.Normal\\(chips):\\COM2_RXD\\",
-			"Logical" : "UART2_TXD",
-			"Physical" : "GNSS_COM2_RX"
-		},
-		{
-			"Name" : "U9.18",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS52780\\@\\QF_IC\\.\\K922B.Normal\\(chips):\\COM1_TXD\\",
-			"Logical" : "UART1_RXD",
-			"Physical" : "GNSS_COM1_TX"
-		},
-		{
-			"Name" : "U9.17",
-			"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS52780\\@\\QF_IC\\.\\K922B.Normal\\(chips):\\COM1_RXD\\",
-			"Logical" : "UART1_TXD",
-			"Physical" : "GNSS_COM1_RX"
-		}
-	]
-}
diff --git a/rk3506_nav.brd b/rk3506_nav.brd
index 1cc127b..6ca09d7 100644
Binary files a/rk3506_nav.brd and b/rk3506_nav.brd differ