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rk3506_nav/allegro/rk3506_nav_rk3506_nav.json
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{
"Gate Swap" : [],
"Ref Des" : [],
"Pin Swap" : [],
"Component Property" : [],
"Net Property" : [],
"Pin Property" : [],
"Component" : [
{
"Name" : "J2",
"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS60593\\@\\QF_ANT\\.\\MMCX-180.Normal\\(chips)",
"Logical" : "J2",
"Physical" : null
},
{
"Name" : "J3",
"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS60619\\@\\QF_ANT\\.\\MMCX-180.Normal\\(chips)",
"Logical" : "J3",
"Physical" : null
}
],
"Net" : [],
"Connection" : [
{
"Name" : "J2.3",
"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS60593\\@\\QF_ANT\\.\\MMCX-180.Normal\\(chips):\\GND#3\\",
"Logical" : "GND",
"Physical" : null
},
{
"Name" : "J2.4",
"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS60593\\@\\QF_ANT\\.\\MMCX-180.Normal\\(chips):\\GND#4\\",
"Logical" : "GND",
"Physical" : null
},
{
"Name" : "J2.2",
"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS60593\\@\\QF_ANT\\.\\MMCX-180.Normal\\(chips):\\GND#2\\",
"Logical" : "GND",
"Physical" : null
},
{
"Name" : "J2.5",
"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS60593\\@\\QF_ANT\\.\\MMCX-180.Normal\\(chips):\\GND#5\\",
"Logical" : "GND",
"Physical" : null
},
{
"Name" : "J3.2",
"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS60619\\@\\QF_ANT\\.\\MMCX-180.Normal\\(chips):\\GND#2\\",
"Logical" : "GND",
"Physical" : null
},
{
"Name" : "J3.3",
"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS60619\\@\\QF_ANT\\.\\MMCX-180.Normal\\(chips):\\GND#3\\",
"Logical" : "GND",
"Physical" : null
},
{
"Name" : "J3.4",
"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS60619\\@\\QF_ANT\\.\\MMCX-180.Normal\\(chips):\\GND#4\\",
"Logical" : "GND",
"Physical" : null
},
{
"Name" : "J3.5",
"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS60619\\@\\QF_ANT\\.\\MMCX-180.Normal\\(chips):\\GND#5\\",
"Logical" : "GND",
"Physical" : null
}
]
}