Files
rk3506_nav/allegro/rk3506_nav_rk3506_nav.json
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2026-08-16 22:54:44 +08:00

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{
"Gate Swap" : [],
"Ref Des" : [],
"Pin Swap" : [],
"Component Property" : [],
"Net Property" : [],
"Pin Property" : [],
"Component" : [
{
"Name" : "U20",
"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS16795323\\@\\QF_IC\\.\\CH334P.Normal\\(chips)",
"Logical" : "U20",
"Physical" : null
}
],
"Net" : [
{
"Name" : "VDD33",
"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\VDD33\\",
"Logical" : "VDD33",
"Physical" : null
},
{
"Name" : "EP",
"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\EP\\",
"Logical" : "EP",
"Physical" : null
},
{
"Name" : "V5",
"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\V5\\",
"Logical" : "V5",
"Physical" : null
}
],
"Connection" : [
{
"Name" : "U20.16",
"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS16795323\\@\\QF_IC\\.\\CH334P.Normal\\(chips):\\VDD33\\",
"Logical" : "VDD33",
"Physical" : null
},
{
"Name" : "U20.17",
"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS16795323\\@\\QF_IC\\.\\CH334P.Normal\\(chips):\\EP\\",
"Logical" : "EP",
"Physical" : null
},
{
"Name" : "U20.15",
"C_PATH" : "@\\RK3506_NAV\\.\\SCHEMATIC1\\(sch_1):\\INS16795323\\@\\QF_IC\\.\\CH334P.Normal\\(chips):\\V5\\",
"Logical" : "V5",
"Physical" : null
}
]
}