diff --git a/CONNECTOR.SchDoc b/CONNECTOR.SchDoc index fcb6c45..cf98ce8 100644 Binary files a/CONNECTOR.SchDoc and b/CONNECTOR.SchDoc differ diff --git a/PCB1.PcbDoc b/PCB1.PcbDoc index a0f01be..65720af 100644 Binary files a/PCB1.PcbDoc and b/PCB1.PcbDoc differ diff --git a/Project Outputs for rk3506_hw/Design Rule Check - PCB1.html b/Project Outputs for rk3506_hw/Design Rule Check - PCB1.html new file mode 100644 index 0000000..17a19c7 --- /dev/null +++ b/Project Outputs for rk3506_hw/Design Rule Check - PCB1.html @@ -0,0 +1,336 @@ + + + +Design Rule Verification Report + +Altium

Design Rule Verification Report

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Date:2026/7/16
Time:21:12:25
Elapsed Time:00:00:00
Filename:C:\Project\polaris\rk3506_hw\PCB1.PcbDoc
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Warnings:0
Rule Violations:0
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Summary

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WarningsCount
Total0

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Rule ViolationsCount
Clearance Constraint (Gap=10mil) (InNetClass('Signal')),(InNetClass('Signal'))0
Clearance Constraint (Gap=7mil) (All),(All)0
Short-Circuit Constraint (Allowed=No) (All),(All)0
Un-Routed Net Constraint ( (All) )0
Modified Polygon (Allow modified: No), (Allow shelved: No)0
Width Constraint (Min=5.9mil) (Max=6.2mil) (Preferred=5.9mil) (InNetClass('Signal'))0
Width Constraint (Min=8mil) (Max=50mil) (Preferred=10mil) (InNetClass('PWR'))0
Routing Topology Rule(Topology=Shortest) (All)0
Power Plane Connect Rule(Direct Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All)0
Hole Size Constraint (Min=1mil) (Max=2000mil) (All)0
Hole To Hole Clearance (Gap=0mil) (All),(All)0
Minimum Solder Mask Sliver (Gap=0mil) (All),(All)0
Silk To Solder Mask (Clearance=0mil) (IsPad),(All)0
Silk to Silk (Clearance=10mil) (All),(All)0
Net Antennae (Tolerance=0mil) (All)0
Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All)0
Total0

+ diff --git a/rk3506_hw.PrjPcb b/rk3506_hw.PrjPcb index b41d1c2..4a3efe5 100644 --- a/rk3506_hw.PrjPcb +++ b/rk3506_hw.PrjPcb @@ -185,6 +185,10 @@ DItemRevisionGUID= GenerateClassCluster=0 DocumentUniqueId=YUQERTMM +[GeneratedDocument1] +DocumentPath=Project Outputs for rk3506_hw\Design Rule Check - PCB1.html +DItemRevisionGUID= + [Configuration1] Name=Sources ParameterCount=0