diff --git a/CONNECTOR.Harness b/CONNECTOR.Harness new file mode 100644 index 0000000..3a54388 --- /dev/null +++ b/CONNECTOR.Harness @@ -0,0 +1,4 @@ +CAN=TXD,RXD +LAN=PHY_TX_N,PHY_TX_P,PHY_RX_N,PHY_RX_P,SPEED_LED,LINK_LED +UART=TXD,RXD +USB=USB_D+,USB_D- diff --git a/CONNECTOR.SchDoc b/CONNECTOR.SchDoc index cf98ce8..cb40f4e 100644 Binary files a/CONNECTOR.SchDoc and b/CONNECTOR.SchDoc differ diff --git a/Core.Harness b/Core.Harness new file mode 100644 index 0000000..57c75dd --- /dev/null +++ b/Core.Harness @@ -0,0 +1,4 @@ +CAN=TXD,RXD +RMII=MDIO,MDC,RXD0,RXD1,TXEN,TXD0,TXD1,CRS_DV,REF_CLK,RST,CLK +UART=TXD,RXD +USB=USB_D+,USB_D- diff --git a/Core.SchDoc b/Core.SchDoc index c809fab..18d9423 100644 Binary files a/Core.SchDoc and b/Core.SchDoc differ diff --git a/GNSS.Harness b/GNSS.Harness new file mode 100644 index 0000000..60b677d --- /dev/null +++ b/GNSS.Harness @@ -0,0 +1 @@ +UART=TXD,RXD diff --git a/GNSS.SchDoc b/GNSS.SchDoc index f30424f..b8fa2ae 100644 Binary files a/GNSS.SchDoc and b/GNSS.SchDoc differ diff --git a/LAN.Harness b/LAN.Harness new file mode 100644 index 0000000..8fc380b --- /dev/null +++ b/LAN.Harness @@ -0,0 +1,2 @@ +LAN=PHY_TX_N,PHY_TX_P,PHY_RX_N,PHY_RX_P,SPEED_LED,LINK_LED +RMII=MDIO,MDC,RXD0,RXD1,TXEN,TXD0,TXD1,CRS_DV,REF_CLK,RST,CLK diff --git a/LAN.SchDoc b/LAN.SchDoc index f4637d7..ff35fa4 100644 Binary files a/LAN.SchDoc and b/LAN.SchDoc differ diff --git a/PCB1.PcbDoc b/PCB1.PcbDoc index 2efa8a7..8f0d8ee 100644 Binary files a/PCB1.PcbDoc and b/PCB1.PcbDoc differ diff --git a/Project Outputs for rk3506_hw/Design Rule Check - PCB1.html b/Project Outputs for rk3506_hw/Design Rule Check - PCB1.html index a163839..cb834c7 100644 --- a/Project Outputs for rk3506_hw/Design Rule Check - PCB1.html +++ b/Project Outputs for rk3506_hw/Design Rule Check - PCB1.html @@ -219,22 +219,22 @@ Date: -2026/7/17 +2026/7/24 Time: -14:40:27 +2:28:10 Elapsed Time: -00:00:01 +00:00:00 Filename: -D:\polaris\rk3506_nav_calculater\PCB1.PcbDoc +C:\Project\polaris\rk3506_hw\PCB1.PcbDoc @@ -247,10 +247,10 @@ Rule Violations: -4 +0 -

Summary

 +

Summary

 @@ -265,100 +265,84 @@ - - - - - - - - - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + + + + + + + + + - + -
Warnings CountCount
Clearance Constraint (Gap=7mil) (All),(All)4
Clearance Constraint (Gap=7mil) (InNetClass('Signal')),(InNetClass('Signal'))0
Short-Circuit Constraint (Allowed=No) (All),(All)Clearance Constraint (Gap=1mil) (All),(All) 0
Un-Routed Net Constraint ( (All) )Clearance Constraint (Gap=7mil) (InNetClass('Signal')),(InNetClass('Signal')) 0
Modified Polygon (Allow modified: No), (Allow shelved: No)Short-Circuit Constraint (Allowed=No) (All),(All) 0
Width Constraint (Min=5.9mil) (Max=6.2mil) (Preferred=5.9mil) (InNetClass('Signal'))Un-Routed Net Constraint ( (All) ) 0
Width Constraint (Min=8mil) (Max=50mil) (Preferred=10mil) (InNetClass('PWR'))Modified Polygon (Allow modified: No), (Allow shelved: No) 0
Routing Topology Rule(Topology=Shortest) (All)Width Constraint (Min=5.9mil) (Max=6.2mil) (Preferred=5.9mil) (InNetClass('Signal')) 0
Power Plane Connect Rule(Direct Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All)Width Constraint (Min=8mil) (Max=50mil) (Preferred=10mil) (InNetClass('PWR')) 0
Hole Size Constraint (Min=1mil) (Max=2000mil) (All)Routing Topology Rule(Topology=Shortest) (All) 0
Hole To Hole Clearance (Gap=0mil) (All),(All)Power Plane Connect Rule(Direct Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All) 0
Minimum Solder Mask Sliver (Gap=0mil) (All),(All)Hole Size Constraint (Min=1mil) (Max=2000mil) (All) 0
Silk To Solder Mask (Clearance=0mil) (IsPad),(All)Hole To Hole Clearance (Gap=0mil) (All),(All) 0
Silk to Silk (Clearance=10mil) (All),(All)Minimum Solder Mask Sliver (Gap=0mil) (All),(All) 0
Net Antennae (Tolerance=0mil) (All)Silk To Solder Mask (Clearance=0mil) (IsPad),(All) 0
Length Constraint (Min=1260mil) (Max=1280mil) (InNetClass('RMII0_TX'))Silk to Silk (Clearance=10mil) (All),(All) 0
Length Constraint (Min=825mil) (Max=845mil) (InNetClass('RMII1_TX'))Net Antennae (Tolerance=0mil) (All) 0
Length Constraint (Min=0mil) (Max=100000mil) (InNetClass('All Nets'))Length Constraint (Min=1260mil) (Max=1280mil) (InNetClass('RMII0_TX')) 0
Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All)Length Constraint (Min=825mil) (Max=845mil) (InNetClass('RMII1_TX'))0
Length Constraint (Min=0mil) (Max=100000mil) (InNetClass('All Nets'))0
Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All) 0
Total40

- - - - - - - - - - - - - - - -
Clearance Constraint (Gap=7mil) (All),(All)
Clearance Constraint: (Collision < 7mil) Between Area Fill (820mil,2975mil) (925mil,3105mil) on Keep-Out Layer And Region (0 hole(s)) Top Layer
Clearance Constraint: (Collision < 7mil) Between Area Fill (820mil,2975mil) (925mil,3105mil) on Keep-Out Layer And Region (0 hole(s)) Top Layer
Clearance Constraint: (Collision < 7mil) Between Area Fill (820mil,2975mil) (925mil,3105mil) on Keep-Out Layer And Region (0 hole(s)) Top Layer
Clearance Constraint: (Collision < 7mil) Between Area Fill (820mil,2975mil) (925mil,3105mil) on Keep-Out Layer And Region (0 hole(s)) Top Layer
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+
diff --git a/TOP.SchDoc b/TOP.SchDoc index 7010957..62c5e7e 100644 Binary files a/TOP.SchDoc and b/TOP.SchDoc differ diff --git a/USB_EX.Harness b/USB_EX.Harness new file mode 100644 index 0000000..2a53f1d --- /dev/null +++ b/USB_EX.Harness @@ -0,0 +1,2 @@ +UART=TXD,RXD +USB=USB_D+,USB_D- diff --git a/USB_EX.SchDoc b/USB_EX.SchDoc index 87535a0..980136a 100644 Binary files a/USB_EX.SchDoc and b/USB_EX.SchDoc differ diff --git a/rk3506_hw.PrjPcb b/rk3506_hw.PrjPcb index 8decfbc..11af375 100644 --- a/rk3506_hw.PrjPcb +++ b/rk3506_hw.PrjPcb @@ -40,7 +40,7 @@ ManagedProjectGUID= IncludeDesignInRelease=0 CrossRefSheetStyle=1 CrossRefLocationStyle=1 -CrossRefPorts=3 +CrossRefPorts=0 CrossRefCrossSheets=1 CrossRefSheetEntries=0 CrossRefFollowFromMainSettings=1 @@ -185,6 +185,91 @@ DItemRevisionGUID= GenerateClassCluster=0 DocumentUniqueId=YUQERTMM +[Document9] +DocumentPath=CONNECTOR.Harness +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=0 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId= + +[Document10] +DocumentPath=USB_EX.Harness +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=0 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId= + +[Document11] +DocumentPath=Core.Harness +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=0 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId= + +[Document12] +DocumentPath=GNSS.Harness +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=0 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId= + +[Document13] +DocumentPath=LAN.Harness +AnnotationEnabled=1 +AnnotateStartValue=1 +AnnotationIndexControlEnabled=0 +AnnotateSuffix= +AnnotateScope=All +AnnotateOrder=-1 +DoLibraryUpdate=1 +DoDatabaseUpdate=1 +ClassGenCCAutoEnabled=1 +ClassGenCCAutoRoomEnabled=0 +ClassGenNCAutoScope=None +DItemRevisionGUID= +GenerateClassCluster=0 +DocumentUniqueId= + [GeneratedDocument1] DocumentPath=Project Outputs for rk3506_hw\Design Rule Check - PCB1.html DItemRevisionGUID=