Release 6.1.5
This commit is contained in:
@@ -30,6 +30,10 @@
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IMPORT _tx_execution_thread_enter
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IMPORT _tx_execution_thread_exit
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ENDIF
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IF :DEF:TX_LOW_POWER
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IMPORT tx_low_power_enter
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IMPORT tx_low_power_exit
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ENDIF
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;
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;
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AREA ||.text||, CODE, READONLY
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@@ -39,7 +43,7 @@
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;/* FUNCTION RELEASE */
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;/* */
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;/* _tx_thread_schedule Cortex-M0/AC5 */
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;/* 6.1 */
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;/* 6.1.5 */
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;/* AUTHOR */
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;/* */
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;/* William E. Lamie, Microsoft Corporation */
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@@ -72,7 +76,10 @@
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;/* */
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;/* DATE NAME DESCRIPTION */
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;/* */
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;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
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;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
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;/* 03-02-2021 Scott Larson Modified comment(s), add */
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;/* low power code, */
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;/* resulting in version 6.1.5 */
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;/* */
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;/**************************************************************************/
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;VOID _tx_thread_schedule(VOID)
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@@ -240,11 +247,23 @@ __tx_ts_wait
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STR r1, [r0] ; Store it in the current pointer
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CMP r1, #0 ; If non-NULL, a new thread is ready!
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BNE __tx_ts_ready ;
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IF :DEF:TX_ENABLE_WFI
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IF:DEF:TX_LOW_POWER
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PUSH {r0-r3}
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BL tx_low_power_enter ; Possibly enter low power mode
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POP {r0-r3}
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ENDIF
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IF:DEF:TX_ENABLE_WFI
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DSB ; Ensure no outstanding memory transactions
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WFI ; Wait for interrupt
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ISB ; Ensure pipeline is flushed
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ENDIF
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IF:DEF:TX_LOW_POWER
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PUSH {r0-r3}
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BL tx_low_power_exit ; Exit low power mode
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POP {r0-r3}
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ENDIF
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__tx_ts_ISB
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CPSIE i ; Enable interrupts
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B __tx_ts_wait ; Loop to continue waiting
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@@ -25,6 +25,10 @@
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.global _tx_thread_execute_ptr
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.global _tx_timer_time_slice
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.global _tx_thread_system_stack_ptr
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#ifdef TX_LOW_POWER
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.global tx_low_power_enter
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.global tx_low_power_exit
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#endif
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@
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@
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.text
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@@ -35,7 +39,7 @@
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@/* FUNCTION RELEASE */
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@/* */
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@/* _tx_thread_schedule Cortex-M0/AC6 */
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@/* 6.1 */
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@/* 6.1.5 */
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@/* AUTHOR */
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@/* */
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@/* William E. Lamie, Microsoft Corporation */
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@@ -68,7 +72,10 @@
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@/* */
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@/* DATE NAME DESCRIPTION */
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@/* */
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@/* 09-30-2020 William E. Lamie Initial Version 6.1 */
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@/* 09-30-2020 William E. Lamie Initial Version 6.1 */
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@/* 03-02-2021 Scott Larson Modified comment(s), add */
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@/* low power code, */
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@/* resulting in version 6.1.5 */
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@/* */
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@/**************************************************************************/
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@VOID _tx_thread_schedule(VOID)
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@@ -244,11 +251,25 @@ __tx_ts_wait:
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STR r1, [r0] @ Store it in the current pointer
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CMP r1, #0 @ If non-NULL, a new thread is ready!
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BNE __tx_ts_ready @
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#ifdef TX_LOW_POWER
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PUSH {r0-r3}
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BL tx_low_power_enter @ Possibly enter low power mode
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POP {r0-r3}
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#endif
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#ifdef TX_ENABLE_WFI
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DSB @ Ensure no outstanding memory transactions
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WFI @ Wait for interrupt
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ISB @ Ensure pipeline is flushed
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#endif
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#ifdef TX_LOW_POWER
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PUSH {r0-r3}
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BL tx_low_power_exit @ Exit low power mode
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POP {r0-r3}
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#endif
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CPSIE i @ Enable interrupts
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B __tx_ts_wait @ Loop to continue waiting
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@
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0
ports/cortex_m0/gnu/CMakeLists.txt
Normal file → Executable file
0
ports/cortex_m0/gnu/CMakeLists.txt
Normal file → Executable file
0
ports/cortex_m0/gnu/src/tx_thread_context_restore.S
Executable file → Normal file
0
ports/cortex_m0/gnu/src/tx_thread_context_restore.S
Executable file → Normal file
0
ports/cortex_m0/gnu/src/tx_thread_context_save.S
Executable file → Normal file
0
ports/cortex_m0/gnu/src/tx_thread_context_save.S
Executable file → Normal file
0
ports/cortex_m0/gnu/src/tx_thread_interrupt_control.S
Executable file → Normal file
0
ports/cortex_m0/gnu/src/tx_thread_interrupt_control.S
Executable file → Normal file
0
ports/cortex_m0/gnu/src/tx_thread_interrupt_disable.S
Executable file → Normal file
0
ports/cortex_m0/gnu/src/tx_thread_interrupt_disable.S
Executable file → Normal file
0
ports/cortex_m0/gnu/src/tx_thread_interrupt_restore.S
Executable file → Normal file
0
ports/cortex_m0/gnu/src/tx_thread_interrupt_restore.S
Executable file → Normal file
27
ports/cortex_m0/gnu/src/tx_thread_schedule.S
Executable file → Normal file
27
ports/cortex_m0/gnu/src/tx_thread_schedule.S
Executable file → Normal file
@@ -27,6 +27,10 @@
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.global _tx_thread_system_stack_ptr
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.global _tx_execution_thread_enter
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.global _tx_execution_thread_exit
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#ifdef TX_LOW_POWER
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.global tx_low_power_enter
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.global tx_low_power_exit
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#endif
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@
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@
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.text
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@@ -37,7 +41,7 @@
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@/* FUNCTION RELEASE */
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@/* */
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@/* _tx_thread_schedule Cortex-M0/GNU */
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@/* 6.1 */
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@/* 6.1.5 */
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@/* AUTHOR */
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@/* */
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@/* William E. Lamie, Microsoft Corporation */
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@@ -70,9 +74,12 @@
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@/* */
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@/* DATE NAME DESCRIPTION */
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@/* */
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@/* 05-19-2020 William E. Lamie Initial Version 6.0 */
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@/* 09-30-2020 William E. Lamie Modified comment(s), */
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@/* 05-19-2020 William E. Lamie Initial Version 6.0 */
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@/* 09-30-2020 William E. Lamie Modified comment(s), */
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@/* resulting in version 6.1 */
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@/* 03-02-2021 Scott Larson Modified comment(s), add */
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@/* low power code, */
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@/* resulting in version 6.1.5 */
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@/* */
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@/**************************************************************************/
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@VOID _tx_thread_schedule(VOID)
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@@ -248,11 +255,25 @@ __tx_ts_wait:
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STR r1, [r0] @ Store it in the current pointer
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CMP r1, #0 @ If non-NULL, a new thread is ready!
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BNE __tx_ts_ready @
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#ifdef TX_LOW_POWER
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PUSH {r0-r3}
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BL tx_low_power_enter @ Possibly enter low power mode
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POP {r0-r3}
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#endif
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#ifdef TX_ENABLE_WFI
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DSB @ Ensure no outstanding memory transactions
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WFI @ Wait for interrupt
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ISB @ Ensure pipeline is flushed
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#endif
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#ifdef TX_LOW_POWER
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PUSH {r0-r3}
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BL tx_low_power_exit @ Exit low power mode
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POP {r0-r3}
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#endif
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CPSIE i @ Enable interrupts
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B __tx_ts_wait @ Loop to continue waiting
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@
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0
ports/cortex_m0/gnu/src/tx_thread_stack_build.S
Executable file → Normal file
0
ports/cortex_m0/gnu/src/tx_thread_stack_build.S
Executable file → Normal file
0
ports/cortex_m0/gnu/src/tx_thread_system_return.S
Executable file → Normal file
0
ports/cortex_m0/gnu/src/tx_thread_system_return.S
Executable file → Normal file
0
ports/cortex_m0/gnu/src/tx_timer_interrupt.S
Executable file → Normal file
0
ports/cortex_m0/gnu/src/tx_timer_interrupt.S
Executable file → Normal file
@@ -28,6 +28,10 @@
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EXTERN _tx_thread_preempt_disable
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EXTERN _tx_execution_thread_enter
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EXTERN _tx_execution_thread_exit
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#ifdef TX_LOW_POWER
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EXTERN tx_low_power_enter
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EXTERN tx_low_power_exit
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#endif
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;
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;
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SECTION `.text`:CODE:NOROOT(2)
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@@ -37,7 +41,7 @@
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;/* FUNCTION RELEASE */
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;/* */
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;/* _tx_thread_schedule Cortex-M0/IAR */
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;/* 6.1 */
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;/* 6.1.5 */
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;/* AUTHOR */
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;/* */
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;/* William E. Lamie, Microsoft Corporation */
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@@ -70,7 +74,10 @@
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;/* */
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;/* DATE NAME DESCRIPTION */
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;/* */
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;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
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;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
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;/* 03-02-2021 Scott Larson Modified comment(s), add */
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;/* low power code, */
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;/* resulting in version 6.1.5 */
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;/* */
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;/**************************************************************************/
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;VOID _tx_thread_schedule(VOID)
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@@ -238,11 +245,25 @@ __tx_ts_wait:
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STR r1, [r0] ; Store it in the current pointer
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CMP r1, #0 ; If non-NULL, a new thread is ready!
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BNE __tx_ts_ready ;
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#ifdef TX_LOW_POWER
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PUSH {r0-r3}
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BL tx_low_power_enter ; Possibly enter low power mode
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POP {r0-r3}
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#endif
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#ifdef TX_ENABLE_WFI
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DSB ; Ensure no outstanding memory transactions
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WFI ; Wait for interrupt
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ISB ; Ensure pipeline is flushed
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#endif
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#ifdef TX_LOW_POWER
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PUSH {r0-r3}
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BL tx_low_power_exit ; Exit low power mode
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POP {r0-r3}
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#endif
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CPSIE i ; Enable interrupts
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B __tx_ts_wait ; Loop to continue waiting
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;
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@@ -30,6 +30,10 @@
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IMPORT _tx_execution_thread_enter
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IMPORT _tx_execution_thread_exit
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ENDIF
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IF :DEF:TX_LOW_POWER
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IMPORT tx_low_power_enter
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IMPORT tx_low_power_exit
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ENDIF
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;
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;
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AREA ||.text||, CODE, READONLY
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||||
@@ -39,7 +43,7 @@
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;/* FUNCTION RELEASE */
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;/* */
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;/* _tx_thread_schedule Cortex-M0/AC5 */
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;/* 6.1 */
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;/* 6.1.5 */
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;/* AUTHOR */
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;/* */
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;/* William E. Lamie, Microsoft Corporation */
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@@ -72,7 +76,10 @@
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;/* */
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;/* DATE NAME DESCRIPTION */
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;/* */
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;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
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;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
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;/* 03-02-2021 Scott Larson Modified comment(s), add */
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;/* low power code, */
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;/* resulting in version 6.1.5 */
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;/* */
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;/**************************************************************************/
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;VOID _tx_thread_schedule(VOID)
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@@ -241,11 +248,25 @@ __tx_ts_wait
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STR r1, [r0] ; Store it in the current pointer
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CMP r1, #0 ; If non-NULL, a new thread is ready!
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BNE __tx_ts_ready ;
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IF :DEF:TX_ENABLE_WFI
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IF:DEF:TX_LOW_POWER
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PUSH {r0-r3}
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BL tx_low_power_enter ; Possibly enter low power mode
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POP {r0-r3}
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ENDIF
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IF:DEF:TX_ENABLE_WFI
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DSB ; Ensure no outstanding memory transactions
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WFI ; Wait for interrupt
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ISB ; Ensure pipeline is flushed
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ENDIF
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IF:DEF:TX_LOW_POWER
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PUSH {r0-r3}
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BL tx_low_power_exit ; Exit low power mode
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POP {r0-r3}
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ENDIF
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__tx_ts_ISB
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CPSIE i ; Enable interrupts
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B __tx_ts_wait ; Loop to continue waiting
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