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Release 6.1.9

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This commit is contained in:
Yuxin Zhou
2021-10-14 00:51:26 +00:00
parent 215df45d4b
commit 1af8404c54
1812 changed files with 60698 additions and 249862 deletions
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360
ports/arc_em/metaware/src/tx_initialize_low_level.s
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@@ -1,360 +0,0 @@
;/**************************************************************************/
;/* */
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
;/* */
;/* This software is licensed under the Microsoft Software License */
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** Initialize */
;/** */
;/**************************************************************************/
;/**************************************************************************/
.equ IRQ_SELECT, 0x40B
.equ KSTACK_TOP, 0x264
.equ KSTACK_BASE, 0x265
.equ STATUS32_SC, 0x4000
;
; /* Define section for placement after all linker allocated RAM memory. This
; is used to calculate the first free address that is passed to
; tx_appication_define, soley for the ThreadX application's use. */
;
.section ".free_memory","aw"
.align 4
.global _tx_first_free_address
_tx_first_free_address:
.space 4
;
; /* Define section for placement before the main stack area for setting
; up the STACK_TOP address for hardware stack checking. */
;
.section ".stack_top","aw"
.align 4
.global _tx_system_stack_top_address
_tx_system_stack_top_address:
.space 4
;
; /* Define section for placement after the main stack area for setting
; up the STACK_BASE address for hardware stack checking. */
;
.section ".stack_base","aw"
.align 4
.global _tx_system_stack_base_address
_tx_system_stack_base_address:
.space 4
.text
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_initialize_low_level ARCv2_EM/MetaWare */
;/* 6.1.6 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function is responsible for any low-level processor */
;/* initialization, including setting up interrupt vectors, setting */
;/* up a periodic timer interrupt source, saving the system stack */
;/* pointer for use in ISR processing later, and finding the first */
;/* available RAM memory address for tx_application_define. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* CALLED BY */
;/* */
;/* _tx_initialize_kernel_enter ThreadX entry function */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* 04-02-2021 Andres Mlinar Modified comments, */
;/* resulting in version 6.1.6 */
;/* */
;/**************************************************************************/
;VOID _tx_initialize_low_level(VOID)
;{
.global _tx_initialize_low_level
.type _tx_initialize_low_level, @function
_tx_initialize_low_level:
.ifdef TX_ENABLE_HW_STACK_CHECKING
mov r0, _tx_system_stack_top_address ; Pickup top of system stack (lowest memory address)
sr r0, [KSTACK_TOP] ; Setup KSTACK_TOP
mov r0, _tx_system_stack_base_address ; Pickup base of system stack (highest memory address)
sr r0, [KSTACK_BASE] ; Setup KSTACK_BASE
lr r0, [status32] ; Pickup current STATUS32
or r0, r0, STATUS32_SC ; Or in hardware stack checking enable bit (SC)
kflag r0 ; Enable hardware stack checking
.endif
;
; /* Save the system stack pointer. */
; _tx_thread_system_stack_ptr = (VOID_PTR) (sp);
;
st sp, [gp, _tx_thread_system_stack_ptr@sda] ; Save system stack pointer
;
;
; /* Pickup the first available memory address. */
;
mov r0, _tx_first_free_address ; Pickup first free memory address
;
; /* Save the first available memory address. */
; _tx_initialize_unused_memory = (VOID_PTR) _end;
;
st r0, [gp, _tx_initialize_unused_memory@sda]
;
;
; /* Setup Timer 0 for periodic interrupts at interrupt vector 16. */
;
mov r0, 0 ; Disable additional ISR reg saving/restoring
sr r0, [AUX_IRQ_CTRL] ;
mov r0, 16 ; Select timer 0
sr r0, [IRQ_SELECT] ;
mov r0, 15 ; Set timer 0 to priority 15
sr r0, [IRQ_PRIORITY] ;
mov r0, 1 ; Enable this interrupt
sr r0, [IRQ_ENABLE] ;
mov r0, 0x10000 ; Setup timer period
sr r0, [LIMIT0] ;
mov r0, 0 ; Clear timer 0 current count
sr r0, [COUNT0] ;
mov r0, 3 ; Enable timer 0
sr r0, [CONTROL0] ;
.ifdef TX_TIMER_1_SETUP
mov r0, 17 ; Select timer 1
sr r0, [IRQ_SELECT] ;
mov r0, 2 ; Set timer 1 to priority 14
sr r0, [IRQ_PRIORITY] ;
mov r0, 1 ; Enable this interrupt
sr r0, [IRQ_ENABLE] ;
mov r0, 0x10020 ; Setup timer period
sr r0, [LIMIT1] ;
mov r0, 0 ; Clear timer 0 current count
sr r0, [COUNT1] ;
mov r0, 3 ; Enable timer 0
sr r0, [CONTROL1] ;
.endif
;
; /* Done, return to caller. */
;
j_s.d [blink] ; Return to caller
nop
;}
;
;
; /* Define default vector table entries. */
;
.global _tx_memory_error
_tx_memory_error:
flag 1
nop
nop
nop
b _tx_memory_error
.global _tx_instruction_error
_tx_instruction_error:
flag 1
nop
nop
nop
b _tx_instruction_error
.global _tx_ev_machine_check
_tx_ev_machine_check:
flag 1
nop
nop
nop
b _tx_ev_machine_check
.global _tx_ev_tblmiss_inst
_tx_ev_tblmiss_inst:
flag 1
nop
nop
nop
b _tx_ev_tblmiss_inst
.global _tx_ev_tblmiss_data
_tx_ev_tblmiss_data:
flag 1
nop
nop
nop
b _tx_ev_tblmiss_data
.global _tx_ev_protection_viol
_tx_ev_protection_viol:
flag 1
nop
nop
nop
b _tx_ev_protection_viol
.global _tx_ev_privilege_viol
_tx_ev_privilege_viol:
flag 1
nop
nop
nop
b _tx_ev_privilege_viol
.global _tx_ev_software_int
_tx_ev_software_int:
flag 1
nop
nop
nop
b _tx_ev_software_int
.global _tx_ev_trap
_tx_ev_trap:
flag 1
nop
nop
nop
b _tx_ev_trap
.global _tx_ev_extension
_tx_ev_extension:
flag 1
nop
nop
nop
b _tx_ev_extension
.global _tx_ev_divide_by_zero
_tx_ev_divide_by_zero:
flag 1
nop
nop
nop
b _tx_ev_divide_by_zero
.global _tx_ev_dc_error
_tx_ev_dc_error:
flag 1
nop
nop
nop
b _tx_ev_dc_error
.global _tx_ev_maligned
_tx_ev_maligned:
flag 1
nop
nop
nop
b _tx_ev_maligned
.global _tx_unsued_0
_tx_unsued_0:
flag 1
nop
nop
nop
b _tx_unsued_0
.global _tx_unused_1
_tx_unused_1:
flag 1
nop
nop
nop
b _tx_unused_1
.global _tx_timer_0
_tx_timer_0:
;
; /* By default, setup Timer 0 as the ThreadX timer interrupt. */
;
sub sp, sp, 160 ; Allocate an interrupt stack frame
st r0, [sp, 0] ; Save r0
st r1, [sp, 4] ; Save r1
st r2, [sp, 8] ; Save r2
mov r0, 3
sr r0, [CONTROL0]
b _tx_timer_interrupt ; Jump to generic ThreadX timer interrupt
; handler
; flag 1
; nop
; nop
; nop
; b _tx_timer_0
.global _tx_timer_1
_tx_timer_1:
sub sp, sp, 160 ; Allocate an interrupt stack frame
st blink, [sp, 16] ; Save blink
bl _tx_thread_context_save ; Call context save
;
; /* ISR processing goes here. If the applications wishes to re-enable
; interrupts, the SETI instruction can be used here. Also note that
; register usage in assembly code must be confined to the compiler
; scratch registers. */
;
mov r0, 3
sr r0, [CONTROL1]
;
b _tx_thread_context_restore ; Call context restore
; flag 1
; nop
; nop
; nop
; b _tx_timer_1
.global _tx_undefined_0
_tx_undefined_0:
flag 1
nop
nop
nop
b _tx_undefined_0
.global _tx_undefined_1
_tx_undefined_1:
flag 1
nop
nop
nop
b _tx_undefined_1
.global _tx_undefined_2
_tx_undefined_2:
flag 1
nop
nop
nop
b _tx_undefined_2
.end

19
ports/arc_em/metaware/src/tx_thread_context_restore.s
View File

@@ -9,7 +9,6 @@
;/* */
;/**************************************************************************/
;/**************************************************************************/
;/**************************************************************************/
;/** */
@@ -30,7 +29,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_context_restore ARCv2_EM/MetaWare */
;/* 6.1.6 */
;/* 6.1.9 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -66,6 +65,10 @@
;/* 04-02-2021 Andres Mlinar Modified comment(s), and */
;/* r25/r30 are caller saved, */
;/* resulting in version 6.1.6 */
;/* 10-15-2021 Andres Mlinar Modified comment(s), added */
;/* support for disabling the */
;/* loop control feature, */
;/* resulting in version 6.1.9 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_context_restore(VOID)
@@ -108,12 +111,15 @@ _tx_thread_context_restore:
__tx_thread_nested_restore:
.ifndef TX_DISABLE_LP
ld r0, [sp, 4] ; Recover LP_START
sr r0, [LP_START] ; Restore LP_START
ld r1, [sp, 8] ; Recover LP_END
sr r1, [LP_END] ; Restore LP_END
ld r2, [sp, 12] ; Recover LP_COUNT
mov LP_COUNT, r2
.endif
ld r2, [sp, 156] ; Pickup BTA
sr r2, [BTA] ; Recover BTA
.ifdef TX_ENABLE_ACC
@@ -177,7 +183,7 @@ __tx_thread_no_preempt_restore:
and r2, r2, ~STATUS32_SC ; Clear the hardware stack checking enable bit (SC)
kflag r2 ; Disable hardware stack checking
ld r3, [r0, 12] ; Pickup the top of the thread's stack (lowest address)
sr r3, [KSTACK_TOP] ; Setup KSTACK_TOP
sr r3, [KSTACK_TOP] ; Setup KSTACK_TOP
ld r3, [r0, 16] ; Pickup the base of the thread's stack (highest address)
sr r3, [KSTACK_BASE] ; Setup KSTACK_BASE
.endif
@@ -189,12 +195,15 @@ __tx_thread_no_preempt_restore:
kflag r2 ; Enable hardware stack checking
.endif
.ifndef TX_DISABLE_LP
ld r0, [sp, 4] ; Recover LP_START
sr r0, [LP_START] ; Restore LP_START
ld r1, [sp, 8] ; Recover LP_END
sr r1, [LP_END] ; Restore LP_END
ld r2, [sp, 12] ; Recover LP_COUNT
mov LP_COUNT, r2
.endif
ld r2, [sp, 156] ; Pickup BTA
sr r2, [BTA] ; Recover BTA
.ifdef TX_ENABLE_ACC
@@ -230,7 +239,6 @@ __tx_thread_preempt_restore:
st r6, [r7, 0] ; Setup interrupt stack type
st fp, [r7, 24] ; Save fp
st gp, [r7, 28] ; Save gp
st r25, [r7, 32] ; Save r25
st r24, [r7, 36] ; Save r24
st r23, [r7, 40] ; Save r23
st r22, [r7, 44] ; Save r22
@@ -243,7 +251,6 @@ __tx_thread_preempt_restore:
st r15, [r7, 72] ; Save r15
st r14, [r7, 76] ; Save r14
st r13, [r7, 80] ; Save r13
st r30, [r7, 136] ; Save r30
;
; /* Save the remaining time-slice and disable it. */
; if (_tx_timer_time_slice)
@@ -271,7 +278,7 @@ __tx_thread_dont_save_ts:
sub sp, sp, 8 ; Allocate a small stack frame on the system stack
lr r0, [STATUS32] ; Pickup STATUS32
st r0, [sp, 4] ; Place on stack
mov r0, _tx_thread_schedule ; Build address of scheduler
mov r0, _tx_thread_schedule_reenter ; Build address of scheduler
st r0, [sp, 0] ; Write over the point of interrupt
rtie ; Return from interrupt to scheduler
;

2
ports/arc_em/metaware/src/tx_thread_context_save.s
View File

@@ -201,7 +201,7 @@ __tx_thread_not_nested_save:
and r2, r2, ~STATUS32_SC ; Clear the hardware stack checking enable bit (SC)
kflag r2 ; Disable hardware stack checking
mov r1, _tx_system_stack_top_address ; Pickup top of system stack (lowest memory address)
sr r1, [KSTACK_TOP] ; Setup KSTACK_TOP
sr r1, [KSTACK_TOP] ; Setup KSTACK_TOP
mov r1, _tx_system_stack_base_address ; Pickup base of system stack (highest memory address)
sr r1, [KSTACK_BASE] ; Setup KSTACK_BASE
ld sp, [gp, _tx_thread_system_stack_ptr@sda] ; Switch to system stack

63
ports/arc_em/metaware/src/tx_thread_schedule.s
View File

@@ -29,7 +29,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_schedule ARCv2_EM/MetaWare */
;/* 6.1.6 */
;/* 6.1.9 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -69,6 +69,11 @@
;/* fixed hardware stack checker*/
;/* disable and reenable logic, */
;/* resulting in version 6.1.6 */
;/* 10-15-2021 Andres Mlinar Modified comment(s), added */
;/* support for disabling the */
;/* loop control feature, */
;/* improved internal logic, */
;/* resulting in version 6.1.9 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_schedule(VOID)
@@ -76,16 +81,18 @@
.global _tx_thread_schedule
.type _tx_thread_schedule, @function
_tx_thread_schedule:
mov sp, _estack
.global _tx_thread_schedule_reenter
.type _tx_thread_schedule_reenter, @function
_tx_thread_schedule_reenter:
;
; /* Enable interrupts. */
;
seti 0 ; Enable interrupts without changing threshold level
.ifdef TX_ENABLE_HW_STACK_CHECKING
lr r2, [status32] ; Pickup current STATUS32
and r2, r2, ~STATUS32_SC ; Clear the hardware stack checking enable bit (SC)
kflag r2 ; Disable hardware stack checking
.endif
;
; /* Wait for a thread to execute. */
; do
@@ -121,6 +128,26 @@ __tx_thread_schedule_loop:
; /* Setup time-slice, if present. */
; _tx_timer_time_slice = _tx_thread_current_ptr -> tx_thread_time_slice;
;
st r4, [gp, _tx_timer_time_slice@sda] ; Setup time-slice
;
.ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
;
; /* Call the thread entry function to indicate the thread is executing. */
;
bl.d _tx_execution_thread_enter ; Call the thread execution enter function
sub sp, sp, 16 ; ..allocating some space on the stack
add sp, sp, 16 ; Recover the stack space
.endif
;
; /* Switch to the thread's stack. */
; sp = _tx_thread_execute_ptr -> tx_thread_stack_ptr;
;
.ifdef TX_ENABLE_HW_STACK_CHECKING
lr r2, [status32] ; Pickup current STATUS32
and r2, r2, ~STATUS32_SC ; Clear the hardware stack checking enable bit (SC)
kflag r2 ; Disable hardware stack checking
.endif
ld sp, [r0, 8] ; Switch to thread's stack
.ifdef TX_ENABLE_HW_STACK_CHECKING
@@ -132,20 +159,6 @@ __tx_thread_schedule_loop:
kflag r2 ; Enable hardware stack checking
.endif
st r4, [gp, _tx_timer_time_slice@sda] ; Setup time-slice
;
; /* Switch to the thread's stack. */
; sp = _tx_thread_execute_ptr -> tx_thread_stack_ptr;
;
.ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
;
; /* Call the thread entry function to indicate the thread is executing. */
;
bl.d _tx_execution_thread_enter ; Call the thread execution enter function
sub sp, sp, 16 ; ..allocating some space on the stack
add sp, sp, 16 ; Recover the stack space
.endif
;
; /* Determine if an interrupt frame or a synchronous task suspension frame
; is present. */
;
@@ -167,7 +180,7 @@ __tx_thread_schedule_loop:
ld r15, [sp, 56] ; Recover r15
ld r14, [sp, 60] ; Recover r14
ld r13, [sp, 64] ; Recover r13
ld r1, [sp, 68] ; Pickup status32
ld r1, [sp, 68] ; Pickup STATUS32
ld r30, [sp, 72] ; Recover r30
add sp, sp, 76 ; Recover solicited stack frame
j_s.d [blink] ; Return to thread and restore flags
@@ -175,15 +188,18 @@ __tx_thread_schedule_loop:
;
__tx_thread_schedule_int_ret:
;
mov r0, 0x2 ; Pretend level 1 interrupt is returning
sr r0, [AUX_IRQ_ACT] ;
mov r0, 0x2 ; Pretend level 1 interrupt is returning
sr r0, [AUX_IRQ_ACT] ;
.ifndef TX_DISABLE_LP
ld r0, [sp, 4] ; Recover LP_START
sr r0, [LP_START] ; Restore LP_START
ld r1, [sp, 8] ; Recover LP_END
sr r1, [LP_END] ; Restore LP_END
ld r2, [sp, 12] ; Recover LP_COUNT
mov LP_COUNT, r2
.endif
ld r0, [sp, 156] ; Pickup saved BTA
sr r0, [BTA] ; Recover BTA
ld blink, [sp, 16] ; Recover blink
@@ -223,7 +239,6 @@ __tx_thread_schedule_int_ret:
.endif
add sp, sp, 160 ; Recover interrupt stack frame
rtie ; Return to point of interrupt
;
;}
;

11
ports/arc_em/metaware/src/tx_thread_system_return.s
View File

@@ -28,7 +28,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_system_return ARCv2_EM/MetaWare */
;/* 6.1.6 */
;/* 6.1.9 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -50,7 +50,7 @@
;/* */
;/* CALLS */
;/* */
;/* _tx_thread_schedule Thread scheduling loop */
;/* _tx_thread_schedule_reenter Thread scheduling loop */
;/* */
;/* CALLED BY */
;/* */
@@ -63,6 +63,9 @@
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* 04-02-2021 Andres Mlinar Modified comments, */
;/* resulting in version 6.1.6 */
;/* 10-15-2021 Andres Mlinar Modified comments, */
;/* use schedule reenter, */
;/* resulting in version 6.1.9 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_system_return(VOID)
@@ -121,7 +124,7 @@ _tx_thread_system_return:
and r2, r2, ~STATUS32_SC ; Clear the hardware stack checking enable bit (SC)
kflag r2 ; Disable hardware stack checking
mov r1, _tx_system_stack_top_address ; Pickup top of system stack (lowest memory address)
sr r1, [KSTACK_TOP] ; Setup KSTACK_TOP
sr r1, [KSTACK_TOP] ; Setup KSTACK_TOP
mov r1, _tx_system_stack_base_address ; Pickup base of system stack (highest memory address)
sr r1, [KSTACK_BASE] ; Setup KSTACK_BASE
.endif
@@ -152,7 +155,7 @@ __tx_thread_dont_save_ts:
; /* Clear the current thread pointer. */
; _tx_thread_current_ptr = TX_NULL;
;
b.d _tx_thread_schedule ; Return to scheduler..
b.d _tx_thread_schedule_reenter ; Return to the scheduler
st r3, [gp, _tx_thread_current_ptr@sda] ; ..clearing current thread pointer
;
;}

10
ports/arc_em/metaware/src/tx_timer_interrupt.s
View File

@@ -24,7 +24,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_timer_interrupt ARCv2_EM/MetaWare */
;/* 6.1.3 */
;/* 6.1.9 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -65,6 +65,10 @@
;/* unneeded load of */
;/* _tx_thread_preempt_disable, */
;/* resulting in version 6.1.3 */
;/* 10-15-2021 Andres Mlinar Modified comment(s), and */
;/* fixed possible race */
;/* condition on preemption */
;/* resulting in version 6.1.9 */
;/* */
;/**************************************************************************/
;VOID _tx_timer_interrupt(VOID)
@@ -164,6 +168,10 @@ __tx_timer_done:
; /* See if anything has expired. */
; if ((_tx_timer_expired_time_slice) || (_tx_timer_expired))
; {
;
ld r0, [gp, _tx_thread_current_ptr@sda]
ld r2, [gp, _tx_thread_execute_ptr@sda]
brne r0, r2, __tx_something_expired
;
breq r1, 0, __tx_timer_nothing_expired ; If 0, nothing has expired
;