Release 6.1.9
This commit is contained in:
Yuxin Zhou
@@ -0,0 +1,157 @@
|
||||
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<listOptionValue builtIn="false" value=""${workspace_loc:/tx/inc_generic}""/>
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<listOptionValue builtIn="false" value="TX_INCLUDE_USER_DEFINE_FILE"/>
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<listOptionValue builtIn="false" value="TX_ENABLE_HW_STACK_CHECKING"/>
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<configuration artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.release" cleanCommand="rm -rf" description="" errorParsers="com.arc.cdt.toolchain.ARCCompilerErrorParser;com.arc.cdt.toolchain.ARCLinkerErrorParser;com.arc.cdt.toolchain.ARCAssemblerErrorParser;org.eclipse.cdt.core.MakeErrorParser" id="com.arc.cdt.toolchain.av2em.exeReleaseConfig.2022621224" name="Release" parent="com.arc.cdt.toolchain.av2em.exeReleaseConfig">
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<targetPlatform id="hcTargetPlatform.1484344501" isAbstract="false" name="Generic platform" superClass="hcTargetPlatform"/>
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<builder buildPath="${workspace_loc:/sample_threadx}/Release" id="makeBuilder.1056470287" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="makeBuilder"/>
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<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
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<additionalInput kind="additionalinput" paths="$(LIBS)"/>
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</tool>
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<tool id="com.arc.cdt.toolchain.arc.archiver.1360196687" superClass="com.arc.cdt.toolchain.arc.archiver"/>
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</toolChain>
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</folderInfo>
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</configuration>
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<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
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</cconfiguration>
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</storageModule>
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<storageModule moduleId="cdtBuildSystem" version="4.0.0">
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<project id="sample_threadx.com.arc.cdt.toolchain.arc.av2em.exeProject.666673635" name="Executable" projectType="com.arc.cdt.toolchain.arc.av2em.exeProject"/>
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</storageModule>
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<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
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<storageModule moduleId="refreshScope" versionNumber="2">
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<configuration configurationName="Debug">
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<resource resourceType="PROJECT" workspacePath="/sample_threadx"/>
|
||||
<resource resourceType="PROJECT" workspacePath="/sample_threadx_regression"/>
|
||||
</configuration>
|
||||
<configuration configurationName="Release">
|
||||
<resource resourceType="PROJECT" workspacePath="/sample_threadx"/>
|
||||
<resource resourceType="PROJECT" workspacePath="/sample_threadx_regression"/>
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</configuration>
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</storageModule>
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<storageModule moduleId="scannerConfiguration">
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<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
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<scannerConfigBuildInfo instanceId="com.arc.cdt.toolchain.av2em.exeDebugConfig.1217165695;com.arc.cdt.toolchain.av2em.exeDebugConfig.1217165695.;av2em.exe.debug.exeCompilerDebug.670850607;com.arc.cdt.toolchain.arc.ccac.inputTypeC.1127761944">
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<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
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<scannerConfigBuildInfo instanceId="com.arc.cdt.toolchain.av2em.exeReleaseConfig.2022621224;com.arc.cdt.toolchain.av2em.exeReleaseConfig.2022621224.;arc.cdt.toolchain.av2em.exeCompilerRelease.93257878;com.arc.cdt.toolchain.arc.inputTypeCL.1090960130">
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<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
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<scannerConfigBuildInfo instanceId="com.arc.cdt.toolchain.av2em.exeReleaseConfig.2022621224;com.arc.cdt.toolchain.av2em.exeReleaseConfig.2022621224.;arc.cdt.toolchain.av2em.exeCompilerRelease.93257878;com.arc.cdt.toolchain.arc.ccac.inputTypeCPP.1040370238">
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<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
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</scannerConfigBuildInfo>
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<scannerConfigBuildInfo instanceId="com.arc.cdt.toolchain.av2em.exeDebugConfig.1217165695;com.arc.cdt.toolchain.av2em.exeDebugConfig.1217165695.;av2em.exe.debug.exeCompilerDebug.670850607;com.arc.cdt.toolchain.arc.ccac.inputTypeCPP.603646508">
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<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
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</scannerConfigBuildInfo>
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<scannerConfigBuildInfo instanceId="com.arc.cdt.toolchain.av2em.exeReleaseConfig.2022621224;com.arc.cdt.toolchain.av2em.exeReleaseConfig.2022621224.;arc.cdt.toolchain.av2em.exeCompilerRelease.93257878;com.arc.cdt.toolchain.arc.ccac.inputTypeC.1016915037">
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<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
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</scannerConfigBuildInfo>
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<scannerConfigBuildInfo instanceId="com.arc.cdt.toolchain.av2em.exeDebugConfig.1217165695;com.arc.cdt.toolchain.av2em.exeDebugConfig.1217165695.;av2em.exe.debug.exeCompilerDebug.670850607;com.arc.cdt.toolchain.arc.inputTypeCL.66701363">
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<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
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</scannerConfigBuildInfo>
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</cproject>
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@@ -0,0 +1,33 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<projectDescription>
|
||||
<name>sample_threadx_regression</name>
|
||||
<comment></comment>
|
||||
<projects>
|
||||
</projects>
|
||||
<buildSpec>
|
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<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||
<triggers>clean,full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
|
||||
<triggers>full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
</buildSpec>
|
||||
<natures>
|
||||
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||
</natures>
|
||||
<linkedResources>
|
||||
<link>
|
||||
<name>Regression</name>
|
||||
<type>2</type>
|
||||
<locationURI>PARENT-5-PROJECT_LOC/TX/Test/Regression</locationURI>
|
||||
</link>
|
||||
</linkedResources>
|
||||
</projectDescription>
|
||||
@@ -0,0 +1,55 @@
|
||||
//
|
||||
// This is the linker script example (SRV3-style).
|
||||
// (c) Synopsys, 2013
|
||||
//
|
||||
//
|
||||
|
||||
//number of exceptions and interrupts
|
||||
NUMBER_OF_EXCEPTIONS = 16;//it is fixed (16)
|
||||
NUMBER_OF_INTERRUPTS = 5;//depends on HW configuration
|
||||
|
||||
//define Interrupt Vector Table size
|
||||
IVT_SIZE_ITEMS = (NUMBER_OF_EXCEPTIONS + NUMBER_OF_INTERRUPTS);//the total IVT size (in "items")
|
||||
IVT_SIZE_BYTES = IVT_SIZE_ITEMS * 4;//in bytes
|
||||
|
||||
//define ICCM and DCCM locations
|
||||
MEMORY {
|
||||
ICCM: ORIGIN = 0x00000000, LENGTH = 128K
|
||||
DCCM: ORIGIN = 0x80000000, LENGTH = 128K
|
||||
}
|
||||
|
||||
//define sections and groups
|
||||
SECTIONS {
|
||||
GROUP: {
|
||||
.ivt (TEXT) : # Interrupt table
|
||||
{
|
||||
___ivt1 = .;
|
||||
* (.ivt)
|
||||
___ivt2 = .;
|
||||
// Make the IVT at least IVT_SIZE_BYTES
|
||||
. += (___ivt2 - ___ivt1 < IVT_SIZE_BYTES) ? (IVT_SIZE_BYTES - (___ivt2 - ___ivt1)) : 0;
|
||||
}
|
||||
.ivh (TEXT) : // Interrupt handlers
|
||||
|
||||
//TEXT sections
|
||||
.text? : { *('.text$crt*') }
|
||||
* (TEXT): {}
|
||||
//Literals
|
||||
* (LIT): {}
|
||||
} > ICCM
|
||||
|
||||
GROUP: {
|
||||
//data sections
|
||||
.sdata?: {}
|
||||
.sbss?: {}
|
||||
*(DATA): {}
|
||||
*(BSS): {}
|
||||
//stack
|
||||
.stack_top: {}
|
||||
.stack ALIGN(4) SIZE(DEFINED _STACKSIZE?_STACKSIZE:4096): {}
|
||||
.stack_base: {}
|
||||
//heap (empty)
|
||||
.heap? ALIGN(4) SIZE(DEFINED _HEAPSIZE?_HEAPSIZE:0): {}
|
||||
.free_memory: {}
|
||||
} > DCCM
|
||||
}
|
||||
@@ -0,0 +1,360 @@
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Initialize */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
|
||||
.equ IRQ_SELECT, 0x40B
|
||||
.equ KSTACK_TOP, 0x264
|
||||
.equ KSTACK_BASE, 0x265
|
||||
.equ STATUS32_SC, 0x4000
|
||||
|
||||
;
|
||||
; /* Define section for placement after all linker allocated RAM memory. This
|
||||
; is used to calculate the first free address that is passed to
|
||||
; tx_appication_define, soley for the ThreadX application's use. */
|
||||
;
|
||||
.section ".free_memory","aw"
|
||||
.align 4
|
||||
.global _tx_first_free_address
|
||||
_tx_first_free_address:
|
||||
.space 4
|
||||
;
|
||||
; /* Define section for placement before the main stack area for setting
|
||||
; up the STACK_TOP address for hardware stack checking. */
|
||||
;
|
||||
.section ".stack_top","aw"
|
||||
.align 4
|
||||
.global _tx_system_stack_top_address
|
||||
_tx_system_stack_top_address:
|
||||
.space 4
|
||||
;
|
||||
; /* Define section for placement after the main stack area for setting
|
||||
; up the STACK_BASE address for hardware stack checking. */
|
||||
;
|
||||
.section ".stack_base","aw"
|
||||
.align 4
|
||||
.global _tx_system_stack_base_address
|
||||
_tx_system_stack_base_address:
|
||||
.space 4
|
||||
;
|
||||
;
|
||||
.text
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_initialize_low_level ARCv2_EM/MetaWare */
|
||||
;/* 6.x */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function is responsible for any low-level processor */
|
||||
;/* initialization, including setting up interrupt vectors, setting */
|
||||
;/* up a periodic timer interrupt source, saving the system stack */
|
||||
;/* pointer for use in ISR processing later, and finding the first */
|
||||
;/* available RAM memory address for tx_application_define. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* _tx_initialize_kernel_enter ThreadX entry function */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _tx_initialize_low_level(VOID)
|
||||
;{
|
||||
.global _tx_initialize_low_level
|
||||
.type _tx_initialize_low_level, @function
|
||||
_tx_initialize_low_level:
|
||||
|
||||
.ifdef TX_ENABLE_HW_STACK_CHECKING
|
||||
mov r0, _tx_system_stack_top_address ; Pickup top of system stack (lowest memory address)
|
||||
sr r0, [KSTACK_TOP] ; Setup KSTACK_TOP
|
||||
mov r0, _tx_system_stack_base_address ; Pickup base of system stack (highest memory address)
|
||||
sr r0, [KSTACK_BASE] ; Setup KSTACK_BASE
|
||||
lr r0, [status32] ; Pickup current STATUS32
|
||||
or r0, r0, STATUS32_SC ; Or in hardware stack checking enable bit (SC)
|
||||
kflag r0 ; Enable hardware stack checking
|
||||
.endif
|
||||
;
|
||||
; /* Save the system stack pointer. */
|
||||
; _tx_thread_system_stack_ptr = (VOID_PTR) (sp);
|
||||
;
|
||||
mov r0, _estack ; Pickup the end of stack address
|
||||
st r0, [gp, _tx_thread_system_stack_ptr@sda] ; Save system stack pointer
|
||||
;
|
||||
;
|
||||
; /* Pickup the first available memory address. */
|
||||
;
|
||||
mov r0, _tx_first_free_address ; Pickup first free memory address
|
||||
;
|
||||
; /* Save the first available memory address. */
|
||||
; _tx_initialize_unused_memory = (VOID_PTR) _end;
|
||||
;
|
||||
st r0, [gp, _tx_initialize_unused_memory@sda]
|
||||
;
|
||||
;
|
||||
; /* Setup Timer 0 for periodic interrupts at interrupt vector 16. */
|
||||
;
|
||||
mov r0, 0 ; Disable additional ISR reg saving/restoring
|
||||
sr r0, [AUX_IRQ_CTRL] ;
|
||||
|
||||
mov r0, 16 ; Select timer 0
|
||||
sr r0, [IRQ_SELECT] ;
|
||||
mov r0, 15 ; Set timer 0 to priority 15
|
||||
sr r0, [IRQ_PRIORITY] ;
|
||||
mov r0, 1 ; Enable this interrupt
|
||||
sr r0, [IRQ_ENABLE] ;
|
||||
mov r0, 0x10000 ; Setup timer period
|
||||
sr r0, [LIMIT0] ;
|
||||
mov r0, 0 ; Clear timer 0 current count
|
||||
sr r0, [COUNT0] ;
|
||||
mov r0, 3 ; Enable timer 0
|
||||
sr r0, [CONTROL0] ;
|
||||
|
||||
.ifdef TX_TIMER_1_SETUP
|
||||
mov r0, 17 ; Select timer 1
|
||||
sr r0, [IRQ_SELECT] ;
|
||||
mov r0, 2 ; Set timer 1 to priority 14
|
||||
sr r0, [IRQ_PRIORITY] ;
|
||||
mov r0, 1 ; Enable this interrupt
|
||||
sr r0, [IRQ_ENABLE] ;
|
||||
mov r0, 0x10020 ; Setup timer period
|
||||
sr r0, [LIMIT1] ;
|
||||
mov r0, 0 ; Clear timer 0 current count
|
||||
sr r0, [COUNT1] ;
|
||||
mov r0, 3 ; Enable timer 0
|
||||
sr r0, [CONTROL1] ;
|
||||
.endif
|
||||
;
|
||||
; /* Done, return to caller. */
|
||||
;
|
||||
j_s.d [blink] ; Return to caller
|
||||
nop
|
||||
;}
|
||||
;
|
||||
;
|
||||
; /* Define default vector table entries. */
|
||||
;
|
||||
.global _tx_memory_error
|
||||
_tx_memory_error:
|
||||
flag 1
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
b _tx_memory_error
|
||||
|
||||
.global _tx_instruction_error
|
||||
_tx_instruction_error:
|
||||
flag 1
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
b _tx_instruction_error
|
||||
|
||||
.global _tx_ev_machine_check
|
||||
_tx_ev_machine_check:
|
||||
flag 1
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
b _tx_ev_machine_check
|
||||
|
||||
.global _tx_ev_tblmiss_inst
|
||||
_tx_ev_tblmiss_inst:
|
||||
flag 1
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
b _tx_ev_tblmiss_inst
|
||||
|
||||
.global _tx_ev_tblmiss_data
|
||||
_tx_ev_tblmiss_data:
|
||||
flag 1
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
b _tx_ev_tblmiss_data
|
||||
|
||||
.global _tx_ev_protection_viol
|
||||
_tx_ev_protection_viol:
|
||||
flag 1
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
b _tx_ev_protection_viol
|
||||
|
||||
.global _tx_ev_privilege_viol
|
||||
_tx_ev_privilege_viol:
|
||||
flag 1
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
b _tx_ev_privilege_viol
|
||||
|
||||
.global _tx_ev_software_int
|
||||
_tx_ev_software_int:
|
||||
flag 1
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
b _tx_ev_software_int
|
||||
|
||||
.global _tx_ev_trap
|
||||
_tx_ev_trap:
|
||||
flag 1
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
b _tx_ev_trap
|
||||
|
||||
.global _tx_ev_extension
|
||||
_tx_ev_extension:
|
||||
flag 1
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
b _tx_ev_extension
|
||||
|
||||
.global _tx_ev_divide_by_zero
|
||||
_tx_ev_divide_by_zero:
|
||||
flag 1
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
b _tx_ev_divide_by_zero
|
||||
|
||||
.global _tx_ev_dc_error
|
||||
_tx_ev_dc_error:
|
||||
flag 1
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
b _tx_ev_dc_error
|
||||
|
||||
.global _tx_ev_maligned
|
||||
_tx_ev_maligned:
|
||||
flag 1
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
b _tx_ev_maligned
|
||||
|
||||
.global _tx_unsued_0
|
||||
_tx_unsued_0:
|
||||
flag 1
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
b _tx_unsued_0
|
||||
|
||||
.global _tx_unused_1
|
||||
_tx_unused_1:
|
||||
flag 1
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
b _tx_unused_1
|
||||
|
||||
.global _tx_timer_0
|
||||
_tx_timer_0:
|
||||
;
|
||||
; /* By default, setup Timer 0 as the ThreadX timer interrupt. */
|
||||
;
|
||||
sub sp, sp, 160 ; Allocate an interrupt stack frame
|
||||
st r0, [sp, 0] ; Save r0
|
||||
st r1, [sp, 4] ; Save r1
|
||||
st r2, [sp, 8] ; Save r2
|
||||
mov r0, 3
|
||||
sr r0, [CONTROL0]
|
||||
|
||||
b _tx_timer_interrupt ; Jump to generic ThreadX timer interrupt
|
||||
; handler
|
||||
; flag 1
|
||||
; nop
|
||||
; nop
|
||||
; nop
|
||||
; b _tx_timer_0
|
||||
|
||||
.global _tx_timer_1
|
||||
_tx_timer_1:
|
||||
sub sp, sp, 160 ; Allocate an interrupt stack frame
|
||||
st blink, [sp, 16] ; Save blink
|
||||
bl _tx_thread_context_save ; Call context save
|
||||
;
|
||||
; /* ISR processing goes here. If the applications wishes to re-enable
|
||||
; interrupts, the SETI instruction can be used here. Also note that
|
||||
; register usage in assembly code must be confined to the compiler
|
||||
; scratch registers. */
|
||||
;
|
||||
mov r0, 3
|
||||
sr r0, [CONTROL1]
|
||||
;
|
||||
b _tx_thread_context_restore ; Call context restore
|
||||
|
||||
; flag 1
|
||||
; nop
|
||||
; nop
|
||||
; nop
|
||||
; b _tx_timer_1
|
||||
|
||||
.global _tx_undefined_0
|
||||
_tx_undefined_0:
|
||||
flag 1
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
b _tx_undefined_0
|
||||
|
||||
.global _tx_undefined_1
|
||||
_tx_undefined_1:
|
||||
flag 1
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
b _tx_undefined_1
|
||||
|
||||
.global _tx_undefined_2
|
||||
_tx_undefined_2:
|
||||
flag 1
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
b _tx_undefined_2
|
||||
|
||||
.end
|
||||
@@ -0,0 +1,29 @@
|
||||
|
||||
.file "vectors.s"
|
||||
.section .ivt,text
|
||||
;; This directive forces this section to stay resident even if stripped out by the -zpurgetext linker option
|
||||
.sectflag .ivt,include
|
||||
|
||||
;// handler's name type number name offset in IVT (hex/dec)
|
||||
.long _start ; exception 0 program entry point offset 0x0 0
|
||||
.long _tx_memory_error ; exception 1 memory_error offset 0x4 4
|
||||
.long _tx_instruction_error ; exception 2 instruction_error offset 0x8 8
|
||||
.long _tx_ev_machine_check ; exception 3 EV_MachineCheck offset 0xC 12
|
||||
.long _tx_ev_tblmiss_inst ; exception 4 EV_TLBMissI offset 0x10 16
|
||||
.long _tx_ev_tblmiss_data ; exception 5 EV_TLBMissD offset 0x14 20
|
||||
.long _tx_ev_protection_viol ; exception 6 EV_ProtV offset 0x18 24
|
||||
.long _tx_ev_privilege_viol ; exception 7 EV_PrivilegeV offset 0x1C 28
|
||||
.long _tx_ev_software_int ; exception 8 EV_SWI offset 0x20 32
|
||||
.long _tx_ev_trap ; exception 9 EV_Trap offset 0x24 36
|
||||
.long _tx_ev_extension ; exception 10 EV_Extension offset 0x28 40
|
||||
.long _tx_ev_divide_by_zero ; exception 11 EV_DivZero offset 0x2C 44
|
||||
.long _tx_ev_dc_error ; exception 12 EV_DCError offset 0x30 48
|
||||
.long _tx_ev_maligned ; exception 13 EV_Maligned offset 0x34 52
|
||||
.long _tx_unsued_0 ; exception 14 unused offset 0x38 56
|
||||
.long _tx_unused_1 ; exception 15 unused offset 0x3C 60
|
||||
.long _tx_timer_0 ; IRQ 16 Timer 0 offset 0x40 64
|
||||
.long _tx_timer_1 ; IRQ 17 Timer 1 offset 0x44 68
|
||||
.long _tx_undefined_0 ; IRQ 18 offset 0x48 72
|
||||
.long _tx_undefined_1 ; IRQ 19 offset 0x4C 76
|
||||
.long _tx_undefined_2 ; IRQ 20 offset 0x50 80
|
||||
|
||||
Reference in New Issue
Block a user