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Release 6.1.9

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Yuxin Zhou
2021-10-14 00:51:26 +00:00
parent 215df45d4b
commit 1af8404c54
1812 changed files with 60698 additions and 249862 deletions
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145
ports/arc_em/metaware/test_validation/threadx_validation/.cproject Normal file
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26
ports/arc_em/metaware/test_validation/threadx_validation/.project Normal file
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654
ports/arc_em/metaware/test_validation/threadx_validation/sample_threadx_validation.c Normal file
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/* This is a small demo of the high-performance ThreadX kernel. It includes examples of eight
threads of different priorities, using a message queue, semaphore, mutex, event flags group,
byte pool, and block pool. */
#include "tx_api.h"
#define TX_TEST_STACK_SIZE (1024 * 2)
#define TX_TEST_QUEUE_SIZE (16)
#define TX_TEST_BYTE_POOL_SIZE (1024 * 4)
#define TX_TEST_BLOCK_POOL_SIZE (1024 * 4)
/* Define the ThreadX object control blocks... */
TX_THREAD tx_test_thread_0;
TX_THREAD tx_test_thread_1;
TX_THREAD tx_test_thread_2;
TX_THREAD tx_test_thread_3;
TX_THREAD tx_test_thread_4;
TX_THREAD tx_test_thread_5;
TX_THREAD tx_test_thread_6;
TX_THREAD tx_test_thread_7;
TX_QUEUE tx_test_queue_0;
TX_SEMAPHORE tx_test_semaphore_0;
TX_MUTEX tx_test_mutex_0;
TX_EVENT_FLAGS_GROUP tx_test_event_flags_0;
TX_BYTE_POOL tx_test_byte_pool_0;
TX_BLOCK_POOL tx_test_block_pool_0;
/* Define the counters used in the demo application... */
ULONG tx_test_error_counter;
ULONG tx_test_thread_0_counter;
ULONG tx_test_thread_1_counter;
ULONG tx_test_thread_2_counter;
/* Define thread prototypes. */
void tx_test_thread_0_entry(ULONG thread_input);
void tx_test_thread_1_entry(ULONG thread_input);
void tx_test_thread_2_entry(ULONG thread_input);
void tx_test_thread_3_and_4_entry(ULONG thread_input);
void tx_test_thread_5_entry(ULONG thread_input);
void tx_test_thread_6_and_7_entry(ULONG thread_input);
/* Define the thread stacks. */
ULONG tx_test_thread_0_stack[TX_TEST_STACK_SIZE / sizeof(ULONG)];
ULONG tx_test_thread_1_stack[TX_TEST_STACK_SIZE / sizeof(ULONG)];
ULONG tx_test_thread_2_stack[TX_TEST_STACK_SIZE / sizeof(ULONG)];
ULONG tx_test_thread_3_stack[TX_TEST_STACK_SIZE / sizeof(ULONG)];
ULONG tx_test_thread_4_stack[TX_TEST_STACK_SIZE / sizeof(ULONG)];
ULONG tx_test_thread_5_stack[TX_TEST_STACK_SIZE / sizeof(ULONG)];
ULONG tx_test_thread_6_stack[TX_TEST_STACK_SIZE / sizeof(ULONG)];
ULONG tx_test_thread_7_stack[TX_TEST_STACK_SIZE / sizeof(ULONG)];
/* Define other buffers used by the test code. */
ULONG tx_test_queue_0_buffer[TX_TEST_QUEUE_SIZE];
ULONG tx_test_byte_pool_0_buffer[TX_TEST_BYTE_POOL_SIZE / sizeof(ULONG)];
ULONG tx_test_block_pool_0_buffer[TX_TEST_BLOCK_POOL_SIZE / sizeof(ULONG)];
/* Define test function prototypes. */
void tx_test_sleep();
void tx_test_busy_loop();
void tx_test_byte_alloc_and_free();
int tx_test_sum_many_params(
void (*f)(),
int p1, int p2, int p3, int p4, int p5, int p6, int p7, int p8,
int p9, int p10, int p11, int p12, int p13, int p14, int p15, int p16,
int p17, int p18, int p19, int p20, int p21, int p22, int p23, int p24,
int p25, int p26, int p27, int p28, int p29, int p30, int p31, int p32,
int p33, int p34, int p35, int p36, int p37, int p38, int p39, int p40,
int p41, int p42, int p43, int p44, int p45, int p46, int p47, int p48,
int p49, int p50, int p51, int p52, int p53, int p54, int p55, int p56,
int p57, int p58, int p59, int p60, int p61, int p62, int p63, int p64,
int p65, int p66, int p67, int p68, int p69, int p70, int p71, int p72);
int tx_test_xor_many_params(
void (*f)(),
int p1, int p2, int p3, int p4, int p5, int p6, int p7, int p8,
int p9, int p10, int p11, int p12, int p13, int p14, int p15, int p16,
int p17, int p18, int p19, int p20, int p21, int p22, int p23, int p24,
int p25, int p26, int p27, int p28, int p29, int p30, int p31, int p32,
int p33, int p34, int p35, int p36, int p37, int p38, int p39, int p40,
int p41, int p42, int p43, int p44, int p45, int p46, int p47, int p48,
int p49, int p50, int p51, int p52, int p53, int p54, int p55, int p56,
int p57, int p58, int p59, int p60, int p61, int p62, int p63, int p64,
int p65, int p66, int p67, int p68, int p69, int p70, int p71, int p72);
/* Define the error handler. */
void tx_test_error_handler()
{
tx_test_error_counter++;
for (;;)
{
/* Stay here forever */
}
}
/* Define main entry point. */
int main()
{
/* Enter the ThreadX kernel. */
tx_kernel_enter();
return(0);
}
/* Define what the initial system looks like. */
void tx_application_define(void *first_unused_memory)
{
UINT status = TX_SUCCESS;
/* Create the ThreadX test thread 0. */
status = tx_thread_create(
&tx_test_thread_0, "ThreadX test thread 0",
tx_test_thread_0_entry, 0,
tx_test_thread_0_stack,
TX_TEST_STACK_SIZE,
5, 5,
TX_NO_TIME_SLICE,
TX_AUTO_START);
if (status != TX_SUCCESS) tx_test_error_handler();
/* Create the ThreadX test thread 1. */
status = tx_thread_create(
&tx_test_thread_1, "ThreadX test thread 1",
tx_test_thread_1_entry, 1,
tx_test_thread_1_stack,
TX_TEST_STACK_SIZE,
7, 7,
3, /* time slice */
TX_AUTO_START);
if (status != TX_SUCCESS) tx_test_error_handler();
/* Create the ThreadX test thread 2. */
status = tx_thread_create(
&tx_test_thread_2, "ThreadX test thread 2",
tx_test_thread_2_entry, 2,
tx_test_thread_2_stack,
TX_TEST_STACK_SIZE,
7, 5,
4, /* time slice */
TX_AUTO_START);
if (status != TX_SUCCESS) tx_test_error_handler();
/* Create the ThreadX test thread 3. */
status = tx_thread_create(
&tx_test_thread_3, "ThreadX test thread 3",
tx_test_thread_3_and_4_entry, 3,
tx_test_thread_3_stack,
TX_TEST_STACK_SIZE,
7, 5,
4, /* time slice */
TX_AUTO_START);
if (status != TX_SUCCESS) tx_test_error_handler();
/* Create the ThreadX test thread 4. */
status = tx_thread_create(
&tx_test_thread_4, "ThreadX test thread 4",
tx_test_thread_3_and_4_entry, 4,
tx_test_thread_4_stack,
TX_TEST_STACK_SIZE,
7, 7,
4, /* time slice */
TX_AUTO_START);
if (status != TX_SUCCESS) tx_test_error_handler();
/* Create the ThreadX test thread 5. */
status = tx_thread_create(
&tx_test_thread_5, "ThreadX test thread 5",
tx_test_thread_5_entry, 5,
tx_test_thread_5_stack,
TX_TEST_STACK_SIZE,
7, 7,
4, /* time slice */
TX_AUTO_START);
if (status != TX_SUCCESS) tx_test_error_handler();
/* Create the ThreadX test thread 6. */
status = tx_thread_create(
&tx_test_thread_6, "ThreadX test thread 6",
tx_test_thread_6_and_7_entry, 6,
tx_test_thread_6_stack,
TX_TEST_STACK_SIZE,
7, 7,
4, /* time slice */
TX_AUTO_START);
if (status != TX_SUCCESS) tx_test_error_handler();
/* Create the ThreadX test thread 2. */
status = tx_thread_create(
&tx_test_thread_7, "ThreadX test thread 7",
tx_test_thread_6_and_7_entry, 7,
tx_test_thread_7_stack,
TX_TEST_STACK_SIZE,
7, 7,
4, /* time slice */
TX_AUTO_START);
if (status != TX_SUCCESS) tx_test_error_handler();
/* Create the message queue shared by threads 1 and 2. */
status = tx_queue_create(&tx_test_queue_0, "ThreadX test queue 0", TX_1_ULONG, tx_test_queue_0_buffer, TX_TEST_QUEUE_SIZE*sizeof(ULONG));
if (status != TX_SUCCESS) tx_test_error_handler();
/* Create the semaphore used for testing. */
status = tx_semaphore_create(&tx_test_semaphore_0, "ThreadX test semaphore 0", 1);
if (status != TX_SUCCESS) tx_test_error_handler();
/* Create the event flags group used by threads 1 and 5. */
status = tx_event_flags_create(&tx_test_event_flags_0, "ThreadX test event flags 0");
if (status != TX_SUCCESS) tx_test_error_handler();
/* Create the mutex used for testing without priority inheritance. */
status = tx_mutex_create(&tx_test_mutex_0, "ThreadX test mutex 0", TX_NO_INHERIT);
if (status != TX_SUCCESS) tx_test_error_handler();
/* Create a byte memory pool for testing. */
status = tx_byte_pool_create(&tx_test_byte_pool_0, "ThreadX test byte pool 0", tx_test_byte_pool_0_buffer, TX_TEST_BYTE_POOL_SIZE);
if (status != TX_SUCCESS) tx_test_error_handler();
/* Quick test of the byte pool during initialization. */
{
CHAR *pointer = TX_NULL;
/* Allocate a block and release the block memory. */
status = tx_byte_allocate(&tx_test_byte_pool_0, (VOID **) &pointer, 123, TX_NO_WAIT);
if (status != TX_SUCCESS) tx_test_error_handler();
/* Release the block back to the pool. */
status = tx_byte_release(pointer);
if (status != TX_SUCCESS) tx_test_error_handler();
}
/* Create a block memory pool to allocate a message buffer from. */
status = tx_block_pool_create(&tx_test_block_pool_0, "ThreadX test block pool 0", 128, tx_test_block_pool_0_buffer, TX_TEST_BLOCK_POOL_SIZE);
if (status != TX_SUCCESS) tx_test_error_handler();
/* Quick test of the block pool during initialization. */
{
CHAR *pointer = TX_NULL;
/* Allocate a block and release the block memory. */
status = tx_block_allocate(&tx_test_block_pool_0, (VOID **) &pointer, TX_NO_WAIT);
if (status != TX_SUCCESS) tx_test_error_handler();
/* Release the block back to the pool. */
status = tx_block_release(pointer);
if (status != TX_SUCCESS) tx_test_error_handler();
}
}
/* Define the test functions. */
void tx_test_sleep()
{
tx_thread_sleep(10);
}
void tx_test_busy_loop()
{
unsigned i;
static volatile unsigned x = 0;
for (i = 0; i < (1024 * 4); ++i)
{
x++;
}
}
void tx_test_byte_alloc_and_free()
{
UINT status;
/* Quick test of the byte pool during initialization. */
{
CHAR *pointer = TX_NULL;
/* Allocate a block and release the block memory. */
status = tx_byte_allocate(&tx_test_byte_pool_0, (VOID **) &pointer, 123, TX_NO_WAIT);
if (status != TX_SUCCESS) tx_test_error_handler();
/* Release the block back to the pool. */
status = tx_byte_release(pointer);
if (status != TX_SUCCESS) tx_test_error_handler();
}
}
int tx_test_sum_many_params(
void (*f)(),
int p1, int p2, int p3, int p4, int p5, int p6, int p7, int p8,
int p9, int p10, int p11, int p12, int p13, int p14, int p15, int p16,
int p17, int p18, int p19, int p20, int p21, int p22, int p23, int p24,
int p25, int p26, int p27, int p28, int p29, int p30, int p31, int p32,
int p33, int p34, int p35, int p36, int p37, int p38, int p39, int p40,
int p41, int p42, int p43, int p44, int p45, int p46, int p47, int p48,
int p49, int p50, int p51, int p52, int p53, int p54, int p55, int p56,
int p57, int p58, int p59, int p60, int p61, int p62, int p63, int p64,
int p65, int p66, int p67, int p68, int p69, int p70, int p71, int p72)
{
volatile int a,b;
a =
p1 + p2 + p3 + p4 + p5 + p6 + p7 + p8 +
p9 + p10 + p11 + p12 + p13 + p14 + p15 + p16 +
p17 + p18 + p19 + p20 + p21 + p22 + p23 + p24 +
p25 + p26 + p27 + p28 + p29 + p30 + p31 + p32 +
p33 + p34 + p35 + p36 + p37 + p38 + p39 + p40 +
p41 + p42 + p43 + p44 + p45 + p46 + p47 + p48 +
p49 + p50 + p51 + p52 + p53 + p54 + p55 + p56 +
p57 + p58 + p59 + p60 + p61 + p62 + p63 + p64 +
p65 + p66 + p67 + p68 + p69 + p70 + p71 + p72;
f();
b =
p1 + p2 + p3 + p4 + p5 + p6 + p7 + p8 +
p9 + p10 + p11 + p12 + p13 + p14 + p15 + p16 +
p17 + p18 + p19 + p20 + p21 + p22 + p23 + p24 +
p25 + p26 + p27 + p28 + p29 + p30 + p31 + p32 +
p33 + p34 + p35 + p36 + p37 + p38 + p39 + p40 +
p41 + p42 + p43 + p44 + p45 + p46 + p47 + p48 +
p49 + p50 + p51 + p52 + p53 + p54 + p55 + p56 +
p57 + p58 + p59 + p60 + p61 + p62 + p63 + p64 +
p65 + p66 + p67 + p68 + p69 + p70 + p71 + p72;
if (a != b)
{
tx_test_error_handler();
}
return a;
}
int tx_test_xor_many_params(
void (*f)(),
int p1, int p2, int p3, int p4, int p5, int p6, int p7, int p8,
int p9, int p10, int p11, int p12, int p13, int p14, int p15, int p16,
int p17, int p18, int p19, int p20, int p21, int p22, int p23, int p24,
int p25, int p26, int p27, int p28, int p29, int p30, int p31, int p32,
int p33, int p34, int p35, int p36, int p37, int p38, int p39, int p40,
int p41, int p42, int p43, int p44, int p45, int p46, int p47, int p48,
int p49, int p50, int p51, int p52, int p53, int p54, int p55, int p56,
int p57, int p58, int p59, int p60, int p61, int p62, int p63, int p64,
int p65, int p66, int p67, int p68, int p69, int p70, int p71, int p72)
{
volatile int a,b;
a =
p1 ^ p2 ^ p3 ^ p4 ^ p5 ^ p6 ^ p7 ^ p8 ^
p9 ^ p10 ^ p11 ^ p12 ^ p13 ^ p14 ^ p15 ^ p16 ^
p17 ^ p18 ^ p19 ^ p20 ^ p21 ^ p22 ^ p23 ^ p24 ^
p25 ^ p26 ^ p27 ^ p28 ^ p29 ^ p30 ^ p31 ^ p32 ^
p33 ^ p34 ^ p35 ^ p36 ^ p37 ^ p38 ^ p39 ^ p40 ^
p41 ^ p42 ^ p43 ^ p44 ^ p45 ^ p46 ^ p47 ^ p48 ^
p49 ^ p50 ^ p51 ^ p52 ^ p53 ^ p54 ^ p55 ^ p56 ^
p57 ^ p58 ^ p59 ^ p60 ^ p61 ^ p62 ^ p63 ^ p64 ^
p65 ^ p66 ^ p67 ^ p68 ^ p69 ^ p70 ^ p71 ^ p72;
f();
b =
p1 ^ p2 ^ p3 ^ p4 ^ p5 ^ p6 ^ p7 ^ p8 ^
p9 ^ p10 ^ p11 ^ p12 ^ p13 ^ p14 ^ p15 ^ p16 ^
p17 ^ p18 ^ p19 ^ p20 ^ p21 ^ p22 ^ p23 ^ p24 ^
p25 ^ p26 ^ p27 ^ p28 ^ p29 ^ p30 ^ p31 ^ p32 ^
p33 ^ p34 ^ p35 ^ p36 ^ p37 ^ p38 ^ p39 ^ p40 ^
p41 ^ p42 ^ p43 ^ p44 ^ p45 ^ p46 ^ p47 ^ p48 ^
p49 ^ p50 ^ p51 ^ p52 ^ p53 ^ p54 ^ p55 ^ p56 ^
p57 ^ p58 ^ p59 ^ p60 ^ p61 ^ p62 ^ p63 ^ p64 ^
p65 ^ p66 ^ p67 ^ p68 ^ p69 ^ p70 ^ p71 ^ p72;
if (a != b)
{
tx_test_error_handler();
}
return a;
}
/* Define the test threads. */
void tx_test_thread_0_entry(ULONG thread_input)
{
UINT status;
/* This thread simply sits in while-forever-sleep loop. */
while(1)
{
volatile int a, b, c, d;
int p1; int p2; int p3; int p4; int p5; int p6; int p7; int p8;
int p9; int p10; int p11; int p12; int p13; int p14; int p15; int p16;
int p17; int p18; int p19; int p20; int p21; int p22; int p23; int p24;
int p25; int p26; int p27; int p28; int p29; int p30; int p31; int p32;
int p33; int p34; int p35; int p36; int p37; int p38; int p39; int p40;
int p41; int p42; int p43; int p44; int p45; int p46; int p47; int p48;
int p49; int p50; int p51; int p52; int p53; int p54; int p55; int p56;
int p57; int p58; int p59; int p60; int p61; int p62; int p63; int p64;
int p65; int p66; int p67; int p68; int p69; int p70; int p71; int p72;
p1 = 1; p2 = 2; p3 = 3; p4 = 4; p5 = 5; p6 = 6; p7 = 7; p8 = 8;
p9 = 9; p10 = 10; p11 = 11; p12 = 12; p13 = 13; p14 = 14; p15 = 15; p16 = 16;
p17 = 17; p18 = 18; p19 = 19; p20 = 20; p21 = 21; p22 = 22; p23 = 23; p24 = 24;
p25 = 25; p26 = 26; p27 = 27; p28 = 28; p29 = 29; p30 = 30; p31 = 31; p32 = 32;
p33 = 33; p34 = 34; p35 = 35; p36 = 36; p37 = 37; p38 = 38; p39 = 39; p40 = 40;
p41 = 41; p42 = 42; p43 = 43; p44 = 44; p45 = 45; p46 = 46; p47 = 47; p48 = 48;
p49 = 49; p50 = 50; p51 = 51; p52 = 52; p53 = 53; p54 = 54; p55 = 55; p56 = 56;
p57 = 57; p58 = 58; p59 = 59; p60 = 60; p61 = 61; p62 = 62; p63 = 63; p64 = 64;
p65 = 65; p66 = 66; p67 = 67; p68 = 68; p69 = 69; p70 = 70; p71 = 71; p72 = 72;
a = tx_test_sum_many_params(
tx_test_sleep,
1, 2, 3, 4, 5, 6, 7, 8,
9, 10, 11, 12, 13, 14, 15, 16,
17, 18, 19, 20, 21, 22, 23, 24,
25, 26, 27, 28, 29, 30, 31, 32,
33, 34, 35, 36, 37, 38, 39, 40,
41, 42, 43, 44, 45, 46, 47, 48,
49, 50, 51, 52, 53, 54, 55, 56,
57, 58, 59, 60, 61, 62, 63, 64,
65, 66, 67, 68, 69, 70, 71, 72);
b = tx_test_xor_many_params(
tx_test_sleep,
1, 2, 3, 4, 5, 6, 7, 8,
9, 10, 11, 12, 13, 14, 15, 16,
17, 18, 19, 20, 21, 22, 23, 24,
25, 26, 27, 28, 29, 30, 31, 32,
33, 34, 35, 36, 37, 38, 39, 40,
41, 42, 43, 44, 45, 46, 47, 48,
49, 50, 51, 52, 53, 54, 55, 56,
57, 58, 59, 60, 61, 62, 63, 64,
65, 66, 67, 68, 69, 70, 71, 72);
/* Increment the thread counter. */
tx_test_thread_0_counter++;
/* Sleep for 10 ticks. */
tx_thread_sleep(10);
c = tx_test_sum_many_params(
tx_test_sleep,
p1, p2, p3, p4, p5, p6, p7, p8,
p9, p10, p11, p12, p13, p14, p15, p16,
p17, p18, p19, p20, p21, p22, p23, p24,
p25, p26, p27, p28, p29, p30, p31, p32,
p33, p34, p35, p36, p37, p38, p39, p40,
p41, p42, p43, p44, p45, p46, p47, p48,
p49, p50, p51, p52, p53, p54, p55, p56,
p57, p58, p59, p60, p61, p62, p63, p64,
p65, p66, p67, p68, p69, p70, p71, p72);
d = tx_test_xor_many_params(
tx_test_sleep,
p1, p2, p3, p4, p5, p6, p7, p8,
p9, p10, p11, p12, p13, p14, p15, p16,
p17, p18, p19, p20, p21, p22, p23, p24,
p25, p26, p27, p28, p29, p30, p31, p32,
p33, p34, p35, p36, p37, p38, p39, p40,
p41, p42, p43, p44, p45, p46, p47, p48,
p49, p50, p51, p52, p53, p54, p55, p56,
p57, p58, p59, p60, p61, p62, p63, p64,
p65, p66, p67, p68, p69, p70, p71, p72);
if (a != c)
{
tx_test_error_handler();
}
if (b != d)
{
tx_test_error_handler();
}
/* Set event flag 0 to wakeup thread 5. */
status = tx_event_flags_set(&tx_test_event_flags_0, 0x1, TX_OR);
/* Check status. */
if (status != TX_SUCCESS)
break;
}
}
void tx_test_thread_1_entry(ULONG thread_input)
{
UINT status;
/* This thread simply sends messages to a queue shared by thread 2. */
while(1)
{
/* Increment the thread counter. */
tx_test_thread_1_counter++;
/* Send message to queue 0. */
status = tx_queue_send(&tx_test_queue_0, &tx_test_thread_1_counter, TX_WAIT_FOREVER);
/* Check completion status. */
if (status != TX_SUCCESS)
break;
}
}
void tx_test_thread_2_entry(ULONG thread_input)
{
ULONG received_message;
UINT status;
/* This thread retrieves messages placed on the queue by thread 1. */
while(1)
{
/* Increment the thread counter. */
tx_test_thread_2_counter++;
/* Retrieve a message from the queue. */
status = tx_queue_receive(&tx_test_queue_0, &received_message, TX_WAIT_FOREVER);
/* Check completion status and make sure the message is what we
expected. */
if ((status != TX_SUCCESS) || (received_message != tx_test_thread_1_counter))
break;
}
}
void tx_test_thread_3_and_4_entry(ULONG thread_input)
{
UINT status;
/* This function is executed from thread 3 and thread 4. As the loop
below shows, these function compete for ownership of semaphore_0. */
while(1)
{
/* Get the semaphore with suspension. */
status = tx_semaphore_get(&tx_test_semaphore_0, TX_WAIT_FOREVER);
/* Check status. */
if (status != TX_SUCCESS)
break;
/* Sleep for 2 ticks to hold the semaphore. */
tx_thread_sleep(2);
/* Release the semaphore. */
status = tx_semaphore_put(&tx_test_semaphore_0);
/* Check status. */
if (status != TX_SUCCESS)
break;
}
}
void tx_test_thread_5_entry(ULONG thread_input)
{
UINT status;
ULONG actual_flags;
/* This thread simply waits for an event in a forever loop. */
while(1)
{
/* Wait for event flag 0. */
status = tx_event_flags_get(&tx_test_event_flags_0, 0x1, TX_OR_CLEAR,
&actual_flags, TX_WAIT_FOREVER);
/* Check status. */
if ((status != TX_SUCCESS) || (actual_flags != 0x1))
break;
}
}
void tx_test_thread_6_and_7_entry(ULONG thread_input)
{
UINT status;
/* This function is executed from thread 6 and thread 7. As the loop
below shows, these function compete for ownership of mutex_0. */
while(1)
{
/* Get the mutex with suspension. */
status = tx_mutex_get(&tx_test_mutex_0, TX_WAIT_FOREVER);
/* Check status. */
if (status != TX_SUCCESS)
break;
/* Get the mutex again with suspension. This shows
that an owning thread may retrieve the mutex it
owns multiple times. */
status = tx_mutex_get(&tx_test_mutex_0, TX_WAIT_FOREVER);
/* Check status. */
if (status != TX_SUCCESS)
break;
/* Sleep for 2 ticks to hold the mutex. */
tx_thread_sleep(2);
/* Release the mutex. */
status = tx_mutex_put(&tx_test_mutex_0);
/* Check status. */
if (status != TX_SUCCESS)
break;
/* Release the mutex again. This will actually
release ownership since it was obtained twice. */
status = tx_mutex_put(&tx_test_mutex_0);
/* Check status. */
if (status != TX_SUCCESS)
break;
}
}

55
ports/arc_em/metaware/test_validation/threadx_validation/sample_threadx_validation.cmd Normal file
View File

@@ -0,0 +1,55 @@
//
// This is the linker script example (SRV3-style).
// (c) Synopsys, 2013
//
//
//number of exceptions and interrupts
NUMBER_OF_EXCEPTIONS = 16;//it is fixed (16)
NUMBER_OF_INTERRUPTS = 5;//depends on HW configuration
//define Interrupt Vector Table size
IVT_SIZE_ITEMS = (NUMBER_OF_EXCEPTIONS + NUMBER_OF_INTERRUPTS);//the total IVT size (in "items")
IVT_SIZE_BYTES = IVT_SIZE_ITEMS * 4;//in bytes
//define ICCM and DCCM locations
MEMORY {
ICCM: ORIGIN = 0x00000000, LENGTH = 128K
DCCM: ORIGIN = 0x80000000, LENGTH = 128K
}
//define sections and groups
SECTIONS {
GROUP: {
.ivt (TEXT) : # Interrupt table
{
___ivt1 = .;
* (.ivt)
___ivt2 = .;
// Make the IVT at least IVT_SIZE_BYTES
. += (___ivt2 - ___ivt1 < IVT_SIZE_BYTES) ? (IVT_SIZE_BYTES - (___ivt2 - ___ivt1)) : 0;
}
.ivh (TEXT) : // Interrupt handlers
//TEXT sections
.text? : { *('.text$crt*') }
* (TEXT): {}
//Literals
* (LIT): {}
} > ICCM
GROUP: {
//data sections
.sdata?: {}
.sbss?: {}
*(DATA): {}
*(BSS): {}
//stack
.stack_top: {}
.stack ALIGN(4) SIZE(DEFINED _STACKSIZE?_STACKSIZE:4096): {}
.stack_base: {}
//heap (empty)
.heap? ALIGN(4) SIZE(DEFINED _HEAPSIZE?_HEAPSIZE:0): {}
.free_memory: {}
} > DCCM
}

360
ports/arc_em/metaware/test_validation/threadx_validation/tx_initialize_low_level.s Normal file
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@@ -0,0 +1,360 @@
;/**************************************************************************/
;/* */
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
;/* */
;/* This software is licensed under the Microsoft Software License */
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** Initialize */
;/** */
;/**************************************************************************/
;/**************************************************************************/
.equ IRQ_SELECT, 0x40B
.equ KSTACK_TOP, 0x264
.equ KSTACK_BASE, 0x265
.equ STATUS32_SC, 0x4000
;
; /* Define section for placement after all linker allocated RAM memory. This
; is used to calculate the first free address that is passed to
; tx_appication_define, soley for the ThreadX application's use. */
;
.section ".free_memory","aw"
.align 4
.global _tx_first_free_address
_tx_first_free_address:
.space 4
;
; /* Define section for placement before the main stack area for setting
; up the STACK_TOP address for hardware stack checking. */
;
.section ".stack_top","aw"
.align 4
.global _tx_system_stack_top_address
_tx_system_stack_top_address:
.space 4
;
; /* Define section for placement after the main stack area for setting
; up the STACK_BASE address for hardware stack checking. */
;
.section ".stack_base","aw"
.align 4
.global _tx_system_stack_base_address
_tx_system_stack_base_address:
.space 4
;
;
.text
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_initialize_low_level ARCv2_EM/MetaWare */
;/* 6.x */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function is responsible for any low-level processor */
;/* initialization, including setting up interrupt vectors, setting */
;/* up a periodic timer interrupt source, saving the system stack */
;/* pointer for use in ISR processing later, and finding the first */
;/* available RAM memory address for tx_application_define. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* CALLED BY */
;/* */
;/* _tx_initialize_kernel_enter ThreadX entry function */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
;/* */
;/**************************************************************************/
;VOID _tx_initialize_low_level(VOID)
;{
.global _tx_initialize_low_level
.type _tx_initialize_low_level, @function
_tx_initialize_low_level:
.ifdef TX_ENABLE_HW_STACK_CHECKING
mov r0, _tx_system_stack_top_address ; Pickup top of system stack (lowest memory address)
sr r0, [KSTACK_TOP] ; Setup KSTACK_TOP
mov r0, _tx_system_stack_base_address ; Pickup base of system stack (highest memory address)
sr r0, [KSTACK_BASE] ; Setup KSTACK_BASE
lr r0, [status32] ; Pickup current STATUS32
or r0, r0, STATUS32_SC ; Or in hardware stack checking enable bit (SC)
kflag r0 ; Enable hardware stack checking
.endif
;
; /* Save the system stack pointer. */
; _tx_thread_system_stack_ptr = (VOID_PTR) (sp);
;
mov r0, _estack ; Pickup the end of stack address
st r0, [gp, _tx_thread_system_stack_ptr@sda] ; Save system stack pointer
;
;
; /* Pickup the first available memory address. */
;
mov r0, _tx_first_free_address ; Pickup first free memory address
;
; /* Save the first available memory address. */
; _tx_initialize_unused_memory = (VOID_PTR) _end;
;
st r0, [gp, _tx_initialize_unused_memory@sda]
;
;
; /* Setup Timer 0 for periodic interrupts at interrupt vector 16. */
;
mov r0, 0 ; Disable additional ISR reg saving/restoring
sr r0, [AUX_IRQ_CTRL] ;
mov r0, 16 ; Select timer 0
sr r0, [IRQ_SELECT] ;
mov r0, 15 ; Set timer 0 to priority 15
sr r0, [IRQ_PRIORITY] ;
mov r0, 1 ; Enable this interrupt
sr r0, [IRQ_ENABLE] ;
mov r0, 0x10000 ; Setup timer period
sr r0, [LIMIT0] ;
mov r0, 0 ; Clear timer 0 current count
sr r0, [COUNT0] ;
mov r0, 3 ; Enable timer 0
sr r0, [CONTROL0] ;
.ifdef TX_TIMER_1_SETUP
mov r0, 17 ; Select timer 1
sr r0, [IRQ_SELECT] ;
mov r0, 2 ; Set timer 1 to priority 14
sr r0, [IRQ_PRIORITY] ;
mov r0, 1 ; Enable this interrupt
sr r0, [IRQ_ENABLE] ;
mov r0, 0x10020 ; Setup timer period
sr r0, [LIMIT1] ;
mov r0, 0 ; Clear timer 0 current count
sr r0, [COUNT1] ;
mov r0, 3 ; Enable timer 0
sr r0, [CONTROL1] ;
.endif
;
; /* Done, return to caller. */
;
j_s.d [blink] ; Return to caller
nop
;}
;
;
; /* Define default vector table entries. */
;
.global _tx_memory_error
_tx_memory_error:
flag 1
nop
nop
nop
b _tx_memory_error
.global _tx_instruction_error
_tx_instruction_error:
flag 1
nop
nop
nop
b _tx_instruction_error
.global _tx_ev_machine_check
_tx_ev_machine_check:
flag 1
nop
nop
nop
b _tx_ev_machine_check
.global _tx_ev_tblmiss_inst
_tx_ev_tblmiss_inst:
flag 1
nop
nop
nop
b _tx_ev_tblmiss_inst
.global _tx_ev_tblmiss_data
_tx_ev_tblmiss_data:
flag 1
nop
nop
nop
b _tx_ev_tblmiss_data
.global _tx_ev_protection_viol
_tx_ev_protection_viol:
flag 1
nop
nop
nop
b _tx_ev_protection_viol
.global _tx_ev_privilege_viol
_tx_ev_privilege_viol:
flag 1
nop
nop
nop
b _tx_ev_privilege_viol
.global _tx_ev_software_int
_tx_ev_software_int:
flag 1
nop
nop
nop
b _tx_ev_software_int
.global _tx_ev_trap
_tx_ev_trap:
flag 1
nop
nop
nop
b _tx_ev_trap
.global _tx_ev_extension
_tx_ev_extension:
flag 1
nop
nop
nop
b _tx_ev_extension
.global _tx_ev_divide_by_zero
_tx_ev_divide_by_zero:
flag 1
nop
nop
nop
b _tx_ev_divide_by_zero
.global _tx_ev_dc_error
_tx_ev_dc_error:
flag 1
nop
nop
nop
b _tx_ev_dc_error
.global _tx_ev_maligned
_tx_ev_maligned:
flag 1
nop
nop
nop
b _tx_ev_maligned
.global _tx_unsued_0
_tx_unsued_0:
flag 1
nop
nop
nop
b _tx_unsued_0
.global _tx_unused_1
_tx_unused_1:
flag 1
nop
nop
nop
b _tx_unused_1
.global _tx_timer_0
_tx_timer_0:
;
; /* By default, setup Timer 0 as the ThreadX timer interrupt. */
;
sub sp, sp, 160 ; Allocate an interrupt stack frame
st r0, [sp, 0] ; Save r0
st r1, [sp, 4] ; Save r1
st r2, [sp, 8] ; Save r2
mov r0, 3
sr r0, [CONTROL0]
b _tx_timer_interrupt ; Jump to generic ThreadX timer interrupt
; handler
; flag 1
; nop
; nop
; nop
; b _tx_timer_0
.global _tx_timer_1
_tx_timer_1:
sub sp, sp, 160 ; Allocate an interrupt stack frame
st blink, [sp, 16] ; Save blink
bl _tx_thread_context_save ; Call context save
;
; /* ISR processing goes here. If the applications wishes to re-enable
; interrupts, the SETI instruction can be used here. Also note that
; register usage in assembly code must be confined to the compiler
; scratch registers. */
;
mov r0, 3
sr r0, [CONTROL1]
;
b _tx_thread_context_restore ; Call context restore
; flag 1
; nop
; nop
; nop
; b _tx_timer_1
.global _tx_undefined_0
_tx_undefined_0:
flag 1
nop
nop
nop
b _tx_undefined_0
.global _tx_undefined_1
_tx_undefined_1:
flag 1
nop
nop
nop
b _tx_undefined_1
.global _tx_undefined_2
_tx_undefined_2:
flag 1
nop
nop
nop
b _tx_undefined_2
.end

29
ports/arc_em/metaware/test_validation/threadx_validation/vectors.s Normal file
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@@ -0,0 +1,29 @@
.file "vectors.s"
.section .ivt,text
;; This directive forces this section to stay resident even if stripped out by the -zpurgetext linker option
.sectflag .ivt,include
;// handler's name type number name offset in IVT (hex/dec)
.long _start ; exception 0 program entry point offset 0x0 0
.long _tx_memory_error ; exception 1 memory_error offset 0x4 4
.long _tx_instruction_error ; exception 2 instruction_error offset 0x8 8
.long _tx_ev_machine_check ; exception 3 EV_MachineCheck offset 0xC 12
.long _tx_ev_tblmiss_inst ; exception 4 EV_TLBMissI offset 0x10 16
.long _tx_ev_tblmiss_data ; exception 5 EV_TLBMissD offset 0x14 20
.long _tx_ev_protection_viol ; exception 6 EV_ProtV offset 0x18 24
.long _tx_ev_privilege_viol ; exception 7 EV_PrivilegeV offset 0x1C 28
.long _tx_ev_software_int ; exception 8 EV_SWI offset 0x20 32
.long _tx_ev_trap ; exception 9 EV_Trap offset 0x24 36
.long _tx_ev_extension ; exception 10 EV_Extension offset 0x28 40
.long _tx_ev_divide_by_zero ; exception 11 EV_DivZero offset 0x2C 44
.long _tx_ev_dc_error ; exception 12 EV_DCError offset 0x30 48
.long _tx_ev_maligned ; exception 13 EV_Maligned offset 0x34 52
.long _tx_unsued_0 ; exception 14 unused offset 0x38 56
.long _tx_unused_1 ; exception 15 unused offset 0x3C 60
.long _tx_timer_0 ; IRQ 16 Timer 0 offset 0x40 64
.long _tx_timer_1 ; IRQ 17 Timer 1 offset 0x44 68
.long _tx_undefined_0 ; IRQ 18 offset 0x48 72
.long _tx_undefined_1 ; IRQ 19 offset 0x4C 76
.long _tx_undefined_2 ; IRQ 20 offset 0x50 80

137
ports/arc_em/metaware/test_validation/tx/.cproject Normal file
View File

@@ -0,0 +1,137 @@
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48
ports/arc_em/metaware/test_validation/tx/.project Normal file
View File

@@ -0,0 +1,48 @@
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