Release 6.1.9
This commit is contained in:
Yuxin Zhou
@@ -12,7 +12,7 @@
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/**************************************************************************/
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/**************************************************************************/
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/** */
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/** */
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/** ThreadX Component */
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/** */
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/** Port Specific */
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||||
@@ -21,37 +21,39 @@
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/**************************************************************************/
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||||
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||||
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/**************************************************************************/
|
||||
/* */
|
||||
/* PORT SPECIFIC C INFORMATION RELEASE */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* PORT SPECIFIC C INFORMATION RELEASE */
|
||||
/* */
|
||||
/* tx_port.h RXv2/CCRX */
|
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/* 6.1.7 */
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||||
/* */
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/* AUTHOR */
|
||||
/* 6.1.9 */
|
||||
/* */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* William E. Lamie, Microsoft Corporation */
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||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This file contains data type definitions that make the ThreadX */
|
||||
/* real-time kernel function identically on a variety of different */
|
||||
/* processor architectures. For example, the size or number of bits */
|
||||
/* in an "int" data type vary between microprocessor architectures and */
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||||
/* even C compilers for the same microprocessor. ThreadX does not */
|
||||
/* directly use native C data types. Instead, ThreadX creates its */
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||||
/* own special types that can be mapped to actual data types by this */
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||||
/* file to guarantee consistency in the interface and functionality. */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
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||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This file contains data type definitions that make the ThreadX */
|
||||
/* real-time kernel function identically on a variety of different */
|
||||
/* processor architectures. For example, the size or number of bits */
|
||||
/* in an "int" data type vary between microprocessor architectures and */
|
||||
/* even C compilers for the same microprocessor. ThreadX does not */
|
||||
/* directly use native C data types. Instead, ThreadX creates its */
|
||||
/* own special types that can be mapped to actual data types by this */
|
||||
/* file to guarantee consistency in the interface and functionality. */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 12-30-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
/* 06-02-2021 William E. Lamie Modified comments, */
|
||||
/* resulting in version 6.1.7 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
/* 10-15-2021 William E. Lamie Modified comment(s), */
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||||
/* resulting in version 6.1.9 */
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||||
/* */
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/**************************************************************************/
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#ifndef TX_PORT_H
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#define TX_PORT_H
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@@ -273,7 +275,7 @@ extern volatile ULONG _tx_thread_system_state;
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#ifdef TX_THREAD_INIT
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CHAR _tx_version_id[] =
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"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX RXv2/CCRX Version 6.1.7 *";
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"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX RXv2/CCRX Version 6.1.9 *";
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#else
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extern CHAR _tx_version_id[];
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#endif
|
||||
|
||||
@@ -153,6 +153,11 @@ For generic code revision information, please refer to the readme_threadx_generi
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file, which is included in your distribution. The following details the revision
|
||||
information associated with this specific port of ThreadX:
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||||
|
||||
10-15-2021 Release 6.1.9 changes:
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||||
tx_thread_context_restore.src Removed unnecessary stack type placement
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||||
tx_thread_schedule.src Removed unnecessary stack type checking
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||||
tx_thread_stack_build.src Removed unnecessary stack type placement
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||||
|
||||
06-02-2021 Release 6.1.7 changes:
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||||
readme_threadx.txt Updated instructions on how to use execution profile.
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@@ -12,8 +12,8 @@
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;
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||||
;/**************************************************************************/
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||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Initialize */
|
||||
;/** */
|
||||
@@ -29,47 +29,50 @@
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.SECTION P,CODE
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|
||||
;
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||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_initialize_low_level RXv2/CCRX */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* 6.1.9 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function is responsible for any low-level processor */
|
||||
;/* initialization, including setting up interrupt vectors, setting */
|
||||
;/* up a periodic timer interrupt source, saving the system stack */
|
||||
;/* pointer for use in ISR processing later, and finding the first */
|
||||
;/* available RAM memory address for tx_application_define. */
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||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* _tx_initialize_kernel_enter ThreadX entry function */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function is responsible for any low-level processor */
|
||||
;/* initialization, including setting up interrupt vectors, setting */
|
||||
;/* up a periodic timer interrupt source, saving the system stack */
|
||||
;/* pointer for use in ISR processing later, and finding the first */
|
||||
;/* available RAM memory address for tx_application_define. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* _tx_initialize_kernel_enter ThreadX entry function */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-30-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* 10-15-2021 William E. Lamie Modified comment(s), */
|
||||
;/* resulting in version 6.1.9 */
|
||||
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
|
||||
.GLB __tx_initialize_low_level
|
||||
__tx_initialize_low_level:
|
||||
|
||||
@@ -12,8 +12,8 @@
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Thread */
|
||||
;/** */
|
||||
@@ -40,46 +40,50 @@
|
||||
.GLB __tx_thread_preempt_disable
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||||
;
|
||||
.SECTION P,CODE
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_context_restore RXv2/CCRX */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* 6.1.9 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function restores the interrupt context if it is processing a */
|
||||
;/* nested interrupt. If not, it returns to the interrupt thread if no */
|
||||
;/* preemption is necessary. Otherwise, if preemption is necessary or */
|
||||
;/* if no thread was running, the function returns to the scheduler. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* _tx_thread_schedule Thread scheduling routine */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* ISRs Interrupt Service Routines */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function restores the interrupt context if it is processing a */
|
||||
;/* nested interrupt. If not, it returns to the interrupt thread if no */
|
||||
;/* preemption is necessary. Otherwise, if preemption is necessary or */
|
||||
;/* if no thread was running, the function returns to the scheduler. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* _tx_thread_schedule Thread scheduling routine */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* ISRs Interrupt Service Routines */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-30-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* 10-15-2021 William E. Lamie Modified comment(s), and */
|
||||
;/* removed unnecessary stack */
|
||||
;/* type placement, */
|
||||
;/* resulting in version 6.1.9 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _tx_thread_context_restore(VOID)
|
||||
;{
|
||||
.GLB __tx_thread_context_restore
|
||||
@@ -87,7 +91,7 @@ __tx_thread_context_restore:
|
||||
;
|
||||
; /* Lockout interrupts. */
|
||||
|
||||
CLRPSW I ; disable interrupts
|
||||
CLRPSW I ; Disable interrupts
|
||||
|
||||
; /* Determine if interrupts are nested. */
|
||||
; if (--_tx_thread_system_state)
|
||||
@@ -106,11 +110,11 @@ __tx_thread_context_restore:
|
||||
; and return to the point of interrupt. */
|
||||
;
|
||||
__tx_thread_nested_restore:
|
||||
POPC FPSW ; restore FPU status
|
||||
POPM R14-R15 ; restore R14-R15
|
||||
POPM R3-R5 ; restore R3-R5
|
||||
POPM R1-R2 ; restore R1-R2
|
||||
RTE ; return to point of interrupt, restore PSW including IPL
|
||||
POPC FPSW ; Restore FPU status
|
||||
POPM R14-R15 ; Restore R14-R15
|
||||
POPM R3-R5 ; Restore R3-R5
|
||||
POPM R1-R2 ; Restore R1-R2
|
||||
RTE ; Return to point of interrupt, restore PSW including IPL
|
||||
; }
|
||||
|
||||
__tx_thread_not_nested_restore:
|
||||
@@ -125,22 +129,22 @@ __tx_thread_not_nested_restore:
|
||||
CMP #0, R2
|
||||
BEQ __tx_thread_idle_system_restore
|
||||
|
||||
MOV.L #__tx_thread_preempt_disable, R3 ; pick up preempt disable flag
|
||||
MOV.L #__tx_thread_preempt_disable, R3 ; Pick up preempt disable flag
|
||||
MOV.L [R3], R3
|
||||
CMP #0, R3
|
||||
BNE __tx_thread_no_preempt_restore ; if pre-empt disable flag set, we simply return to the original point of interrupt regardless
|
||||
BNE __tx_thread_no_preempt_restore ; If pre-empt disable flag set, we simply return to the original point of interrupt regardless
|
||||
|
||||
MOV.L #__tx_thread_execute_ptr, R3 ; (_tx_thread_current_ptr != _tx_thread_execute_ptr)
|
||||
CMP [R3], R2
|
||||
BNE __tx_thread_preempt_restore ; jump to pre-empt restoring
|
||||
BNE __tx_thread_preempt_restore ; Jump to pre-empt restoring
|
||||
;
|
||||
__tx_thread_no_preempt_restore:
|
||||
SETPSW U ; user stack
|
||||
POPC FPSW ; restore FPU status
|
||||
POPM R14-R15 ; restore R14-R15
|
||||
POPM R3-R5 ; restore R3-R5
|
||||
POPM R1-R2 ; restore R1-R2
|
||||
RTE ; return to point of interrupt, restore PSW including IPL
|
||||
SETPSW U ; User stack
|
||||
POPC FPSW ; Restore FPU status
|
||||
POPM R14-R15 ; Restore R14-R15
|
||||
POPM R3-R5 ; Restore R3-R5
|
||||
POPM R1-R2 ; Restore R1-R2
|
||||
RTE ; Return to point of interrupt, restore PSW including IPL
|
||||
|
||||
; }
|
||||
; else
|
||||
@@ -152,26 +156,26 @@ __tx_thread_preempt_restore:
|
||||
; if (_tx_timer_time_slice)
|
||||
; {
|
||||
|
||||
MOV.L #__tx_timer_time_slice, R3 ; Pickup time-slice address
|
||||
MOV.L [R3],R4 ; Pickup actual time-slice
|
||||
MOV.L #__tx_timer_time_slice, R3 ; Pickup time-slice address
|
||||
MOV.L [R3],R4 ; Pickup actual time-slice
|
||||
CMP #0, R4
|
||||
BEQ __tx_thread_dont_save_ts ; no time slice to save
|
||||
BEQ __tx_thread_dont_save_ts ; No time slice to save
|
||||
;
|
||||
; _tx_thread_current_ptr -> tx_thread_time_slice = _tx_timer_time_slice;
|
||||
; _tx_timer_time_slice = 0;
|
||||
;
|
||||
MOV.L R4,24[R2] ; Save thread's time slice
|
||||
MOV.L #0,R4 ; Clear value
|
||||
MOV.L R4,[R3] ; Disable global time slice flag
|
||||
MOV.L R4,24[R2] ; Save thread's time slice
|
||||
MOV.L #0,R4 ; Clear value
|
||||
MOV.L R4,[R3] ; Disable global time slice flag
|
||||
; }
|
||||
__tx_thread_dont_save_ts:
|
||||
;
|
||||
; /* Now store the remaining registers! */
|
||||
|
||||
SETPSW U ; user stack
|
||||
SETPSW U ; User stack
|
||||
PUSHM R6-R13
|
||||
|
||||
MVFACGU #0, A1, R4 ; Save accumulators.
|
||||
MVFACGU #0, A1, R4 ; Save accumulators.
|
||||
MVFACHI #0, A1, R5
|
||||
MVFACLO #0, A1, R6
|
||||
PUSHM R4-R6
|
||||
@@ -180,28 +184,24 @@ __tx_thread_dont_save_ts:
|
||||
MVFACLO #0, A0, R6
|
||||
PUSHM R4-R6
|
||||
|
||||
MOV.L #1, R3 ; indicate interrupt stack frame
|
||||
PUSH.L R3
|
||||
|
||||
;
|
||||
; /* Clear the current task pointer. */
|
||||
; _tx_thread_current_ptr = TX_NULL;
|
||||
; R1 -> _tx_thread_current_ptr
|
||||
; R2 -> *_tx_thread_current_ptr
|
||||
|
||||
MOV.L R0,8[R2] ; Save thread's stack pointer in thread control block
|
||||
MOV.L #0,R2 ; Build NULL value
|
||||
MOV.L R2,[R1] ; Set current thread to NULL
|
||||
MOV.L R0,8[R2] ; Save thread's stack pointer in thread control block
|
||||
MOV.L #0,R2 ; Build NULL value
|
||||
MOV.L R2,[R1] ; Set current thread to NULL
|
||||
|
||||
; /* Return to the scheduler. */
|
||||
; _tx_thread_schedule();
|
||||
|
||||
__tx_thread_idle_system_restore:
|
||||
MVTC #0, PSW ; reset interrupt priority level to 0
|
||||
BRA __tx_thread_schedule ; jump to scheduler
|
||||
MVTC #0, PSW ; Reset interrupt priority level to 0
|
||||
BRA __tx_thread_schedule ; Jump to scheduler
|
||||
; }
|
||||
;
|
||||
;}
|
||||
;
|
||||
.END
|
||||
|
||||
|
||||
@@ -35,45 +35,47 @@
|
||||
.GLB __tx_thread_system_stack_ptr
|
||||
|
||||
.SECTION P,CODE
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_context_save RXv2/CCRX */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* 6.1.9 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function saves the context of an executing thread in the */
|
||||
;/* beginning of interrupt processing. The function also ensures that */
|
||||
;/* the system stack is used upon return to the calling ISR. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* ISRs */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function saves the context of an executing thread in the */
|
||||
;/* beginning of interrupt processing. The function also ensures that */
|
||||
;/* the system stack is used upon return to the calling ISR. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* ISRs */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-30-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* 10-15-2021 William E. Lamie Modified comment(s), */
|
||||
;/* resulting in version 6.1.9 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _tx_thread_context_save(VOID)
|
||||
;{
|
||||
.GLB __tx_thread_context_save
|
||||
@@ -93,24 +95,24 @@ __tx_thread_context_save:
|
||||
; {
|
||||
;
|
||||
|
||||
MOV.L #__tx_thread_system_state, R1 ; pick up address of system state
|
||||
MOV.L [R1], R2 ; pick up system state
|
||||
CMP #0, R2 ; 0 -> no nesting
|
||||
MOV.L #__tx_thread_system_state, R1 ; Pick up address of system state
|
||||
MOV.L [R1], R2 ; Pick up system state
|
||||
CMP #0, R2 ; 0 -> no nesting
|
||||
BEQ __tx_thread_not_nested_save
|
||||
;
|
||||
; /* Nested interrupt condition. */
|
||||
;
|
||||
ADD #1, r2 ; _tx_thread_system_state++
|
||||
ADD #1, r2 ; _tx_thread_system_state++
|
||||
MOV.L r2, [r1]
|
||||
|
||||
;
|
||||
; /* Save the rest of the scratch registers on the interrupt stack and return to the
|
||||
; calling ISR. */
|
||||
POP R1 ; recuperate return address from stack
|
||||
POP R1 ; Recuperate return address from stack
|
||||
PUSHM R3-R5
|
||||
PUSHM R14-R15
|
||||
PUSHC FPSW ; (top) FPSW, R14, R15, R3, R4, R5, R1, R2, PC, PSW (bottom)
|
||||
JMP R1 ; return address was preserved in R1
|
||||
PUSHC FPSW ; (top) FPSW, R14, R15, R3, R4, R5, R1, R2, PC, PSW (bottom)
|
||||
JMP R1 ; Return address was preserved in R1
|
||||
|
||||
;
|
||||
__tx_thread_not_nested_save:
|
||||
@@ -120,38 +122,38 @@ __tx_thread_not_nested_save:
|
||||
; else if (_tx_thread_current_ptr)
|
||||
; {
|
||||
;
|
||||
ADD #1, R2 ; _tx_thread_system_state++
|
||||
ADD #1, R2 ; _tx_thread_system_state++
|
||||
MOV.L R2, [R1]
|
||||
|
||||
MOV.L #__tx_thread_current_ptr, R2 ; Pickup current thread pointer
|
||||
MOV.L [R2], R2
|
||||
CMP #0,R2 ; Is it NULL?
|
||||
CMP #0,R2 ; Is it NULL?
|
||||
BEQ __tx_thread_idle_system_save ; Yes, idle system is running - idle restore
|
||||
;
|
||||
; /* Move stack frame over to the current threads stack. */
|
||||
; /* complete stack frame with registers not saved yet (R3-R5, R14-R15, FPSW) */
|
||||
;
|
||||
MVFC USP, R1 ; pick up user stack pointer
|
||||
MVFC USP, R1 ; Pick up user stack pointer
|
||||
MOV.L 16[R0], R2
|
||||
MOV.L R2, [-R1] ; save PSW on thread stack
|
||||
MOV.L R2, [-R1] ; Save PSW on thread stack
|
||||
MOV.L 12[R0], R2
|
||||
MOV.L R2, [-R1] ; save PC on thread stack
|
||||
MOV.L R2, [-R1] ; Save PC on thread stack
|
||||
MOV.L 8[R0], R2
|
||||
MOV.L R2, [-R1] ; save R2 on thread stack
|
||||
MOV.L R2, [-R1] ; Save R2 on thread stack
|
||||
MOV.L 4[R0], R2
|
||||
MOV.L R2, [-R1] ; save R1 on thread stack
|
||||
MOV.L R5, [-R1] ; save R5 on thread stack
|
||||
MOV.L R4, [-R1] ; save R4 on thread stack
|
||||
MOV.L R3, [-R1] ; save R3 on thread stack
|
||||
MOV.L R15, [-R1] ; save R15 on thread stack
|
||||
MOV.L R14, [-R1] ; save R14 on thread stack
|
||||
MOV.L R2, [-R1] ; Save R1 on thread stack
|
||||
MOV.L R5, [-R1] ; Save R5 on thread stack
|
||||
MOV.L R4, [-R1] ; Save R4 on thread stack
|
||||
MOV.L R3, [-R1] ; Save R3 on thread stack
|
||||
MOV.L R15, [-R1] ; Save R15 on thread stack
|
||||
MOV.L R14, [-R1] ; Save R14 on thread stack
|
||||
MVFC FPSW, R3
|
||||
MOV.L R3, [-R1] ; save FPSW on thread stack
|
||||
MOV.L R3, [-R1] ; Save FPSW on thread stack
|
||||
|
||||
POP R2 ; pick up return address from interrupt stack
|
||||
ADD #16, R0, R0 ; correct interrupt stack pointer back to the bottom
|
||||
MVTC R1, USP ; set user/thread stack pointer
|
||||
JMP R2 ; return to ISR
|
||||
POP R2 ; Pick up return address from interrupt stack
|
||||
ADD #16, R0, R0 ; Correct interrupt stack pointer back to the bottom
|
||||
MVTC R1, USP ; Set user/thread stack pointer
|
||||
JMP R2 ; Return to ISR
|
||||
|
||||
; }
|
||||
; else
|
||||
@@ -161,11 +163,10 @@ __tx_thread_idle_system_save:
|
||||
;
|
||||
; /* Interrupt occurred in the scheduling loop. */
|
||||
;
|
||||
POP R1 ; pick up return address
|
||||
ADD #16, R0, R0 ; correct interrupt stack pointer back to the bottom (PC), don't care about saved registers
|
||||
JMP R1 ; return to caller
|
||||
POP R1 ; Pick up return address
|
||||
ADD #16, R0, R0 ; Correct interrupt stack pointer back to the bottom (PC), don't care about saved registers
|
||||
JMP R1 ; Return to caller
|
||||
;
|
||||
; }
|
||||
;}
|
||||
.END
|
||||
|
||||
|
||||
@@ -12,8 +12,8 @@
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Thread */
|
||||
;/** */
|
||||
@@ -30,44 +30,46 @@
|
||||
;
|
||||
;
|
||||
.SECTION P,CODE
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_interrupt_control RXv2/CCRX */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_interrupt_control RXc2/CCRX */
|
||||
;/* 6.1.9 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function is responsible for changing the interrupt lockout */
|
||||
;/* posture of the system. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* new_posture New interrupt lockout posture */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* old_posture Old interrupt lockout posture */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* Application Code */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function is responsible for changing the interrupt lockout */
|
||||
;/* posture of the system. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* new_posture New interrupt lockout posture */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* old_posture Old interrupt lockout posture */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* Application Code */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-30-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* 10-15-2021 William E. Lamie Modified comment(s), */
|
||||
;/* resulting in version 6.1.9 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;UINT _tx_thread_interrupt_control(UINT new_posture)
|
||||
;{
|
||||
|
||||
@@ -84,13 +86,12 @@ __tx_thread_interrupt_control:
|
||||
; /* Apply the new interrupt posture. */
|
||||
;
|
||||
|
||||
BTST #16, R1 ; test I bit of PSW of "new posture"
|
||||
BMNE #16, R2 ; conditionally set I bit of intermediate posture
|
||||
BTST #16, R1 ; Test I bit of PSW of "new posture"
|
||||
BMNE #16, R2 ; Conditionally set I bit of intermediate posture
|
||||
|
||||
MVTC R2, PSW ; save intermediate posture to PSW
|
||||
MVTC R2, PSW ; Save intermediate posture to PSW
|
||||
|
||||
MOV.L R3,R1 ; Get original SR
|
||||
RTS ; Return to caller
|
||||
;}
|
||||
.END
|
||||
|
||||
|
||||
@@ -12,8 +12,8 @@
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Thread */
|
||||
;/** */
|
||||
@@ -37,47 +37,51 @@
|
||||
;
|
||||
.SECTION P,CODE
|
||||
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_schedule RXv2/CCRX */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* 6.1.9 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function waits for a thread control block pointer to appear in */
|
||||
;/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */
|
||||
;/* in the variable, the corresponding thread is resumed. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function waits for a thread control block pointer to appear in */
|
||||
;/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */
|
||||
;/* in the variable, the corresponding thread is resumed. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* _tx_initialize_kernel_enter ThreadX entry function */
|
||||
;/* _tx_thread_system_return Return to system from thread */
|
||||
;/* _tx_thread_context_restore Restore thread's context */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* _tx_initialize_kernel_enter ThreadX entry function */
|
||||
;/* _tx_thread_system_return Return to system from thread */
|
||||
;/* _tx_thread_context_restore Restore thread's context */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-30-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* 10-15-2021 William E. Lamie Modified comment(s), and */
|
||||
;/* removed unnecessary stack */
|
||||
;/* type checking, */
|
||||
;/* resulting in version 6.1.9 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _tx_thread_schedule(VOID)
|
||||
;{
|
||||
.GLB __tx_thread_schedule
|
||||
@@ -90,11 +94,11 @@ __tx_thread_schedule:
|
||||
; /* Wait for a thread to execute. */
|
||||
; do
|
||||
; {
|
||||
MOV.L #__tx_thread_execute_ptr, R1 ; Address of thread to executer ptr
|
||||
MOV.L #__tx_thread_execute_ptr, R1 ; Address of thread to executer ptr
|
||||
__tx_thread_schedule_loop:
|
||||
MOV.L [R1],R2 ; Pickup next thread to execute
|
||||
CMP #0,R2 ; Is it NULL?
|
||||
BEQ __tx_thread_schedule_loop ; Yes, idle system, keep checking
|
||||
MOV.L [R1],R2 ; Pickup next thread to execute
|
||||
CMP #0,R2 ; Is it NULL?
|
||||
BEQ __tx_thread_schedule_loop ; Yes, idle system, keep checking
|
||||
;
|
||||
; }
|
||||
; while(_tx_thread_execute_ptr == TX_NULL);
|
||||
@@ -102,41 +106,34 @@ __tx_thread_schedule_loop:
|
||||
; /* Yes! We have a thread to execute. Lockout interrupts and
|
||||
; transfer control to it. */
|
||||
;
|
||||
CLRPSW I ; disable interrupts
|
||||
CLRPSW I ; Disable interrupts
|
||||
;
|
||||
; /* Setup the current thread pointer. */
|
||||
; _tx_thread_current_ptr = _tx_thread_execute_ptr;
|
||||
;
|
||||
MOV.L #__tx_thread_current_ptr, R3
|
||||
MOV.L R2,[R3] ; Setup current thread pointer
|
||||
MOV.L R2,[R3] ; Setup current thread pointer
|
||||
;
|
||||
; /* Increment the run count for this thread. */
|
||||
; _tx_thread_current_ptr -> tx_thread_run_count++;
|
||||
;
|
||||
MOV.L 4[R2],R3 ; Pickup run count
|
||||
ADD #1,R3 ; Increment run counter
|
||||
MOV.L R3,4[R2] ; Store it back in control block
|
||||
MOV.L 4[R2],R3 ; Pickup run count
|
||||
ADD #1,R3 ; Increment run counter
|
||||
MOV.L R3,4[R2] ; Store it back in control block
|
||||
;
|
||||
; /* Setup time-slice, if present. */
|
||||
; _tx_timer_time_slice = _tx_thread_current_ptr -> tx_thread_time_slice;
|
||||
;
|
||||
MOV.L 24[R2],R3 ; Pickup thread time-slice
|
||||
MOV.L #__tx_timer_time_slice,R4 ; Pickup pointer to time-slice
|
||||
MOV.L R3, [R4] ; Setup time-slice
|
||||
MOV.L 24[R2],R3 ; Pickup thread time-slice
|
||||
MOV.L #__tx_timer_time_slice,R4 ; Pickup pointer to time-slice
|
||||
MOV.L R3, [R4] ; Setup time-slice
|
||||
;
|
||||
; /* Switch to the thread's stack. */
|
||||
; SP = _tx_thread_execute_ptr -> tx_thread_stack_ptr;
|
||||
SETPSW U ; user stack mode
|
||||
MOV.L 8[R2],R0 ; Pickup stack pointer
|
||||
;
|
||||
; /* Determine if an interrupt frame or a synchronous task suspension frame
|
||||
; is present. */
|
||||
;
|
||||
POP R1 ; Pickup stack type
|
||||
CMP #1, R1 ; Is it an interrupt stack?
|
||||
BNE __tx_thread_synch_return ; No, a synchronous return frame is present.
|
||||
SETPSW U ; User stack mode
|
||||
MOV.L 8[R2],R0 ; Pickup stack pointer
|
||||
|
||||
POPM R1-R3 ; Restore accumulators.
|
||||
POPM R1-R3 ; Restore accumulators.
|
||||
MVTACLO R3, A0
|
||||
MVTACHI R2, A0
|
||||
MVTACGU R1, A0
|
||||
@@ -145,17 +142,13 @@ __tx_thread_schedule_loop:
|
||||
MVTACHI R2, A1
|
||||
MVTACGU R1, A1
|
||||
|
||||
POPM R6-R13 ; Recover interrupt stack frame
|
||||
POPM R6-R13 ; Recover interrupt stack frame
|
||||
POPC FPSW
|
||||
POPM R14-R15
|
||||
POPM R3-R5
|
||||
POPM R1-R2
|
||||
RTE ; return to point of interrupt, this restores PC and PSW
|
||||
|
||||
__tx_thread_synch_return:
|
||||
POPC PSW
|
||||
POPM R6-R13 ; Recover solicited stack frame
|
||||
RTS
|
||||
RTE ; return to point of interrupt, this restores PC and PSW
|
||||
|
||||
;
|
||||
;}
|
||||
|
||||
|
||||
@@ -12,8 +12,8 @@
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Thread */
|
||||
;/** */
|
||||
@@ -31,46 +31,50 @@
|
||||
;
|
||||
;
|
||||
.SECTION P,CODE
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_stack_build RXv2/CCRX */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_stack_build RXc2/CCRX */
|
||||
;/* 6.1.9 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function builds a stack frame on the supplied thread's stack. */
|
||||
;/* The stack frame results in a fake interrupt return to the supplied */
|
||||
;/* function pointer. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* function pointer. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* thread_ptr Pointer to thread control blk */
|
||||
;/* function_ptr Pointer to return function */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* _tx_thread_create Create thread service */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-30-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* 10-15-2021 William E. Lamie Modified comment(s), and */
|
||||
;/* removed unnecessary stack */
|
||||
;/* type placement, */
|
||||
;/* resulting in version 6.1.9 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID))
|
||||
;{
|
||||
.GLB __tx_thread_stack_build
|
||||
@@ -80,8 +84,7 @@ __tx_thread_stack_build:
|
||||
; /* Build an interrupt frame. The form of the fake interrupt stack
|
||||
; on the Renesas RX should look like the following after it is built:
|
||||
;
|
||||
; Stack Top: 1 Interrupt stack frame type
|
||||
; ACC0
|
||||
; Stack Top: ACC0
|
||||
; ACC1
|
||||
; R6
|
||||
; R7
|
||||
@@ -105,34 +108,34 @@ __tx_thread_stack_build:
|
||||
;
|
||||
; Stack Bottom: (higher memory address) */
|
||||
;
|
||||
MOV.L 16[R1],R3 ; Pickup end of stack area
|
||||
BCLR #0, R3 ; mask for 4-byte alignment
|
||||
MOV.L 16[R1],R3 ; Pickup end of stack area
|
||||
BCLR #0, R3 ; Mask for 4-byte alignment
|
||||
BCLR #1, R3
|
||||
;
|
||||
; /* Build the stack frame. */
|
||||
;
|
||||
MOV.L #30000h, R4
|
||||
MOV.L R4, [-R3] ; initial PSW (SVC mode, U flag set)
|
||||
MOV.L R2, [-R3] ; initial PC
|
||||
MOV.L R4, [-R3] ; Initial PSW (SVC mode, U flag set)
|
||||
MOV.L R2, [-R3] ; Initial PC
|
||||
MOV.L #0, R4
|
||||
MOV.L R4,[-R3] ; initial R2 ...
|
||||
MOV.L R4,[-R3] ; initial R1 ...
|
||||
MOV.L R4,[-R3] ; initial R5 ...
|
||||
MOV.L R4,[-R3] ; initial R4 ...
|
||||
MOV.L R4,[-R3] ; initial R3 ...
|
||||
MOV.L R4,[-R3] ; initial R15 ...
|
||||
MOV.L R4,[-R3] ; initial R14 ...
|
||||
MOV.L R4,[-R3] ; Initial R2 ...
|
||||
MOV.L R4,[-R3] ; Initial R1 ...
|
||||
MOV.L R4,[-R3] ; Initial R5 ...
|
||||
MOV.L R4,[-R3] ; Initial R4 ...
|
||||
MOV.L R4,[-R3] ; Initial R3 ...
|
||||
MOV.L R4,[-R3] ; Initial R15 ...
|
||||
MOV.L R4,[-R3] ; Initial R14 ...
|
||||
MVFC FPSW, r4
|
||||
MOV.L R4, [-R3] ; initial FPSW
|
||||
MOV.L R4, [-R3] ; Initial FPSW
|
||||
MOV.L #0, R4
|
||||
MOV.L R4,[-R3] ; initial R13 ...
|
||||
MOV.L R4,[-R3] ; initial R12 ...
|
||||
MOV.L R4,[-R3] ; initial R11 ...
|
||||
MOV.L R4,[-R3] ; initial R10 ...
|
||||
MOV.L R4,[-R3] ; initial R9 ...
|
||||
MOV.L R4,[-R3] ; initial R8 ...
|
||||
MOV.L R4,[-R3] ; initial R7 ...
|
||||
MOV.L R4,[-R3] ; initial R6 ...
|
||||
MOV.L R4,[-R3] ; Initial R13 ...
|
||||
MOV.L R4,[-R3] ; Initial R12 ...
|
||||
MOV.L R4,[-R3] ; Initial R11 ...
|
||||
MOV.L R4,[-R3] ; Initial R10 ...
|
||||
MOV.L R4,[-R3] ; Initial R9 ...
|
||||
MOV.L R4,[-R3] ; Initial R8 ...
|
||||
MOV.L R4,[-R3] ; Initial R7 ...
|
||||
MOV.L R4,[-R3] ; Initial R6 ...
|
||||
|
||||
MOV.L R4,[-R3] ; Accumulator 1
|
||||
MOV.L R4,[-R3]
|
||||
@@ -142,14 +145,11 @@ __tx_thread_stack_build:
|
||||
MOV.L R4,[-R3]
|
||||
MOV.L R4,[-R3]
|
||||
|
||||
MOV.L #1, R4
|
||||
MOV.L R4,[-R3] ; indicate interrupt stack frame
|
||||
; /* Setup stack pointer. */
|
||||
; thread_ptr -> tx_thread_stack_ptr = R1;
|
||||
MOV.L R3, 8[R1]
|
||||
; store initial SP in thread control block
|
||||
; Store initial SP in thread control block
|
||||
RTS
|
||||
|
||||
;}
|
||||
.END
|
||||
|
||||
|
||||
@@ -12,8 +12,8 @@
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Timer */
|
||||
;/** */
|
||||
@@ -45,50 +45,52 @@
|
||||
.GLB __tx_thread_context_restore
|
||||
;
|
||||
.SECTION P,CODE
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_timer_interrupt RXv2/CCRX */
|
||||
;/* 6.1.3 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* 6.1.9 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function processes the hardware timer interrupt. This */
|
||||
;/* processing includes incrementing the system clock and checking for */
|
||||
;/* time slice and/or timer expiration. If either is found, the */
|
||||
;/* interrupt context save/restore functions are called along with the */
|
||||
;/* expiration functions. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* _tx_thread_context_save Save interrupted context */
|
||||
;/* _tx_timer_expiration_process Timer expiration processing */
|
||||
;/* _tx_thread_time_slice Time slice interrupted thread */
|
||||
;/* _tx_thread_context_restore Restore interrupted context */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* interrupt vector */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function processes the hardware timer interrupt. This */
|
||||
;/* processing includes incrementing the system clock and checking for */
|
||||
;/* time slice and/or timer expiration. If either is found, the */
|
||||
;/* interrupt context save/restore functions are called along with the */
|
||||
;/* expiration functions. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* _tx_thread_context_save Save interrupted context */
|
||||
;/* _tx_timer_expiration_process Timer expiration processing */
|
||||
;/* _tx_thread_time_slice Time slice interrupted thread */
|
||||
;/* _tx_thread_context_restore Restore interrupted context */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* interrupt vector */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 12-30-2020 William E. Lamie Initial Version 6.1.3 */
|
||||
;/* 10-15-2021 William E. Lamie Modified comment(s), */
|
||||
;/* resulting in version 6.1.9 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _tx_timer_interrupt(VOID)
|
||||
;{
|
||||
.GLB __tx_timer_interrupt
|
||||
@@ -106,38 +108,38 @@ __tx_timer_interrupt:
|
||||
PUSHM R14-R15
|
||||
PUSHM R1-R5
|
||||
|
||||
MOV.L #__tx_timer_system_clock, R1 ; Pickup address of system clock
|
||||
MOV.L [R1], R2 ; Pickup system clock
|
||||
ADD #1, R2 ; Increment system clock
|
||||
MOV.L R2,[R1] ; Store new system clock
|
||||
MOV.L #__tx_timer_system_clock, R1 ; Pickup address of system clock
|
||||
MOV.L [R1], R2 ; Pickup system clock
|
||||
ADD #1, R2 ; Increment system clock
|
||||
MOV.L R2,[R1] ; Store new system clock
|
||||
;
|
||||
; /* Test for time-slice expiration. */
|
||||
; if (_tx_timer_time_slice)
|
||||
; {
|
||||
;
|
||||
MOV.L #__tx_timer_time_slice, R1 ; Pickup address of time slice
|
||||
MOV.L [R1], R2 ; Pickup the current time slice
|
||||
CMP #0, R2 ; Is a time slice active?
|
||||
BEQ __tx_timer_no_time_slice ; No, skip timer slice processing
|
||||
MOV.L #__tx_timer_time_slice, R1 ; Pickup address of time slice
|
||||
MOV.L [R1], R2 ; Pickup the current time slice
|
||||
CMP #0, R2 ; Is a time slice active?
|
||||
BEQ __tx_timer_no_time_slice ; No, skip timer slice processing
|
||||
;
|
||||
; /* Decrement the time_slice. */
|
||||
; _tx_timer_time_slice--;
|
||||
;
|
||||
SUB #1, R2 ; Decrement the time-slice
|
||||
MOV.L R2, [R1] ; Store time-slice
|
||||
SUB #1, R2 ; Decrement the time-slice
|
||||
MOV.L R2, [R1] ; Store time-slice
|
||||
;
|
||||
; /* Check for expiration. */
|
||||
; if (__tx_timer_time_slice == 0)
|
||||
;
|
||||
CMP #0, R2 ; Has it expired?
|
||||
BNE __tx_timer_no_time_slice ; No, time-slice has not expired
|
||||
CMP #0, R2 ; Has it expired?
|
||||
BNE __tx_timer_no_time_slice ; No, time-slice has not expired
|
||||
;
|
||||
; /* Set the time-slice expired flag. */
|
||||
; _tx_timer_expired_time_slice = TX_TRUE;
|
||||
;
|
||||
MOV.L #__tx_timer_expired_time_slice, R1 ; Pickup address of expired time-slice
|
||||
MOV.L #1, R2 ; Build expired value
|
||||
MOV.L R2, [R1] ; Set expired time slice variable
|
||||
MOV.L #1, R2 ; Build expired value
|
||||
MOV.L R2, [R1] ; Set expired time slice variable
|
||||
; }
|
||||
;
|
||||
__tx_timer_no_time_slice:
|
||||
@@ -146,20 +148,20 @@ __tx_timer_no_time_slice:
|
||||
; if (*_tx_timer_current_ptr)
|
||||
; {
|
||||
;
|
||||
MOV.L #__tx_timer_current_ptr, R1 ; Pickup address of current timer ptr
|
||||
MOV.L [R1], R2 ; Pickup current pointer
|
||||
MOV.L [R2+], R1 ; pickup timer list entry, _tx_timer_current_ptr++
|
||||
CMP #0, R1 ; Is timer pointer NULL?
|
||||
BEQ __tx_timer_no_timer ; Yes, no timer has expired
|
||||
MOV.L #__tx_timer_current_ptr, R1 ; Pickup address of current timer ptr
|
||||
MOV.L [R1], R2 ; Pickup current pointer
|
||||
MOV.L [R2+], R1 ; Pickup timer list entry, _tx_timer_current_ptr++
|
||||
CMP #0, R1 ; Is timer pointer NULL?
|
||||
BEQ __tx_timer_no_timer ; Yes, no timer has expired
|
||||
|
||||
;
|
||||
; /* Set expiration flag. */
|
||||
; _tx_timer_expired = TX_TRUE;
|
||||
;
|
||||
MOV.L #__tx_timer_expired,R2 ; Build address of expired flag
|
||||
MOV.L #1, R1 ; Build expired value
|
||||
MOV.L #__tx_timer_expired,R2 ; Build address of expired flag
|
||||
MOV.L #1, R1 ; Build expired value
|
||||
MOV.L R1, [R2]
|
||||
BRA __tx_timer_done ; Finished with timer processing
|
||||
BRA __tx_timer_done ; Finished with timer processing
|
||||
;
|
||||
; }
|
||||
; else
|
||||
@@ -174,22 +176,22 @@ __tx_timer_no_timer:
|
||||
; /* Check for wrap-around. */
|
||||
; if (_tx_timer_current_ptr == _tx_timer_list_end)
|
||||
;
|
||||
MOV.L #__tx_timer_list_end, R1 ; Pickup the timer list end ptr
|
||||
MOV.L [R1], R1 ; Pickup actual timer list end
|
||||
CMP R1, R2 ; Are we at list end?
|
||||
BNE __tx_timer_skip_wrap ; No, don't move pointer to the
|
||||
; top of the list
|
||||
MOV.L #__tx_timer_list_end, R1 ; Pickup the timer list end ptr
|
||||
MOV.L [R1], R1 ; Pickup actual timer list end
|
||||
CMP R1, R2 ; Are we at list end?
|
||||
BNE __tx_timer_skip_wrap ; No, don't move pointer to the
|
||||
; top of the list
|
||||
;
|
||||
; /* Wrap to beginning of list. */
|
||||
; _tx_timer_current_ptr = _tx_timer_list_start;
|
||||
;
|
||||
MOV.L #__tx_timer_list_start, R2 ; Pickup the timer list start ptr
|
||||
MOV.L [R2], R2 ; Pickup the start of the list
|
||||
MOV.L #__tx_timer_list_start, R2 ; Pickup the timer list start ptr
|
||||
MOV.L [R2], R2 ; Pickup the start of the list
|
||||
; }
|
||||
;
|
||||
__tx_timer_skip_wrap:
|
||||
MOV.L #__tx_timer_current_ptr,R1
|
||||
MOV.L R2, [R1] ; store in updated pointer in _tx_timer_current_ptr
|
||||
MOV.L R2, [R1] ; Store in updated pointer in _tx_timer_current_ptr
|
||||
|
||||
__tx_timer_done:
|
||||
;
|
||||
@@ -197,26 +199,26 @@ __tx_timer_done:
|
||||
; if ((_tx_timer_expired_time_slice) || (_tx_timer_expired))
|
||||
; {
|
||||
;
|
||||
MOV.L #__tx_timer_expired_time_slice, R1 ; Pickup expired time slice addr
|
||||
MOV.L [R1], R1 ; Pickup expired time slice
|
||||
MOV.L #__tx_timer_expired, R2 ; Pickup expired timer flag address
|
||||
MOV.L [R2], R2 ; Pickup actual flag
|
||||
OR R1, R2 ; Or flags together
|
||||
BEQ __tx_timer_nothing_expired ; If Z set, nothing has expired
|
||||
MOV.L #__tx_timer_expired_time_slice, R1 ; Pickup expired time slice addr
|
||||
MOV.L [R1], R1 ; Pickup expired time slice
|
||||
MOV.L #__tx_timer_expired, R2 ; Pickup expired timer flag address
|
||||
MOV.L [R2], R2 ; Pickup actual flag
|
||||
OR R1, R2 ; Or flags together
|
||||
BEQ __tx_timer_nothing_expired ; If Z set, nothing has expired
|
||||
|
||||
__tx_something_expired:
|
||||
; /* Did a timer expire? */
|
||||
; if (_tx_timer_expired)
|
||||
; {
|
||||
MOV.L #__tx_timer_expired,R1 ; Pickup expired flag address
|
||||
MOV.L [R1], R1 ; Pickup expired flag
|
||||
CMP #0,R1 ; Is the expired timer flag set?
|
||||
BEQ __tx_timer_dont_activate ; No, skip timer activation
|
||||
MOV.L #__tx_timer_expired,R1 ; Pickup expired flag address
|
||||
MOV.L [R1], R1 ; Pickup expired flag
|
||||
CMP #0,R1 ; Is the expired timer flag set?
|
||||
BEQ __tx_timer_dont_activate ; No, skip timer activation
|
||||
;
|
||||
; /* Process timer expiration. */
|
||||
; _tx_timer_expiration_process();
|
||||
;
|
||||
BSR __tx_timer_expiration_process ; Call the timer expiration handling routine
|
||||
BSR __tx_timer_expiration_process ; Call the timer expiration handling routine
|
||||
;
|
||||
; }
|
||||
__tx_timer_dont_activate:
|
||||
@@ -225,15 +227,15 @@ __tx_timer_dont_activate:
|
||||
; if (_tx_timer_expired_time_slice)
|
||||
; {
|
||||
;
|
||||
MOV.L #__tx_timer_expired_time_slice, R1 ; Pickup time-slice expired flag addr
|
||||
MOV.L [R1], R1 ; Pickup actual flag
|
||||
CMP #0,R1 ; Has time-slice expired?
|
||||
BEQ __tx_timer_not_ts_expiration ; No, skip time-slice expiration
|
||||
MOV.L #__tx_timer_expired_time_slice, R1 ; Pickup time-slice expired flag addr
|
||||
MOV.L [R1], R1 ; Pickup actual flag
|
||||
CMP #0,R1 ; Has time-slice expired?
|
||||
BEQ __tx_timer_not_ts_expiration ; No, skip time-slice expiration
|
||||
;
|
||||
; /* Time slice interrupted thread. */
|
||||
; _tx_thread_time_slice();
|
||||
|
||||
BSR __tx_thread_time_slice ; Call time-slice processing
|
||||
BSR __tx_thread_time_slice ; Call time-slice processing
|
||||
; }
|
||||
;
|
||||
__tx_timer_not_ts_expiration:
|
||||
@@ -243,7 +245,7 @@ __tx_timer_nothing_expired:
|
||||
POPM R1-R5
|
||||
POPM R14-R15
|
||||
;
|
||||
RTS ; return to point of interrupt
|
||||
RTS ; Return to point of interrupt
|
||||
;
|
||||
;}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user