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Release 6.1.9

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This commit is contained in:
Yuxin Zhou
2021-10-14 00:51:26 +00:00
parent 215df45d4b
commit 1af8404c54
1812 changed files with 60698 additions and 249862 deletions
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108
ports/rxv3/iar/src/tx_thread_schedule.s
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@@ -42,7 +42,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_schedule RXv3/IAR */
;/* 6.1.7 */
;/* 6.1.9 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -76,6 +76,9 @@
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-02-2021 William E. Lamie Initial Version 6.1.7 */
;/* 10-15-2021 William E. Lamie Modified comment(s), and */
;/* added FPU support, */
;/* resulting in version 6.1.9 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_schedule(VOID)
@@ -91,11 +94,11 @@ __tx_thread_schedule:
; /* Wait for a thread to execute. */
; do
; {
MOV.L #__tx_thread_execute_ptr, R1 ; Address of thread to executer ptr
MOV.L #__tx_thread_execute_ptr, R1 ; Address of thread to executer ptr
__tx_thread_schedule_loop:
MOV.L [R1],R2 ; Pickup next thread to execute
CMP #0,R2 ; Is it NULL?
BEQ __tx_thread_schedule_loop ; Yes, idle system, keep checking
MOV.L [R1],R2 ; Pickup next thread to execute
CMP #0,R2 ; Is it NULL?
BEQ __tx_thread_schedule_loop ; Yes, idle system, keep checking
;
; }
; while(_tx_thread_execute_ptr == TX_NULL);
@@ -103,41 +106,45 @@ __tx_thread_schedule_loop:
; /* Yes! We have a thread to execute. Lockout interrupts and
; transfer control to it. */
;
CLRPSW I ; disable interrupts
CLRPSW I ; Disable interrupts
;
; /* Setup the current thread pointer. */
; _tx_thread_current_ptr = _tx_thread_execute_ptr;
;
MOV.L #__tx_thread_current_ptr, R3
MOV.L R2,[R3] ; Setup current thread pointer
MOV.L R2,[R3] ; Setup current thread pointer
;
; /* Increment the run count for this thread. */
; _tx_thread_current_ptr -> tx_thread_run_count++;
;
MOV.L 4[R2],R3 ; Pickup run count
ADD #1,R3 ; Increment run counter
MOV.L R3,4[R2] ; Store it back in control block
MOV.L 4[R2],R3 ; Pickup run count
ADD #1,R3 ; Increment run counter
MOV.L R3,4[R2] ; Store it back in control block
;
; /* Setup time-slice, if present. */
; _tx_timer_time_slice = _tx_thread_current_ptr -> tx_thread_time_slice;
;
MOV.L 24[R2],R3 ; Pickup thread time-slice
MOV.L #__tx_timer_time_slice,R4 ; Pickup pointer to time-slice
MOV.L R3, [R4] ; Setup time-slice
MOV.L 24[R2],R3 ; Pickup thread time-slice
MOV.L #__tx_timer_time_slice,R4 ; Pickup pointer to time-slice
MOV.L R3, [R4] ; Setup time-slice
;
; /* Switch to the thread's stack. */
; SP = _tx_thread_execute_ptr -> tx_thread_stack_ptr;
SETPSW U ; user stack mode
MOV.L 8[R2],R0 ; Pickup stack pointer
;
; /* Determine if an interrupt frame or a synchronous task suspension frame
; is present. */
;
POP R1 ; Pickup stack type
CMP #1, R1 ; Is it an interrupt stack?
BNE __tx_thread_synch_return ; No, a synchronous return frame is present.
SETPSW U ; User stack mode
MOV.L 8[R2],R0 ; Pickup stack pointer
POPM R1-R3 ; Restore accumulators.
#if (__DPFPU == 1)
MOV.L 144[R2], R1 ; Get tx_thread_fpu_enable.
CMP #0, R1
BEQ __tx_thread_schedule_fpu_skip
DPOPM.L DPSW-DECNT ; Restore FPU register bank if tx_thread_fpu_enable is not 0.
DPOPM.D DR0-DR15
__tx_thread_schedule_fpu_skip:
#endif
POPM R1-R3 ; Restore accumulators.
MVTACLO R3, A0
MVTACHI R2, A0
MVTACGU R1, A0
@@ -146,17 +153,13 @@ __tx_thread_schedule_loop:
MVTACHI R2, A1
MVTACGU R1, A1
POPM R6-R13 ; Recover interrupt stack frame
POPM R6-R13 ; Recover interrupt stack frame
POPC FPSW
POPM R14-R15
POPM R3-R5
POPM R1-R2
RTE ; return to point of interrupt, this restores PC and PSW
__tx_thread_synch_return:
POPC PSW
POPM R6-R13 ; Recover solicited stack frame
RTS
RTE ; Return to point of interrupt, this restores PC and PSW
;
;}
@@ -176,4 +179,49 @@ ___interrupt_27:
BRA __tx_thread_context_restore
; Enable saving of DFPU registers for the current thread.
; If DPFU op are disabled do nothing.
public _tx_thread_fpu_enable
_tx_thread_fpu_enable:
#if (__DPFPU == 1)
PUSHM R1-R4
MVFC PSW, R2 ; Save PSW to R2
CLRPSW I ; Lockout interrupts
MOV.L #__tx_thread_current_ptr, R4
MOV.L [R4], R1 ; Fetch current thread pointer
MOV.L #1, R3
MOV.L R3, 144[R1] ; Set tx_thread_fpu_enable to 1.
__tx_thread_fpu_enable_exit:
MVTC R2, PSW ; Restore interrupt status
POPM R1-R4
#endif
RTS
; Disable saving of DFPU registers for the current thread.
; If DPFU op are disabled do nothing.
public _tx_thread_fpu_disable
_tx_thread_fpu_disable:
#if (__DPFPU == 1)
PUSHM R1-R4
MVFC PSW, R2 ; Save PSW to R2
CLRPSW I ; Lockout interrupts
MOV.L #__tx_thread_current_ptr, R4
MOV.L [R4], R1 ; Fetch current thread pointer
MOV.L #1, R3
MOV.L R3, 144[R1] ; Set tx_thread_fpu_enable to 1.
__tx_thread_fpu_disable_exit:
MVTC R2, PSW ; Restore interrupt status
POPM R1-R4
#endif
RTS
END