Release 6.1.9

This commit is contained in:
Yuxin Zhou
2021-10-14 00:51:26 +00:00
parent 215df45d4b
commit 1af8404c54
1812 changed files with 60698 additions and 249862 deletions

View File

@@ -28,7 +28,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_stack_build RXv3/IAR */
;/* 6.1.7 */
;/* 6.1.9 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -61,6 +61,8 @@
;/* DATE NAME DESCRIPTION */
;/* */
;/* 06-02-2021 William E. Lamie Initial Version 6.1.7 */
;/* 10-15-2021 William E. Lamie Modified comment(s), */
;/* resulting in version 6.1.9 */
;/* */
;/**************************************************************************/
@@ -72,8 +74,7 @@ __tx_thread_stack_build:
; /* Build an interrupt frame. The form of the fake interrupt stack
; on the Renesas RX should look like the following after it is built:
;
; Stack Top: 1 Interrupt stack frame type
; ACC0
; Stack Top: ACC0
; ACC1
; R6
; R7
@@ -97,51 +98,50 @@ __tx_thread_stack_build:
;
; Stack Bottom: (higher memory address) */
;
MOV.L 16[R1],R3 ; Pickup end of stack area
BCLR #0, R3 ; mask for 4-byte alignment
MOV.L 16[R1],R3 ; Pickup end of stack area
BCLR #0, R3 ; Mask for 4-byte alignment
BCLR #1, R3
;
; /* Build the stack frame. */
;
MOV.L #30000h, R4
MOV.L R4, [-R3] ; initial PSW (SVC mode, U flag set)
MOV.L R2, [-R3] ; initial PC
MOV.L R4, [-R3] ; Initial PSW (SVC mode, U flag set)
MOV.L R2, [-R3] ; Initial PC
MOV.L #0, R4
MOV.L R4,[-R3] ; initial R2 ...
MOV.L R4,[-R3] ; initial R1 ...
MOV.L R4,[-R3] ; initial R5 ...
MOV.L R4,[-R3] ; initial R4 ...
MOV.L R4,[-R3] ; initial R3 ...
MOV.L R4,[-R3] ; initial R15 ...
MOV.L R4,[-R3] ; initial R14 ...
MOV.L R4,[-R3] ; Initial R2 ...
MOV.L R4,[-R3] ; Initial R1 ...
MOV.L R4,[-R3] ; Initial R5 ...
MOV.L R4,[-R3] ; Initial R4 ...
MOV.L R4,[-R3] ; Initial R3 ...
MOV.L R4,[-R3] ; Initial R15 ...
MOV.L R4,[-R3] ; Initial R14 ...
MVFC FPSW, r4
MOV.L R4, [-R3] ; initial FPSW
MOV.L R4, [-R3] ; Initial FPSW
MOV.L #0, R4
MOV.L R4,[-R3] ; initial R13 ...
MOV.L R4,[-R3] ; initial R12 ...
MOV.L R4,[-R3] ; initial R11 ...
MOV.L R4,[-R3] ; initial R10 ...
MOV.L R4,[-R3] ; initial R9 ...
MOV.L R4,[-R3] ; initial R8 ...
MOV.L R4,[-R3] ; initial R7 ...
MOV.L R4,[-R3] ; initial R6 ...
MOV.L R4,[-R3] ; Initial R13 ...
MOV.L R4,[-R3] ; Initial R12 ...
MOV.L R4,[-R3] ; Initial R11 ...
MOV.L R4,[-R3] ; Initial R10 ...
MOV.L R4,[-R3] ; Initial R9 ...
MOV.L R4,[-R3] ; Initial R8 ...
MOV.L R4,[-R3] ; Initial R7 ...
MOV.L R4,[-R3] ; Initial R6 ...
MOV.L R4,[-R3] ; Accumulator 1
MOV.L R4,[-R3] ; Accumulator 1
MOV.L R4,[-R3]
MOV.L R4,[-R3]
MOV.L R4,[-R3] ; Accumulator 0
MOV.L R4,[-R3] ; Accumulator 0
MOV.L R4,[-R3]
MOV.L R4,[-R3]
MOV.L #1, R4
MOV.L R4,[-R3] ; indicate interrupt stack frame
; /* Setup stack pointer. */
; thread_ptr -> tx_thread_stack_ptr = R1;
MOV.L R3, 8[R1]
; store initial SP in thread control block
; Store initial SP in thread control block
RTS
;}
END