7iwind/threadx
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Release 6.1.9

Browse Source
This commit is contained in:
Yuxin Zhou
2021-10-14 00:51:26 +00:00
parent 215df45d4b
commit 1af8404c54
1812 changed files with 60698 additions and 249862 deletions
Download Patch File Download Diff File Expand all files Collapse all files

101
ports_module/rxv2/iar/module_manager/src/tx_initialize_low_level.s Normal file
View File

@@ -0,0 +1,101 @@
/**************************************************************************/
/* */
/* Copyright (c) Microsoft Corporation. All rights reserved. */
/* */
/* This software is licensed under the Microsoft Software License */
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
/* and in the root directory of this software. */
/* */
/**************************************************************************/
/**************************************************************************/
/**************************************************************************/
/** */
/** ThreadX Component */
/** */
/** Initialize */
/** */
/**************************************************************************/
/**************************************************************************/
extern __tx_initialize_unused_memory
section .text:CODE:ROOT
/**************************************************************************/
/* */
/* FUNCTION RELEASE */
/* */
/* _tx_initialize_low_level RXv2/IAR */
/* 6.x */
/* AUTHOR */
/* */
/* William E. Lamie, Microsoft Corporation */
/* */
/* DESCRIPTION */
/* */
/* This function is responsible for any low-level processor */
/* initialization, including setting up interrupt vectors, setting */
/* up a periodic timer interrupt source, saving the system stack */
/* pointer for use in ISR processing later, and finding the first */
/* available RAM memory address for tx_application_define. */
/* */
/* INPUT */
/* */
/* None */
/* */
/* OUTPUT */
/* */
/* None */
/* */
/* CALLS */
/* */
/* None */
/* */
/* CALLED BY */
/* */
/* _tx_initialize_kernel_enter ThreadX entry function */
/* */
/* RELEASE HISTORY */
/* */
/* DATE NAME DESCRIPTION */
/* */
/* xx-xx-xxxx William E. Lamie Initial Version 6.x */
/* */
/**************************************************************************/
public __tx_initialize_low_level
__tx_initialize_low_level:
/* Save the first available memory address. */
// _tx_initialize_unused_memory = (VOID_PTR) &free_mem_start;
MOV.L #__tx_free_memory_start, R1 // Pick up unused memory address
MOV.L #__tx_initialize_unused_memory,R2
MOV.L R1,[R2] // Save first free memory address
/* Set priority of SWINT to 1. */
MOV.L #0x87303, r1
MOV.L #1, r2
MOV.B r2, [r1]
/* Enable SWINT. */
MOV.L #0x87203, r1
MOV.B [r1], r2
OR #(1 << 3), r2
MOV.B r2, [r1]
/* Enable SWINT2. */
OR #(1 << 2), r2
MOV.B r2, [r1]
RTS
section FREEMEM:DATA
public __tx_free_memory_start
__tx_free_memory_start
DS32 4
END

194
ports_module/rxv2/iar/module_manager/src/tx_thread_context_restore.s Normal file
View File

@@ -0,0 +1,194 @@
;/**************************************************************************/
;/* */
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
;/* */
;/* This software is licensed under the Microsoft Software License */
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** Thread */
;/** */
;/**************************************************************************/
;/**************************************************************************/
extern __tx_thread_system_state
extern __tx_thread_current_ptr
extern __tx_thread_preempt_disable
extern __tx_thread_execute_ptr
extern __tx_timer_time_slice
extern __tx_thread_schedule
section .text:CODE:ROOT
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_context_restore RXv2/IAR */
;/* 6.x */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function restores the interrupt context if it is processing a */
;/* nested interrupt. If not, it returns to the interrupt thread if no */
;/* preemption is necessary. Otherwise, if preemption is necessary or */
;/* if no thread was running, the function returns to the scheduler. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* _tx_thread_schedule Thread scheduling routine */
;/* */
;/* CALLED BY */
;/* */
;/* ISRs Interrupt Service Routines */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* xx-xx-xxxx William E. Lamie Initial Version 6.x */
;/* */
;/**************************************************************************/
public __tx_thread_context_restore
__tx_thread_context_restore:
;
; /* Lockout interrupts. */
CLRPSW I ; disable interrupts
; /* Determine if interrupts are nested. */
; if (--_tx_thread_system_state)
; {
MOV.L #__tx_thread_system_state, R1
MOV.L [R1], R2
SUB #1, R2
MOV.L R2,[R1]
BEQ __tx_thread_not_nested_restore
;
; /* Interrupts are nested. */
;
; /* Recover the saved registers from the interrupt stack
; and return to the point of interrupt. */
;
__tx_thread_nested_restore:
POPC FPSW ; restore FPU status
POPM R14-R15 ; restore R14-R15
POPM R3-R5 ; restore R3-R5
POPM R1-R2 ; restore R1-R2
RTE ; return to point of interrupt, restore PSW including IPL
; }
__tx_thread_not_nested_restore:
;
; /* Determine if a thread was interrupted and no preemption is required. */
; else if (((_tx_thread_current_ptr) && (_tx_thread_current_ptr == _tx_thread_execute_ptr)
; || (_tx_thread_preempt_disable))
; {
MOV.L #__tx_thread_current_ptr, R1 ; Pickup current thread ptr address
MOV.L [R1], R2
CMP #0, R2
BEQ __tx_thread_idle_system_restore
MOV.L #__tx_thread_preempt_disable, R3 ; pick up preempt disable flag
MOV.L [R3], R3
CMP #0, R3
BNE __tx_thread_no_preempt_restore ; if pre-empt disable flag set, we simply return to the original point of interrupt regardless
MOV.L #__tx_thread_execute_ptr, R3 ; (_tx_thread_current_ptr != _tx_thread_execute_ptr)
CMP [R3], R2
BNE __tx_thread_preempt_restore ; jump to pre-empt restoring
;
__tx_thread_no_preempt_restore:
SETPSW U ; user stack
POPC FPSW ; restore FPU status
POPM R14-R15 ; restore R14-R15
POPM R3-R5 ; restore R3-R5
POPM R1-R2 ; restore R1-R2
RTE ; return to point of interrupt, restore PSW including IPL
; }
; else
; {
__tx_thread_preempt_restore:
; /* Save the remaining time-slice and disable it. */
; if (_tx_timer_time_slice)
; {
MOV.L #__tx_timer_time_slice, R3 ; Pickup time-slice address
MOV.L [R3],R4 ; Pickup actual time-slice
CMP #0, R4
BEQ __tx_thread_dont_save_ts ; no time slice to save
;
; _tx_thread_current_ptr -> tx_thread_time_slice = _tx_timer_time_slice;
; _tx_timer_time_slice = 0;
;
MOV.L R4,24[R2] ; Save thread's time slice
MOV.L #0,R4 ; Clear value
MOV.L R4,[R3] ; Disable global time slice flag
; }
__tx_thread_dont_save_ts:
;
; /* Now store the remaining registers! */
SETPSW U ; user stack
PUSHM R6-R13
MVFACGU #0, A1, R4 ; Save accumulators.
MVFACHI #0, A1, R5
MVFACLO #0, A1, R6
PUSHM R4-R6
MVFACGU #0, A0, R4
MVFACHI #0, A0, R5
MVFACLO #0, A0, R6
PUSHM R4-R6
MOV.L #1, R3 ; indicate interrupt stack frame
PUSH.L R3
;
; /* Clear the current task pointer. */
; _tx_thread_current_ptr = TX_NULL;
; R1 -> _tx_thread_current_ptr
; R2 -> *_tx_thread_current_ptr
MOV.L R0,8[R2] ; Save thread's stack pointer in thread control block
MOV.L #0,R2 ; Build NULL value
MOV.L R2,[R1] ; Set current thread to NULL
; /* Return to the scheduler. */
; _tx_thread_schedule();
__tx_thread_idle_system_restore:
MVTC #0, PSW ; reset interrupt priority level to 0
BRA __tx_thread_schedule ; jump to scheduler
; }
;
;}
;
END

160
ports_module/rxv2/iar/module_manager/src/tx_thread_context_save.s Normal file
View File

@@ -0,0 +1,160 @@
;/**************************************************************************/
;/* */
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
;/* */
;/* This software is licensed under the Microsoft Software License */
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** Thread */
;/** */
;/**************************************************************************/
;/**************************************************************************/
extern __tx_thread_system_state
extern __tx_thread_current_ptr
section .text:CODE:ROOT
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_context_save RXv2/IAR */
;/* 6.x */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function saves the context of an executing thread in the */
;/* beginning of interrupt processing. The function also ensures that */
;/* the system stack is used upon return to the calling ISR. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* CALLED BY */
;/* */
;/* ISRs */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* xx-xx-xxxx William E. Lamie Initial Version 6.x */
;/* */
;/**************************************************************************/
;VOID _tx_thread_context_save(VOID)
;{
public __tx_thread_context_save
__tx_thread_context_save:
;
; /* Upon entry to this routine, it is assumed that interrupts are locked
; out and the (interrupt) stack frame looks like the following:
;
; (lower address) SP -> [return address of this call]
; SP+4 -> Saved R1
; SP+8 -> Saved R2
; SP+12-> Interrupted PC
; SP+16-> Interrupted PSW
;
; /* Check for a nested interrupt condition. */
; if (_tx_thread_system_state++)
; {
;
MOV.L #__tx_thread_system_state, R1 ; pick up address of system state
MOV.L [R1], R2 ; pick up system state
CMP #0, R2 ; 0 -> no nesting
BEQ __tx_thread_not_nested_save
;
; /* Nested interrupt condition. */
;
ADD #1, r2 ; _tx_thread_system_state++
MOV.L r2, [r1]
;
; /* Save the rest of the scratch registers on the interrupt stack and return to the
; calling ISR. */
POP R1 ; recuperate return address from stack
PUSHM R3-R5
PUSHM R14-R15
PUSHC FPSW ; (top) FPSW, R14, R15, R3, R4, R5, R1, R2, PC, PSW (bottom)
JMP R1 ; return address was preserved in R1
;
__tx_thread_not_nested_save:
; }
;
; /* Otherwise, not nested, check to see if a thread was running. */
; else if (_tx_thread_current_ptr)
; {
;
ADD #1, R2 ; _tx_thread_system_state++
MOV.L R2, [R1]
MOV.L #__tx_thread_current_ptr, R2 ; Pickup current thread pointer
MOV.L [R2], R2
CMP #0,R2 ; Is it NULL?
BEQ __tx_thread_idle_system_save ; Yes, idle system is running - idle restore
;
; /* Move stack frame over to the current threads stack. */
; /* complete stack frame with registers not saved yet (R3-R5, R14-R15, FPSW) */
;
MVFC USP, R1 ; pick up user stack pointer
MOV.L 16[R0], R2
MOV.L R2, [-R1] ; save PSW on thread stack
MOV.L 12[R0], R2
MOV.L R2, [-R1] ; save PC on thread stack
MOV.L 8[R0], R2
MOV.L R2, [-R1] ; save R2 on thread stack
MOV.L 4[R0], R2
MOV.L R2, [-R1] ; save R1 on thread stack
MOV.L R5, [-R1] ; save R5 on thread stack
MOV.L R4, [-R1] ; save R4 on thread stack
MOV.L R3, [-R1] ; save R3 on thread stack
MOV.L R15, [-R1] ; save R15 on thread stack
MOV.L R14, [-R1] ; save R14 on thread stack
MVFC FPSW, R3
MOV.L R3, [-R1] ; save FPSW on thread stack
POP R2 ; pick up return address from interrupt stack
ADD #16, R0, R0 ; correct interrupt stack pointer back to the bottom
MVTC R1, USP ; set user/thread stack pointer
JMP R2 ; return to ISR
; }
; else
; {
;
__tx_thread_idle_system_save:
;
; /* Interrupt occurred in the scheduling loop. */
;
POP R1 ; pick up return address
ADD #16, R0, R0 ; correct interrupt stack pointer back to the bottom (PC), don't care about saved registers
JMP R1 ; return to caller
;
; }
;}
END

85
ports_module/rxv2/iar/module_manager/src/tx_thread_interrupt_control.s Normal file
View File

@@ -0,0 +1,85 @@
;/**************************************************************************/
;/* */
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
;/* */
;/* This software is licensed under the Microsoft Software License */
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** Thread */
;/** */
;/**************************************************************************/
;/**************************************************************************/
section .text:CODE:ROOT
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_interrupt_control RXv2/IAR */
;/* 6.x */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function is responsible for changing the interrupt lockout */
;/* posture of the system. */
;/* */
;/* INPUT */
;/* */
;/* new_posture New interrupt lockout posture */
;/* */
;/* OUTPUT */
;/* */
;/* old_posture Old interrupt lockout posture */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* CALLED BY */
;/* */
;/* Application Code */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* xx-xx-xxxx William E. Lamie Initial Version 6.x */
;/* */
;/**************************************************************************/
;UINT _tx_thread_interrupt_control(UINT new_posture)
;{
public __tx_thread_interrupt_control
__tx_thread_interrupt_control:
;
; /* Pickup current interrupt lockout posture. */
;
MVFC PSW, R2 ; Save PSW to R2
MOV.L R2, R3 ; Make a copy of PSW in r3
;
; /* Apply the new interrupt posture. */
;
BTST #16, R1 ; test I bit of PSW of "new posture"
BMNE #16, R2 ; conditionally set I bit of intermediate posture
MVTC R2, PSW ; save intermediate posture to PSW
MOV.L R3,R1 ; Get original SR
RTS ; Return to caller
;}
END

387
ports_module/rxv2/iar/module_manager/src/tx_thread_schedule.s Normal file
View File

@@ -0,0 +1,387 @@
/**************************************************************************/
/* */
/* Copyright (c) Microsoft Corporation. All rights reserved. */
/* */
/* This software is licensed under the Microsoft Software License */
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
/* and in the root directory of this software. */
/* */
/**************************************************************************/
/**************************************************************************/
/**************************************************************************/
/** */
/** ThreadX Component */
/** */
/** Thread */
/** */
/**************************************************************************/
/**************************************************************************/
EXTERN __tx_thread_execute_ptr
EXTERN __tx_thread_current_ptr
EXTERN __tx_timer_time_slice
IMPORT __txm_module_manager_kernel_dispatch
IMPORT __tx_thread_system_state
EXTERN __txm_module_manager_memory_fault_info
EXTERN __txm_module_manager_memory_fault_handler
section .text:CODE:ROOT
/**************************************************************************/
/* */
/* FUNCTION RELEASE */
/* */
/* _tx_thread_schedule RXv2/IAR */
/* 6.x */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
/* */
/* DESCRIPTION */
/* */
/* This function waits for a thread control block pointer to appear in */
/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */
/* in the variable, the corresponding thread is resumed. */
/* */
/* INPUT */
/* */
/* None */
/* */
/* OUTPUT */
/* */
/* None */
/* */
/* CALLS */
/* */
/* None */
/* */
/* CALLED BY */
/* */
/* _tx_initialize_kernel_enter ThreadX entry function */
/* _tx_thread_system_return Return to system from thread */
/* _tx_thread_context_restore Restore thread's context */
/* */
/* RELEASE HISTORY */
/* */
/* DATE NAME DESCRIPTION */
/* */
/* xx-xx-xxxx Scott Larson Initial Version 6.x */
/* */
/**************************************************************************/
// VOID _tx_thread_schedule(VOID)
// {
public __tx_thread_schedule
__tx_thread_schedule:
/* Enable interrupts. */
SETPSW I
/* Wait for a thread to execute. */
// do
// {
MOV.L #__tx_thread_execute_ptr, R1 // Address of thread to executer ptr
__tx_thread_schedule_loop:
MOV.L [R1],R2 // Pickup next thread to execute
CMP #0,R2 // Is it NULL?
BEQ __tx_thread_schedule_loop // Yes, idle system, keep checking
// }
// while(_tx_thread_execute_ptr == TX_NULL);
/* Yes! We have a thread to execute. Lockout interrupts and transfer control to it. */
CLRPSW I // disable interrupts
/* Setup the current thread pointer. */
// _tx_thread_current_ptr = _tx_thread_execute_ptr;
MOV.L #__tx_thread_current_ptr, R3
MOV.L R2,[R3] // Setup current thread pointer
/* Increment the run count for this thread. */
// _tx_thread_current_ptr -> tx_thread_run_count++;
MOV.L 4[R2],R3 // Pickup run count
ADD #1,R3 // Increment run counter
MOV.L R3,4[R2] // Store it back in control block
/* Setup time-slice, if present. */
// _tx_timer_time_slice = _tx_thread_current_ptr -> tx_thread_time_slice;
MOV.L 24[R2],R3 // Pickup thread time-slice
MOV.L #__tx_timer_time_slice,R4 // Pickup pointer to time-slice
MOV.L R3, [R4] // Setup time-slice
/* Switch to the thread's stack. */
// SP = _tx_thread_execute_ptr -> tx_thread_stack_ptr;
SETPSW U // user stack mode
MOV.L 8[R2],SP // Pickup stack pointer
/* Set up MPU. */
// Disable MPU
MOV.L #0x00086500,R1 // Pickup MPEN
MOV #0,R3 // Build disable value
MOV.L R3,[R1] // Disable MPU
// Determine if protection for this thread is required
MOV.L 156[R2],R1 // Pickup user_mode
CMP #0,R1 // Is protection required for this thread?
BEQ skip_mpu_setup // No, skip MPU setup
MOV.L #0x00086408,R1 // Region 1 Start Page Register address
MOV.L 144[R2],R2 // Address of module instance ptr at offset 144 in TCB
ADD #100,R2,R2 // Get address of MPU table in module struct, starting at region 1
// Region 0 (Trampoline from User mode to ThreadX) set up in txm_module_manager_setup_mpu_registers.c
// Build region 1 (User code)
MOV.L [R2+],R4 // Pickup region 1 start page, increment to region 1 end page
MOV.L R4,[R1+] // Setup region 1 start page reg, increment to region 1 end page reg.
MOV.L [R2+],R4 // Pickup region 1 end page, increment to region 2 start page
MOV.L R4,[R1+] // Setup region 1 end page reg, increment to region 2 start page reg.
// Build region 2 (User data)
MOV.L [R2+],R4 // Pickup region 2 start page, increment to region 2 end page
MOV.L R4,[R1+] // Setup region 2 start page reg, increment to region 2 end page reg.
MOV.L [R2+],R4 // Pickup region 2 end page, increment to region 3 start page
MOV.L R4,[R1+] // Setup region 2 end page reg, increment to region 3 start page reg.
// Build region 3 (Shared memory)
MOV.L [R2+],R4 // Pickup region 3 start page, increment to region 3 end page
MOV.L R4,[R1+] // Setup region 3 start page reg, increment to region 3 end page reg.
MOV.L [R2+],R4 // Pickup region 3 end page, increment to region 4 start page
MOV.L R4,[R1+] // Setup region 3 end page reg, increment to region 4 start page reg.
// Region 4-7 unused
// Setup background region
MOV.L #0x00086504,R1 // Pickup MPBAC
MOV #0,[R1] // Read/Write/Execute prohibited.
// Enable MPU
MOV.L #0x00086500,R1 // Pickup MPEN
MOV #1,[R1] // Enable MPU
skip_mpu_setup
/* Determine if an interrupt frame or a synchronous task suspension frame is present. */
POP R1 // Pickup stack type
CMP #1, R1 // Is it an interrupt stack?
BNE __tx_thread_synch_return // No, a synchronous return frame is present.
POPM R1-R3 // Restore accumulators.
MVTACLO R3, A0
MVTACHI R2, A0
MVTACGU R1, A0
POPM R1-R3
MVTACLO R3, A1
MVTACHI R2, A1
MVTACGU R1, A1
POPM R6-R13 // Recover interrupt stack frame
POPC FPSW
POPM R14-R15
POPM R3-R5
POPM R1-R2
RTE // return to point of interrupt, this restores PC and PSW
__tx_thread_synch_return
POPC PSW
POPM R6-R13 // Recover solicited stack frame
RTS
// }
extern __tx_thread_context_save
extern __tx_thread_context_restore
/* Software triggered interrupt used to perform context switches.
The priority of this interrupt is set to the lowest priority within
tx_initialize_low_level() and triggered by ThreadX when calling
_tx_thread_system_return(). */
public ___interrupt_27
___interrupt_27:
PUSHM R1-R2
BSR __tx_thread_context_save
BRA __tx_thread_context_restore
/* You may have to modify BSP to use this handler.
// MPU Memory access violation
PUBLIC ___excep_access_inst
PUBLIC ___violation_handler
___excep_access_inst
___violation_handler
// Disable interrupts
CLRPSW I // disable interrupts
// Save contents of R1 and R2
PUSH R1
PUSH R2
// Increment and save system state
MOV.L #__tx_thread_system_state, R1 // Pickup address of system state
MOV.L [R1], R2 // Pickup system state
ADD #1, R2 // Increment
MOV.L R2, [R1] // Store new system state
// Now pickup and store all the fault related information.
MOV.L #__txm_module_manager_memory_fault_info, R1
MOV.L #__tx_thread_current_ptr, R2 // Build current thread pointer address
MOV.L [R2], R2 // Pickup the current thread pointer
MOV.L R2, 0[R1] // Save current thread pointer in fault info structure
MOV.L 8[SP], R2 // Pickup instruction address at point of fault
MOV.L R2, 4[R1] // Save point of fault
MOV.L #0x0008650C, R2 // Pickup Memory-Protection Error Status Register
MOV.L [R2], 8[R1] // Save MPESTS
MOV.L #0x00086514, R2 // Pickup Data Memory-Protection Error Address Register
MOV.L [R2], 12[R1] // Save MPDEA
MOV.L #0x00086528, R2 // Pickup Instruction Hit Region Register
MOV.L [R2], 16[R1] // Save MHITI
MOV.L #0x0008652C, R2 // Pickup Data Hit Region Register
MOV.L [R2], 20[R1] // Save MHITD
MOV.L 12[SP], R2 // Pickup PSW
MOV.L R2, 24[R1] // Save PSW
MVFC USP, R2 // Pickup user stack pointer
MOV.L R2, 28[R1] // Save user stack pointer
MOV.L R3, 40[R1] // Save R3
MOV.L R4, 44[R1] // Save R4
MOV.L R5, 48[R1] // Save R5
MOV.L R6, 52[R1] // Save R6
MOV.L R7, 56[R1] // Save R7
MOV.L R8, 60[R1] // Save R8
MOV.L R9, 64[R1] // Save R9
MOV.L R10, 68[R1] // Save R10
MOV.L R11, 72[R1] // Save R11
MOV.L R12, 76[R1] // Save R12
MOV.L R13, 80[R1] // Save R13
MOV.L R14, 84[R1] // Save R14
MOV.L R15, 84[R1] // Save R15
POP R3 // Recall R1
MOV.L R3, 32[R1] // Save R1
POP R3 // Recall R2
MOV.L R3, 36[R1] // Save R2
BSR __txm_module_manager_memory_fault_handler // Call memory manager fault handler
// Decrement and save system state
MOV.L #__tx_thread_system_state, R1 // Pickup address of system state
MOV.L [R1], R2 // Pickup system state
SUB #1, R2 // Decrement
MOV.L R2, [R1] // Store new system state
MOV.L #__tx_thread_current_ptr, R2 // Pickup address of current thread pointer
MOV.L #0, [R2] // Clear current thread pointer
BRA __tx_thread_schedule // Attempt to schedule the next thread
*/
public ___interrupt_26
___interrupt_26:
PUBLIC __txm_module_manager_kernel
__txm_module_manager_kernel
MOV.L [SP], R5 // Get return address
CMP #__txm_module_manager_user_mode_entry+3, R5 // Did we come from user_mode_entry?
BEQ __txm_module_manager_entry // If so, continue.
RTE // If not, then return from where we came.
__txm_module_manager_entry
// We are entering the kernel from a module thread with user mode selected.
// At this point, we are out of user mode!
// Clear current user mode.
MOV.L #__tx_thread_current_ptr, R5
MOV [R5],R5
MOV #0,152[R5]
// Switch to kernel stack
PUSHM R1-R2
MVFC USP, R1 // Pickup module thread stack pointer
MOV.L R1, 172[R5] // Save module thread stack pointer
MOV.L 164[R5], R1 // Pickup kernel stack end
#ifndef TXM_MODULE_KERNEL_STACK_MAINTENANCE_DISABLE
MOV.L R1, 16[R5] // Set stack end
MOV.L 160[R5], R2 // Pickup kernel stack start
MOV.L R2, 12[R5] // Set stack start
MOV.L 168[R5], R2 // Pickup kernel stack size
MOV.L R2, 20[R5] // Set stack size
#endif
MVTC R1, USP // Set stack pointer
POPM R1-R2
// Modify PSW in ISP to return in supervisor mode and user stack
MOV.L 4[SP], R5
BCLR #20, R5
MOV.L R5, 4[SP]
// Return to user_mode_entry where kernel_dispatch will be called.
RTE
SECTION CODE:CODE (4) // Align 4, smallest page size for MPU is 16 bytes.
ALIGN 4
PUBLIC __txm_module_manager_user_mode_entry
__txm_module_manager_user_mode_entry
INT #26 // Enter ThreadX kernel (exit User mode).
// At this point, we are out of user mode.
// Simply call the kernel dispatch function.
MOV.L #__txm_module_manager_kernel_dispatch,R5
JSR R5
// Restore user mode while inside of ThreadX.
MOV.L #__tx_thread_current_ptr, R5
MOV [R5],R5
MOV #1,152[R5]
// Switch to module thread stack
#ifndef TXM_MODULE_KERNEL_STACK_MAINTENANCE_DISABLE
PUSH R1
MOV.L 176[R5], R1 // Pickup module thread stack start
MOV.L R1, 12[R5] // Set stack start
MOV.L 180[R5], R1 // Pickup module thread stack end
MOV.L R1, 16[R5] // Set stack end
MOV.L 184[R5], R1 // Pickup kernel stack size
MOV.L R1, 20[R5] // Set stack size
POP R1
#endif
MOV.L 172[R5], R5 // Pickup module thread stack pointer
MVTC R5, USP // Set stack pointer
// USP is set for an RTS, need to set for RTE to set User mode in PSW.
// Push return address on SP
MOV.L [SP],R5
PUSH R5
// Set user mode and place PSW in prev position in SP
MVFC PSW,R5
BSET #20,R5
MOV.L R5,4[SP]
RTE
// Fill rest of page with NOPs.
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
END

147
ports_module/rxv2/iar/module_manager/src/tx_thread_stack_build.s Normal file
View File

@@ -0,0 +1,147 @@
;/**************************************************************************/
;/* */
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
;/* */
;/* This software is licensed under the Microsoft Software License */
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** Thread */
;/** */
;/**************************************************************************/
;/**************************************************************************/
;
section .text:CODE:ROOT
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_stack_build RXv2/IAR */
;/* 6.x */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function builds a stack frame on the supplied thread's stack. */
;/* The stack frame results in a fake interrupt return to the supplied */
;/* function pointer. */
;/* */
;/* INPUT */
;/* */
;/* thread_ptr Pointer to thread control blk */
;/* function_ptr Pointer to return function */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* CALLED BY */
;/* */
;/* _tx_thread_create Create thread service */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* xx-xx-xxxx William E. Lamie Initial Version 6.x */
;/* */
;/**************************************************************************/
public __tx_thread_stack_build
__tx_thread_stack_build:
;
;
; /* Build an interrupt frame. The form of the fake interrupt stack
; on the Renesas RX should look like the following after it is built:
;
; Stack Top: 1 Interrupt stack frame type
; ACC0
; ACC1
; R6
; R7
; R8
; R9
; R10
; R11
; R12
; R13
; FPSW
; R14
; R15
; R3
; R4
; R5
; R1
; R2
; PC
; PSW
;
; Stack Bottom: (higher memory address) */
;
MOV.L 16[R1],R3 ; Pickup end of stack area
BCLR #0, R3 ; mask for 4-byte alignment
BCLR #1, R3
;
; /* Build the stack frame. */
;
MOV.L #30000h, R4
MOV.L R4, [-R3] ; initial PSW (SVC mode, U flag set)
MOV.L R2, [-R3] ; initial PC
MOV.L #0, R4
MOV.L R4,[-R3] ; initial R2 ...
MOV.L R4,[-R3] ; initial R1 ...
MOV.L R4,[-R3] ; initial R5 ...
MOV.L R4,[-R3] ; initial R4 ...
MOV.L R4,[-R3] ; initial R3 ...
MOV.L R4,[-R3] ; initial R15 ...
MOV.L R4,[-R3] ; initial R14 ...
MVFC FPSW, r4
MOV.L R4, [-R3] ; initial FPSW
MOV.L #0, R4
MOV.L R4,[-R3] ; initial R13 ...
MOV.L R4,[-R3] ; initial R12 ...
MOV.L R4,[-R3] ; initial R11 ...
MOV.L R4,[-R3] ; initial R10 ...
MOV.L R4,[-R3] ; initial R9 ...
MOV.L R4,[-R3] ; initial R8 ...
MOV.L R4,[-R3] ; initial R7 ...
MOV.L R4,[-R3] ; initial R6 ...
MOV.L R4,[-R3] ; Accumulator 1
MOV.L R4,[-R3]
MOV.L R4,[-R3]
MOV.L R4,[-R3] ; Accumulator 0
MOV.L R4,[-R3]
MOV.L R4,[-R3]
MOV.L #1, R4
MOV.L R4,[-R3] ; indicate interrupt stack frame
; /* Setup stack pointer. */
; thread_ptr -> tx_thread_stack_ptr = R1;
MOV.L R3, 8[R1]
; store initial SP in thread control block
RTS
;}
END

74
ports_module/rxv2/iar/module_manager/src/tx_thread_system_return.s Normal file
View File

@@ -0,0 +1,74 @@
;/**************************************************************************/
;/* */
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
;/* */
;/* This software is licensed under the Microsoft Software License */
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** Thread */
;/** */
;/**************************************************************************/
;/**************************************************************************/
section .text:CODE:ROOT
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_system_return RXv2/IAR */
;/* 6.x */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function is target processor specific. It is used to transfer */
;/* control from a thread back to the system. Only a minimal context */
;/* is saved since the compiler assumes temp registers are going to get */
;/* slicked by a function call anyway. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* _tx_thread_schedule Thread scheduling loop */
;/* */
;/* CALLED BY */
;/* */
;/* ThreadX components */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* xx-xx-xxxx William E. Lamie Initial Version 6.x */
;/* */
;/**************************************************************************/
public __tx_thread_system_return
__tx_thread_system_return:
BRA __tx_thread_system_return
RTS
END

235
ports_module/rxv2/iar/module_manager/src/tx_timer_interrupt.s Normal file
View File

@@ -0,0 +1,235 @@
;/**************************************************************************/
;/* */
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
;/* */
;/* This software is licensed under the Microsoft Software License */
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** Thread */
;/** */
;/**************************************************************************/
;/**************************************************************************/
extern __tx_timer_expiration_process
extern __tx_timer_system_clock
extern __tx_timer_expired_time_slice
extern __tx_timer_current_ptr
extern __tx_timer_expired
extern __tx_timer_list_start
extern __tx_timer_time_slice
extern __tx_timer_list_end
extern __tx_thread_time_slice
section .text:CODE:ROOT
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_timer_interrupt RXv2/IAR */
;/* 6.x */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function processes the hardware timer interrupt. This */
;/* processing includes incrementing the system clock and checking for */
;/* time slice and/or timer expiration. If either is found, the */
;/* interrupt context save/restore functions are called along with the */
;/* expiration functions. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* _tx_thread_context_save Save interrupted context */
;/* _tx_timer_expiration_process Timer expiration processing */
;/* _tx_thread_time_slice Time slice interrupted thread */
;/* _tx_thread_context_restore Restore interrupted context */
;/* */
;/* CALLED BY */
;/* */
;/* interrupt vector */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* xx-xx-xxxx William E. Lamie Initial Version 6.x */
;/* */
;/**************************************************************************/
public __tx_timer_interrupt
__tx_timer_interrupt:
;
; /* Upon entry to this routine, it is assumed that all interrupts are locked
; out and the stack looks like the following:
; SP+4 -> Interrupted PC
; SP+8-> Interrupted SR
; */
;
; /* Increment the system clock. */
; _tx_timer_system_clock++;
;
PUSHM R14-R15
PUSHM R1-R5
MOV.L #__tx_timer_system_clock, R1 ; Pickup address of system clock
MOV.L [R1], R2 ; Pickup system clock
ADD #1, R2 ; Increment system clock
MOV.L R2,[R1] ; Store new system clock
;
; /* Test for time-slice expiration. */
; if (_tx_timer_time_slice)
; {
;
MOV.L #__tx_timer_time_slice, R1 ; Pickup address of time slice
MOV.L [R1], R2 ; Pickup the current time slice
CMP #0, R2 ; Is a time slice active?
BEQ __tx_timer_no_time_slice ; No, skip timer slice processing
;
; /* Decrement the time_slice. */
; _tx_timer_time_slice--;
;
SUB #1, R2 ; Decrement the time-slice
MOV.L R2, [R1] ; Store time-slice
;
; /* Check for expiration. */
; if (__tx_timer_time_slice == 0)
;
CMP #0, R2 ; Has it expired?
BNE __tx_timer_no_time_slice ; No, time-slice has not expired
;
; /* Set the time-slice expired flag. */
; _tx_timer_expired_time_slice = TX_TRUE;
;
MOV.L #__tx_timer_expired_time_slice, R1 ; Pickup address of expired time-slice
MOV.L #1, R2 ; Build expired value
MOV.L R2, [R1] ; Set expired time slice variable
; }
;
__tx_timer_no_time_slice:
;
; /* Test for timer expiration. */
; if (*_tx_timer_current_ptr)
; {
;
MOV.L #__tx_timer_current_ptr, R1 ; Pickup address of current timer ptr
MOV.L [R1], R2 ; Pickup current pointer
MOV.L [R2+], R1 ; pickup timer list entry, _tx_timer_current_ptr++
CMP #0, R1 ; Is timer pointer NULL?
BEQ __tx_timer_no_timer ; Yes, no timer has expired
;
; /* Set expiration flag. */
; _tx_timer_expired = TX_TRUE;
;
MOV.L #__tx_timer_expired,R2 ; Build address of expired flag
MOV.L #1, R1 ; Build expired value
MOV.L R1, [R2]
BRA __tx_timer_done ; Finished with timer processing
;
; }
; else
; {
__tx_timer_no_timer:
;
; /* No timer expired, increment the timer pointer. */
; _tx_timer_current_ptr++;
;
; /* R2 already contains __tx_timer_current_ptr++ */
;
; /* Check for wrap-around. */
; if (_tx_timer_current_ptr == _tx_timer_list_end)
;
MOV.L #__tx_timer_list_end, R1 ; Pickup the timer list end ptr
MOV.L [R1], R1 ; Pickup actual timer list end
CMP R1, R2 ; Are we at list end?
BNE __tx_timer_skip_wrap ; No, don't move pointer to the
; top of the list
;
; /* Wrap to beginning of list. */
; _tx_timer_current_ptr = _tx_timer_list_start;
;
MOV.L #__tx_timer_list_start, R2 ; Pickup the timer list start ptr
MOV.L [R2], R2 ; Pickup the start of the list
; }
;
__tx_timer_skip_wrap:
MOV.L #__tx_timer_current_ptr,R1
MOV.L R2, [R1] ; store in updated pointer in _tx_timer_current_ptr
__tx_timer_done:
;
; /* See if anything has expired. */
; if ((_tx_timer_expired_time_slice) || (_tx_timer_expired))
; {
;
MOV.L #__tx_timer_expired_time_slice, R1 ; Pickup expired time slice addr
MOV.L [R1], R1 ; Pickup expired time slice
MOV.L #__tx_timer_expired, R2 ; Pickup expired timer flag address
MOV.L [R2], R2 ; Pickup actual flag
OR R1, R2 ; Or flags together
BEQ __tx_timer_nothing_expired ; If Z set, nothing has expired
__tx_something_expired:
; /* Did a timer expire? */
; if (_tx_timer_expired)
; {
MOV.L #__tx_timer_expired,R1 ; Pickup expired flag address
MOV.L [R1], R1 ; Pickup expired flag
CMP #0,R1 ; Is the expired timer flag set?
BEQ __tx_timer_dont_activate ; No, skip timer activation
;
; /* Process timer expiration. */
; _tx_timer_expiration_process();
;
BSR __tx_timer_expiration_process ; Call the timer expiration handling routine
;
; }
__tx_timer_dont_activate:
;
; /* Did time slice expire? */
; if (_tx_timer_expired_time_slice)
; {
;
MOV.L #__tx_timer_expired_time_slice, R1 ; Pickup time-slice expired flag addr
MOV.L [R1], R1 ; Pickup actual flag
CMP #0,R1 ; Has time-slice expired?
BEQ __tx_timer_not_ts_expiration ; No, skip time-slice expiration
;
; /* Time slice interrupted thread. */
; _tx_thread_time_slice();
BSR __tx_thread_time_slice ; Call time-slice processing
; }
;
__tx_timer_not_ts_expiration:
__tx_timer_nothing_expired:
POPM R1-R5
POPM R14-R15
;
RTS ; return to point of interrupt
;
;}
END

79
ports_module/rxv2/iar/module_manager/src/txm_module_manager_alignment_adjust.c Normal file
View File

@@ -0,0 +1,79 @@
/**************************************************************************/
/* */
/* Copyright (c) Microsoft Corporation. All rights reserved. */
/* */
/* This software is licensed under the Microsoft Software License */
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
/* and in the root directory of this software. */
/* */
/**************************************************************************/
/**************************************************************************/
/**************************************************************************/
/** */
/** ThreadX Component */
/** */
/** Module Manager */
/** */
/**************************************************************************/
/**************************************************************************/
#define TX_SOURCE_CODE
#include "tx_api.h"
#include "txm_module.h"
/**************************************************************************/
/* */
/* FUNCTION RELEASE */
/* */
/* _txm_module_manager_alignment_adjust RXv2/IAR */
/* 6.1.9 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
/* */
/* DESCRIPTION */
/* */
/* This function adjusts the alignment and size of the code and data */
/* section for a given module implementation. */
/* */
/* INPUT */
/* */
/* module_preamble Pointer to module preamble */
/* code_size Size of the code area (updated) */
/* code_alignment Code area alignment (updated) */
/* data_size Size of data area (updated) */
/* data_alignment Data area alignment (updated) */
/* */
/* OUTPUT */
/* */
/* None */
/* */
/* CALLS */
/* */
/* None */
/* */
/* CALLED BY */
/* */
/* Initial thread stack frame */
/* */
/* RELEASE HISTORY */
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 10-15-2021 Scott Larson Initial Version 6.1.9 */
/* */
/**************************************************************************/
VOID _txm_module_manager_alignment_adjust(TXM_MODULE_PREAMBLE *module_preamble,
ULONG *code_size,
ULONG *code_alignment,
ULONG *data_size,
ULONG *data_alignment)
{
}

175
ports_module/rxv2/iar/module_manager/src/txm_module_manager_external_memory_enable.c Normal file
View File

@@ -0,0 +1,175 @@
/**************************************************************************/
/* */
/* Copyright (c) Microsoft Corporation. All rights reserved. */
/* */
/* This software is licensed under the Microsoft Software License */
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
/* and in the root directory of this software. */
/* */
/**************************************************************************/
/**************************************************************************/
/**************************************************************************/
/** */
/** ThreadX Component */
/** */
/** Module Manager */
/** */
/**************************************************************************/
/**************************************************************************/
#define TX_SOURCE_CODE
#include "tx_api.h"
#include "tx_mutex.h"
#include "tx_queue.h"
#include "tx_thread.h"
#include "txm_module.h"
/**************************************************************************/
/* */
/* FUNCTION RELEASE */
/* */
/* _txm_module_manager_external_memory_enable RXv2/IAR */
/* 6.1.9 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
/* */
/* DESCRIPTION */
/* */
/* This function creates an entry in the MPU table for a shared */
/* memory space. */
/* */
/* INPUT */
/* */
/* module_instance Module instance pointer */
/* start_address Start address of memory */
/* length Length of external memory */
/* attributes Memory attributes (r/w) */
/* */
/* OUTPUT */
/* */
/* status Completion status */
/* */
/* CALLS */
/* */
/* _tx_mutex_get Get protection mutex */
/* _tx_mutex_put Release protection mutex */
/* _txm_power_of_two_block_size Round length to power of two */
/* */
/* CALLED BY */
/* */
/* Application code */
/* */
/* RELEASE HISTORY */
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 10-15-2021 Scott Larson Initial Version 6.1.9 */
/* */
/**************************************************************************/
UINT _txm_module_manager_external_memory_enable(TXM_MODULE_INSTANCE *module_instance,
VOID *start_address,
ULONG length,
UINT attributes)
{
ULONG address;
UINT attributes_check = 0;
TXM_MODULE_PREAMBLE *module_preamble;
/* Determine if the module manager has not been initialized yet. */
if (_txm_module_manager_ready != TX_TRUE)
{
/* Module manager has not been initialized. */
return(TX_NOT_AVAILABLE);
}
/* Determine if the module is valid. */
if (module_instance == TX_NULL)
{
/* Invalid module pointer. */
return(TX_PTR_ERROR);
}
/* Get module manager protection mutex. */
_tx_mutex_get(&_txm_module_manager_mutex, TX_WAIT_FOREVER);
/* Determine if the module instance is valid. */
if (module_instance -> txm_module_instance_id != TXM_MODULE_ID)
{
/* Release the protection mutex. */
_tx_mutex_put(&_txm_module_manager_mutex);
/* Invalid module pointer. */
return(TX_PTR_ERROR);
}
/* Determine if the module instance is in the loaded state. */
if (module_instance -> txm_module_instance_state != TXM_MODULE_LOADED)
{
/* Release the protection mutex. */
_tx_mutex_put(&_txm_module_manager_mutex);
/* Return error if the module is not ready. */
return(TX_START_ERROR);
}
/* Check if preamble ext/shared mem property bit set. */
module_preamble = module_instance -> txm_module_instance_preamble_ptr;
if(!(module_preamble -> txm_module_preamble_property_flags & TXM_MODULE_SHARED_EXTERNAL_MEMORY_ACCESS))
{
/* Release the protection mutex. */
_tx_mutex_put(&_txm_module_manager_mutex);
/* Return error if bit not set. */
return(TXM_MODULE_INVALID_PROPERTIES);
}
/* Start address must be 16-byte aligned. */
address = (ULONG) start_address;
if(address != (address & 0xFFFFFFF0))
{
/* Release the protection mutex. */
_tx_mutex_put(&_txm_module_manager_mutex);
/* Return alignment error. */
return(TXM_MODULE_ALIGNMENT_ERROR);
}
/* Check length. */
/* At this point, we have a valid address and length. */
/* Build region start page register. */
module_instance -> txm_module_instance_mpu_registers[TXM_MODULE_MANAGER_SHARED_MPU_INDEX] = address & 0xFFFFFFF0;
/* Check for valid attributes. */
if(attributes & TXM_MODULE_MANAGER_SHARED_ATTRIBUTE_EXECUTE)
{
attributes_check |= TXM_MODULE_MANAGER_ATTRIBUTE_EXECUTE_MPU_BIT;
}
if(attributes & TXM_MODULE_MANAGER_SHARED_ATTRIBUTE_WRITE)
{
attributes_check |= TXM_MODULE_MANAGER_ATTRIBUTE_WRITE_MPU_BIT;
}
if(attributes & TXM_MODULE_MANAGER_SHARED_ATTRIBUTE_READ)
{
attributes_check |= TXM_MODULE_MANAGER_ATTRIBUTE_READ_MPU_BIT;
}
/* Build region end page register with attributes, OR in the Valid bit. */
module_instance -> txm_module_instance_mpu_registers[TXM_MODULE_MANAGER_SHARED_MPU_INDEX+1] = ((address + length - 1) & 0xFFFFFFF0) | attributes_check | 0x01;
/* Save address and length in module. */
module_instance -> txm_module_instance_shared_memory_address = address;
module_instance -> txm_module_instance_shared_memory_length = length;
/* Release the protection mutex. */
_tx_mutex_put(&_txm_module_manager_mutex);
/* Return success. */
return(TX_SUCCESS);
}

110
ports_module/rxv2/iar/module_manager/src/txm_module_manager_memory_fault_handler.c Normal file
View File

@@ -0,0 +1,110 @@
/**************************************************************************/
/* */
/* Copyright (c) Microsoft Corporation. All rights reserved. */
/* */
/* This software is licensed under the Microsoft Software License */
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
/* and in the root directory of this software. */
/* */
/**************************************************************************/
/**************************************************************************/
/**************************************************************************/
/** */
/** ThreadX Component */
/** */
/** Module Manager */
/** */
/**************************************************************************/
/**************************************************************************/
#define TX_SOURCE_CODE
#include "tx_api.h"
#include "tx_thread.h"
#include "txm_module.h"
/* Define the user's fault notification callback function pointer. This is
setup via the txm_module_manager_memory_fault_notify API. */
VOID (*_txm_module_manager_fault_notify)(TX_THREAD *, TXM_MODULE_INSTANCE *);
/* Define a macro that can be used to allocate global variables useful to
store information about the last fault. This macro is defined in
txm_module_port.h and is usually populated in the assembly language
fault handling prior to the code calling _txm_module_manager_memory_fault_handler. */
TXM_MODULE_MANAGER_FAULT_INFO
/**************************************************************************/
/* */
/* FUNCTION RELEASE */
/* */
/* _txm_module_manager_memory_fault_handler RXv2/IAR */
/* 6.1.9 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
/* */
/* DESCRIPTION */
/* */
/* This function handles a fault associated with a memory protected */
/* module. */
/* */
/* INPUT */
/* */
/* None */
/* */
/* OUTPUT */
/* */
/* None */
/* */
/* CALLS */
/* */
/* _tx_thread_terminate Terminate thread */
/* */
/* CALLED BY */
/* */
/* Fault handler */
/* */
/* RELEASE HISTORY */
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 10-15-2021 Scott Larson Initial Version 6.1.9 */
/* */
/**************************************************************************/
VOID _txm_module_manager_memory_fault_handler(VOID)
{
TXM_MODULE_INSTANCE *module_instance_ptr;
TX_THREAD *thread_ptr;
/* Pickup the current thread. */
thread_ptr = _tx_thread_current_ptr;
/* Initialize the module instance pointer to NULL. */
module_instance_ptr = TX_NULL;
/* Is there a thread? */
if (thread_ptr)
{
/* Pickup the module instance. */
module_instance_ptr = thread_ptr -> tx_thread_module_instance_ptr;
/* Terminate the current thread. */
_tx_thread_terminate(_tx_thread_current_ptr);
}
/* Determine if there is a user memory fault notification callback. */
if (_txm_module_manager_fault_notify)
{
/* Yes, call the user's notification memory fault callback. */
(_txm_module_manager_fault_notify)(thread_ptr, module_instance_ptr);
}
}

84
ports_module/rxv2/iar/module_manager/src/txm_module_manager_memory_fault_notify.c Normal file
View File

@@ -0,0 +1,84 @@
/**************************************************************************/
/* */
/* Copyright (c) Microsoft Corporation. All rights reserved. */
/* */
/* This software is licensed under the Microsoft Software License */
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
/* and in the root directory of this software. */
/* */
/**************************************************************************/
/**************************************************************************/
/**************************************************************************/
/** */
/** ThreadX Component */
/** */
/** Module Manager */
/** */
/**************************************************************************/
/**************************************************************************/
#define TX_SOURCE_CODE
#include "tx_api.h"
#include "tx_thread.h"
#include "txm_module.h"
/* Define the external user's fault notification callback function pointer. This is
setup via the txm_module_manager_memory_fault_notify API. */
extern VOID (*_txm_module_manager_fault_notify)(TX_THREAD *, TXM_MODULE_INSTANCE *);
/**************************************************************************/
/* */
/* FUNCTION RELEASE */
/* */
/* _txm_module_manager_memory_fault_notify RXv2/IAR */
/* 6.1.9 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
/* */
/* DESCRIPTION */
/* */
/* This function registers an application callback when/if a memory */
/* fault occurs. The supplied thread is automatically terminated, but */
/* any other threads in the same module may still execute. */
/* */
/* INPUT */
/* */
/* notify_function Memory fault notification */
/* function, NULL disables. */
/* */
/* OUTPUT */
/* */
/* status Completion status */
/* */
/* CALLS */
/* */
/* None */
/* */
/* CALLED BY */
/* */
/* Application Code */
/* */
/* RELEASE HISTORY */
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 10-15-2021 Scott Larson Initial Version 6.1.9 */
/* */
/**************************************************************************/
UINT _txm_module_manager_memory_fault_notify(VOID (*notify_function)(TX_THREAD *, TXM_MODULE_INSTANCE *))
{
/* Setup notification function. */
_txm_module_manager_fault_notify = notify_function;
/* Return success. */
return(TX_SUCCESS);
}

107
ports_module/rxv2/iar/module_manager/src/txm_module_manager_setup_mpu_registers.c Normal file
View File

@@ -0,0 +1,107 @@
/**************************************************************************/
/* */
/* Copyright (c) Microsoft Corporation. All rights reserved. */
/* */
/* This software is licensed under the Microsoft Software License */
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
/* and in the root directory of this software. */
/* */
/**************************************************************************/
/**************************************************************************/
/**************************************************************************/
/** */
/** ThreadX Component */
/** */
/** Module Manager */
/** */
/**************************************************************************/
/**************************************************************************/
#define TX_SOURCE_CODE
#include "tx_api.h"
#include "txm_module.h"
/**************************************************************************/
/* */
/* FUNCTION RELEASE */
/* */
/* _txm_module_manager_setup_mpu_registers RXv2/IAR */
/* 6.1.9 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
/* */
/* DESCRIPTION */
/* */
/* This function sets up the RX MPU register definitions based */
/* on the module's memory characteristics. */
/* */
/* INPUT */
/* */
/* module_instance Pointer to module instance */
/* */
/* OUTPUT */
/* */
/* MPU specifications for module */
/* */
/* CALLS */
/* */
/* none */
/* */
/* CALLED BY */
/* */
/* _txm_module_manager_thread_create */
/* */
/* RELEASE HISTORY */
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 10-15-2021 Scott Larson Initial Version 6.1.9 */
/* */
/**************************************************************************/
VOID _txm_module_manager_setup_mpu_registers(TXM_MODULE_INSTANCE *module_instance)
{
ULONG region_size;
ULONG region_start_page_register;
ULONG region_end_page_register;
/* Setup region 0 for the ThreadX trampoline code. */
region_start_page_register = (ULONG) _txm_module_manager_user_mode_entry;
region_start_page_register = region_start_page_register & 0xFFFFFFF0;
module_instance -> txm_module_instance_mpu_registers[0] = region_start_page_register;
/* Region 0 End page is 2 pages away (for a total of 3 pages).
* Set reading permitted, writing prohibited, execution permitted, enable region. */
module_instance -> txm_module_instance_mpu_registers[1] = (region_start_page_register + 0x20) | 0x0B;
/* Place the trampoline protection in the MPU registers */
RSPAGE0 = module_instance -> txm_module_instance_mpu_registers[0];
REPAGE0 = module_instance -> txm_module_instance_mpu_registers[1];
/* Setup region 1 for code area. */
/* Set reading permitted, writing prohibited, execution permitted, enable region. */
region_start_page_register = (ULONG) module_instance -> txm_module_instance_code_start;
region_size = (ULONG) module_instance -> txm_module_instance_code_size;
region_end_page_register = (region_start_page_register + region_size - 1) & 0xFFFFFFF0;
region_start_page_register = region_start_page_register & 0xFFFFFFF0;
module_instance -> txm_module_instance_mpu_registers[2] = region_start_page_register;
module_instance -> txm_module_instance_mpu_registers[3] = region_end_page_register | 0x0B;
/* Setup region 2 for data area. */
/* Set reading permitted, writing permitted, execution prohibited, enable region. */
region_start_page_register = (ULONG) module_instance -> txm_module_instance_data_start;
region_size = (ULONG) module_instance -> txm_module_instance_data_size;
region_end_page_register = (region_start_page_register + region_size - 1) & 0xFFFFFFF0;
region_start_page_register = region_start_page_register & 0xFFFFFFF0;
module_instance -> txm_module_instance_mpu_registers[4] = region_start_page_register;
module_instance -> txm_module_instance_mpu_registers[5] = region_end_page_register | 0x0D;
}

147
ports_module/rxv2/iar/module_manager/src/txm_module_manager_thread_stack_build.s Normal file
View File

@@ -0,0 +1,147 @@
/**************************************************************************/
/* */
/* Copyright (c) Microsoft Corporation. All rights reserved. */
/* */
/* This software is licensed under the Microsoft Software License */
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
/* and in the root directory of this software. */
/* */
/**************************************************************************/
/**************************************************************************/
/**************************************************************************/
/** */
/** ThreadX Component */
/** */
/** Module Manager */
/** */
/**************************************************************************/
/**************************************************************************/
SECTION CODE:CODE
ALIGN 2
/**************************************************************************/
/* */
/* FUNCTION RELEASE */
/* */
/* _txm_module_manager_thread_stack_build RXv2/IAR */
/* 6.x */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
/* */
/* DESCRIPTION */
/* */
/* This function builds a stack frame on the supplied thread's stack. */
/* The stack frame results in a fake interrupt return to the supplied */
/* function pointer. */
/* */
/* INPUT */
/* */
/* thread_ptr Pointer to thread control blk */
/* function_ptr Pointer to shell function */
/* */
/* OUTPUT */
/* */
/* None */
/* */
/* CALLS */
/* */
/* None */
/* */
/* CALLED BY */
/* */
/* _tx_thread_create Create thread service */
/* */
/* RELEASE HISTORY */
/* */
/* DATE NAME DESCRIPTION */
/* */
/* xx-xx-xxxx Scott Larson Initial Version 6.x */
/* */
/**************************************************************************/
// VOID _txm_module_manager_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(TX_THREAD *, TXM_MODULE_INSTANCE *))
// {
PUBLIC __txm_module_manager_thread_stack_build
__txm_module_manager_thread_stack_build:
/* Build an interrupt frame. The form of the fake interrupt stack
on the Renesas RX should look like the following after it is built:
Stack Top: 1 Interrupt stack frame type
ACC0
ACC1
R6
R7
R8
R9
R10
R11
R12
R13
FPSW
R14
R15
R3
R4
R5
R1
R2
PC
PSW
Stack Bottom: (higher memory address) */
MOV.L 16[R1],R3 // Pickup end of stack area
BCLR #0, R3 // mask for 4-byte alignment
BCLR #1, R3
/* Build the stack frame. */
MOV.L #30000h, R4 // make initial PSW (user stack, enable interrupts)
BTST #0,152[R1] // in user mode?
BMC #20,R4 // if user mode, set mode bit of initial PSW
MOV.L R4, [-R3] // initial PSW
MOV.L R2, [-R3] // initial PC
MOV.L 8[R1], R4 // Pickup thread entry info pointer, which is in the stack pointer position of the thread control block.
// It was setup in the txm_module_manager_thread_create function. It will be overwritten later in this
// function with the actual, initial stack pointer.
MOV.L R4,[-R3] // initial R2, which is the module entry information.
MOV.L R1,[-R3] // initial R1, which is the thread control block.
MOV.L #0, R2 // Clear following registers to 0
MOV.L R2,[-R3] // initial R5
MOV.L R2,[-R3] // initial R4
MOV.L R2,[-R3] // initial R3
MOV.L R2,[-R3] // initial R15
MOV.L R2,[-R3] // initial R14
MVFC FPSW, R2 // pickup FPSW
MOV.L R2, [-R3] // initial FPSW
MOV.L 12[R4], R2 // Pickup code base register from the module information
MOV.L R2,[-R3] // initial R13
MOV.L 8[R4], R2 // Pickup data base register from the module information
MOV.L R2,[-R3] // initial R12
MOV.L #0, R4 // Clear following registers to 0
MOV.L R4,[-R3] // initial R11
MOV.L R4,[-R3] // initial R10
MOV.L R4,[-R3] // initial R9
MOV.L R4,[-R3] // initial R8
MOV.L R4,[-R3] // initial R7
MOV.L R4,[-R3] // initial R6
MOV.L R4,[-R3] // Accumulator 1
MOV.L R4,[-R3]
MOV.L R4,[-R3]
MOV.L R4,[-R3] // Accumulator 0
MOV.L R4,[-R3]
MOV.L R4,[-R3]
MOV.L #1, R4 // Make this an interrupt stack frame
MOV.L R4,[-R3]
/* Save stack pointer. */
// thread_ptr -> tx_thread_stack_ptr = R3;
MOV.L R3, 8[R1] // store initial SP in thread control block
RTS
// }
END