6.1 minor release
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Scott Larson
240
ports/risc-v32/iar/src/tx_thread_stack_build.s
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ports/risc-v32/iar/src/tx_thread_stack_build.s
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/**************************************************************************/
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/* */
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/* Copyright (c) Microsoft Corporation. All rights reserved. */
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/* */
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/* This software is licensed under the Microsoft Software License */
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/* Terms for Microsoft Azure RTOS. Full text of the license can be */
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/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
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/* and in the root directory of this software. */
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/* */
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/**************************************************************************/
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/**************************************************************************/
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/**************************************************************************/
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/** */
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/** ThreadX Component */
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/** */
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/** Thread */
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/** */
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/**************************************************************************/
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/**************************************************************************/
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/* #define TX_SOURCE_CODE */
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/* Include necessary system files. */
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/* #include "tx_api.h"
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#include "tx_thread.h" */
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SECTION `.text`:CODE:REORDER:NOROOT(2)
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CODE
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/**************************************************************************/
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/* */
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/* FUNCTION RELEASE */
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/* */
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/* _tx_thread_stack_build RISC-V32/IAR */
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/* 6.1 */
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/* AUTHOR */
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/* */
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/* William E. Lamie, Microsoft Corporation */
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/* Tom van Leeuwen, Technolution B.V. */
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/* */
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/* DESCRIPTION */
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/* */
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/* This function builds a stack frame on the supplied thread's stack. */
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/* The stack frame results in a fake interrupt return to the supplied */
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/* function pointer. */
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/* */
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/* INPUT */
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/* */
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/* thread_ptr Pointer to thread control blk */
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/* function_ptr Pointer to return function */
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/* */
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/* OUTPUT */
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/* */
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/* None */
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/* */
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/* CALLS */
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/* */
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/* None */
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/* */
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/* CALLED BY */
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/* */
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/* _tx_thread_create Create thread service */
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/* */
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/* RELEASE HISTORY */
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/* */
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/* DATE NAME DESCRIPTION */
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/* */
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/* 09-30-2020 William E. Lamie Initial Version 6.1 */
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/* */
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/**************************************************************************/
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/* VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID))
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{ */
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PUBLIC _tx_thread_stack_build
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_tx_thread_stack_build:
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/* Build a fake interrupt frame. The form of the fake interrupt stack
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on the RISC-V RV32 should look like the following after it is built:
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Stack Top: 1 (00) Interrupt stack frame type
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x27 (04) Initial s11
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x26 (08) Initial s10
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x25 (12) Initial s9
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x24 (16) Initial s8
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x23 (20) Initial s7
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x22 (24) Initial s6
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x21 (28) Initial s5
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x20 (32) Initial s4
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x19 (36) Initial s3
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x18 (40) Initial s2
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x9 (44) Initial s1
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x8 (48) Initial s0
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x31 (52) Initial t6
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x30 (56) Initial t5
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x29 (60) Initial t4
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x28 (64) Initial t3
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x7 (68) Initial t2
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x6 (72) Initial t1
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x5 (76) Initial t0
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x17 (80) Initial a7
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x16 (84) Initial a6
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x15 (88) Initial a5
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x14 (92) Initial a4
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x13 (96) Initial a3
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x12 (100) Initial a2
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x11 (104) Initial a1
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x10 (108) Initial a0
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x1 (112) Initial ra
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mepc (120) Initial mepc
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If floating point support:
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f0 (124) Inital ft0
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f1 (128) Inital ft1
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f2 (132) Inital ft2
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f3 (136) Inital ft3
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f4 (140) Inital ft4
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f5 (144) Inital ft5
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f6 (148) Inital ft6
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f7 (152) Inital ft7
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f8 (156) Inital fs0
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f9 (160) Inital fs1
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f10 (164) Inital fa0
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f11 (168) Inital fa1
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f12 (172) Inital fa2
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f13 (176) Inital fa3
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f14 (180) Inital fa4
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f15 (184) Inital fa5
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f16 (188) Inital fa6
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f17 (192) Inital fa7
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f18 (196) Inital fs2
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f19 (200) Inital fs3
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f20 (204) Inital fs4
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f21 (208) Inital fs5
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f22 (212) Inital fs6
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f23 (216) Inital fs7
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f24 (220) Inital fs8
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f25 (224) Inital fs9
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f26 (228) Inital fs10
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f27 (232) Inital fs11
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f28 (236) Inital ft8
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f29 (240) Inital ft9
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f30 (244) Inital ft10
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f31 (248) Inital ft11
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fscr (252) Inital fscr
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Stack Bottom: (higher memory address) */
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lw t0, 16(a0) ; Pickup end of stack area
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li t1, ~15 ; Build 16-byte alignment mask
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and t0, t0, t1 ; Make sure 16-byte alignment
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/* Actually build the stack frame. */
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#if __iar_riscv_base_isa == rv32e
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addi t0, t0, -260
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#else
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addi t0, t0, -128 ; Allocate space for the stack frame
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#endif
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li t1, 1 ; Build stack type
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sw t1, 0(t0) ; Place stack type on the top
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sw x0, 4(t0) ; Initial s11
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sw x0, 8(t0) ; Initial s10
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sw x0, 12(t0) ; Initial s9
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sw x0, 16(t0) ; Initial s8
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sw x0, 20(t0) ; Initial s7
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sw x0, 24(t0) ; Initial s6
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sw x0, 28(t0) ; Initial s5
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sw x0, 32(t0) ; Initial s4
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sw x0, 36(t0) ; Initial s3
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sw x0, 40(t0) ; Initial s2
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sw x0, 44(t0) ; Initial s1
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sw x0, 48(t0) ; Initial s0
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sw x0, 52(t0) ; Initial t6
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sw x0, 56(t0) ; Initial t5
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sw x0, 60(t0) ; Initial t4
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sw x0, 64(t0) ; Initial t3
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sw x0, 68(t0) ; Initial t2
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sw x0, 72(t0) ; Initial t1
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sw x0, 76(t0) ; Initial t0
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sw x0, 80(t0) ; Initial a7
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sw x0, 84(t0) ; Initial a6
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sw x0, 88(t0) ; Initial a5
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sw x0, 92(t0) ; Initial a4
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sw x0, 96(t0) ; Initial a3
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sw x0, 100(t0) ; Initial a2
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sw x0, 104(t0) ; Initial a1
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sw x0, 108(t0) ; Initial a0
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sw x0, 112(t0) ; Initial ra
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sw a1, 120(t0) ; Initial mepc
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#if __iar_riscv_base_isa == rv32e
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sw x0, 124(t0) ; Inital ft0
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sw x0, 128(t0) ; Inital ft1
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sw x0, 132(t0) ; Inital ft2
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sw x0, 136(t0) ; Inital ft3
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sw x0, 140(t0) ; Inital ft4
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sw x0, 144(t0) ; Inital ft5
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sw x0, 148(t0) ; Inital ft6
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sw x0, 152(t0) ; Inital ft7
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sw x0, 156(t0) ; Inital fs0
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sw x0, 160(t0) ; Inital fs1
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sw x0, 164(t0) ; Inital fa0
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sw x0, 168(t0) ; Inital fa1
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sw x0, 172(t0) ; Inital fa2
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sw x0, 176(t0) ; Inital fa3
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sw x0, 180(t0) ; Inital fa4
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sw x0, 184(t0) ; Inital fa5
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sw x0, 188(t0) ; Inital fa6
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sw x0, 192(t0) ; Inital fa7
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sw x0, 196(t0) ; Inital fs2
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sw x0, 200(t0) ; Inital fs3
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sw x0, 204(t0) ; Inital fs4
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sw x0, 208(t0) ; Inital fs5
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sw x0, 212(t0) ; Inital fs6
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sw x0, 216(t0) ; Inital fs7
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sw x0, 220(t0) ; Inital fs8
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sw x0, 224(t0) ; Inital fs9
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sw x0, 228(t0) ; Inital fs10
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sw x0, 232(t0) ; Inital fs11
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sw x0, 236(t0) ; Inital ft8
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sw x0, 240(t0) ; Inital ft9
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sw x0, 244(t0) ; Inital ft10
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sw x0, 248(t0) ; Inital ft11
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csrr a1, fcsr ; Read fcsr and use it for initial value for each thread
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sw a1, 252(t0) ; Initial fscr
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sw x0, 256(t0) ; Reserved word (0)
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#else
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sw x0, 124(t0) ; Reserved word (0)
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#endif
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/* Setup stack pointer. */
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/* thread_ptr -> tx_thread_stack_ptr = t0; */
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sw t0, 8(a0) ; Save stack pointer in thread's
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ret ; control block and return
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/* } */
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END
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