6.1 minor release
This commit is contained in:
Scott Larson
8
ports_module/cortex-m7/ac5/example_build/build.bat
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8
ports_module/cortex-m7/ac5/example_build/build.bat
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@@ -0,0 +1,8 @@
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@ECHO OFF
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ECHO Starting build...
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CALL build_threadx.bat
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CALL build_threadx_demo.bat
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CALL build_threadx_module_library.bat
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CALL build_threadx_module_demo.bat
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CALL build_threadx_module_manager_demo.bat
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ECHO Build finished.
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240
ports_module/cortex-m7/ac5/example_build/build_threadx.bat
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240
ports_module/cortex-m7/ac5/example_build/build_threadx.bat
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@@ -0,0 +1,240 @@
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del tx.a
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armasm -g --cpu=cortex-m7 --fpu=softvfp --apcs=/interwork tx_initialize_low_level.S
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armasm -g --cpu=cortex-m7 --fpu=softvfp --apcs=/interwork ../module_manager/src/tx_thread_stack_build.S
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armasm -g --cpu=cortex-m7 --fpu=softvfp --apcs=/interwork ../module_manager/src/tx_thread_schedule.S
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armasm -g --cpu=cortex-m7 --fpu=softvfp --apcs=/interwork ../module_manager/src/tx_thread_system_return.S
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armasm -g --cpu=cortex-m7 --fpu=softvfp --apcs=/interwork ../module_manager/src/tx_thread_context_save.S
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armasm -g --cpu=cortex-m7 --fpu=softvfp --apcs=/interwork ../module_manager/src/tx_thread_context_restore.S
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armasm -g --cpu=cortex-m7 --fpu=softvfp --apcs=/interwork ../module_manager/src/tx_thread_interrupt_control.S
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armasm -g --cpu=cortex-m7 --fpu=softvfp --apcs=/interwork ../module_manager/src/tx_timer_interrupt.S
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armasm -g --cpu=cortex-m7 --fpu=softvfp --apcs=/interwork ../module_manager/src/tx_thread_interrupt_disable.S
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armasm -g --cpu=cortex-m7 --fpu=softvfp --apcs=/interwork ../module_manager/src/tx_thread_interrupt_restore.S
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_allocate.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_pool_cleanup.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_pool_create.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_pool_delete.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_pool_info_get.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_pool_initialize.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_pool_performance_info_get.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_pool_performance_system_info_get.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_pool_prioritize.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_block_release.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_allocate.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_cleanup.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_create.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_delete.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_info_get.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_initialize.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_performance_info_get.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_performance_system_info_get.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_prioritize.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_pool_search.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_byte_release.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_cleanup.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_create.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_delete.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_get.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_info_get.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_initialize.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_performance_info_get.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_performance_system_info_get.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_set.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_event_flags_set_notify.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_initialize_high_level.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_initialize_kernel_enter.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_initialize_kernel_setup.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_cleanup.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_create.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_delete.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_get.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_info_get.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_initialize.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_performance_info_get.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_performance_system_info_get.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_prioritize.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_priority_change.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_mutex_put.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_cleanup.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_create.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_delete.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_flush.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_front_send.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_info_get.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_initialize.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_performance_info_get.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_performance_system_info_get.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_prioritize.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_receive.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_send.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_queue_send_notify.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_ceiling_put.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_cleanup.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_create.c
|
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_delete.c
|
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_get.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_info_get.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_initialize.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_performance_info_get.c
|
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_performance_system_info_get.c
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_prioritize.c
|
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_put.c
|
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_semaphore_put_notify.c
|
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_create.c
|
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_delete.c
|
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_entry_exit_notify.c
|
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_identify.c
|
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_info_get.c
|
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_initialize.c
|
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_performance_info_get.c
|
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_performance_system_info_get.c
|
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_preemption_change.c
|
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_priority_change.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_relinquish.c
|
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_reset.c
|
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_resume.c
|
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armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_shell_entry.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_sleep.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_stack_analyze.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_stack_error_handler.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_stack_error_notify.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_suspend.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_system_preempt_check.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_system_resume.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_system_suspend.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_terminate.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_time_slice.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_time_slice_change.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_timeout.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_thread_wait_abort.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_time_get.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_time_set.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_timer_activate.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_timer_change.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_timer_create.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_timer_deactivate.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_timer_delete.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_timer_expiration_process.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_timer_info_get.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_timer_initialize.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_timer_performance_info_get.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_timer_performance_system_info_get.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_timer_system_activate.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_timer_system_deactivate.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_timer_thread_entry.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_enable.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_disable.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_initialize.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_interrupt_control.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_isr_enter_insert.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_isr_exit_insert.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_object_register.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_object_unregister.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_user_event_insert.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_buffer_full_notify.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_event_filter.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/tx_trace_event_unfilter.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_block_allocate.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_block_pool_create.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_block_pool_delete.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_block_pool_info_get.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_block_pool_prioritize.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_block_release.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_byte_allocate.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_byte_pool_create.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_byte_pool_delete.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_byte_pool_info_get.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_byte_pool_prioritize.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_byte_release.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_event_flags_create.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_event_flags_delete.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_event_flags_get.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_event_flags_info_get.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_event_flags_set.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_event_flags_set_notify.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_mutex_create.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_mutex_delete.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_mutex_get.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_mutex_info_get.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_mutex_prioritize.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_mutex_put.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_queue_create.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_queue_delete.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_queue_flush.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_queue_front_send.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_queue_info_get.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_queue_prioritize.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_queue_receive.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_queue_send.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_queue_send_notify.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_semaphore_ceiling_put.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_semaphore_create.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_semaphore_delete.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_semaphore_get.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_semaphore_info_get.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_semaphore_prioritize.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_semaphore_put.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_semaphore_put_notify.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_thread_create.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_thread_delete.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_thread_entry_exit_notify.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_thread_info_get.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_thread_preemption_change.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_thread_priority_change.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_thread_relinquish.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_thread_reset.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_thread_resume.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_thread_suspend.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_thread_terminate.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_thread_time_slice_change.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_thread_wait_abort.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_timer_activate.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_timer_change.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_timer_create.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_timer_deactivate.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_timer_delete.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common/inc ../../../../common/src/txe_timer_info_get.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_application_request.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_callback_request.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_event_flags_notify_trampoline.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_file_load.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_in_place_load.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_internal_load.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_initialize.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_kernel_dispatch.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_maximum_module_priority_set.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_memory_load.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_object_allocate.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_object_deallocate.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_object_pointer_get.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_object_pointer_get_extended.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_object_pool_create.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_properties_get.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_queue_notify_trampoline.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_semaphore_notify_trampoline.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_start.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_stop.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_thread_create.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_thread_notify_trampoline.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_thread_reset.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_timer_notify_trampoline.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_unload.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_manager/src/txm_module_manager_util.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../module_manager/src/txm_module_manager_alignment_adjust.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../module_manager/src/txm_module_manager_external_memory_enable.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../module_manager/src/txm_module_manager_memory_fault_handler.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../module_manager/src/txm_module_manager_memory_fault_notify.c
|
||||
armcc -g -O0 --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../module_manager/src/txm_module_manager_mm_register_setup.c
|
||||
armasm -g --cpu=cortex-m7 --fpu=softvfp --apcs=/interwork ../module_manager/src/txm_module_manager_thread_stack_build.S
|
||||
armasm -g --cpu=cortex-m7 --fpu=softvfp --apcs=/interwork ../module_manager/src/txm_module_manager_user_mode_entry.S
|
||||
|
||||
armar --create tx.a tx_thread_stack_build.o tx_thread_schedule.o tx_thread_system_return.o tx_thread_context_save.o tx_thread_context_restore.o tx_timer_interrupt.o tx_thread_interrupt_control.o tx_initialize_low_level.o tx_thread_interrupt_disable.o tx_thread_interrupt_restore.o tx_block_allocate.o tx_block_pool_cleanup.o tx_block_pool_create.o tx_block_pool_delete.o tx_block_pool_info_get.o tx_block_pool_initialize.o tx_block_pool_performance_info_get.o tx_block_pool_performance_system_info_get.o tx_block_pool_prioritize.o tx_block_release.o tx_byte_allocate.o tx_byte_pool_cleanup.o tx_byte_pool_create.o tx_byte_pool_delete.o tx_byte_pool_info_get.o tx_byte_pool_initialize.o tx_byte_pool_performance_info_get.o tx_byte_pool_performance_system_info_get.o tx_byte_pool_prioritize.o tx_byte_pool_search.o tx_byte_release.o tx_event_flags_cleanup.o tx_event_flags_create.o tx_event_flags_delete.o tx_event_flags_get.o tx_event_flags_info_get.o tx_event_flags_initialize.o tx_event_flags_performance_info_get.o
|
||||
|
||||
armar -r tx.a tx_event_flags_performance_system_info_get.o tx_event_flags_set.o tx_event_flags_set_notify.o tx_initialize_high_level.o tx_initialize_kernel_enter.o tx_initialize_kernel_setup.o tx_mutex_cleanup.o tx_mutex_create.o tx_mutex_delete.o tx_mutex_get.o tx_mutex_info_get.o tx_mutex_initialize.o tx_mutex_performance_info_get.o tx_mutex_performance_system_info_get.o tx_mutex_prioritize.o tx_mutex_priority_change.o tx_mutex_put.o tx_queue_cleanup.o tx_queue_create.o tx_queue_delete.o tx_queue_flush.o tx_queue_front_send.o tx_queue_info_get.o tx_queue_initialize.o tx_queue_performance_info_get.o tx_queue_performance_system_info_get.o tx_queue_prioritize.o tx_queue_receive.o tx_queue_send.o tx_queue_send_notify.o tx_semaphore_ceiling_put.o tx_semaphore_cleanup.o tx_semaphore_create.o tx_semaphore_delete.o tx_semaphore_get.o tx_semaphore_info_get.o tx_semaphore_initialize.o tx_semaphore_performance_info_get.o tx_semaphore_performance_system_info_get.o tx_semaphore_prioritize.o tx_semaphore_put.o
|
||||
|
||||
armar -r tx.a tx_semaphore_put_notify.o tx_thread_create.o tx_thread_delete.o tx_thread_entry_exit_notify.o tx_thread_identify.o tx_thread_info_get.o tx_thread_initialize.o tx_thread_performance_info_get.o tx_thread_performance_system_info_get.o tx_thread_preemption_change.o tx_thread_priority_change.o tx_thread_relinquish.o tx_thread_reset.o tx_thread_resume.o tx_thread_shell_entry.o tx_thread_sleep.o tx_thread_stack_analyze.o tx_thread_stack_error_handler.o tx_thread_stack_error_notify.o tx_thread_suspend.o tx_thread_system_preempt_check.o tx_thread_system_resume.o tx_thread_system_suspend.o tx_thread_terminate.o tx_thread_time_slice.o tx_thread_time_slice_change.o tx_thread_timeout.o tx_thread_wait_abort.o tx_time_get.o tx_time_set.o tx_timer_activate.o tx_timer_change.o tx_timer_create.o tx_timer_deactivate.o tx_timer_delete.o tx_timer_expiration_process.o tx_timer_info_get.o tx_timer_initialize.o tx_timer_performance_info_get.o tx_timer_performance_system_info_get.o tx_timer_system_activate.o
|
||||
|
||||
armar -r tx.a tx_timer_system_deactivate.o tx_timer_thread_entry.o tx_trace_enable.o tx_trace_disable.o tx_trace_initialize.o tx_trace_interrupt_control.o tx_trace_isr_enter_insert.o tx_trace_isr_exit_insert.o tx_trace_object_register.o tx_trace_object_unregister.o tx_trace_user_event_insert.o tx_trace_buffer_full_notify.o tx_trace_event_filter.o tx_trace_event_unfilter.o txe_block_allocate.o txe_block_pool_create.o txe_block_pool_delete.o txe_block_pool_info_get.o txe_block_pool_prioritize.o txe_block_release.o txe_byte_allocate.o txe_byte_pool_create.o txe_byte_pool_delete.o txe_byte_pool_info_get.o txe_byte_pool_prioritize.o txe_byte_release.o txe_event_flags_create.o txe_event_flags_delete.o txe_event_flags_get.o txe_event_flags_info_get.o txe_event_flags_set.o txe_event_flags_set_notify.o txe_mutex_create.o txe_mutex_delete.o txe_mutex_get.o txe_mutex_info_get.o txe_mutex_prioritize.o txe_mutex_put.o txe_queue_create.o txe_queue_delete.o txe_queue_flush.o txe_queue_front_send.o txe_queue_info_get.o
|
||||
|
||||
armar -r tx.a txe_queue_prioritize.o txe_queue_receive.o txe_queue_send.o txe_queue_send_notify.o txe_semaphore_ceiling_put.o txe_semaphore_create.o txe_semaphore_delete.o txe_semaphore_get.o txe_semaphore_info_get.o txe_semaphore_prioritize.o txe_semaphore_put.o txe_semaphore_put_notify.o txe_thread_create.o txe_thread_delete.o txe_thread_entry_exit_notify.o txe_thread_info_get.o txe_thread_preemption_change.o txe_thread_priority_change.o txe_thread_relinquish.o txe_thread_reset.o txe_thread_resume.o txe_thread_suspend.o txe_thread_terminate.o txe_thread_time_slice_change.o txe_thread_wait_abort.o txe_timer_activate.o txe_timer_change.o txe_timer_create.o txe_timer_deactivate.o txe_timer_delete.o txe_timer_info_get.o txm_module_manager_alignment_adjust.o txm_module_manager_application_request.o txm_module_manager_callback_request.o txm_module_manager_event_flags_notify_trampoline.o txm_module_manager_external_memory_enable.o txm_module_manager_file_load.o txm_module_manager_in_place_load.o
|
||||
|
||||
armar -r tx.a txm_module_manager_initialize.o txm_module_manager_kernel_dispatch.o txm_module_manager_maximum_module_priority_set.o txm_module_manager_memory_fault_handler.o txm_module_manager_memory_fault_notify.o txm_module_manager_memory_load.o txm_module_manager_object_pointer_get.o txm_module_manager_object_pool_create.o txm_module_manager_queue_notify_trampoline.o txm_module_manager_semaphore_notify_trampoline.o txm_module_manager_mm_register_setup.o txm_module_manager_start.o txm_module_manager_stop.o txm_module_manager_thread_create.o txm_module_manager_thread_notify_trampoline.o txm_module_manager_thread_reset.o txm_module_manager_timer_notify_trampoline.o txm_module_manager_unload.o txm_module_manager_thread_stack_build.o txm_module_manager_internal_load.o txm_module_manager_object_allocate.o txm_module_manager_object_deallocate.o txm_module_manager_object_pointer_get_extended.o txm_module_manager_properties_get.o txm_module_manager_util.o txm_module_manager_user_mode_entry.o
|
||||
@@ -0,0 +1,4 @@
|
||||
armasm -g --cpu=cortex-m7 --apcs=interwork tx_initialize_low_level.S
|
||||
armcc -c -g --cpu=cortex-m7 -O2 -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc sample_threadx.c
|
||||
armlink -d -o sample_threadx.axf --elf --map --ro-base=0x00000000 --rw-base=0x20000000 --first __tx_vectors --datacompressor=off --inline --info=inline --callgraph --list sample_threadx.map tx_initialize_low_level.o sample_threadx.o tx.a
|
||||
|
||||
@@ -0,0 +1,3 @@
|
||||
armasm -g --cpu=cortex-m7 --fpu=softvfp --apcs=/interwork/ropi/rwpi txm_module_preamble.S
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi --lower_ropi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc sample_threadx_module.c
|
||||
armlink -d -o sample_threadx_module.axf --elf --ro=0x30000 --rw=0x40000 --first txm_module_preamble.o(Init) --entry=_txm_module_thread_shell_entry --ropi --rwpi --remove --map --symbols --list sample_threadx_module.map txm_module_preamble.o sample_threadx_module.o txm.a
|
||||
@@ -0,0 +1,106 @@
|
||||
del txm.a
|
||||
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_block_allocate.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_block_pool_create.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_block_pool_delete.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_block_pool_info_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_block_pool_performance_info_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_block_pool_performance_system_info_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_block_pool_prioritize.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_block_release.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_byte_allocate.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_byte_pool_create.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_byte_pool_delete.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_byte_pool_info_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_byte_pool_performance_info_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_byte_pool_performance_system_info_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_byte_pool_prioritize.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_byte_release.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_event_flags_create.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_event_flags_delete.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_event_flags_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_event_flags_info_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_event_flags_performance_info_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_event_flags_performance_system_info_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_event_flags_set.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_event_flags_set_notify.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_module_application_request.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_module_callback_request_thread_entry.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_module_object_allocate.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_module_object_deallocate.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_module_object_pointer_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_module_thread_system_suspend.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_mutex_create.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_mutex_delete.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_mutex_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_mutex_info_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_mutex_performance_info_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_mutex_performance_system_info_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_mutex_prioritize.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_mutex_put.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_create.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_delete.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_flush.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_front_send.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_info_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_performance_info_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_performance_system_info_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_prioritize.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_receive.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_send.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_queue_send_notify.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_ceiling_put.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_create.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_delete.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_info_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_performance_info_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_performance_system_info_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_prioritize.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_put.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_semaphore_put_notify.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_create.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_delete.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_entry_exit_notify.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_identify.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_info_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_interrupt_control.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_performance_info_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_performance_system_info_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_preemption_change.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_priority_change.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_relinquish.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_reset.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_resume.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_sleep.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_stack_error_notify.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_suspend.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_terminate.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_time_slice_change.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_thread_wait_abort.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_time_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_time_set.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_timer_activate.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_timer_change.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_timer_create.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_timer_deactivate.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_timer_delete.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_timer_info_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_timer_performance_info_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_timer_performance_system_info_get.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_trace_buffer_full_notify.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_trace_disable.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_trace_enable.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_trace_event_filter.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_trace_event_unfilter.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_trace_isr_enter_insert.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_trace_isr_exit_insert.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ../../../../common_modules/module_lib/src/txm_trace_user_event_insert.c
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c --apcs=/interwork/ropi/rwpi -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc ..//module_lib/src/txm_module_thread_shell_entry.c
|
||||
armasm -g --cpu=cortex-m7 --fpu=softvfp --apcs=/interwork/ropi/rwpi --cpreproc --cpreproc_opts=-D,TXM_ASSEMBLY --cpreproc_opts=-D,TXM_MODULE_HEAP_SIZE=512 -I../inc ../module_lib/src/txm_module_initialize.S
|
||||
|
||||
armar --create txm.a txm_block_allocate.o txm_block_pool_create.o txm_block_pool_delete.o txm_block_pool_info_get.o txm_block_pool_performance_info_get.o txm_block_pool_performance_system_info_get.o txm_block_pool_prioritize.o txm_block_release.o txm_byte_allocate.o txm_byte_pool_create.o txm_byte_pool_delete.o txm_byte_pool_info_get.o txm_byte_pool_performance_info_get.o txm_byte_pool_performance_system_info_get.o txm_byte_pool_prioritize.o txm_byte_release.o txm_event_flags_create.o txm_event_flags_delete.o txm_event_flags_get.o txm_event_flags_info_get.o txm_event_flags_performance_info_get.o txm_event_flags_performance_system_info_get.o txm_event_flags_set.o txm_event_flags_set_notify.o txm_module_application_request.o txm_module_callback_request_thread_entry.o txm_module_initialize.o txm_module_object_allocate.o txm_module_object_deallocate.o txm_module_object_pointer_get.o txm_module_thread_shell_entry.o txm_module_thread_system_suspend.o txm_mutex_create.o txm_mutex_delete.o txm_mutex_get.o
|
||||
|
||||
armar -r txm.a txm_mutex_info_get.o txm_mutex_performance_info_get.o txm_mutex_performance_system_info_get.o txm_mutex_prioritize.o txm_mutex_put.o txm_queue_create.o txm_queue_delete.o txm_queue_flush.o txm_queue_front_send.o txm_queue_info_get.o txm_queue_performance_info_get.o txm_queue_performance_system_info_get.o txm_queue_prioritize.o txm_queue_receive.o txm_queue_send.o txm_queue_send_notify.o txm_semaphore_ceiling_put.o txm_semaphore_create.o txm_semaphore_delete.o txm_semaphore_get.o txm_semaphore_info_get.o txm_semaphore_performance_info_get.o txm_semaphore_performance_system_info_get.o txm_semaphore_prioritize.o txm_semaphore_put.o txm_semaphore_put_notify.o txm_thread_create.o txm_thread_delete.o txm_thread_entry_exit_notify.o txm_thread_identify.o txm_thread_info_get.o txm_thread_interrupt_control.o txm_thread_performance_info_get.o txm_thread_performance_system_info_get.o txm_thread_preemption_change.o txm_thread_priority_change.o txm_thread_relinquish.o txm_thread_reset.o txm_thread_resume.o
|
||||
|
||||
armar -r txm.a txm_thread_sleep.o txm_thread_stack_error_notify.o txm_thread_suspend.o txm_thread_terminate.o txm_thread_time_slice_change.o txm_thread_wait_abort.o txm_time_get.o txm_time_set.o txm_timer_activate.o txm_timer_change.o txm_timer_create.o txm_timer_deactivate.o txm_timer_delete.o txm_timer_info_get.o txm_timer_performance_info_get.o txm_timer_performance_system_info_get.o txm_trace_buffer_full_notify.o txm_trace_disable.o txm_trace_enable.o txm_trace_event_filter.o txm_trace_event_unfilter.o txm_trace_isr_enter_insert.o txm_trace_isr_exit_insert.o txm_trace_user_event_insert.o
|
||||
@@ -0,0 +1,3 @@
|
||||
armasm -g --cpu=cortex-m7 --fpu=softvfp --apcs=interwork tx_initialize_low_level.S
|
||||
armcc -g --cpu=cortex-m7 --fpu=softvfp -c -I../inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc -I../../../../common/inc sample_threadx_module_manager.c
|
||||
armlink -d -o sample_threadx_module_manager.axf --elf --ro 0x00000000 --first tx_initialize_low_level.o(RESET) --remove --map --symbols --list sample_threadx_module_manager.map tx_initialize_low_level.o sample_threadx_module_manager.o tx.a
|
||||
2
ports_module/cortex-m7/ac5/example_build/clean.bat
Normal file
2
ports_module/cortex-m7/ac5/example_build/clean.bat
Normal file
@@ -0,0 +1,2 @@
|
||||
@ECHO OFF
|
||||
DEL *.o *.a *.axf *.map
|
||||
369
ports_module/cortex-m7/ac5/example_build/sample_threadx.c
Normal file
369
ports_module/cortex-m7/ac5/example_build/sample_threadx.c
Normal file
@@ -0,0 +1,369 @@
|
||||
/* This is a small demo of the high-performance ThreadX kernel. It includes examples of eight
|
||||
threads of different priorities, using a message queue, semaphore, mutex, event flags group,
|
||||
byte pool, and block pool. */
|
||||
|
||||
#include "tx_api.h"
|
||||
|
||||
#define DEMO_STACK_SIZE 1024
|
||||
#define DEMO_BYTE_POOL_SIZE 9120
|
||||
#define DEMO_BLOCK_POOL_SIZE 100
|
||||
#define DEMO_QUEUE_SIZE 100
|
||||
|
||||
|
||||
/* Define the ThreadX object control blocks... */
|
||||
|
||||
TX_THREAD thread_0;
|
||||
TX_THREAD thread_1;
|
||||
TX_THREAD thread_2;
|
||||
TX_THREAD thread_3;
|
||||
TX_THREAD thread_4;
|
||||
TX_THREAD thread_5;
|
||||
TX_THREAD thread_6;
|
||||
TX_THREAD thread_7;
|
||||
TX_QUEUE queue_0;
|
||||
TX_SEMAPHORE semaphore_0;
|
||||
TX_MUTEX mutex_0;
|
||||
TX_EVENT_FLAGS_GROUP event_flags_0;
|
||||
TX_BYTE_POOL byte_pool_0;
|
||||
TX_BLOCK_POOL block_pool_0;
|
||||
|
||||
|
||||
/* Define the counters used in the demo application... */
|
||||
|
||||
ULONG thread_0_counter;
|
||||
ULONG thread_1_counter;
|
||||
ULONG thread_1_messages_sent;
|
||||
ULONG thread_2_counter;
|
||||
ULONG thread_2_messages_received;
|
||||
ULONG thread_3_counter;
|
||||
ULONG thread_4_counter;
|
||||
ULONG thread_5_counter;
|
||||
ULONG thread_6_counter;
|
||||
ULONG thread_7_counter;
|
||||
|
||||
|
||||
/* Define thread prototypes. */
|
||||
|
||||
void thread_0_entry(ULONG thread_input);
|
||||
void thread_1_entry(ULONG thread_input);
|
||||
void thread_2_entry(ULONG thread_input);
|
||||
void thread_3_and_4_entry(ULONG thread_input);
|
||||
void thread_5_entry(ULONG thread_input);
|
||||
void thread_6_and_7_entry(ULONG thread_input);
|
||||
|
||||
|
||||
/* Define main entry point. */
|
||||
|
||||
int main()
|
||||
{
|
||||
|
||||
/* Enter the ThreadX kernel. */
|
||||
tx_kernel_enter();
|
||||
}
|
||||
|
||||
|
||||
/* Define what the initial system looks like. */
|
||||
|
||||
void tx_application_define(void *first_unused_memory)
|
||||
{
|
||||
|
||||
CHAR *pointer = TX_NULL;
|
||||
|
||||
|
||||
/* Create a byte memory pool from which to allocate the thread stacks. */
|
||||
tx_byte_pool_create(&byte_pool_0, "byte pool 0", first_unused_memory, DEMO_BYTE_POOL_SIZE);
|
||||
|
||||
/* Put system definition stuff in here, e.g. thread creates and other assorted
|
||||
create information. */
|
||||
|
||||
/* Allocate the stack for thread 0. */
|
||||
tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||
|
||||
/* Create the main thread. */
|
||||
tx_thread_create(&thread_0, "thread 0", thread_0_entry, 0,
|
||||
pointer, DEMO_STACK_SIZE,
|
||||
1, 1, TX_NO_TIME_SLICE, TX_AUTO_START);
|
||||
|
||||
|
||||
/* Allocate the stack for thread 1. */
|
||||
tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||
|
||||
/* Create threads 1 and 2. These threads pass information through a ThreadX
|
||||
message queue. It is also interesting to note that these threads have a time
|
||||
slice. */
|
||||
tx_thread_create(&thread_1, "thread 1", thread_1_entry, 1,
|
||||
pointer, DEMO_STACK_SIZE,
|
||||
16, 16, 4, TX_AUTO_START);
|
||||
|
||||
/* Allocate the stack for thread 2. */
|
||||
tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||
|
||||
tx_thread_create(&thread_2, "thread 2", thread_2_entry, 2,
|
||||
pointer, DEMO_STACK_SIZE,
|
||||
16, 16, 4, TX_AUTO_START);
|
||||
|
||||
/* Allocate the stack for thread 3. */
|
||||
tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||
|
||||
/* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore.
|
||||
An interesting thing here is that both threads share the same instruction area. */
|
||||
tx_thread_create(&thread_3, "thread 3", thread_3_and_4_entry, 3,
|
||||
pointer, DEMO_STACK_SIZE,
|
||||
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
|
||||
|
||||
/* Allocate the stack for thread 4. */
|
||||
tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||
|
||||
tx_thread_create(&thread_4, "thread 4", thread_3_and_4_entry, 4,
|
||||
pointer, DEMO_STACK_SIZE,
|
||||
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
|
||||
|
||||
/* Allocate the stack for thread 5. */
|
||||
tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||
|
||||
/* Create thread 5. This thread simply pends on an event flag which will be set
|
||||
by thread_0. */
|
||||
tx_thread_create(&thread_5, "thread 5", thread_5_entry, 5,
|
||||
pointer, DEMO_STACK_SIZE,
|
||||
4, 4, TX_NO_TIME_SLICE, TX_AUTO_START);
|
||||
|
||||
/* Allocate the stack for thread 6. */
|
||||
tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||
|
||||
/* Create threads 6 and 7. These threads compete for a ThreadX mutex. */
|
||||
tx_thread_create(&thread_6, "thread 6", thread_6_and_7_entry, 6,
|
||||
pointer, DEMO_STACK_SIZE,
|
||||
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
|
||||
|
||||
/* Allocate the stack for thread 7. */
|
||||
tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||
|
||||
tx_thread_create(&thread_7, "thread 7", thread_6_and_7_entry, 7,
|
||||
pointer, DEMO_STACK_SIZE,
|
||||
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
|
||||
|
||||
/* Allocate the message queue. */
|
||||
tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_QUEUE_SIZE*sizeof(ULONG), TX_NO_WAIT);
|
||||
|
||||
/* Create the message queue shared by threads 1 and 2. */
|
||||
tx_queue_create(&queue_0, "queue 0", TX_1_ULONG, pointer, DEMO_QUEUE_SIZE*sizeof(ULONG));
|
||||
|
||||
/* Create the semaphore used by threads 3 and 4. */
|
||||
tx_semaphore_create(&semaphore_0, "semaphore 0", 1);
|
||||
|
||||
/* Create the event flags group used by threads 1 and 5. */
|
||||
tx_event_flags_create(&event_flags_0, "event flags 0");
|
||||
|
||||
/* Create the mutex used by thread 6 and 7 without priority inheritance. */
|
||||
tx_mutex_create(&mutex_0, "mutex 0", TX_NO_INHERIT);
|
||||
|
||||
/* Allocate the memory for a small block pool. */
|
||||
tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_BLOCK_POOL_SIZE, TX_NO_WAIT);
|
||||
|
||||
/* Create a block memory pool to allocate a message buffer from. */
|
||||
tx_block_pool_create(&block_pool_0, "block pool 0", sizeof(ULONG), pointer, DEMO_BLOCK_POOL_SIZE);
|
||||
|
||||
/* Allocate a block and release the block memory. */
|
||||
tx_block_allocate(&block_pool_0, (VOID **) &pointer, TX_NO_WAIT);
|
||||
|
||||
/* Release the block back to the pool. */
|
||||
tx_block_release(pointer);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* Define the test threads. */
|
||||
|
||||
void thread_0_entry(ULONG thread_input)
|
||||
{
|
||||
|
||||
UINT status;
|
||||
|
||||
|
||||
/* This thread simply sits in while-forever-sleep loop. */
|
||||
while(1)
|
||||
{
|
||||
|
||||
/* Increment the thread counter. */
|
||||
thread_0_counter++;
|
||||
|
||||
/* Sleep for 10 ticks. */
|
||||
tx_thread_sleep(10);
|
||||
|
||||
/* Set event flag 0 to wakeup thread 5. */
|
||||
status = tx_event_flags_set(&event_flags_0, 0x1, TX_OR);
|
||||
|
||||
/* Check status. */
|
||||
if (status != TX_SUCCESS)
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void thread_1_entry(ULONG thread_input)
|
||||
{
|
||||
|
||||
UINT status;
|
||||
|
||||
|
||||
/* This thread simply sends messages to a queue shared by thread 2. */
|
||||
while(1)
|
||||
{
|
||||
|
||||
/* Increment the thread counter. */
|
||||
thread_1_counter++;
|
||||
|
||||
/* Send message to queue 0. */
|
||||
status = tx_queue_send(&queue_0, &thread_1_messages_sent, TX_WAIT_FOREVER);
|
||||
|
||||
/* Check completion status. */
|
||||
if (status != TX_SUCCESS)
|
||||
break;
|
||||
|
||||
/* Increment the message sent. */
|
||||
thread_1_messages_sent++;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void thread_2_entry(ULONG thread_input)
|
||||
{
|
||||
|
||||
ULONG received_message;
|
||||
UINT status;
|
||||
|
||||
/* This thread retrieves messages placed on the queue by thread 1. */
|
||||
while(1)
|
||||
{
|
||||
|
||||
/* Increment the thread counter. */
|
||||
thread_2_counter++;
|
||||
|
||||
/* Retrieve a message from the queue. */
|
||||
status = tx_queue_receive(&queue_0, &received_message, TX_WAIT_FOREVER);
|
||||
|
||||
/* Check completion status and make sure the message is what we
|
||||
expected. */
|
||||
if ((status != TX_SUCCESS) || (received_message != thread_2_messages_received))
|
||||
break;
|
||||
|
||||
/* Otherwise, all is okay. Increment the received message count. */
|
||||
thread_2_messages_received++;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void thread_3_and_4_entry(ULONG thread_input)
|
||||
{
|
||||
|
||||
UINT status;
|
||||
|
||||
|
||||
/* This function is executed from thread 3 and thread 4. As the loop
|
||||
below shows, these function compete for ownership of semaphore_0. */
|
||||
while(1)
|
||||
{
|
||||
|
||||
/* Increment the thread counter. */
|
||||
if (thread_input == 3)
|
||||
thread_3_counter++;
|
||||
else
|
||||
thread_4_counter++;
|
||||
|
||||
/* Get the semaphore with suspension. */
|
||||
status = tx_semaphore_get(&semaphore_0, TX_WAIT_FOREVER);
|
||||
|
||||
/* Check status. */
|
||||
if (status != TX_SUCCESS)
|
||||
break;
|
||||
|
||||
/* Sleep for 2 ticks to hold the semaphore. */
|
||||
tx_thread_sleep(2);
|
||||
|
||||
/* Release the semaphore. */
|
||||
status = tx_semaphore_put(&semaphore_0);
|
||||
|
||||
/* Check status. */
|
||||
if (status != TX_SUCCESS)
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void thread_5_entry(ULONG thread_input)
|
||||
{
|
||||
|
||||
UINT status;
|
||||
ULONG actual_flags;
|
||||
|
||||
|
||||
/* This thread simply waits for an event in a forever loop. */
|
||||
while(1)
|
||||
{
|
||||
|
||||
/* Increment the thread counter. */
|
||||
thread_5_counter++;
|
||||
|
||||
/* Wait for event flag 0. */
|
||||
status = tx_event_flags_get(&event_flags_0, 0x1, TX_OR_CLEAR,
|
||||
&actual_flags, TX_WAIT_FOREVER);
|
||||
|
||||
/* Check status. */
|
||||
if ((status != TX_SUCCESS) || (actual_flags != 0x1))
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void thread_6_and_7_entry(ULONG thread_input)
|
||||
{
|
||||
|
||||
UINT status;
|
||||
|
||||
|
||||
/* This function is executed from thread 6 and thread 7. As the loop
|
||||
below shows, these function compete for ownership of mutex_0. */
|
||||
while(1)
|
||||
{
|
||||
|
||||
/* Increment the thread counter. */
|
||||
if (thread_input == 6)
|
||||
thread_6_counter++;
|
||||
else
|
||||
thread_7_counter++;
|
||||
|
||||
/* Get the mutex with suspension. */
|
||||
status = tx_mutex_get(&mutex_0, TX_WAIT_FOREVER);
|
||||
|
||||
/* Check status. */
|
||||
if (status != TX_SUCCESS)
|
||||
break;
|
||||
|
||||
/* Get the mutex again with suspension. This shows
|
||||
that an owning thread may retrieve the mutex it
|
||||
owns multiple times. */
|
||||
status = tx_mutex_get(&mutex_0, TX_WAIT_FOREVER);
|
||||
|
||||
/* Check status. */
|
||||
if (status != TX_SUCCESS)
|
||||
break;
|
||||
|
||||
/* Sleep for 2 ticks to hold the mutex. */
|
||||
tx_thread_sleep(2);
|
||||
|
||||
/* Release the mutex. */
|
||||
status = tx_mutex_put(&mutex_0);
|
||||
|
||||
/* Check status. */
|
||||
if (status != TX_SUCCESS)
|
||||
break;
|
||||
|
||||
/* Release the mutex again. This will actually
|
||||
release ownership since it was obtained twice. */
|
||||
status = tx_mutex_put(&mutex_0);
|
||||
|
||||
/* Check status. */
|
||||
if (status != TX_SUCCESS)
|
||||
break;
|
||||
}
|
||||
}
|
||||
432
ports_module/cortex-m7/ac5/example_build/sample_threadx_module.c
Normal file
432
ports_module/cortex-m7/ac5/example_build/sample_threadx_module.c
Normal file
@@ -0,0 +1,432 @@
|
||||
/* This is a small demo of the high-performance ThreadX kernel running as a module. It includes
|
||||
examples of eight threads of different priorities, using a message queue, semaphore, mutex,
|
||||
event flags group, byte pool, and block pool. */
|
||||
|
||||
/* Specify that this is a module! */
|
||||
|
||||
#define TXM_MODULE
|
||||
|
||||
|
||||
/* Include the ThreadX module definitions. */
|
||||
|
||||
#include "txm_module.h"
|
||||
|
||||
|
||||
/* Define constants. */
|
||||
|
||||
#define DEMO_STACK_SIZE 1024
|
||||
#define DEMO_BYTE_POOL_SIZE 9120
|
||||
#define DEMO_BLOCK_POOL_SIZE 100
|
||||
#define DEMO_QUEUE_SIZE 100
|
||||
|
||||
|
||||
/* Define the external memory area. */
|
||||
|
||||
#define EXTERNAL_MEMORY_SIZE (64 * 1024)
|
||||
#define EXTERNAL_MEMORY (0x80000)
|
||||
|
||||
|
||||
/* Define the pool space in the bss section of the module. ULONG is used to
|
||||
get the word alignment. */
|
||||
|
||||
ULONG demo_module_pool_space[DEMO_BYTE_POOL_SIZE / 4];
|
||||
|
||||
|
||||
/* Define the ThreadX object control blocks... */
|
||||
|
||||
TX_THREAD *thread_0;
|
||||
TX_THREAD *thread_1;
|
||||
TX_THREAD *thread_2;
|
||||
TX_THREAD *thread_3;
|
||||
TX_THREAD *thread_4;
|
||||
TX_THREAD *thread_5;
|
||||
TX_THREAD *thread_6;
|
||||
TX_THREAD *thread_7;
|
||||
TX_QUEUE *queue_0;
|
||||
TX_SEMAPHORE *semaphore_0;
|
||||
TX_MUTEX *mutex_0;
|
||||
TX_EVENT_FLAGS_GROUP *event_flags_0;
|
||||
TX_BYTE_POOL *byte_pool_0;
|
||||
TX_BLOCK_POOL *block_pool_0;
|
||||
|
||||
|
||||
/* Define the counters used in the demo application... */
|
||||
|
||||
ULONG thread_0_counter;
|
||||
ULONG thread_1_counter;
|
||||
ULONG thread_1_messages_sent;
|
||||
ULONG thread_2_counter;
|
||||
ULONG thread_2_messages_received;
|
||||
ULONG thread_3_counter;
|
||||
ULONG thread_4_counter;
|
||||
ULONG thread_5_counter;
|
||||
ULONG thread_6_counter;
|
||||
ULONG thread_7_counter;
|
||||
ULONG semaphore_0_puts;
|
||||
ULONG event_0_sets;
|
||||
ULONG queue_0_sends;
|
||||
|
||||
/* Define thread prototypes. */
|
||||
|
||||
void thread_0_entry(ULONG thread_input);
|
||||
void thread_1_entry(ULONG thread_input);
|
||||
void thread_2_entry(ULONG thread_input);
|
||||
void thread_3_and_4_entry(ULONG thread_input);
|
||||
void thread_5_entry(ULONG thread_input);
|
||||
void thread_6_and_7_entry(ULONG thread_input);
|
||||
|
||||
void semaphore_0_notify(TX_SEMAPHORE *semaphore_ptr)
|
||||
{
|
||||
|
||||
if (semaphore_ptr == semaphore_0)
|
||||
semaphore_0_puts++;
|
||||
}
|
||||
|
||||
|
||||
void event_0_notify(TX_EVENT_FLAGS_GROUP *event_flag_group_ptr)
|
||||
{
|
||||
|
||||
if (event_flag_group_ptr == event_flags_0)
|
||||
event_0_sets++;
|
||||
}
|
||||
|
||||
|
||||
void queue_0_notify(TX_QUEUE *queue_ptr)
|
||||
{
|
||||
|
||||
if (queue_ptr == queue_0)
|
||||
queue_0_sends++;
|
||||
}
|
||||
|
||||
|
||||
/* Define the module start function. */
|
||||
|
||||
void demo_module_start(ULONG id)
|
||||
{
|
||||
|
||||
CHAR *pointer;
|
||||
|
||||
/* Allocate all the objects. In MPU mode, modules cannot allocate control blocks within
|
||||
their own memory area so they cannot corrupt the resident portion of ThreadX by overwriting
|
||||
the control block(s). */
|
||||
txm_module_object_allocate((void*)&thread_0, sizeof(TX_THREAD));
|
||||
txm_module_object_allocate((void*)&thread_1, sizeof(TX_THREAD));
|
||||
txm_module_object_allocate((void*)&thread_2, sizeof(TX_THREAD));
|
||||
txm_module_object_allocate((void*)&thread_3, sizeof(TX_THREAD));
|
||||
txm_module_object_allocate((void*)&thread_4, sizeof(TX_THREAD));
|
||||
txm_module_object_allocate((void*)&thread_5, sizeof(TX_THREAD));
|
||||
txm_module_object_allocate((void*)&thread_6, sizeof(TX_THREAD));
|
||||
txm_module_object_allocate((void*)&thread_7, sizeof(TX_THREAD));
|
||||
txm_module_object_allocate((void*)&queue_0, sizeof(TX_QUEUE));
|
||||
txm_module_object_allocate((void*)&semaphore_0, sizeof(TX_SEMAPHORE));
|
||||
txm_module_object_allocate((void*)&mutex_0, sizeof(TX_MUTEX));
|
||||
txm_module_object_allocate((void*)&event_flags_0, sizeof(TX_EVENT_FLAGS_GROUP));
|
||||
txm_module_object_allocate((void*)&byte_pool_0, sizeof(TX_BYTE_POOL));
|
||||
txm_module_object_allocate((void*)&block_pool_0, sizeof(TX_BLOCK_POOL));
|
||||
|
||||
|
||||
/* Create a byte memory pool from which to allocate the thread stacks. */
|
||||
tx_byte_pool_create(byte_pool_0, "module byte pool 0", demo_module_pool_space, DEMO_BYTE_POOL_SIZE);
|
||||
|
||||
/* Put system definition stuff in here, e.g. thread creates and other assorted
|
||||
create information. */
|
||||
|
||||
/* Allocate the stack for thread 0. */
|
||||
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||
|
||||
/* Create the main thread. */
|
||||
tx_thread_create(thread_0, "module thread 0", thread_0_entry, 0,
|
||||
pointer, DEMO_STACK_SIZE,
|
||||
1, 1, TX_NO_TIME_SLICE, TX_AUTO_START);
|
||||
|
||||
|
||||
/* Allocate the stack for thread 1. */
|
||||
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||
|
||||
/* Create threads 1 and 2. These threads pass information through a ThreadX
|
||||
message queue. It is also interesting to note that these threads have a time
|
||||
slice. */
|
||||
tx_thread_create(thread_1, "module thread 1", thread_1_entry, 1,
|
||||
pointer, DEMO_STACK_SIZE,
|
||||
16, 16, 4, TX_AUTO_START);
|
||||
|
||||
/* Allocate the stack for thread 2. */
|
||||
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||
|
||||
tx_thread_create(thread_2, "module thread 2", thread_2_entry, 2,
|
||||
pointer, DEMO_STACK_SIZE,
|
||||
16, 16, 4, TX_AUTO_START);
|
||||
|
||||
/* Allocate the stack for thread 3. */
|
||||
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||
|
||||
/* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore.
|
||||
An interesting thing here is that both threads share the same instruction area. */
|
||||
tx_thread_create(thread_3, "module thread 3", thread_3_and_4_entry, 3,
|
||||
pointer, DEMO_STACK_SIZE,
|
||||
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
|
||||
|
||||
/* Allocate the stack for thread 4. */
|
||||
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||
|
||||
tx_thread_create(thread_4, "module thread 4", thread_3_and_4_entry, 4,
|
||||
pointer, DEMO_STACK_SIZE,
|
||||
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
|
||||
|
||||
/* Allocate the stack for thread 5. */
|
||||
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||
|
||||
/* Create thread 5. This thread simply pends on an event flag which will be set
|
||||
by thread_0. */
|
||||
tx_thread_create(thread_5, "module thread 5", thread_5_entry, 5,
|
||||
pointer, DEMO_STACK_SIZE,
|
||||
4, 4, TX_NO_TIME_SLICE, TX_AUTO_START);
|
||||
|
||||
/* Allocate the stack for thread 6. */
|
||||
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||
|
||||
/* Create threads 6 and 7. These threads compete for a ThreadX mutex. */
|
||||
tx_thread_create(thread_6, "module thread 6", thread_6_and_7_entry, 6,
|
||||
pointer, DEMO_STACK_SIZE,
|
||||
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
|
||||
|
||||
/* Allocate the stack for thread 7. */
|
||||
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||
|
||||
tx_thread_create(thread_7, "module thread 7", thread_6_and_7_entry, 7,
|
||||
pointer, DEMO_STACK_SIZE,
|
||||
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
|
||||
|
||||
/* Allocate the message queue. */
|
||||
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_QUEUE_SIZE*sizeof(ULONG), TX_NO_WAIT);
|
||||
|
||||
/* Create the message queue shared by threads 1 and 2. */
|
||||
tx_queue_create(queue_0, "module queue 0", TX_1_ULONG, pointer, DEMO_QUEUE_SIZE*sizeof(ULONG));
|
||||
|
||||
tx_queue_send_notify(queue_0, queue_0_notify);
|
||||
|
||||
/* Create the semaphore used by threads 3 and 4. */
|
||||
tx_semaphore_create(semaphore_0, "module semaphore 0", 1);
|
||||
|
||||
tx_semaphore_put_notify(semaphore_0, semaphore_0_notify);
|
||||
|
||||
/* Create the event flags group used by threads 1 and 5. */
|
||||
tx_event_flags_create(event_flags_0, "module event flags 0");
|
||||
|
||||
tx_event_flags_set_notify(event_flags_0, event_0_notify);
|
||||
|
||||
/* Create the mutex used by thread 6 and 7 without priority inheritance. */
|
||||
tx_mutex_create(mutex_0, "module mutex 0", TX_NO_INHERIT);
|
||||
|
||||
/* Allocate the memory for a small block pool. */
|
||||
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_BLOCK_POOL_SIZE, TX_NO_WAIT);
|
||||
|
||||
/* Create a block memory pool to allocate a message buffer from. */
|
||||
tx_block_pool_create(block_pool_0, "module block pool 0", sizeof(ULONG), pointer, DEMO_BLOCK_POOL_SIZE);
|
||||
|
||||
/* Allocate a block and release the block memory. */
|
||||
tx_block_allocate(block_pool_0, (VOID **) &pointer, TX_NO_WAIT);
|
||||
|
||||
/* Release the block back to the pool. */
|
||||
tx_block_release(pointer);
|
||||
}
|
||||
|
||||
|
||||
/* Define the test threads. */
|
||||
|
||||
void thread_0_entry(ULONG thread_input)
|
||||
{
|
||||
|
||||
UINT status;
|
||||
|
||||
/* This thread simply sits in while-forever-sleep loop. */
|
||||
while(1)
|
||||
{
|
||||
|
||||
/* Increment the thread counter. */
|
||||
thread_0_counter++;
|
||||
|
||||
/* Sleep for 10 ticks. */
|
||||
tx_thread_sleep(10);
|
||||
|
||||
/* Set event flag 0 to wakeup thread 5. */
|
||||
status = tx_event_flags_set(event_flags_0, 0x1, TX_OR);
|
||||
|
||||
/* Check status. */
|
||||
if (status != TX_SUCCESS)
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void thread_1_entry(ULONG thread_input)
|
||||
{
|
||||
|
||||
UINT status;
|
||||
|
||||
|
||||
/* This thread simply sends messages to a queue shared by thread 2. */
|
||||
while(1)
|
||||
{
|
||||
|
||||
/* Increment the thread counter. */
|
||||
thread_1_counter++;
|
||||
|
||||
/* Send message to queue 0. */
|
||||
status = tx_queue_send(queue_0, &thread_1_messages_sent, TX_WAIT_FOREVER);
|
||||
|
||||
/* Check completion status. */
|
||||
if (status != TX_SUCCESS)
|
||||
break;
|
||||
|
||||
/* Increment the message sent. */
|
||||
thread_1_messages_sent++;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void thread_2_entry(ULONG thread_input)
|
||||
{
|
||||
|
||||
ULONG received_message;
|
||||
UINT status;
|
||||
|
||||
/* This thread retrieves messages placed on the queue by thread 1. */
|
||||
while(1)
|
||||
{
|
||||
/* Test external memory sharing. */
|
||||
*(ULONG *)EXTERNAL_MEMORY = 0xABABABAB;
|
||||
|
||||
/* Increment the thread counter. */
|
||||
thread_2_counter++;
|
||||
|
||||
/* Retrieve a message from the queue. */
|
||||
status = tx_queue_receive(queue_0, &received_message, TX_WAIT_FOREVER);
|
||||
|
||||
/* Check completion status and make sure the message is what we
|
||||
expected. */
|
||||
if ((status != TX_SUCCESS) || (received_message != thread_2_messages_received))
|
||||
break;
|
||||
|
||||
/* Otherwise, all is okay. Increment the received message count. */
|
||||
thread_2_messages_received++;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void thread_3_and_4_entry(ULONG thread_input)
|
||||
{
|
||||
|
||||
UINT status;
|
||||
|
||||
|
||||
/* This function is executed from thread 3 and thread 4. As the loop
|
||||
below shows, these function compete for ownership of semaphore_0. */
|
||||
while(1)
|
||||
{
|
||||
|
||||
/* Increment the thread counter. */
|
||||
if (thread_input == 3)
|
||||
thread_3_counter++;
|
||||
else
|
||||
thread_4_counter++;
|
||||
|
||||
/* Get the semaphore with suspension. */
|
||||
status = tx_semaphore_get(semaphore_0, TX_WAIT_FOREVER);
|
||||
|
||||
/* Check status. */
|
||||
if (status != TX_SUCCESS)
|
||||
break;
|
||||
|
||||
/* Sleep for 2 ticks to hold the semaphore. */
|
||||
tx_thread_sleep(2);
|
||||
|
||||
/* Release the semaphore. */
|
||||
status = tx_semaphore_put(semaphore_0);
|
||||
|
||||
/* Check status. */
|
||||
if (status != TX_SUCCESS)
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void thread_5_entry(ULONG thread_input)
|
||||
{
|
||||
|
||||
UINT status;
|
||||
ULONG actual_flags;
|
||||
|
||||
|
||||
/* This thread simply waits for an event in a forever loop. */
|
||||
while(1)
|
||||
{
|
||||
|
||||
/* Increment the thread counter. */
|
||||
thread_5_counter++;
|
||||
|
||||
/* Wait for event flag 0. */
|
||||
status = tx_event_flags_get(event_flags_0, 0x1, TX_OR_CLEAR,
|
||||
&actual_flags, TX_WAIT_FOREVER);
|
||||
|
||||
/* Check status. */
|
||||
if ((status != TX_SUCCESS) || (actual_flags != 0x1))
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void thread_6_and_7_entry(ULONG thread_input)
|
||||
{
|
||||
|
||||
UINT status;
|
||||
|
||||
|
||||
/* This function is executed from thread 6 and thread 7. As the loop
|
||||
below shows, these function compete for ownership of mutex_0. */
|
||||
while(1)
|
||||
{
|
||||
|
||||
/* Increment the thread counter. */
|
||||
if (thread_input == 6)
|
||||
thread_6_counter++;
|
||||
else
|
||||
thread_7_counter++;
|
||||
|
||||
/* Get the mutex with suspension. */
|
||||
status = tx_mutex_get(mutex_0, TX_WAIT_FOREVER);
|
||||
|
||||
/* Check status. */
|
||||
if (status != TX_SUCCESS)
|
||||
break;
|
||||
|
||||
/* Get the mutex again with suspension. This shows
|
||||
that an owning thread may retrieve the mutex it
|
||||
owns multiple times. */
|
||||
status = tx_mutex_get(mutex_0, TX_WAIT_FOREVER);
|
||||
|
||||
/* Check status. */
|
||||
if (status != TX_SUCCESS)
|
||||
break;
|
||||
|
||||
/* Sleep for 2 ticks to hold the mutex. */
|
||||
tx_thread_sleep(2);
|
||||
|
||||
/* Release the mutex. */
|
||||
status = tx_mutex_put(mutex_0);
|
||||
|
||||
/* Check status. */
|
||||
if (status != TX_SUCCESS)
|
||||
break;
|
||||
|
||||
/* Release the mutex again. This will actually
|
||||
release ownership since it was obtained twice. */
|
||||
status = tx_mutex_put(mutex_0);
|
||||
|
||||
/* Check status. */
|
||||
if (status != TX_SUCCESS)
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -0,0 +1,126 @@
|
||||
/* Small demonstration of the ThreadX module manager. */
|
||||
|
||||
#include "tx_api.h"
|
||||
#include "txm_module.h"
|
||||
|
||||
|
||||
#define DEMO_STACK_SIZE 1024
|
||||
|
||||
/* Define the ThreadX object control blocks... */
|
||||
|
||||
TX_THREAD module_manager;
|
||||
TXM_MODULE_INSTANCE my_module;
|
||||
|
||||
|
||||
/* Define the object pool area. */
|
||||
|
||||
UCHAR object_memory[16384];
|
||||
|
||||
|
||||
/* Define the module data pool area. */
|
||||
|
||||
#define MODULE_DATA_SIZE (256 * 1024)
|
||||
#define MODULE_DATA (0x40000)
|
||||
|
||||
|
||||
/* The module code should be loaded here. */
|
||||
|
||||
#define MODULE_CODE (0x30000)
|
||||
|
||||
|
||||
/* Define the external memory area. */
|
||||
|
||||
#define EXTERNAL_MEMORY_SIZE (64 * 1024)
|
||||
#define EXTERNAL_MEMORY (0x80000)
|
||||
|
||||
|
||||
/* Define the count of memory faults. */
|
||||
|
||||
ULONG memory_faults;
|
||||
|
||||
|
||||
/* Define thread prototypes. */
|
||||
|
||||
void module_manager_entry(ULONG thread_input);
|
||||
|
||||
|
||||
/* Define fault handler. */
|
||||
|
||||
VOID module_fault_handler(TX_THREAD *thread, TXM_MODULE_INSTANCE *module)
|
||||
{
|
||||
|
||||
/* Just increment the fault counter. */
|
||||
memory_faults++;
|
||||
}
|
||||
|
||||
/* Define main entry point. */
|
||||
|
||||
int main()
|
||||
{
|
||||
|
||||
/* Enter the ThreadX kernel. */
|
||||
tx_kernel_enter();
|
||||
}
|
||||
|
||||
|
||||
/* Define what the initial system looks like. */
|
||||
|
||||
void tx_application_define(void *first_unused_memory)
|
||||
{
|
||||
|
||||
CHAR *pointer = (CHAR*)first_unused_memory;
|
||||
|
||||
|
||||
tx_thread_create(&module_manager, "Module Manager Thread", module_manager_entry, 0,
|
||||
pointer, DEMO_STACK_SIZE,
|
||||
1, 1, TX_NO_TIME_SLICE, TX_AUTO_START);
|
||||
pointer = pointer + DEMO_STACK_SIZE;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/* Define the test threads. */
|
||||
|
||||
void module_manager_entry(ULONG thread_input)
|
||||
{
|
||||
|
||||
/* Initialize the module manager. */
|
||||
txm_module_manager_initialize((void *) MODULE_DATA, MODULE_DATA_SIZE);
|
||||
|
||||
txm_module_manager_object_pool_create(object_memory, sizeof(object_memory));
|
||||
|
||||
/* Register a fault handler. */
|
||||
txm_module_manager_memory_fault_notify(module_fault_handler);
|
||||
|
||||
/* Load the module that is already there, in this example it is placed there by the multiple image download. */
|
||||
txm_module_manager_in_place_load(&my_module, "my module", (void *) MODULE_CODE);
|
||||
|
||||
/* Enable a read/write shared memory region. */
|
||||
txm_module_manager_external_memory_enable(&my_module, (void *) EXTERNAL_MEMORY, EXTERNAL_MEMORY_SIZE, TXM_MODULE_MANAGER_SHARED_ATTRIBUTE_WRITE);
|
||||
|
||||
/* Start the module. */
|
||||
txm_module_manager_start(&my_module);
|
||||
|
||||
/* Sleep for a while.... */
|
||||
tx_thread_sleep(1000);
|
||||
|
||||
/* Stop the module. */
|
||||
txm_module_manager_stop(&my_module);
|
||||
|
||||
/* Unload the module. */
|
||||
txm_module_manager_unload(&my_module);
|
||||
|
||||
/* Load the module that is already there. */
|
||||
txm_module_manager_in_place_load(&my_module, "my module", (void *) MODULE_CODE);
|
||||
|
||||
/* Start the module again. */
|
||||
txm_module_manager_start(&my_module);
|
||||
|
||||
/* Now just spin... */
|
||||
while(1)
|
||||
{
|
||||
|
||||
tx_thread_sleep(100);
|
||||
}
|
||||
}
|
||||
13
ports_module/cortex-m7/ac5/example_build/setenv.bat
Normal file
13
ports_module/cortex-m7/ac5/example_build/setenv.bat
Normal file
@@ -0,0 +1,13 @@
|
||||
@echo off
|
||||
|
||||
REM *** ARM DS 2020
|
||||
REM SET PATH=%ProgramFiles%\Arm\Development Studio 2020.0\sw\ARMCompiler5.06u6\bin;%PATH%
|
||||
REM SET ARMLMD_LICENSE_FILE=%APPDATA%\arm\ds\licenses
|
||||
REM SET ARM_CONFIG_PATH=%APPDATA%\arm\ds\2020.0
|
||||
REM SET ARM_PRODUCT_DEF=%ProgramFiles%\Arm\Development Studio 2020.0\sw\mappings\gold.elmap
|
||||
|
||||
REM *** legacy ARM DS 5
|
||||
SET PATH=%ProgramFiles%\DS-5 v5.29.3\sw\ARMCompiler5.06u6\bin;%PATH%
|
||||
SET ARMLMD_LICENSE_FILE=%APPDATA%\ARM\DS-5\licenses
|
||||
SET ARM_CONFIG_PATH=%APPDATA%\ARM\DS-5_v5.29.3
|
||||
SET ARM_PRODUCT_PATH=%ProgramFiles%\DS-5 v5.29.3\sw\mappings
|
||||
@@ -0,0 +1,285 @@
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Initialize */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;#define TX_SOURCE_CODE
|
||||
;
|
||||
;
|
||||
;/* Include necessary system files. */
|
||||
;
|
||||
;#include "tx_api.h"
|
||||
;#include "tx_initialize.h"
|
||||
;#include "tx_thread.h"
|
||||
;#include "tx_timer.h"
|
||||
;
|
||||
;
|
||||
IMPORT _tx_thread_system_stack_ptr
|
||||
IMPORT _tx_initialize_unused_memory
|
||||
IMPORT _tx_thread_context_save
|
||||
IMPORT _tx_thread_context_restore
|
||||
IMPORT _tx_timer_interrupt
|
||||
IMPORT __main
|
||||
IMPORT |Image$$RO$$Limit|
|
||||
IMPORT |Image$$RW$$Base|
|
||||
IMPORT |Image$$ZI$$Base|
|
||||
IMPORT |Image$$ZI$$Limit|
|
||||
IMPORT __tx_PendSVHandler
|
||||
IMPORT __tx_SVCallHandler
|
||||
IMPORT MemManage_Handler
|
||||
;
|
||||
;
|
||||
SYSTEM_CLOCK EQU 6000000
|
||||
SYSTICK_CYCLES EQU ((SYSTEM_CLOCK / 100) -1)
|
||||
;
|
||||
;
|
||||
;/* Setup the stack and heap areas. */
|
||||
;
|
||||
STACK_SIZE EQU 0x00000400
|
||||
HEAP_SIZE EQU 0x00000000
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
StackMem
|
||||
SPACE STACK_SIZE
|
||||
__initial_sp
|
||||
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
HeapMem
|
||||
SPACE HEAP_SIZE
|
||||
__heap_limit
|
||||
|
||||
|
||||
AREA RESET, CODE, READONLY
|
||||
;
|
||||
EXPORT __tx_vectors
|
||||
EXPORT __vector_table
|
||||
__vector_table
|
||||
__tx_vectors
|
||||
DCD __initial_sp ; Reset and system stack ptr
|
||||
DCD Reset_Handler ; Reset goes to startup function
|
||||
DCD __tx_NMIHandler ; NMI
|
||||
DCD __tx_BadHandler ; HardFault
|
||||
DCD MemManage_Handler ; MemManage
|
||||
DCD 0 ; BusFault
|
||||
DCD 0 ; UsageFault
|
||||
DCD 0 ; 7
|
||||
DCD 0 ; 8
|
||||
DCD 0 ; 9
|
||||
DCD 0 ; 10
|
||||
DCD __tx_SVCallHandler ; SVCall
|
||||
DCD __tx_DBGHandler ; Monitor
|
||||
DCD 0 ; 13
|
||||
DCD __tx_PendSVHandler ; PendSV
|
||||
DCD __tx_SysTickHandler ; SysTick
|
||||
DCD __tx_IntHandler ; Int 0
|
||||
DCD __tx_IntHandler ; Int 1
|
||||
DCD __tx_IntHandler ; Int 2
|
||||
DCD __tx_IntHandler ; Int 3
|
||||
|
||||
;
|
||||
;
|
||||
AREA ||.text||, CODE, READONLY
|
||||
EXPORT Reset_Handler
|
||||
Reset_Handler
|
||||
CPSID i
|
||||
IF {TARGET_FPU_VFP} = {TRUE}
|
||||
LDR r0, =0xE000ED88 ; Pickup address of CPACR
|
||||
LDR r1, [r0] ; Pickup CPACR
|
||||
MOV32 r2, 0x00F00000 ; Build enable value
|
||||
ORR r1, r1, r2 ; Or in enable value
|
||||
STR r1, [r0] ; Setup CPACR
|
||||
ENDIF
|
||||
LDR r0, =__main
|
||||
BX r0
|
||||
|
||||
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_initialize_low_level Cortex-M7/MPU/AC5 */
|
||||
;/* 6.1 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* Scott Larson, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function is responsible for any low-level processor */
|
||||
;/* initialization, including setting up interrupt vectors, setting */
|
||||
;/* up a periodic timer interrupt source, saving the system stack */
|
||||
;/* pointer for use in ISR processing later, and finding the first */
|
||||
;/* available RAM memory address for tx_application_define. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* _tx_initialize_kernel_enter ThreadX entry function */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _tx_initialize_low_level(VOID)
|
||||
;{
|
||||
EXPORT _tx_initialize_low_level
|
||||
_tx_initialize_low_level
|
||||
;
|
||||
; /* Disable interrupts during ThreadX initialization. */
|
||||
;
|
||||
CPSID i
|
||||
;
|
||||
; /* Set base of available memory to end of non-initialised RAM area. */
|
||||
;
|
||||
LDR r0, =_tx_initialize_unused_memory ; Build address of unused memory pointer
|
||||
LDR r1, =|Image$$ZI$$Limit| ; Build first free address
|
||||
ADD r1, r1, #4 ;
|
||||
STR r1, [r0] ; Setup first unused memory pointer
|
||||
;
|
||||
; /* Setup Vector Table Offset Register. */
|
||||
;
|
||||
MOV r0, #0xE000E000 ; Build address of NVIC registers
|
||||
LDR r1, =__tx_vectors ; Pickup address of vector table
|
||||
STR r1, [r0, #0xD08] ; Set vector table address
|
||||
;
|
||||
; /* Enable the cycle count register. */
|
||||
;
|
||||
; LDR r0, =0xE0001000 ; Build address of DWT register
|
||||
; LDR r1, [r0] ; Pickup the current value
|
||||
; ORR r1, r1, #1 ; Set the CYCCNTENA bit
|
||||
; STR r1, [r0] ; Enable the cycle count register
|
||||
;
|
||||
; /* Set system stack pointer from vector value. */
|
||||
;
|
||||
LDR r0, =_tx_thread_system_stack_ptr ; Build address of system stack pointer
|
||||
LDR r1, =__tx_vectors ; Pickup address of vector table
|
||||
LDR r1, [r1] ; Pickup reset stack pointer
|
||||
STR r1, [r0] ; Save system stack pointer
|
||||
;
|
||||
; /* Configure SysTick. */
|
||||
;
|
||||
MOV r0, #0xE000E000 ; Build address of NVIC registers
|
||||
LDR r1, =SYSTICK_CYCLES
|
||||
STR r1, [r0, #0x14] ; Setup SysTick Reload Value
|
||||
MOV r1, #0x7 ; Build SysTick Control Enable Value
|
||||
STR r1, [r0, #0x10] ; Setup SysTick Control
|
||||
;
|
||||
; /* Configure handler priorities. */
|
||||
;
|
||||
LDR r1, =0x00000000 ; Rsrv, UsgF, BusF, MemM
|
||||
STR r1, [r0, #0xD18] ; Setup System Handlers 4-7 Priority Registers
|
||||
|
||||
LDR r1, =0xFF000000 ; SVCl, Rsrv, Rsrv, Rsrv
|
||||
STR r1, [r0, #0xD1C] ; Setup System Handlers 8-11 Priority Registers
|
||||
; Note: SVC must be lowest priority, which is 0xFF
|
||||
|
||||
LDR r1, =0x40FF0000 ; SysT, PnSV, Rsrv, DbgM
|
||||
STR r1, [r0, #0xD20] ; Setup System Handlers 12-15 Priority Registers
|
||||
; Note: PnSV must be lowest priority, which is 0xFF
|
||||
;
|
||||
; /* Return to caller. */
|
||||
;
|
||||
BX lr
|
||||
;}
|
||||
;
|
||||
;
|
||||
;/* Define initial heap/stack routine for the ARM RVCT startup code.
|
||||
; This routine will set the initial stack and heap locations */
|
||||
;
|
||||
EXPORT __user_initial_stackheap
|
||||
__user_initial_stackheap
|
||||
LDR r0, =HeapMem
|
||||
LDR r1, =(StackMem + STACK_SIZE)
|
||||
LDR r2, =(HeapMem + HEAP_SIZE)
|
||||
LDR r3, =StackMem
|
||||
BX lr
|
||||
;
|
||||
;
|
||||
;/* Define shells for each of the unused vectors. */
|
||||
;
|
||||
EXPORT __tx_BadHandler
|
||||
__tx_BadHandler
|
||||
B __tx_BadHandler
|
||||
|
||||
; EXPORT __tx_SVCallHandler
|
||||
;__tx_SVCallHandler
|
||||
; B __tx_SVCallHandler
|
||||
|
||||
EXPORT __tx_IntHandler
|
||||
__tx_IntHandler
|
||||
; VOID InterruptHandler (VOID)
|
||||
; {
|
||||
PUSH {lr}
|
||||
|
||||
; /* Do interrupt handler work here */
|
||||
; /* .... */
|
||||
|
||||
POP {lr}
|
||||
BX LR
|
||||
; }
|
||||
|
||||
EXPORT __tx_SysTickHandler
|
||||
__tx_SysTickHandler
|
||||
; VOID TimerInterruptHandler (VOID)
|
||||
; {
|
||||
;
|
||||
PUSH {lr}
|
||||
BL _tx_timer_interrupt
|
||||
POP {lr}
|
||||
BX LR
|
||||
; }
|
||||
|
||||
EXPORT __tx_NMIHandler
|
||||
__tx_NMIHandler
|
||||
B __tx_NMIHandler
|
||||
|
||||
EXPORT __tx_DBGHandler
|
||||
__tx_DBGHandler
|
||||
B __tx_DBGHandler
|
||||
|
||||
EXPORT _tx_execution_thread_enter
|
||||
_tx_execution_thread_enter
|
||||
BX LR
|
||||
|
||||
EXPORT _tx_execution_thread_exit
|
||||
_tx_execution_thread_exit
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
LTORG
|
||||
END
|
||||
|
||||
|
||||
@@ -0,0 +1,69 @@
|
||||
AREA Init, CODE, READONLY
|
||||
|
||||
PRESERVE8
|
||||
|
||||
; Define public symbols
|
||||
|
||||
EXPORT __txm_module_preamble
|
||||
|
||||
|
||||
; Define application-specific start/stop entry points for the module
|
||||
|
||||
EXTERN demo_module_start
|
||||
|
||||
|
||||
; Define common external references
|
||||
|
||||
IMPORT _txm_module_thread_shell_entry
|
||||
IMPORT _txm_module_callback_request_thread_entry
|
||||
IMPORT |Image$$ER_RO$$Length|
|
||||
IMPORT |Image$$ER_RW$$Length|
|
||||
IMPORT |Image$$ER_RW$$RW$$Length|
|
||||
IMPORT |Image$$ER_RW$$ZI$$Length|
|
||||
IMPORT |Image$$ER_ZI$$ZI$$Length|
|
||||
|
||||
__txm_module_preamble
|
||||
DCD 0x4D4F4455 ; Module ID
|
||||
DCD 0x6 ; Module Major Version
|
||||
DCD 0x1 ; Module Minor Version
|
||||
DCD 32 ; Module Preamble Size in 32-bit words
|
||||
DCD 0x12345678 ; Module ID (application defined)
|
||||
DCD 0x01000007 ; Module Properties where:
|
||||
; Bits 31-24: Compiler ID
|
||||
; 0 -> IAR
|
||||
; 1 -> ARM
|
||||
; 2 -> GNU
|
||||
; Bit 0: 0 -> Privileged mode execution
|
||||
; 1 -> User mode execution
|
||||
; Bit 1: 0 -> No MPU protection
|
||||
; 1 -> MPU protection (must have user mode selected)
|
||||
; Bit 2: 0 -> Disable shared/external memory access
|
||||
; 1 -> Enable shared/external memory access
|
||||
DCD _txm_module_thread_shell_entry - __txm_module_preamble ; Module Shell Entry Point
|
||||
DCD demo_module_start - __txm_module_preamble ; Module Start Thread Entry Point
|
||||
DCD 0 ; Module Stop Thread Entry Point
|
||||
DCD 1 ; Module Start/Stop Thread Priority
|
||||
DCD 1024 ; Module Start/Stop Thread Stack Size
|
||||
DCD _txm_module_callback_request_thread_entry - __txm_module_preamble ; Module Callback Thread Entry
|
||||
DCD 1 ; Module Callback Thread Priority
|
||||
DCD 1024 ; Module Callback Thread Stack Size
|
||||
DCD |Image$$ER_RO$$Length| + |Image$$ER_RW$$Length| ; Module Code Size
|
||||
DCD |Image$$ER_RW$$Length| + |Image$$ER_ZI$$ZI$$Length| ; Module Data Size
|
||||
DCD 0 ; Reserved 0
|
||||
DCD 0 ; Reserved 1
|
||||
DCD 0 ; Reserved 2
|
||||
DCD 0 ; Reserved 3
|
||||
DCD 0 ; Reserved 4
|
||||
DCD 0 ; Reserved 5
|
||||
DCD 0 ; Reserved 6
|
||||
DCD 0 ; Reserved 7
|
||||
DCD 0 ; Reserved 8
|
||||
DCD 0 ; Reserved 9
|
||||
DCD 0 ; Reserved 10
|
||||
DCD 0 ; Reserved 11
|
||||
DCD 0 ; Reserved 12
|
||||
DCD 0 ; Reserved 13
|
||||
DCD 0 ; Reserved 14
|
||||
DCD 0 ; Reserved 15
|
||||
|
||||
END
|
||||
@@ -26,7 +26,7 @@
|
||||
/* PORT SPECIFIC C INFORMATION RELEASE */
|
||||
/* */
|
||||
/* tx_port.h Cortex-M7/AC5 */
|
||||
/* 6.0.1 */
|
||||
/* 6.1 */
|
||||
/* */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
@@ -47,7 +47,7 @@
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
|
||||
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
@@ -113,7 +113,7 @@ typedef unsigned short USHORT;
|
||||
#endif
|
||||
|
||||
|
||||
/* Define various constants for the ThreadX Cortex-M3 port. */
|
||||
/* Define various constants for the ThreadX Cortex-M7 port. */
|
||||
|
||||
#define TX_INT_DISABLE 1 /* Disable interrupts */
|
||||
#define TX_INT_ENABLE 0 /* Enable interrupts */
|
||||
@@ -128,15 +128,9 @@ typedef unsigned short USHORT;
|
||||
|
||||
*/
|
||||
|
||||
#ifndef TX_MISRA_ENABLE
|
||||
#ifndef TX_TRACE_TIME_SOURCE
|
||||
#define TX_TRACE_TIME_SOURCE *((ULONG *) 0xE0001004)
|
||||
#endif
|
||||
#else
|
||||
ULONG _tx_misra_time_stamp_get(VOID);
|
||||
#define TX_TRACE_TIME_SOURCE _tx_misra_time_stamp_get()
|
||||
#endif
|
||||
|
||||
#ifndef TX_TRACE_TIME_MASK
|
||||
#define TX_TRACE_TIME_MASK 0xFFFFFFFFUL
|
||||
#endif
|
||||
@@ -145,18 +139,14 @@ ULONG _tx_misra_time_stamp_get(VOID);
|
||||
/* Define the port specific options for the _tx_build_options variable. This variable indicates
|
||||
how the ThreadX library was built. */
|
||||
|
||||
#define TX_PORT_SPECIFIC_BUILD_OPTIONS (0)
|
||||
#define TX_PORT_SPECIFIC_BUILD_OPTIONS 0
|
||||
|
||||
|
||||
/* Define the in-line initialization constant so that modules with in-line
|
||||
initialization capabilities can prevent their initialization from being
|
||||
a function call. */
|
||||
|
||||
#ifdef TX_MISRA_ENABLE
|
||||
#define TX_DISABLE_INLINE
|
||||
#else
|
||||
#define TX_INLINE_INITIALIZATION
|
||||
#endif
|
||||
|
||||
|
||||
/* Determine whether or not stack checking is enabled. By default, ThreadX stack checking is
|
||||
@@ -165,19 +155,17 @@ ULONG _tx_misra_time_stamp_get(VOID);
|
||||
define is negated, thereby forcing the stack fill which is necessary for the stack checking
|
||||
logic. */
|
||||
|
||||
#ifndef TX_MISRA_ENABLE
|
||||
#ifdef TX_ENABLE_STACK_CHECKING
|
||||
#undef TX_DISABLE_STACK_FILLING
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
/* Define the TX_THREAD control block extensions for this port. The main reason
|
||||
for the multiple macros is so that backward compatibility can be maintained with
|
||||
existing ThreadX kernel awareness modules. */
|
||||
|
||||
#define TX_THREAD_EXTENSION_0
|
||||
#define TX_THREAD_EXTENSION_1
|
||||
#define TX_THREAD_EXTENSION_0
|
||||
#define TX_THREAD_EXTENSION_1
|
||||
#define TX_THREAD_EXTENSION_2 VOID *tx_thread_module_instance_ptr; \
|
||||
VOID *tx_thread_module_entry_info_ptr; \
|
||||
ULONG tx_thread_module_current_user_mode; \
|
||||
@@ -191,20 +179,23 @@ ULONG _tx_misra_time_stamp_get(VOID);
|
||||
VOID *tx_thread_module_stack_end; \
|
||||
ULONG tx_thread_module_stack_size; \
|
||||
VOID *tx_thread_module_reserved;
|
||||
#define TX_THREAD_EXTENSION_3
|
||||
#define TX_THREAD_EXTENSION_3
|
||||
|
||||
|
||||
/* Define the port extensions of the remaining ThreadX objects. */
|
||||
|
||||
#define TX_BLOCK_POOL_EXTENSION
|
||||
#define TX_BYTE_POOL_EXTENSION
|
||||
#define TX_MUTEX_EXTENSION
|
||||
#define TX_EVENT_FLAGS_GROUP_EXTENSION VOID *tx_event_flags_group_module_instance; \
|
||||
VOID (*tx_event_flags_group_set_module_notify)(struct TX_EVENT_FLAGS_GROUP_STRUCT *group_ptr);
|
||||
#define TX_MUTEX_EXTENSION
|
||||
|
||||
#define TX_QUEUE_EXTENSION VOID *tx_queue_module_instance; \
|
||||
VOID (*tx_queue_send_module_notify)(struct TX_QUEUE_STRUCT *queue_ptr);
|
||||
|
||||
#define TX_SEMAPHORE_EXTENSION VOID *tx_semaphore_module_instance; \
|
||||
VOID (*tx_semaphore_put_module_notify)(struct TX_SEMAPHORE_STRUCT *semaphore_ptr);
|
||||
|
||||
#define TX_TIMER_EXTENSION VOID *tx_timer_module_instance; \
|
||||
VOID (*tx_timer_module_expiration_function)(ULONG id);
|
||||
|
||||
@@ -224,14 +215,10 @@ ULONG _tx_misra_time_stamp_get(VOID);
|
||||
#define TX_THREAD_CREATE_EXTENSION(thread_ptr)
|
||||
#define TX_THREAD_DELETE_EXTENSION(thread_ptr)
|
||||
|
||||
|
||||
#ifndef TX_MISRA_ENABLE
|
||||
|
||||
register unsigned int _ipsr __asm("ipsr");
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef __TARGET_FPU_VFP
|
||||
|
||||
#ifdef TX_MISRA_ENABLE
|
||||
@@ -272,6 +259,7 @@ register ULONG _control __asm("control");
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
/* A thread can be terminated by another thread, so we first check if it's self-terminating and not in an ISR.
|
||||
If so, deactivate the FPU via CONTROL.FPCA. Otherwise we are in an interrupt or another thread is terminating
|
||||
this one, so if the FPCCR.LSPACT bit is set, we need to save the CONTROL.FPCA state, touch the FPU to flush
|
||||
@@ -353,6 +341,8 @@ void _tx_vfp_access(void);
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
/* Define the ThreadX object creation extensions for the remaining objects. */
|
||||
|
||||
#define TX_BLOCK_POOL_CREATE_EXTENSION(pool_ptr)
|
||||
@@ -403,7 +393,7 @@ ULONG _tx_misra_ipsr_get(VOID);
|
||||
#define TX_PORT_SPECIFIC_POST_INITIALIZATION _tx_thread_preempt_disable++;
|
||||
|
||||
|
||||
/* Determine if the ARM architecture has the CLZ instruction. This is available on
|
||||
/* This ARM architecture has the CLZ instruction. This is available on
|
||||
architectures v5 and above. If available, redefine the macro for calculating the
|
||||
lowest bit set. */
|
||||
|
||||
@@ -470,7 +460,7 @@ void tx_thread_fpu_disable(void);
|
||||
|
||||
#ifdef TX_THREAD_INIT
|
||||
CHAR _tx_version_id[] =
|
||||
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/AC5 Version 6.0.1 *";
|
||||
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/AC5 Version 6.1 *";
|
||||
#else
|
||||
#ifdef TX_MISRA_ENABLE
|
||||
extern CHAR _tx_version_id[100];
|
||||
|
||||
@@ -10,44 +10,55 @@
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Module */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Module */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* APPLICATION INTERFACE DEFINITION RELEASE */
|
||||
/* */
|
||||
/* txm_module_port.h Cortex-M7/MPU/AC5 */
|
||||
/* 6.0.1 */
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* APPLICATION INTERFACE DEFINITION RELEASE */
|
||||
/* */
|
||||
/* txm_module_port.h Cortex-M7/MPU/AC5 */
|
||||
/* 6.1 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This file defines the basic module constants, interface structures, */
|
||||
/* and function prototypes. */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This file defines the basic module constants, interface structures, */
|
||||
/* and function prototypes. */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 06-30-2020 Scott Larson Initial Version 6.0.1 */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
#ifndef TXM_MODULE_PORT_H
|
||||
#define TXM_MODULE_PORT_H
|
||||
|
||||
/* It is assumed that the base ThreadX tx_port.h file has been modified to add the
|
||||
/* Determine if the optional Modules user define file should be used. */
|
||||
|
||||
#ifdef TXM_MODULE_INCLUDE_USER_DEFINE_FILE
|
||||
|
||||
|
||||
/* Yes, include the user defines in txm_module_user.h. The defines in this file may
|
||||
alternately be defined on the command line. */
|
||||
|
||||
#include "txm_module_user.h"
|
||||
#endif
|
||||
|
||||
/* It is assumed that the base ThreadX tx_port.h file has been modified to add the
|
||||
following extensions to the ThreadX thread control block (this code should replace
|
||||
the corresponding macro define in tx_port.h):
|
||||
|
||||
@@ -80,21 +91,14 @@ The following extensions must also be defined in tx_port.h:
|
||||
VOID (*tx_timer_module_expiration_function)(ULONG id);
|
||||
*/
|
||||
|
||||
#define TXM_MODULE_THREAD_ENTRY_INFO_USER_EXTENSION
|
||||
|
||||
/**************************************************************************/
|
||||
/* User-adjustable constants */
|
||||
/**************************************************************************/
|
||||
|
||||
/* Size of module heap. */
|
||||
#define TXM_MODULE_HEAP_SIZE 512
|
||||
|
||||
|
||||
#ifndef TXM_ASSEMBLY
|
||||
|
||||
/* Define the kernel stack size for a module thread. */
|
||||
#ifndef TXM_MODULE_KERNEL_STACK_SIZE
|
||||
#define TXM_MODULE_KERNEL_STACK_SIZE 512
|
||||
#define TXM_MODULE_KERNEL_STACK_SIZE 768
|
||||
#endif
|
||||
|
||||
/* For the following 3 access control settings, change TEX and C, B, S (bits 21 through 16 of MPU_RASR)
|
||||
@@ -106,11 +110,6 @@ The following extensions must also be defined in tx_port.h:
|
||||
/* Shared region access control: execute never, read-only, outer & inner write-back, normal memory, shareable. */
|
||||
#define TXM_MODULE_MPU_SHARED_ACCESS_CONTROL 0x12070000
|
||||
|
||||
/**************************************************************************/
|
||||
/* End of user-adjustable constants */
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
|
||||
/* Define constants specific to the tools the module can be built with for this particular modules port. */
|
||||
|
||||
@@ -162,12 +161,12 @@ The following extensions must also be defined in tx_port.h:
|
||||
|
||||
/* Define other module port-specific constants. */
|
||||
|
||||
/* Define INLINE_DECLARE to whitespace for ARM compiler. */
|
||||
/* Define INLINE_DECLARE to inline for ARM compiler. */
|
||||
|
||||
#define INLINE_DECLARE
|
||||
#define INLINE_DECLARE inline
|
||||
|
||||
/* Define the number of MPU entries assigned to the code and data sections.
|
||||
On Cortex-M7 parts, there are 16 total entries. ThreadX uses one for access
|
||||
On Cortex-M7 parts, there are 16 total entries. ThreadX uses one for access
|
||||
to the kernel entry function, thus 15 remain for code and data protection. */
|
||||
#define TXM_MODULE_MPU_TOTAL_ENTRIES 16
|
||||
#define TXM_MODULE_MPU_CODE_ENTRIES 4
|
||||
@@ -206,8 +205,9 @@ typedef struct TXM_MODULE_MANAGER_MEMORY_FAULT_INFO_STRUCT
|
||||
TX_THREAD *txm_module_manager_memory_fault_info_thread_ptr;
|
||||
VOID *txm_module_manager_memory_fault_info_code_location;
|
||||
ULONG txm_module_manager_memory_fault_info_shcsr;
|
||||
ULONG txm_module_manager_memory_fault_info_mmfsr;
|
||||
ULONG txm_module_manager_memory_fault_info_cfsr;
|
||||
ULONG txm_module_manager_memory_fault_info_mmfar;
|
||||
ULONG txm_module_manager_memory_fault_info_bfar;
|
||||
ULONG txm_module_manager_memory_fault_info_control;
|
||||
ULONG txm_module_manager_memory_fault_info_sp;
|
||||
ULONG txm_module_manager_memory_fault_info_r0;
|
||||
@@ -231,18 +231,6 @@ typedef struct TXM_MODULE_MANAGER_MEMORY_FAULT_INFO_STRUCT
|
||||
#define TXM_MODULE_MANAGER_FAULT_INFO \
|
||||
TXM_MODULE_MANAGER_MEMORY_FAULT_INFO _txm_module_manager_memory_fault_info;
|
||||
|
||||
/* Define the macro to check the stack available in dispatch. */
|
||||
#define TXM_MODULE_MANAGER_CHECK_STACK_AVAILABLE \
|
||||
ULONG stack_available; \
|
||||
__asm("MOV %0, SP" : "=r"(stack_available)); \
|
||||
stack_available -= (ULONG)_tx_thread_current_ptr->tx_thread_stack_start; \
|
||||
if((stack_available < TXM_MODULE_MINIMUM_STACK_AVAILABLE) || \
|
||||
(stack_available > _tx_thread_current_ptr->tx_thread_stack_size)) \
|
||||
{ \
|
||||
return(TX_SIZE_ERROR); \
|
||||
}
|
||||
|
||||
|
||||
/* Define the macro to check the code alignment. */
|
||||
|
||||
#define TXM_MODULE_MANAGER_CHECK_CODE_ALIGNMENT(module_location, code_alignment) \
|
||||
@@ -327,20 +315,11 @@ typedef struct TXM_MODULE_MANAGER_MEMORY_FAULT_INFO_STRUCT
|
||||
#define TXM_MODULE_MANAGER_MODULE_UNLOAD(module_instance)
|
||||
|
||||
|
||||
/* Define the macro to perform port-specific functions when passing pointer to kernel. */
|
||||
#define TXM_MODULE_MANAGER_CHECK_DATA_POINTER(module_instance, pointer) \
|
||||
if(_txm_module_manager_data_pointer_check(module_instance, pointer)) \
|
||||
{ return(TXM_MODULE_INVALID_MEMORY); }
|
||||
/* Define the macros to perform port-specific checks when passing pointers to the kernel. */
|
||||
|
||||
/* Define the macro to perform port-specific functions when passing function pointer to kernel. */
|
||||
/* Determine if the pointer is within the module's code memory. */
|
||||
#define TXM_MODULE_MANAGER_CHECK_FUNCTION_POINTER(module_instance, pointer) \
|
||||
if (((pointer < sizeof(TXM_MODULE_PREAMBLE) + (ULONG) module_instance -> txm_module_instance_code_start) || \
|
||||
((pointer+sizeof(pointer)) > (ULONG) module_instance -> txm_module_instance_code_end)) \
|
||||
&& (pointer != (ULONG) TX_NULL)) \
|
||||
{ \
|
||||
return(TX_PTR_ERROR); \
|
||||
}
|
||||
/* Define macro to make sure object is inside the module's data. */
|
||||
#define TXM_MODULE_MANAGER_CHECK_INSIDE_DATA(module_instance, obj_ptr, obj_size) \
|
||||
_txm_module_manager_inside_data_check(module_instance, obj_ptr, obj_size)
|
||||
|
||||
/* Define some internal prototypes to this module port. */
|
||||
|
||||
@@ -351,21 +330,16 @@ typedef struct TXM_MODULE_MANAGER_MEMORY_FAULT_INFO_STRUCT
|
||||
|
||||
#define TXM_MODULE_MANAGER_ADDITIONAL_PROTOTYPES \
|
||||
VOID _txm_module_manager_alignment_adjust(TXM_MODULE_PREAMBLE *module_preamble, ULONG *code_size, ULONG *code_alignment, ULONG *data_size, ULONG *data_alignment); \
|
||||
ULONG _txm_module_manager_data_pointer_check(TXM_MODULE_INSTANCE *module_instance, ULONG pointer); \
|
||||
VOID _txm_module_manager_memory_fault_handler(VOID); \
|
||||
UINT _txm_module_manager_memory_fault_notify(VOID (*notify_function)(TX_THREAD *, TXM_MODULE_INSTANCE *)); \
|
||||
VOID _txm_module_manager_mm_register_setup(TXM_MODULE_INSTANCE *module_instance); \
|
||||
ULONG _txm_power_of_two_block_size(ULONG size); \
|
||||
ULONG _txm_module_manager_calculate_srd_bits(ULONG block_size, ULONG length); \
|
||||
ULONG _txm_module_manager_region_size_get(ULONG block_size); \
|
||||
ULONG _txm_module_manager_pointer_check(TXM_MODULE_INSTANCE *module_instance, ULONG pointer); \
|
||||
UCHAR _txm_module_manager_shared_memory_check_outside(TXM_MODULE_INSTANCE *module_instance, ALIGN_TYPE obj_ptr, UINT obj_size); \
|
||||
UCHAR _txm_module_manager_shared_memory_check_inside(TXM_MODULE_INSTANCE *module_instance, ALIGN_TYPE obj_ptr, UINT obj_size); \
|
||||
UCHAR _txm_module_manager_shared_memory_check_inside_byte(TXM_MODULE_INSTANCE *module_instance, ALIGN_TYPE obj_ptr);
|
||||
UINT _txm_module_manager_inside_data_check(TXM_MODULE_INSTANCE *module_instance, ALIGN_TYPE obj_ptr, UINT obj_size);
|
||||
|
||||
#define TXM_MODULE_MANAGER_VERSION_ID \
|
||||
CHAR _txm_module_manager_version_id[] = \
|
||||
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Module Cortex-M7/MPU/AC5 Version 6.0.1 *";
|
||||
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Module Cortex-M7/MPU/AC5 Version 6.1 *";
|
||||
|
||||
#endif /* ifndef TXM_ASSEMBLY */
|
||||
#endif
|
||||
|
||||
@@ -10,70 +10,57 @@
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Module */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;#define TX_SOURCE_CODE
|
||||
;
|
||||
;
|
||||
;/* Include necessary system files. */
|
||||
;
|
||||
;#include "tx_api.h"
|
||||
;#include "tx_thread.h"
|
||||
|
||||
#include "txm_module_port.h"
|
||||
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Module */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
IMPORT __use_two_region_memory
|
||||
IMPORT __scatterload
|
||||
IMPORT txm_heap
|
||||
|
||||
|
||||
|
||||
AREA ||.text||, CODE, READONLY
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _txm_module_initialize Cortex-M7/MPU/AC5 */
|
||||
;/* 6.0.1 */
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _txm_module_initialize Cortex-M7/MPU/AC5 */
|
||||
;/* 6.1 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* Scott Larson, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function initializes the module c runtime. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* __scatterload Initialize C runtime */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* _txm_module_thread_shell_entry Start module thread */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function initializes the module c runtime. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* __scatterload Initialize C runtime */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* _txm_module_thread_shell_entry Start module thread */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 06-30-2020 Scott Larson Initial Version 6.0.1 */
|
||||
;/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _txm_module_initialize(VOID)
|
||||
@@ -81,7 +68,7 @@
|
||||
EXPORT _txm_module_initialize
|
||||
_txm_module_initialize
|
||||
PUSH {r4-r12,lr} ; Save dregs and LR
|
||||
|
||||
|
||||
B __scatterload ; Call ARM func to initialize variables
|
||||
|
||||
;
|
||||
@@ -89,7 +76,7 @@ _txm_module_initialize
|
||||
;
|
||||
EXPORT __rt_exit
|
||||
__rt_exit
|
||||
|
||||
|
||||
POP {r4-r12,lr} ; Restore dregs and LR
|
||||
BX lr ; Return to caller
|
||||
;
|
||||
@@ -106,12 +93,12 @@ __user_setup_stackheap
|
||||
MOV r2, #TXM_MODULE_HEAP_SIZE ; load heap size
|
||||
ADD r2, r2, r0 ; calculate heap end address
|
||||
BX lr
|
||||
|
||||
|
||||
ALIGN 4
|
||||
_tx_heap_offset
|
||||
DCDO txm_heap
|
||||
AREA ||.arm_vfe_header||, DATA, READONLY, NOALLOC, ALIGN=2
|
||||
|
||||
|
||||
IMPORT txm_heap [DATA]
|
||||
|
||||
;
|
||||
@@ -121,6 +108,5 @@ _tx_heap_offset
|
||||
EXPORT main
|
||||
main
|
||||
BX lr
|
||||
|
||||
END
|
||||
|
||||
END
|
||||
|
||||
@@ -10,15 +10,15 @@
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Module */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Module */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
#ifndef TXM_MODULE
|
||||
#define TXM_MODULE
|
||||
@@ -49,48 +49,48 @@ extern VOID _txm_module_initialize(VOID);
|
||||
|
||||
__align(8) UCHAR txm_heap[TXM_MODULE_HEAP_SIZE];
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_thread_shell_entry Cortex-M7/MPU/AC5 */
|
||||
/* 6.0.1 */
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_thread_shell_entry Cortex-M7/MPU/AC5 */
|
||||
/* 6.1 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function calls the specified entry function of the thread. It */
|
||||
/* also provides a place for the thread's entry function to return. */
|
||||
/* If the thread returns, this function places the thread in a */
|
||||
/* "COMPLETED" state. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* thread_ptr Pointer to current thread */
|
||||
/* thread_info Pointer to thread entry info */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* _txm_module_initialize cstartup initialization */
|
||||
/* thread_entry Thread's entry function */
|
||||
/* tx_thread_resume Resume the module callback thread */
|
||||
/* _txm_module_thread_system_suspend Module thread suspension routine */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Initial thread stack frame */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function calls the specified entry function of the thread. It */
|
||||
/* also provides a place for the thread's entry function to return. */
|
||||
/* If the thread returns, this function places the thread in a */
|
||||
/* "COMPLETED" state. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* thread_ptr Pointer to current thread */
|
||||
/* thread_info Pointer to thread entry info */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* _txm_module_initialize cstartup initialization */
|
||||
/* thread_entry Thread's entry function */
|
||||
/* tx_thread_resume Resume the module callback thread */
|
||||
/* _txm_module_thread_system_suspend Module thread suspension routine */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Initial thread stack frame */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 06-30-2020 Scott Larson Initial Version 6.0.1 */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
VOID _txm_module_thread_shell_entry(TX_THREAD *thread_ptr, TXM_MODULE_THREAD_ENTRY_INFO *thread_info)
|
||||
@@ -101,25 +101,23 @@ VOID _txm_module_thread_shell_entry(TX_THREAD *thread_ptr, TXM_MODULE_THREAD_EN
|
||||
#endif
|
||||
|
||||
|
||||
/* Determine if this is the start thread. If so, we must prepare the module for
|
||||
/* Determine if this is the start thread. If so, we must prepare the module for
|
||||
execution. If not, simply skip the C startup code. */
|
||||
if (thread_info -> txm_module_thread_entry_info_start_thread)
|
||||
{
|
||||
|
||||
/* Initialize the ARM C environment. */
|
||||
_txm_module_initialize();
|
||||
|
||||
/* Save the entry info pointer, for later use. */
|
||||
_txm_module_entry_info = thread_info;
|
||||
|
||||
/* Save the kernel function dispatch address. This is used to make all resident calls from
|
||||
/* Save the kernel function dispatch address. This is used to make all resident calls from
|
||||
the module. */
|
||||
_txm_module_kernel_call_dispatcher = thread_info -> txm_module_thread_entry_info_kernel_call_dispatcher;
|
||||
|
||||
/* Ensure that we have a valid pointer. */
|
||||
while (!_txm_module_kernel_call_dispatcher)
|
||||
{
|
||||
|
||||
/* Loop here, if an error is present getting the dispatch function pointer!
|
||||
An error here typically indicates the resident portion of _tx_thread_schedule
|
||||
is not supporting the trap to obtain the function pointer. */
|
||||
@@ -164,7 +162,7 @@ VOID _txm_module_thread_shell_entry(TX_THREAD *thread_ptr, TXM_MODULE_THREAD_EN
|
||||
#endif
|
||||
|
||||
/* Call actual thread suspension routine. */
|
||||
_txm_module_thread_system_suspend(thread_ptr);
|
||||
_txm_module_thread_system_suspend(thread_ptr);
|
||||
|
||||
#ifdef TX_SAFETY_CRITICAL
|
||||
|
||||
|
||||
@@ -2,6 +2,11 @@
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
@@ -15,16 +20,6 @@
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;#define TX_SOURCE_CODE
|
||||
;
|
||||
;
|
||||
;/* Include necessary system files. */
|
||||
;
|
||||
;#include "tx_api.h"
|
||||
;#include "tx_thread.h"
|
||||
;#include "tx_timer.h"
|
||||
;
|
||||
;
|
||||
IF :DEF:TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
IMPORT _tx_execution_isr_exit
|
||||
@@ -37,14 +32,16 @@
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_context_restore Cortex-M4/AC5 */
|
||||
;/* 6.0.1 */
|
||||
;/* _tx_thread_context_restore Cortex-M7/AC5 */
|
||||
;/* 6.1 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function is only needed for legacy applications and it should */
|
||||
;/* not be called in any new development on a Cortex-M. */
|
||||
;/* This function restores the interrupt context if it is processing a */
|
||||
;/* nested interrupt. If not, it returns to the interrupt thread if no */
|
||||
;/* preemption is necessary. Otherwise, if preemption is necessary or */
|
||||
@@ -70,7 +67,7 @@
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
|
||||
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _tx_thread_context_restore(VOID)
|
||||
|
||||
@@ -2,6 +2,11 @@
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
@@ -15,16 +20,6 @@
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;#define TX_SOURCE_CODE
|
||||
;
|
||||
;
|
||||
;/* Include necessary system files. */
|
||||
;
|
||||
;#include "tx_api.h"
|
||||
;#include "tx_thread.h"
|
||||
;#include "tx_timer.h"
|
||||
;
|
||||
;
|
||||
IF :DEF:TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
IMPORT _tx_execution_isr_enter
|
||||
@@ -37,14 +32,16 @@
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_context_save Cortex-M4/AC5 */
|
||||
;/* 6.0.1 */
|
||||
;/* _tx_thread_context_save Cortex-M7/AC5 */
|
||||
;/* 6.1 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function is only needed for legacy applications and it should */
|
||||
;/* not be called in any new development on a Cortex-M. */
|
||||
;/* This function saves the context of an executing thread in the */
|
||||
;/* beginning of interrupt processing. The function also ensures that */
|
||||
;/* the system stack is used upon return to the calling ISR. */
|
||||
@@ -69,7 +66,7 @@
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
|
||||
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _tx_thread_context_save(VOID)
|
||||
@@ -82,11 +79,11 @@ _tx_thread_context_save
|
||||
;
|
||||
PUSH {r0, lr} ; Save ISR lr
|
||||
BL _tx_execution_isr_enter ; Call the ISR enter function
|
||||
POP {lr0, r} ; Recover ISR lr
|
||||
POP {r0, lr} ; Recover ISR lr
|
||||
ENDIF
|
||||
;
|
||||
; /* Return to interrupt processing. */
|
||||
;
|
||||
;
|
||||
BX lr ; Return to interrupt processing caller
|
||||
;}
|
||||
ALIGN
|
||||
|
||||
@@ -2,6 +2,11 @@
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
@@ -15,22 +20,14 @@
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;#define TX_SOURCE_CODE
|
||||
;
|
||||
;
|
||||
;/* Include necessary system files. */
|
||||
;
|
||||
;#include "tx_api.h"
|
||||
;#include "tx_thread.h"
|
||||
;
|
||||
;
|
||||
AREA ||.text||, CODE, READONLY
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_interrupt_control Cortex-M4/AC5 */
|
||||
;/* 6.0.1 */
|
||||
;/* _tx_thread_interrupt_control Cortex-M7/AC5 */
|
||||
;/* 6.1 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
@@ -60,7 +57,7 @@
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
|
||||
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;UINT _tx_thread_interrupt_control(UINT new_posture)
|
||||
@@ -77,4 +74,3 @@ _tx_thread_interrupt_control
|
||||
;
|
||||
;}
|
||||
END
|
||||
|
||||
|
||||
@@ -2,6 +2,11 @@
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
@@ -15,25 +20,17 @@
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;#define TX_SOURCE_CODE
|
||||
;
|
||||
;
|
||||
;/* Include necessary system files. */
|
||||
;
|
||||
;#include "tx_api.h"
|
||||
;#include "tx_thread.h"
|
||||
;
|
||||
;
|
||||
AREA ||.text||, CODE, READONLY
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_interrupt_disable Cortex-M4/AC5 */
|
||||
;/* 6.0.1 */
|
||||
;/* _tx_thread_interrupt_disable Cortex-M7/AC5 */
|
||||
;/* 6.1 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation. */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
@@ -60,7 +57,7 @@
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
|
||||
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;UINT _tx_thread_interrupt_disable(UINT new_posture)
|
||||
|
||||
@@ -2,6 +2,11 @@
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
@@ -15,25 +20,17 @@
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;#define TX_SOURCE_CODE
|
||||
;
|
||||
;
|
||||
;/* Include necessary system files. */
|
||||
;
|
||||
;#include "tx_api.h"
|
||||
;#include "tx_thread.h"
|
||||
;
|
||||
;
|
||||
AREA ||.text||, CODE, READONLY
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_interrupt_restore Cortex-M4/AC5 */
|
||||
;/* 6.0.1 */
|
||||
;/* _tx_thread_interrupt_restore Cortex-M7/AC5 */
|
||||
;/* 6.1 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation. */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
@@ -60,7 +57,7 @@
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
|
||||
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _tx_thread_interrupt_restore(UINT new_posture)
|
||||
|
||||
@@ -10,80 +10,73 @@
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Thread */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Thread */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;#define TX_SOURCE_CODE
|
||||
;
|
||||
;
|
||||
;/* Include necessary system files. */
|
||||
;
|
||||
;#include "tx_api.h"
|
||||
;#include "tx_thread.h"
|
||||
;#include "tx_timer.h"
|
||||
;
|
||||
IMPORT _tx_thread_current_ptr
|
||||
IMPORT _tx_thread_execute_ptr
|
||||
IMPORT _tx_timer_time_slice
|
||||
IMPORT _tx_thread_system_stack_ptr
|
||||
IF :DEF:TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
IMPORT _tx_execution_thread_enter
|
||||
IMPORT _tx_execution_thread_exit
|
||||
IMPORT _tx_thread_current_ptr
|
||||
IMPORT _tx_thread_execute_ptr
|
||||
IMPORT _tx_timer_time_slice
|
||||
IMPORT _tx_thread_system_stack_ptr
|
||||
IF :DEF: TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
IMPORT _tx_execution_thread_enter
|
||||
IMPORT _tx_execution_thread_exit
|
||||
ENDIF
|
||||
IMPORT _tx_thread_preempt_disable
|
||||
IMPORT _txm_module_manager_memory_fault_handler
|
||||
IMPORT _txm_module_manager_memory_fault_info
|
||||
IMPORT _tx_thread_preempt_disable
|
||||
IMPORT _txm_module_manager_memory_fault_handler
|
||||
IMPORT _txm_module_manager_memory_fault_info
|
||||
IMPORT _txm_module_priv
|
||||
IMPORT _txm_module_user_mode_exit
|
||||
;
|
||||
;
|
||||
AREA ||.text||, CODE, READONLY
|
||||
THUMB
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_schedule Cortex-M7/MPU/AC5 */
|
||||
;/* 6.0.1 */
|
||||
AREA ||.text||, CODE, READONLY
|
||||
THUMB
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_schedule Cortex-M7/MPU/AC5 */
|
||||
;/* 6.1 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* Scott Larson, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function waits for a thread control block pointer to appear in */
|
||||
;/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */
|
||||
;/* in the variable, the corresponding thread is resumed. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function waits for a thread control block pointer to appear in */
|
||||
;/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */
|
||||
;/* in the variable, the corresponding thread is resumed. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* _tx_initialize_kernel_enter ThreadX entry function */
|
||||
;/* _tx_thread_system_return Return to system from thread */
|
||||
;/* _tx_thread_context_restore Restore thread's context */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* _tx_initialize_kernel_enter ThreadX entry function */
|
||||
;/* _tx_thread_system_return Return to system from thread */
|
||||
;/* _tx_thread_context_restore Restore thread's context */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 06-30-2020 Scott Larson Initial Version 6.0.1 */
|
||||
;/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _tx_thread_schedule(VOID)
|
||||
@@ -96,16 +89,16 @@ _tx_thread_schedule
|
||||
; from the PendSV handling routines below. */
|
||||
;
|
||||
; /* Clear the preempt-disable flag to enable rescheduling after initialization on Cortex-M targets. */
|
||||
;
|
||||
;
|
||||
MOV r0, #0 ; Build value for TX_FALSE
|
||||
LDR r2, =_tx_thread_preempt_disable ; Build address of preempt disable flag
|
||||
STR r0, [r2, #0] ; Clear preempt disable flag
|
||||
;
|
||||
; /* Clear CONTROL.FPCA bit so FPU registers aren't unnecessarily stacked. */
|
||||
;
|
||||
IF :DEF:__ARMVFP__
|
||||
IF :DEF: __ARMVFP__
|
||||
MRS r0, CONTROL ; Pickup current CONTROL register
|
||||
BIC r0, r0, #4 ; Clear the FPCA bit
|
||||
BIC r0, r0, #4 ; Clear the FPCA bit
|
||||
MSR CONTROL, r0 ; Setup new CONTROL register
|
||||
ENDIF
|
||||
;
|
||||
@@ -113,28 +106,24 @@ _tx_thread_schedule
|
||||
;
|
||||
LDR r0, =0xE000ED24 ; Build SHCSR address
|
||||
LDR r1, =0x70000 ; Enable Usage, Bus, and MemManage faults
|
||||
STR r1, [r0] ;
|
||||
STR r1, [r0] ;
|
||||
;
|
||||
; /* Enable interrupts */
|
||||
;
|
||||
CPSIE i
|
||||
;
|
||||
;
|
||||
; /* Enter the scheduler for the first time. */
|
||||
;
|
||||
MOV r0, #0x10000000 ; Load PENDSVSET bit
|
||||
MOV r1, #0xE000E000 ; Load NVIC base
|
||||
STR r0, [r1, #0xD04] ; Set PENDSVBIT in ICSR
|
||||
NOP ;
|
||||
NOP ;
|
||||
NOP ;
|
||||
NOP ;
|
||||
__wait_loop
|
||||
B __wait_loop
|
||||
;
|
||||
; /* We should never get here - ever! */
|
||||
;
|
||||
BKPT 0xEF ; Setup error conditions
|
||||
BX lr ;
|
||||
DSB ; Complete all memory accesses
|
||||
ISB ; Flush pipeline
|
||||
|
||||
; /* Wait here for the PendSV to take place. */
|
||||
|
||||
__tx_wait_here
|
||||
B __tx_wait_here ; Wait for the PendSV to happen
|
||||
;}
|
||||
;
|
||||
|
||||
@@ -155,41 +144,44 @@ MemManage_Handler
|
||||
LDR r0, =0xE000ED24 ; Build SHCSR address
|
||||
LDR r1, [r0] ; Pickup SHCSR
|
||||
STR r1, [r12, #8] ; Save SHCSR
|
||||
LDR r0, =0xE000ED28 ; Build MMFSR address
|
||||
LDR r1, [r0] ; Pickup MMFSR (and other fault status too!)
|
||||
STR r1, [r12, #12] ; Save MMFSR
|
||||
LDR r0, =0xE000ED28 ; Build CFSR address
|
||||
LDR r1, [r0] ; Pickup CFSR
|
||||
STR r1, [r12, #12] ; Save CFSR
|
||||
LDR r0, =0xE000ED34 ; Build MMFAR address
|
||||
LDR r1, [r0] ; Pickup MMFAR
|
||||
STR r1, [r12, #16] ; Save MMFAR
|
||||
LDR r0, =0xE000ED38 ; Build BFAR address
|
||||
LDR r1, [r0] ; Pickup BFAR
|
||||
STR r1, [r12, #20] ; Save BFAR
|
||||
MRS r0, CONTROL ; Pickup current CONTROL register
|
||||
STR r0, [r12, #20] ; Save CONTROL
|
||||
STR r0, [r12, #24] ; Save CONTROL
|
||||
MRS r1, PSP ; Pickup thread stack pointer
|
||||
STR r1, [r12, #24] ; Save thread stack pointer
|
||||
STR r1, [r12, #28] ; Save thread stack pointer
|
||||
LDR r0, [r1] ; Pickup saved r0
|
||||
STR r0, [r12, #28] ; Save r0
|
||||
STR r0, [r12, #32] ; Save r0
|
||||
LDR r0, [r1, #4] ; Pickup saved r1
|
||||
STR r0, [r12, #32] ; Save r1
|
||||
STR r2, [r12, #36] ; Save r2
|
||||
STR r3, [r12, #40] ; Save r3
|
||||
STR r4, [r12, #44] ; Save r4
|
||||
STR r5, [r12, #48] ; Save r5
|
||||
STR r6, [r12, #52] ; Save r6
|
||||
STR r7, [r12, #56] ; Save r7
|
||||
STR r8, [r12, #60] ; Save r8
|
||||
STR r9, [r12, #64] ; Save r9
|
||||
STR r10,[r12, #68] ; Save r10
|
||||
STR r11,[r12, #72] ; Save r11
|
||||
STR r0, [r12, #36] ; Save r1
|
||||
STR r2, [r12, #40] ; Save r2
|
||||
STR r3, [r12, #44] ; Save r3
|
||||
STR r4, [r12, #48] ; Save r4
|
||||
STR r5, [r12, #52] ; Save r5
|
||||
STR r6, [r12, #56] ; Save r6
|
||||
STR r7, [r12, #60] ; Save r7
|
||||
STR r8, [r12, #64] ; Save r8
|
||||
STR r9, [r12, #68] ; Save r9
|
||||
STR r10,[r12, #72] ; Save r10
|
||||
STR r11,[r12, #76] ; Save r11
|
||||
LDR r0, [r1, #16] ; Pickup saved r12
|
||||
STR r0, [r12, #76] ; Save r12
|
||||
STR r0, [r12, #80] ; Save r12
|
||||
LDR r0, [r1, #20] ; Pickup saved lr
|
||||
STR r0, [r12, #80] ; Save lr
|
||||
STR r0, [r12, #84] ; Save lr
|
||||
LDR r0, [r1, #24] ; Pickup instruction address at point of fault
|
||||
STR r0, [r12, #4] ; Save point of fault
|
||||
LDR r0, [r1, #28] ; Pickup xPSR
|
||||
STR r0, [r12, #84] ; Save xPSR
|
||||
STR r0, [r12, #88] ; Save xPSR
|
||||
|
||||
MRS r0, CONTROL ; Pickup current CONTROL register
|
||||
BIC r0, r0, #1 ; Clear the UNPRIV bit
|
||||
BIC r0, r0, #1 ; Clear the UNPRIV bit
|
||||
MSR CONTROL, r0 ; Setup new CONTROL register
|
||||
|
||||
LDR r0, =0xE000ED28 ; Build the Memory Management Fault Status Register (MMFSR)
|
||||
@@ -199,7 +191,7 @@ MemManage_Handler
|
||||
; Bit 7 = 1 -> MMFAR is valid
|
||||
STRB r1, [r0] ; Clear the MMFSR
|
||||
|
||||
IF :DEF:__ARMVFP__
|
||||
IF :DEF: __ARMVFP__
|
||||
LDR r0, =0xE000EF34 ; Cleanup FPU context: Load FPCCR address
|
||||
LDR r1, [r0] ; Load FPCCR
|
||||
BIC r1, r1, #1 ; Clear the lazy preservation active bit
|
||||
@@ -208,7 +200,7 @@ MemManage_Handler
|
||||
|
||||
BL _txm_module_manager_memory_fault_handler ; Call memory manager fault handler
|
||||
|
||||
IF :DEF:TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
IF :DEF: TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
;
|
||||
; /* Call the thread exit function to indicate the thread is no longer executing. */
|
||||
;
|
||||
@@ -233,17 +225,17 @@ MemManage_Handler
|
||||
|
||||
;
|
||||
; /* Generic context PendSV handler. */
|
||||
;
|
||||
;
|
||||
EXPORT PendSV_Handler
|
||||
EXPORT __tx_PendSVHandler
|
||||
PendSV_Handler
|
||||
__tx_PendSVHandler
|
||||
;
|
||||
; /* Get current thread value and new thread pointer. */
|
||||
;
|
||||
;
|
||||
__tx_ts_handler
|
||||
|
||||
IF :DEF:TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
IF :DEF: TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
;
|
||||
; /* Call the thread exit function to indicate the thread is no longer executing. */
|
||||
;
|
||||
@@ -259,7 +251,7 @@ __tx_ts_handler
|
||||
LDR r1, [r0] ; Pickup current thread pointer
|
||||
;
|
||||
; /* Determine if there is a current thread to finish preserving. */
|
||||
;
|
||||
;
|
||||
CBZ r1, __tx_ts_new ; If NULL, skip preservation
|
||||
;
|
||||
; /* Recover PSP and preserve current thread context. */
|
||||
@@ -267,7 +259,7 @@ __tx_ts_handler
|
||||
STR r3, [r0] ; Set _tx_thread_current_ptr to NULL
|
||||
MRS r12, PSP ; Pickup PSP pointer (thread's stack pointer)
|
||||
STMDB r12!, {r4-r11} ; Save its remaining registers
|
||||
IF :DEF:__ARMVFP__
|
||||
IF :DEF: __ARMVFP__
|
||||
TST LR, #0x10 ; Determine if the VFP extended frame is present
|
||||
BNE _skip_vfp_save
|
||||
VSTMDB r12!,{s16-s31} ; Yes, save additional VFP registers
|
||||
@@ -290,7 +282,6 @@ _skip_vfp_save
|
||||
;
|
||||
STR r3, [r4] ; Clear time-slice
|
||||
;
|
||||
;
|
||||
; /* Executing thread is now completely preserved!!! */
|
||||
;
|
||||
__tx_ts_new
|
||||
@@ -319,7 +310,7 @@ __tx_ts_restore
|
||||
;
|
||||
STR r5, [r4] ; Setup global time-slice
|
||||
|
||||
IF :DEF:TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
IF :DEF: TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
;
|
||||
; /* Call the thread entry function to indicate the thread is executing. */
|
||||
;
|
||||
@@ -334,7 +325,7 @@ __tx_ts_restore
|
||||
|
||||
MRS r5, CONTROL ; Pickup current CONTROL register
|
||||
LDR r4, [r1, #0x98] ; Pickup current user mode flag
|
||||
BIC r5, r5, #1 ; Clear the UNPRIV bit
|
||||
BIC r5, r5, #1 ; Clear the UNPRIV bit
|
||||
ORR r4, r4, r5 ; Build new CONTROL register
|
||||
MSR CONTROL, r4 ; Setup new CONTROL register
|
||||
|
||||
@@ -343,7 +334,7 @@ __tx_ts_restore
|
||||
STR r3, [r0] ; Disable MPU
|
||||
LDR r0, [r1, #0x90] ; Pickup the module instance pointer
|
||||
CBZ r0, skip_mpu_setup ; Is this thread owned by a module? No, skip MPU setup
|
||||
LDR r1, [r0, #0x64] ; Pickup MPU register[0]
|
||||
LDR r1, [r0, #0x64] ; Pickup MPU register[0]
|
||||
CBZ r1, skip_mpu_setup ; Is protection required for this module? No, skip MPU setup
|
||||
LDR r1, =0xE000ED9C ; Build address of MPU base register
|
||||
|
||||
@@ -362,9 +353,9 @@ __tx_ts_restore
|
||||
STR r1, [r0] ; Enable MPU
|
||||
skip_mpu_setup
|
||||
LDMIA r12!, {LR} ; Pickup LR
|
||||
IF :DEF:__ARMVFP__
|
||||
IF :DEF: __ARMVFP__
|
||||
TST LR, #0x10 ; Determine if the VFP extended frame is present
|
||||
BNE _skip_vfp_restore ; If not, skip VFP restore
|
||||
BNE _skip_vfp_restore ; If not, skip VFP restore
|
||||
VLDMIA r12!, {s16-s31} ; Yes, restore additional VFP registers
|
||||
_skip_vfp_restore
|
||||
ENDIF
|
||||
@@ -372,11 +363,11 @@ _skip_vfp_restore
|
||||
MSR PSP, r12 ; Setup the thread's stack pointer
|
||||
;
|
||||
; /* Return to thread. */
|
||||
;
|
||||
;
|
||||
BX lr ; Return to thread!
|
||||
;
|
||||
; /* The following is the idle wait processing... in this case, no threads are ready for execution and the
|
||||
; system will simply be idle until an interrupt occurs that makes a thread ready. Note that interrupts
|
||||
; system will simply be idle until an interrupt occurs that makes a thread ready. Note that interrupts
|
||||
; are disabled to allow use of WFI for waiting for a thread to arrive. */
|
||||
;
|
||||
__tx_ts_wait
|
||||
@@ -392,16 +383,16 @@ __tx_ts_wait
|
||||
CPSIE i ; Enable interrupts
|
||||
B __tx_ts_wait ; Loop to continue waiting
|
||||
;
|
||||
; /* At this point, we have a new thread ready to go. Clear any newly pended PendSV - since we are
|
||||
; /* At this point, we have a new thread ready to go. Clear any newly pended PendSV - since we are
|
||||
; already in the handler! */
|
||||
;
|
||||
__tx_ts_ready
|
||||
MOV r7, #0x08000000 ; Build clear PendSV value
|
||||
MOV r8, #0xE000E000 ; Build base NVIC address
|
||||
STR r7, [r8, #0xD04] ; Clear any PendSV
|
||||
STR r7, [r8, #0xD04] ; Clear any PendSV
|
||||
;
|
||||
; /* Re-enable interrupts and restore new thread. */
|
||||
;
|
||||
;
|
||||
CPSIE i ; Enable interrupts
|
||||
B __tx_ts_restore ; Restore the thread
|
||||
;}
|
||||
@@ -426,11 +417,11 @@ __tx_SVCallHandler
|
||||
; At this point we have an SVC 1, which means we are entering the kernel from a module thread with user mode selected
|
||||
;
|
||||
LDR r2, =_txm_module_priv ; Subtract 1 because of THUMB mode.
|
||||
SUB r2, r2, #1 ; Temporary fix until ARM describes how to load label above correctly.
|
||||
SUB r2, r2, #1 ; Temporary fix until ARM describes how to load label above correctly.
|
||||
CMP r1, r2 ; Did we come from user_mode_entry?
|
||||
IT NE ; If no (not equal), then...
|
||||
BXNE lr ; return from where we came.
|
||||
|
||||
|
||||
LDR r3, [r0, #20] ; This is the saved LR
|
||||
LDR r1, =_tx_thread_current_ptr ; Build current thread pointer address
|
||||
LDR r2, [r1] ; Pickup current thread pointer
|
||||
@@ -439,74 +430,73 @@ __tx_SVCallHandler
|
||||
STR r3, [r2, #0xA0] ; Save the original LR in thread control block
|
||||
|
||||
; If there is memory protection, use kernel stack
|
||||
LDR r0, [r2, #0x90] ; Load the module instance ptr
|
||||
LDR r0, [r0, #0x0C] ; Load the module property flags
|
||||
TST r0, #2 ; Check if memory protected
|
||||
LDR r0, [r2, #0x90] ; Load the module instance ptr
|
||||
LDR r0, [r0, #0x0C] ; Load the module property flags
|
||||
TST r0, #2 ; Check if memory protected
|
||||
BEQ _tx_skip_kernel_stack_enter
|
||||
|
||||
; Switch to the module thread's kernel stack
|
||||
LDR r0, [r2, #0xA8] ; Load the module kernel stack end
|
||||
IF :LNOT: :DEF:TXM_MODULE_KERNEL_STACK_MAINTENANCE_DISABLE
|
||||
LDR r1, [r2, #0xA4] ; Load the module kernel stack start
|
||||
LDR r3, [r2, #0xAC] ; Load the module kernel stack size
|
||||
STR r1, [r2, #12] ; Set stack start
|
||||
STR r0, [r2, #16] ; Set stack end
|
||||
STR r3, [r2, #20] ; Set stack size
|
||||
LDR r0, [r2, #0xA8] ; Load the module kernel stack end
|
||||
IF :LNOT: :DEF: TXM_MODULE_KERNEL_STACK_MAINTENANCE_DISABLE
|
||||
LDR r1, [r2, #0xA4] ; Load the module kernel stack start
|
||||
LDR r3, [r2, #0xAC] ; Load the module kernel stack size
|
||||
STR r1, [r2, #12] ; Set stack start
|
||||
STR r0, [r2, #16] ; Set stack end
|
||||
STR r3, [r2, #20] ; Set stack size
|
||||
ENDIF
|
||||
|
||||
MRS r3, PSP ; Pickup thread stack pointer
|
||||
STR r3, [r2, #0xB0] ; Save thread stack pointer
|
||||
MRS r3, PSP ; Pickup thread stack pointer
|
||||
STR r3, [r2, #0xB0] ; Save thread stack pointer
|
||||
|
||||
; Build kernel stack by copying thread stack two registers at a time
|
||||
ADD r3, r3, #32 ; start at bottom of hardware stack
|
||||
LDMDB r3!,{r1-r2} ;
|
||||
STMDB r0!,{r1-r2} ;
|
||||
LDMDB r3!,{r1-r2} ;
|
||||
STMDB r0!,{r1-r2} ;
|
||||
LDMDB r3!,{r1-r2} ;
|
||||
STMDB r0!,{r1-r2} ;
|
||||
LDMDB r3!,{r1-r2} ;
|
||||
STMDB r0!,{r1-r2} ;
|
||||
ADD r3, r3, #32 ; start at bottom of hardware stack
|
||||
LDMDB r3!,{r1-r2}
|
||||
STMDB r0!,{r1-r2}
|
||||
LDMDB r3!,{r1-r2}
|
||||
STMDB r0!,{r1-r2}
|
||||
LDMDB r3!,{r1-r2}
|
||||
STMDB r0!,{r1-r2}
|
||||
LDMDB r3!,{r1-r2}
|
||||
STMDB r0!,{r1-r2}
|
||||
|
||||
MSR PSP, r0 ; Set kernel stack pointer
|
||||
|
||||
MSR PSP, r0 ; Set kernel stack pointer
|
||||
|
||||
_tx_skip_kernel_stack_enter
|
||||
MRS r0, CONTROL ; Pickup current CONTROL register
|
||||
BIC r0, r0, #1 ; Clear the UNPRIV bit
|
||||
BIC r0, r0, #1 ; Clear the UNPRIV bit
|
||||
MSR CONTROL, r0 ; Setup new CONTROL register
|
||||
BX lr ; Return to thread
|
||||
|
||||
_tx_thread_user_return
|
||||
|
||||
LDR r2, =_txm_module_user_mode_exit ; Subtract 1 because of THUMB mode.
|
||||
SUB r2, r2, #1 ; Temporary fix until ARM describes how to load label above correctly.
|
||||
SUB r2, r2, #1 ; Temporary fix until ARM describes how to load label above correctly.
|
||||
CMP r1, r2 ; Did we come from user_mode_exit?
|
||||
IT NE ; If no (not equal), then...
|
||||
BXNE lr ; return from where we came
|
||||
|
||||
|
||||
LDR r1, =_tx_thread_current_ptr ; Build current thread pointer address
|
||||
LDR r2, [r1] ; Pickup current thread pointer
|
||||
LDR r1, [r2, #0x9C] ; Pick up user mode
|
||||
STR r1, [r2, #0x98] ; Set the current user mode selection for thread
|
||||
|
||||
; If there is memory protection, use kernel stack
|
||||
LDR r0, [r2, #0x90] ; Load the module instance ptr
|
||||
LDR r0, [r0, #0x0C] ; Load the module property flags
|
||||
TST r0, #2 ; Check if memory protected
|
||||
LDR r0, [r2, #0x90] ; Load the module instance ptr
|
||||
LDR r0, [r0, #0x0C] ; Load the module property flags
|
||||
TST r0, #2 ; Check if memory protected
|
||||
BEQ _tx_skip_kernel_stack_exit
|
||||
|
||||
IF :LNOT: :DEF:TXM_MODULE_KERNEL_STACK_MAINTENANCE_DISABLE
|
||||
LDR r0, [r2, #0xB4] ; Load the module thread stack start
|
||||
LDR r1, [r2, #0xB8] ; Load the module thread stack end
|
||||
LDR r3, [r2, #0xBC] ; Load the module thread stack size
|
||||
STR r0, [r2, #12] ; Set stack start
|
||||
STR r1, [r2, #16] ; Set stack end
|
||||
STR r3, [r2, #20] ; Set stack size
|
||||
ENDIF
|
||||
LDR r0, [r2, #0xB0] ; Load the module thread stack pointer
|
||||
MRS r3, PSP ; Pickup kernel stack pointer
|
||||
|
||||
; Copy kernel hardware stack to module thread stack.
|
||||
IF :LNOT: :DEF: TXM_MODULE_KERNEL_STACK_MAINTENANCE_DISABLE
|
||||
LDR r0, [r2, #0xB4] ; Load the module thread stack start
|
||||
LDR r1, [r2, #0xB8] ; Load the module thread stack end
|
||||
LDR r3, [r2, #0xBC] ; Load the module thread stack size
|
||||
STR r0, [r2, #12] ; Set stack start
|
||||
STR r1, [r2, #16] ; Set stack end
|
||||
STR r3, [r2, #20] ; Set stack size
|
||||
ENDIF
|
||||
LDR r0, [r2, #0xB0] ; Load the module thread stack pointer
|
||||
MRS r3, PSP ; Pickup kernel stack pointer
|
||||
|
||||
; Copy kernel hardware stack to module thread stack.
|
||||
LDM r3!,{r1-r2}
|
||||
STM r0!,{r1-r2}
|
||||
LDM r3!,{r1-r2}
|
||||
@@ -515,13 +505,13 @@ _tx_thread_user_return
|
||||
STM r0!,{r1-r2}
|
||||
LDM r3!,{r1-r2}
|
||||
STM r0!,{r1-r2}
|
||||
SUB r0, r0, #32 ; Subtract 32 to get back to top of stack
|
||||
MSR PSP, r0 ; Set thread stack pointer
|
||||
SUB r0, r0, #32 ; Subtract 32 to get back to top of stack
|
||||
MSR PSP, r0 ; Set thread stack pointer
|
||||
|
||||
LDR r1, =_tx_thread_current_ptr ; Build current thread pointer address
|
||||
LDR r2, [r1] ; Pickup current thread pointer
|
||||
LDR r1, [r2, #0x9C] ; Pick up user mode
|
||||
|
||||
|
||||
_tx_skip_kernel_stack_exit
|
||||
MRS r0, CONTROL ; Pickup current CONTROL register
|
||||
ORR r0, r0, r1 ; OR in the user mode bit
|
||||
@@ -529,55 +519,25 @@ _tx_skip_kernel_stack_exit
|
||||
BX lr ; Return to thread
|
||||
;}
|
||||
|
||||
IF :DEF:__ARMVFP__
|
||||
AREA ||.text||, CODE, READONLY
|
||||
IF :DEF: __ARMVFP__
|
||||
EXPORT tx_thread_fpu_enable
|
||||
tx_thread_fpu_enable
|
||||
;
|
||||
; /* Automatic VPF logic is supported, this function is present only for
|
||||
; backward compatibility purposes and therefore simply returns. */
|
||||
;
|
||||
BX LR ; Return to caller
|
||||
|
||||
EXPORT tx_thread_fpu_disable
|
||||
tx_thread_fpu_disable
|
||||
;
|
||||
; /* Automatic VPF logic is supported, this function is present only for
|
||||
; /* Automatic VPF logic is supported, this function is present only for
|
||||
; backward compatibility purposes and therefore simply returns. */
|
||||
;
|
||||
BX LR ; Return to caller
|
||||
ENDIF
|
||||
|
||||
|
||||
IF :DEF: __ARMVFP__
|
||||
EXPORT tx_thread_fpu_disable
|
||||
tx_thread_fpu_disable
|
||||
;
|
||||
; /* Kernel entry function from user mode. */
|
||||
; /* Automatic VPF logic is supported, this function is present only for
|
||||
; backward compatibility purposes and therefore simply returns. */
|
||||
;
|
||||
IMPORT _txm_module_manager_kernel_dispatch
|
||||
;
|
||||
AREA ||.text||, CODE, READONLY, ALIGN=5
|
||||
THUMB
|
||||
;VOID _txm_module_manager_user_mode_entry(VOID)
|
||||
;{
|
||||
EXPORT _txm_module_manager_user_mode_entry
|
||||
_txm_module_manager_user_mode_entry
|
||||
SVC 1 ; Enter kernel
|
||||
_txm_module_priv
|
||||
; At this point, we are out of user mode. The original LR has been saved in the
|
||||
; thread control block. Simply call the kernel dispatch function.
|
||||
BL _txm_module_manager_kernel_dispatch
|
||||
|
||||
; Pickup the original LR value while still in privileged mode
|
||||
LDR r2, =_tx_thread_current_ptr ; Build current thread pointer address
|
||||
LDR r3, [r2] ; Pickup current thread pointer
|
||||
LDR lr, [r3, #0xA0] ; Pickup saved LR from original call
|
||||
|
||||
SVC 2 ; Exit kernel and return to user mode
|
||||
_txm_module_user_mode_exit
|
||||
BX lr ; Return to the caller
|
||||
NOP
|
||||
NOP
|
||||
NOP
|
||||
NOP
|
||||
;}
|
||||
BX LR ; Return to caller
|
||||
ENDIF
|
||||
|
||||
ALIGN 4
|
||||
END
|
||||
|
||||
@@ -2,6 +2,11 @@
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
@@ -21,8 +26,8 @@
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_stack_build Cortex-M4/AC5 */
|
||||
;/* 6.0.1 */
|
||||
;/* _tx_thread_stack_build Cortex-M7/AC5 */
|
||||
;/* 6.1 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
@@ -54,7 +59,7 @@
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
|
||||
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID))
|
||||
@@ -62,11 +67,11 @@
|
||||
EXPORT _tx_thread_stack_build
|
||||
_tx_thread_stack_build
|
||||
;
|
||||
;
|
||||
;
|
||||
; /* Build a fake interrupt frame. The form of the fake interrupt stack
|
||||
; on the Cortex-M4 should look like the following after it is built:
|
||||
;
|
||||
; Stack Top:
|
||||
; on the Cortex-M7 should look like the following after it is built:
|
||||
;
|
||||
; Stack Top:
|
||||
; LR Interrupted LR (LR at time of PENDSV)
|
||||
; r4 Initial value for r4
|
||||
; r5 Initial value for r5
|
||||
@@ -126,4 +131,3 @@ _tx_thread_stack_build
|
||||
BX lr ; Return to caller
|
||||
;}
|
||||
END
|
||||
|
||||
|
||||
@@ -2,6 +2,11 @@
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
@@ -15,24 +20,14 @@
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;#define TX_SOURCE_CODE
|
||||
;
|
||||
;
|
||||
;/* Include necessary system files. */
|
||||
;
|
||||
;#include "tx_api.h"
|
||||
;#include "tx_thread.h"
|
||||
;#include "tx_timer.h"
|
||||
;
|
||||
;
|
||||
;
|
||||
AREA ||.text||, CODE, READONLY
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_thread_system_return Cortex-M4/AC5 */
|
||||
;/* 6.0.1 */
|
||||
;/* _tx_thread_system_return Cortex-M7/AC5 */
|
||||
;/* 6.1 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
@@ -64,7 +59,7 @@
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
|
||||
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _tx_thread_system_return(VOID)
|
||||
@@ -72,9 +67,9 @@
|
||||
EXPORT _tx_thread_system_return
|
||||
_tx_thread_system_return
|
||||
;
|
||||
; /* Return to real scheduler via PendSV. Note that this routine is often
|
||||
; /* Return to real scheduler via PendSV. Note that this routine is often
|
||||
; replaced with in-line assembly in tx_port.h to improved performance. */
|
||||
;
|
||||
;
|
||||
MOV r0, #0x10000000 ; Load PENDSVSET bit
|
||||
MOV r1, #0xE000E000 ; Load NVIC base
|
||||
STR r0, [r1, #0xD04] ; Set PENDSVBIT in ICSR
|
||||
@@ -85,7 +80,6 @@ _tx_thread_system_return
|
||||
CPSIE i ; Enable interrupts
|
||||
MSR PRIMASK, r1 ; Restore original interrupt posture
|
||||
_isr_context
|
||||
BX lr ; Return to caller
|
||||
BX lr ; Return to caller
|
||||
;}
|
||||
END
|
||||
|
||||
END
|
||||
|
||||
@@ -2,6 +2,11 @@
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
@@ -15,17 +20,6 @@
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;#define TX_SOURCE_CODE
|
||||
;
|
||||
;
|
||||
;/* Include necessary system files. */
|
||||
;
|
||||
;#include "tx_api.h"
|
||||
;#include "tx_timer.h"
|
||||
;#include "tx_thread.h"
|
||||
;
|
||||
;
|
||||
;Define Assembly language external references...
|
||||
;
|
||||
IMPORT _tx_timer_time_slice
|
||||
IMPORT _tx_timer_system_clock
|
||||
@@ -47,8 +41,8 @@
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _tx_timer_interrupt Cortex-M4/AC5 */
|
||||
;/* 6.0.1 */
|
||||
;/* _tx_timer_interrupt Cortex-M7/AC5 */
|
||||
;/* 6.1 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* William E. Lamie, Microsoft Corporation */
|
||||
@@ -82,7 +76,7 @@
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
|
||||
;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _tx_timer_interrupt(VOID)
|
||||
@@ -106,7 +100,7 @@ _tx_timer_interrupt
|
||||
; if (_tx_timer_time_slice)
|
||||
; {
|
||||
;
|
||||
MOV32 r3, _tx_timer_time_slice ; Pickup address of time-slice
|
||||
MOV32 r3, _tx_timer_time_slice ; Pickup address of time-slice
|
||||
LDR r2, [r3, #0] ; Pickup time-slice
|
||||
CBZ r2, __tx_timer_no_time_slice ; Is it non-active?
|
||||
; Yes, skip time-slice processing
|
||||
@@ -223,13 +217,13 @@ __tx_timer_dont_activate
|
||||
; if (_tx_timer_expired_time_slice)
|
||||
; {
|
||||
;
|
||||
MOV32 r3, _tx_timer_expired_time_slice ; Pickup addr of time-slice expired
|
||||
MOV32 r3, _tx_timer_expired_time_slice ; Pickup addr of time-slice expired
|
||||
LDR r2, [r3, #0] ; Pickup the actual flag
|
||||
CBZ r2, __tx_timer_not_ts_expiration ; See if the flag is set
|
||||
; No, skip time-slice processing
|
||||
;
|
||||
; /* Time slice interrupted thread. */
|
||||
; _tx_thread_time_slice();
|
||||
; _tx_thread_time_slice();
|
||||
|
||||
BL _tx_thread_time_slice ; Call time-slice processing
|
||||
MOV32 r0, _tx_thread_preempt_disable ; Build address of preempt disable flag
|
||||
@@ -263,4 +257,3 @@ __tx_timer_nothing_expired
|
||||
ALIGN
|
||||
LTORG
|
||||
END
|
||||
|
||||
|
||||
@@ -10,15 +10,15 @@
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Module Manager */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Module Manager */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
#define TX_SOURCE_CODE
|
||||
|
||||
@@ -26,42 +26,42 @@
|
||||
#include "txm_module.h"
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_power_of_two_block_size Cortex-M7/MPU/AC5 */
|
||||
/* 6.0.1 */
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_power_of_two_block_size Cortex-M7/MPU/AC5 */
|
||||
/* 6.1 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function calculates a power of two size at or immediately above*/
|
||||
/* the input size and returns it to the caller. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* size Block size */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* calculated size Rounded up to power of two */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* _txm_module_manager_alignment_adjust Adjust alignment for Cortex-M */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function calculates a power of two size at or immediately above*/
|
||||
/* the input size and returns it to the caller. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* size Block size */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* calculated size Rounded up to power of two */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* _txm_module_manager_alignment_adjust Adjust alignment for Cortex-M */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 06-30-2020 Scott Larson Initial Version 6.0.1 */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
ULONG _txm_power_of_two_block_size(ULONG size)
|
||||
@@ -89,52 +89,52 @@ ULONG _txm_power_of_two_block_size(ULONG size)
|
||||
}
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_alignment_adjust Cortex-M7/MPU/AC5 */
|
||||
/* 6.0.1 */
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_alignment_adjust Cortex-M7/MPU/AC5 */
|
||||
/* 6.1 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function adjusts the alignment and size of the code and data */
|
||||
/* section for a given module implementation. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* module_preamble Pointer to module preamble */
|
||||
/* code_size Size of the code area (updated) */
|
||||
/* code_alignment Code area alignment (updated) */
|
||||
/* data_size Size of data area (updated) */
|
||||
/* data_alignment Data area alignment (updated) */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* _txm_power_of_two_block_size Calculate power of two size */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Initial thread stack frame */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function adjusts the alignment and size of the code and data */
|
||||
/* section for a given module implementation. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* module_preamble Pointer to module preamble */
|
||||
/* code_size Size of the code area (updated) */
|
||||
/* code_alignment Code area alignment (updated) */
|
||||
/* data_size Size of data area (updated) */
|
||||
/* data_alignment Data area alignment (updated) */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* _txm_power_of_two_block_size Calculate power of two size */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Initial thread stack frame */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 06-30-2020 Scott Larson Initial Version 6.0.1 */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
VOID _txm_module_manager_alignment_adjust(TXM_MODULE_PREAMBLE *module_preamble,
|
||||
ULONG *code_size,
|
||||
ULONG *code_alignment,
|
||||
ULONG *data_size,
|
||||
VOID _txm_module_manager_alignment_adjust(TXM_MODULE_PREAMBLE *module_preamble,
|
||||
ULONG *code_size,
|
||||
ULONG *code_alignment,
|
||||
ULONG *data_size,
|
||||
ULONG *data_alignment)
|
||||
{
|
||||
|
||||
@@ -178,11 +178,8 @@ ULONG data_size_accum;
|
||||
local_data_size = data_size_accum;
|
||||
|
||||
/* Return all the information to the caller. */
|
||||
*code_size = local_code_size;
|
||||
*code_size = local_code_size;
|
||||
*code_alignment = local_code_alignment;
|
||||
*data_size = local_data_size;
|
||||
*data_alignment = local_data_alignment;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -10,15 +10,15 @@
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Module Manager */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Module Manager */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
#define TX_SOURCE_CODE
|
||||
|
||||
@@ -29,52 +29,52 @@
|
||||
#include "txm_module.h"
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_external_memory_enable Cortex-M7/MPU/AC5 */
|
||||
/* 6.0.1 */
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_external_memory_enable Cortex-M7/MPU/AC5 */
|
||||
/* 6.1 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function creates an entry in the MPU table for a shared */
|
||||
/* memory space. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* module_instance Module instance pointer */
|
||||
/* start_address Start address of memory */
|
||||
/* length Length of external memory */
|
||||
/* attributes Memory attributes (r/w) */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* status Completion status */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* _tx_mutex_get Get protection mutex */
|
||||
/* _tx_mutex_put Release protection mutex */
|
||||
/* _txm_power_of_two_block_size Round length to power of two */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Application code */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function creates an entry in the MPU table for a shared */
|
||||
/* memory space. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* module_instance Module instance pointer */
|
||||
/* start_address Start address of memory */
|
||||
/* length Length of external memory */
|
||||
/* attributes Memory attributes (r/w) */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* status Completion status */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* _tx_mutex_get Get protection mutex */
|
||||
/* _tx_mutex_put Release protection mutex */
|
||||
/* _txm_power_of_two_block_size Round length to power of two */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Application code */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 06-30-2020 Scott Larson Initial Version 6.0.1 */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
UINT _txm_module_manager_external_memory_enable(TXM_MODULE_INSTANCE *module_instance,
|
||||
VOID *start_address,
|
||||
ULONG length,
|
||||
UINT _txm_module_manager_external_memory_enable(TXM_MODULE_INSTANCE *module_instance,
|
||||
VOID *start_address,
|
||||
ULONG length,
|
||||
UINT attributes)
|
||||
{
|
||||
|
||||
@@ -86,18 +86,16 @@ ULONG address;
|
||||
ULONG shared_index;
|
||||
ULONG attributes_check = 0;
|
||||
|
||||
/* Determine if the module manager has been initialized. */
|
||||
/* Determine if the module manager has not been initialized yet. */
|
||||
if (_txm_module_manager_ready != TX_TRUE)
|
||||
{
|
||||
|
||||
/* Module manager has not been initialized. */
|
||||
return(TX_NOT_AVAILABLE);
|
||||
return(TX_NOT_AVAILABLE);
|
||||
}
|
||||
|
||||
/* Determine if the module is valid. */
|
||||
if (module_instance == TX_NULL)
|
||||
{
|
||||
|
||||
/* Invalid module pointer. */
|
||||
return(TX_PTR_ERROR);
|
||||
}
|
||||
@@ -108,7 +106,6 @@ ULONG attributes_check = 0;
|
||||
/* Determine if the module instance is valid. */
|
||||
if (module_instance -> txm_module_instance_id != TXM_MODULE_ID)
|
||||
{
|
||||
|
||||
/* Release the protection mutex. */
|
||||
_tx_mutex_put(&_txm_module_manager_mutex);
|
||||
|
||||
@@ -119,7 +116,6 @@ ULONG attributes_check = 0;
|
||||
/* Determine if the module instance is in the loaded state. */
|
||||
if (module_instance -> txm_module_instance_state != TXM_MODULE_LOADED)
|
||||
{
|
||||
|
||||
/* Release the protection mutex. */
|
||||
_tx_mutex_put(&_txm_module_manager_mutex);
|
||||
|
||||
@@ -130,7 +126,6 @@ ULONG attributes_check = 0;
|
||||
/* Determine if there are shared memory entries available. */
|
||||
if(module_instance -> txm_module_instance_shared_memory_count >= TXM_MODULE_MPU_SHARED_ENTRIES)
|
||||
{
|
||||
|
||||
/* Release the protection mutex. */
|
||||
_tx_mutex_put(&_txm_module_manager_mutex);
|
||||
|
||||
@@ -138,7 +133,7 @@ ULONG attributes_check = 0;
|
||||
return(TX_NO_MEMORY);
|
||||
}
|
||||
|
||||
/* Start address and length must adhere to Cortex-M7 MPU.
|
||||
/* Start address and length must adhere to Cortex-M7 MPU.
|
||||
The address must align with the block size. */
|
||||
|
||||
block_size = _txm_power_of_two_block_size(length);
|
||||
@@ -192,4 +187,3 @@ ULONG attributes_check = 0;
|
||||
/* Return success. */
|
||||
return(TX_SUCCESS);
|
||||
}
|
||||
|
||||
|
||||
@@ -10,15 +10,15 @@
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Module Manager */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Module Manager */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
#define TX_SOURCE_CODE
|
||||
|
||||
@@ -33,50 +33,50 @@
|
||||
VOID (*_txm_module_manager_fault_notify)(TX_THREAD *, TXM_MODULE_INSTANCE *);
|
||||
|
||||
|
||||
/* Define a macro that can be used to allocate global variables useful to
|
||||
store information about the last fault. This macro is defined in
|
||||
/* Define a macro that can be used to allocate global variables useful to
|
||||
store information about the last fault. This macro is defined in
|
||||
txm_module_port.h and is usually populated in the assembly language
|
||||
fault handling prior to the code calling _txm_module_manager_memory_fault_handler. */
|
||||
|
||||
TXM_MODULE_MANAGER_FAULT_INFO
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_memory_fault_handler Cortex-M7/MPU/AC5 */
|
||||
/* 6.0.1 */
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_memory_fault_handler Cortex-M7/MPU/AC5 */
|
||||
/* 6.1 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function handles a fault associated with a memory protected */
|
||||
/* module. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* _tx_thread_terminate Terminate thread */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Fault handler */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function handles a fault associated with a memory protected */
|
||||
/* module. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* _tx_thread_terminate Terminate thread */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Fault handler */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 06-30-2020 Scott Larson Initial Version 6.0.1 */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
VOID _txm_module_manager_memory_fault_handler(VOID)
|
||||
@@ -85,7 +85,6 @@ VOID _txm_module_manager_memory_fault_handler(VOID)
|
||||
TXM_MODULE_INSTANCE *module_instance_ptr;
|
||||
TX_THREAD *thread_ptr;
|
||||
|
||||
|
||||
/* Pickup the current thread. */
|
||||
thread_ptr = _tx_thread_current_ptr;
|
||||
|
||||
@@ -95,7 +94,6 @@ TX_THREAD *thread_ptr;
|
||||
/* Is there a thread? */
|
||||
if (thread_ptr)
|
||||
{
|
||||
|
||||
/* Pickup the module instance. */
|
||||
module_instance_ptr = thread_ptr -> tx_thread_module_instance_ptr;
|
||||
|
||||
@@ -106,9 +104,7 @@ TX_THREAD *thread_ptr;
|
||||
/* Determine if there is a user memory fault notification callback. */
|
||||
if (_txm_module_manager_fault_notify)
|
||||
{
|
||||
|
||||
/* Yes, call the user's notification memory fault callback. */
|
||||
(_txm_module_manager_fault_notify)(thread_ptr, module_instance_ptr);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -10,15 +10,15 @@
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Module Manager */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Module Manager */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
#define TX_SOURCE_CODE
|
||||
|
||||
@@ -34,53 +34,51 @@ extern VOID (*_txm_module_manager_fault_notify)(TX_THREAD *, TXM_MODULE_INSTA
|
||||
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_memory_fault_notify Cortex-M7/MPU/AC5 */
|
||||
/* 6.0.1 */
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_memory_fault_notify Cortex-M7/MPU/AC5 */
|
||||
/* 6.1 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function registers an application callback when/if a memory */
|
||||
/* fault occurs. The supplied thread is automatically terminated, but */
|
||||
/* any other threads in the same module may still execute. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* notify_function Memory fault notification */
|
||||
/* function, NULL disables. */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* status Completion status */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Application Code */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function registers an application callback when/if a memory */
|
||||
/* fault occurs. The supplied thread is automatically terminated, but */
|
||||
/* any other threads in the same module may still execute. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* notify_function Memory fault notification */
|
||||
/* function, NULL disables. */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* status Completion status */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Application Code */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 06-30-2020 Scott Larson Initial Version 6.0.1 */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
UINT _txm_module_manager_memory_fault_notify(VOID (*notify_function)(TX_THREAD *, TXM_MODULE_INSTANCE *))
|
||||
{
|
||||
|
||||
/* Setup notification function. */
|
||||
_txm_module_manager_fault_notify = notify_function;
|
||||
|
||||
/* Return success. */
|
||||
return(TX_SUCCESS);
|
||||
}
|
||||
|
||||
|
||||
@@ -10,59 +10,58 @@
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Module Manager */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Module Manager */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
#define TX_SOURCE_CODE
|
||||
|
||||
#include "tx_api.h"
|
||||
#include "txm_module.h"
|
||||
#include "txm_module_manager_util.h"
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_region_size_get Cortex-M7/MPU/AC5 */
|
||||
/* 6.0.1 */
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_region_size_get Cortex-M7/MPU/AC5 */
|
||||
/* 6.1 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function converts the region size in bytes to the block size */
|
||||
/* for the Cortex-M7 MPU specification. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* block_size Size of the block in bytes */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* MPU size specification */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* _txm_module_manager_mm_register_setup */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function converts the region size in bytes to the block size */
|
||||
/* for the Cortex-M7 MPU specification. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* block_size Size of the block in bytes */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* MPU size specification */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* _txm_module_manager_mm_register_setup */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 06-30-2020 Scott Larson Initial Version 6.0.1 */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
ULONG _txm_module_manager_region_size_get(ULONG block_size)
|
||||
@@ -70,7 +69,6 @@ ULONG _txm_module_manager_region_size_get(ULONG block_size)
|
||||
|
||||
ULONG return_value;
|
||||
|
||||
|
||||
/* Process relative to the input block size. */
|
||||
if (block_size == 32)
|
||||
{
|
||||
@@ -140,7 +138,7 @@ ULONG return_value;
|
||||
{
|
||||
return_value = 0x14;
|
||||
}
|
||||
else
|
||||
else
|
||||
{
|
||||
/* Max 4MB MPU pages for modules. */
|
||||
return_value = 0x15;
|
||||
@@ -150,45 +148,43 @@ ULONG return_value;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_calculate_srd_bits Cortex-M7/MPU/AC5 */
|
||||
/* 6.0.1 */
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_calculate_srd_bits Cortex-M7/MPU/AC5 */
|
||||
/* 6.1 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function calculates the SRD bits that need to be set to */
|
||||
/* protect "length" bytes in a block. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* block_size Size of the block in bytes */
|
||||
/* length Actual length in bytes */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* SRD bits to be OR'ed with region attribute register. */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* _txm_module_manager_mm_register_setup */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function calculates the SRD bits that need to be set to */
|
||||
/* protect "length" bytes in a block. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* block_size Size of the block in bytes */
|
||||
/* length Actual length in bytes */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* SRD bits to be OR'ed with region attribute register. */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* _txm_module_manager_mm_register_setup */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 06-30-2020 Scott Larson Initial Version 6.0.1 */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
ULONG _txm_module_manager_calculate_srd_bits(ULONG block_size, ULONG length)
|
||||
@@ -230,62 +226,61 @@ UINT srd_bit_index;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_mm_register_setup Cortex-M7/MPU/AC5 */
|
||||
/* 6.0.1 */
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_mm_register_setup Cortex-M7/MPU/AC5 */
|
||||
/* 6.1 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function sets up the MPU register definitions based on the */
|
||||
/* module's memory characteristics. */
|
||||
/* MPU layout for the Cortex-M7: */
|
||||
/* Entry Description */
|
||||
/* 0 Kernel mode entry */
|
||||
/* 1 Module code region */
|
||||
/* 2 Module code region */
|
||||
/* 3 Module code region */
|
||||
/* 4 Module code region */
|
||||
/* 5 Module data region */
|
||||
/* 6 Module data region */
|
||||
/* 7 Module data region */
|
||||
/* 8 Module data region */
|
||||
/* 9 Module shared memory region */
|
||||
/* 10 Module shared memory region */
|
||||
/* 11 Module shared memory region */
|
||||
/* 12 Unused region */
|
||||
/* 13 Unused region */
|
||||
/* 14 Unused region */
|
||||
/* 15 Unused region */
|
||||
/* */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* module_instance Pointer to module instance */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* MPU specifications for module in module_instance */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* _txm_module_manager_region_size_get */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* _txm_module_manager_thread_create */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function sets up the MPU register definitions based on the */
|
||||
/* module's memory characteristics. */
|
||||
/* MPU layout for the Cortex-M7: */
|
||||
/* Entry Description */
|
||||
/* 0 Kernel mode entry */
|
||||
/* 1 Module code region */
|
||||
/* 2 Module code region */
|
||||
/* 3 Module code region */
|
||||
/* 4 Module code region */
|
||||
/* 5 Module data region */
|
||||
/* 6 Module data region */
|
||||
/* 7 Module data region */
|
||||
/* 8 Module data region */
|
||||
/* 9 Module shared memory region */
|
||||
/* 10 Module shared memory region */
|
||||
/* 11 Module shared memory region */
|
||||
/* 12 Unused region */
|
||||
/* 13 Unused region */
|
||||
/* 14 Unused region */
|
||||
/* 15 Unused region */
|
||||
/* */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* module_instance Pointer to module instance */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* MPU specifications for module in module_instance */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* _txm_module_manager_region_size_get */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* _txm_module_manager_thread_create */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 06-30-2020 Scott Larson Initial Version 6.0.1 */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
VOID _txm_module_manager_mm_register_setup(TXM_MODULE_INSTANCE *module_instance)
|
||||
@@ -305,7 +300,7 @@ UINT i;
|
||||
|
||||
|
||||
/* Setup the first MPU region for kernel mode entry. */
|
||||
/* Set address register to user mode entry function address, which is guaranteed to be at least 32-byte aligned.
|
||||
/* Set address register to user mode entry function address, which is guaranteed to be at least 32-byte aligned.
|
||||
Mask address to proper range, region 0, set Valid bit. */
|
||||
module_instance -> txm_module_instance_mpu_registers[TXM_MODULE_MPU_KERNEL_ENTRY_INDEX].txm_module_mpu_region_address = ((ULONG) _txm_module_manager_user_mode_entry & 0xFFFFFFE0) | 0x10;
|
||||
/* Set the attributes, size (32 bytes) and enable bit. */
|
||||
@@ -378,7 +373,7 @@ UINT i;
|
||||
srd_bits = 0;
|
||||
|
||||
/* Pickup data starting address and actual size. */
|
||||
data_address = (ULONG) module_instance -> txm_module_instance_data_start;
|
||||
data_address = (ULONG) module_instance -> txm_module_instance_data_start;
|
||||
|
||||
/* Adjust the size of the module elements to be aligned to the default alignment. We do this
|
||||
so that when we partition the allocated memory, we can simply place these regions right beside
|
||||
@@ -460,48 +455,48 @@ UINT i;
|
||||
|
||||
}
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_shared_memory_check_outside */
|
||||
/* Cortex-M7/MPU/AC5 */
|
||||
/* 6.0.1 */
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_inside_data_check Cortex-M7/MPU/AC5 */
|
||||
/* 6.1 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function checks if the specified object is outside shared */
|
||||
/* memory. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* module_instance Pointer to module instance */
|
||||
/* obj_ptr Pointer to the object */
|
||||
/* obj_size Size of the object */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* Whether the object is outside the shared memory region. */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* N/A */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Module dispatch check functions */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function checks if the specified object is inside shared */
|
||||
/* memory. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* module_instance Pointer to module instance */
|
||||
/* obj_ptr Pointer to the object */
|
||||
/* obj_size Size of the object */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* Whether the object is inside the shared memory region. */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Module dispatch check functions */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 06-30-2020 Scott Larson Initial Version 6.0.1 */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
UCHAR _txm_module_manager_shared_memory_check_outside(TXM_MODULE_INSTANCE *module_instance, ALIGN_TYPE obj_ptr, UINT obj_size)
|
||||
UINT _txm_module_manager_inside_data_check(TXM_MODULE_INSTANCE *module_instance, ALIGN_TYPE obj_ptr, UINT obj_size)
|
||||
{
|
||||
|
||||
UINT shared_memory_index;
|
||||
@@ -509,71 +504,14 @@ UINT num_shared_memory_mpu_entries;
|
||||
ALIGN_TYPE shared_memory_address_start;
|
||||
ALIGN_TYPE shared_memory_address_end;
|
||||
|
||||
num_shared_memory_mpu_entries = module_instance -> txm_module_instance_shared_memory_count;
|
||||
for (shared_memory_index = 0; shared_memory_index < num_shared_memory_mpu_entries; shared_memory_index++)
|
||||
/* Check if the object is inside the module data. */
|
||||
if ((obj_ptr >= (ALIGN_TYPE) module_instance -> txm_module_instance_data_start) &&
|
||||
((obj_ptr + obj_size) <= ((ALIGN_TYPE) module_instance -> txm_module_instance_data_end + 1)))
|
||||
{
|
||||
|
||||
shared_memory_address_start = (ALIGN_TYPE) module_instance -> txm_module_instance_shared_memory_address[shared_memory_index];
|
||||
shared_memory_address_end = shared_memory_address_start + module_instance -> txm_module_instance_shared_memory_length[shared_memory_index];
|
||||
|
||||
if (TXM_MODULE_MANAGER_CHECK_INSIDE_RANGE_EXCLUSIVE(shared_memory_address_start, shared_memory_address_end,
|
||||
obj_ptr, obj_size))
|
||||
{
|
||||
return(TX_FALSE);
|
||||
}
|
||||
return(TX_TRUE);
|
||||
}
|
||||
|
||||
return(TX_TRUE);
|
||||
}
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_shared_memory_check_inside Cortex-M7/MPU/AC5 */
|
||||
/* 6.0.1 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function checks if the specified object is inside shared */
|
||||
/* memory. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* module_instance Pointer to module instance */
|
||||
/* obj_ptr Pointer to the object */
|
||||
/* obj_size Size of the object */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* Whether the object is inside the shared memory region. */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* N/A */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Module dispatch check functions */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 06-30-2020 Scott Larson Initial Version 6.0.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
UCHAR _txm_module_manager_shared_memory_check_inside(TXM_MODULE_INSTANCE *module_instance, ALIGN_TYPE obj_ptr, UINT obj_size)
|
||||
{
|
||||
|
||||
UINT shared_memory_index;
|
||||
UINT num_shared_memory_mpu_entries;
|
||||
ALIGN_TYPE shared_memory_address_start;
|
||||
ALIGN_TYPE shared_memory_address_end;
|
||||
|
||||
/* Check if the object is inside the shared memory. */
|
||||
num_shared_memory_mpu_entries = module_instance -> txm_module_instance_shared_memory_count;
|
||||
for (shared_memory_index = 0; shared_memory_index < num_shared_memory_mpu_entries; shared_memory_index++)
|
||||
{
|
||||
@@ -581,72 +519,8 @@ ALIGN_TYPE shared_memory_address_end;
|
||||
shared_memory_address_start = (ALIGN_TYPE) module_instance -> txm_module_instance_shared_memory_address[shared_memory_index];
|
||||
shared_memory_address_end = shared_memory_address_start + module_instance -> txm_module_instance_shared_memory_length[shared_memory_index];
|
||||
|
||||
if (TXM_MODULE_MANAGER_CHECK_INSIDE_RANGE_EXCLUSIVE(shared_memory_address_start, shared_memory_address_end,
|
||||
obj_ptr, obj_size))
|
||||
{
|
||||
return(TX_TRUE);
|
||||
}
|
||||
}
|
||||
|
||||
return(TX_FALSE);
|
||||
}
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_shared_memory_check_inside_byte */
|
||||
/* Cortex-M7/MPU/AC5 */
|
||||
/* 6.0.1 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function checks if the specified byte is inside shared memory. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* module_instance Pointer to module instance */
|
||||
/* byte_ptr Pointer to the byte */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* Whether the byte is inside the shared memory region. */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* N/A */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Module dispatch check functions */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 06-30-2020 Scott Larson Initial Version 6.0.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
UCHAR _txm_module_manager_shared_memory_check_inside_byte(TXM_MODULE_INSTANCE *module_instance, ALIGN_TYPE byte_ptr)
|
||||
{
|
||||
|
||||
UINT shared_memory_index;
|
||||
UINT num_shared_memory_mpu_entries;
|
||||
ALIGN_TYPE shared_memory_address_start;
|
||||
ALIGN_TYPE shared_memory_address_end;
|
||||
|
||||
num_shared_memory_mpu_entries = module_instance -> txm_module_instance_shared_memory_count;
|
||||
for (shared_memory_index = 0; shared_memory_index < num_shared_memory_mpu_entries; shared_memory_index++)
|
||||
{
|
||||
|
||||
shared_memory_address_start = (ALIGN_TYPE) module_instance -> txm_module_instance_shared_memory_address[shared_memory_index];
|
||||
shared_memory_address_end = shared_memory_address_start + module_instance -> txm_module_instance_shared_memory_length[shared_memory_index];
|
||||
|
||||
if (TXM_MODULE_MANAGER_CHECK_INSIDE_RANGE_EXCLUSIVE_BYTE(shared_memory_address_start, shared_memory_address_end,
|
||||
byte_ptr))
|
||||
if ((obj_ptr >= (ALIGN_TYPE) shared_memory_address_start) &&
|
||||
((obj_ptr + obj_size) <= (ALIGN_TYPE) shared_memory_address_end))
|
||||
{
|
||||
return(TX_TRUE);
|
||||
}
|
||||
|
||||
@@ -10,66 +10,57 @@
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Module Manager */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Module Manager */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;#define TX_SOURCE_CODE
|
||||
;
|
||||
;
|
||||
;/* Include necessary system files. */
|
||||
;
|
||||
;#include "tx_api.h"
|
||||
;#include "tx_thread.h"
|
||||
;
|
||||
;
|
||||
AREA ||.text||, CODE, READONLY
|
||||
THUMB
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _txm_module_manager_thread_stack_build Cortex-M7/MPU/AC5 */
|
||||
;/* 6.0.1 */
|
||||
AREA ||.text||, CODE, READONLY
|
||||
THUMB
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _txm_module_manager_thread_stack_build Cortex-M7/MPU/AC5 */
|
||||
;/* 6.1 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* Scott Larson, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function builds a stack frame on the supplied thread's stack. */
|
||||
;/* The stack frame results in a fake interrupt return to the supplied */
|
||||
;/* function pointer. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* thread_ptr Pointer to thread */
|
||||
;/* function_ptr Pointer to shell function */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* _tx_thread_create Create thread service */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function builds a stack frame on the supplied thread's stack. */
|
||||
;/* The stack frame results in a fake interrupt return to the supplied */
|
||||
;/* function pointer. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* thread_ptr Pointer to thread */
|
||||
;/* function_ptr Pointer to shell function */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* _tx_thread_create Create thread service */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 06-30-2020 Scott Larson Initial Version 6.0.1 */
|
||||
;/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;VOID _txm_module_manager_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(TX_THREAD *, TXM_MODULE_INSTANCE *))
|
||||
@@ -77,11 +68,11 @@
|
||||
EXPORT _txm_module_manager_thread_stack_build
|
||||
_txm_module_manager_thread_stack_build
|
||||
;
|
||||
;
|
||||
;
|
||||
; /* Build a fake interrupt frame. The form of the fake interrupt stack
|
||||
; on the Cortex-M should look like the following after it is built:
|
||||
;
|
||||
; Stack Top:
|
||||
;
|
||||
; Stack Top:
|
||||
; LR Interrupted LR (LR at time of PENDSV)
|
||||
; r4 Initial value for r4
|
||||
; r5 Initial value for r5
|
||||
@@ -89,7 +80,7 @@ _txm_module_manager_thread_stack_build
|
||||
; r7 Initial value for r7
|
||||
; r8 Initial value for r8
|
||||
; r9 Initial value for r9
|
||||
; r10 (sl) Initial value for r10 (sl)
|
||||
; r10 Initial value for r10
|
||||
; r11 Initial value for r11
|
||||
; r0 Initial value for r0 (Hardware stack starts here!!)
|
||||
; r1 Initial value for r1
|
||||
@@ -116,17 +107,15 @@ _txm_module_manager_thread_stack_build
|
||||
STR r3, [r2, #12] ; Store initial r6
|
||||
STR r3, [r2, #16] ; Store initial r7
|
||||
STR r3, [r2, #20] ; Store initial r8
|
||||
LDR r3, [r0, #12] ; Pickup stack starting address
|
||||
STR r3, [r2, #28] ; Store initial r10 (sl)
|
||||
MOV r3, #0 ; Build initial register value
|
||||
STR r3, [r2, #28] ; Store initial r10
|
||||
STR r3, [r2, #32] ; Store initial r11
|
||||
;
|
||||
; /* Hardware stack follows. /
|
||||
; /* Hardware stack follows. */
|
||||
;
|
||||
STR r0, [r2, #36] ; Store initial r0, which is the thread control block
|
||||
|
||||
LDR r3, [r0, #8] ; Pickup thread entry info pointer,which is in the stack pointer position of the thread control block.
|
||||
; It was setup in the txm_module_manager_thread_create function. It will be overwritten later in this
|
||||
; It was setup in the txm_module_manager_thread_create function. It will be overwritten later in this
|
||||
; function with the actual, initial stack pointer.
|
||||
STR r3, [r2, #40] ; Store initial r1, which is the module entry information.
|
||||
LDR r3, [r3, #8] ; Pickup data base register from the module information
|
||||
@@ -145,8 +134,7 @@ _txm_module_manager_thread_stack_build
|
||||
; /* Setup stack pointer. */
|
||||
; thread_ptr -> tx_thread_stack_ptr = r2;
|
||||
;
|
||||
STR r2, [r0, #8] ; Save stack pointer in thread's
|
||||
; control block
|
||||
STR r2, [r0, #8] ; Save stack pointer in thread's control block
|
||||
BX lr ; Return to caller
|
||||
;}
|
||||
END
|
||||
|
||||
@@ -0,0 +1,88 @@
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
;/* */
|
||||
;/* This software is licensed under the Microsoft Software License */
|
||||
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
;/* and in the root directory of this software. */
|
||||
;/* */
|
||||
;/**************************************************************************/
|
||||
;
|
||||
;
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;/** */
|
||||
;/** ThreadX Component */
|
||||
;/** */
|
||||
;/** Module Manager */
|
||||
;/** */
|
||||
;/**************************************************************************/
|
||||
;/**************************************************************************/
|
||||
;
|
||||
IMPORT _txm_module_manager_kernel_dispatch
|
||||
IMPORT _tx_thread_current_ptr
|
||||
;
|
||||
AREA ||.text||, CODE, READONLY, ALIGN=5
|
||||
THUMB
|
||||
;/**************************************************************************/
|
||||
;/* */
|
||||
;/* FUNCTION RELEASE */
|
||||
;/* */
|
||||
;/* _txm_module_manager_user_mode_entry Cortex-M7/MPU/AC5 */
|
||||
;/* 6.1 */
|
||||
;/* AUTHOR */
|
||||
;/* */
|
||||
;/* Scott Larson, Microsoft Corporation */
|
||||
;/* */
|
||||
;/* DESCRIPTION */
|
||||
;/* */
|
||||
;/* This function allows modules to enter kernel mode. */
|
||||
;/* */
|
||||
;/* INPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* OUTPUT */
|
||||
;/* */
|
||||
;/* None */
|
||||
;/* */
|
||||
;/* CALLS */
|
||||
;/* */
|
||||
;/* SVC 1 Enter kernel mode */
|
||||
;/* SVC 2 Exit kernel mode */
|
||||
;/* */
|
||||
;/* CALLED BY */
|
||||
;/* */
|
||||
;/* Modules in user mode */
|
||||
;/* */
|
||||
;/* RELEASE HISTORY */
|
||||
;/* */
|
||||
;/* DATE NAME DESCRIPTION */
|
||||
;/* */
|
||||
;/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
;/* */
|
||||
;/**************************************************************************/;
|
||||
;VOID _txm_module_manager_user_mode_entry(VOID)
|
||||
;{
|
||||
EXPORT _txm_module_manager_user_mode_entry
|
||||
_txm_module_manager_user_mode_entry
|
||||
SVC 1 ; Enter kernel
|
||||
EXPORT _txm_module_priv
|
||||
_txm_module_priv
|
||||
; At this point, we are out of user mode. The original LR has been saved in the
|
||||
; thread control block. Simply call the kernel dispatch function.
|
||||
BL _txm_module_manager_kernel_dispatch
|
||||
|
||||
; Pickup the original LR value while still in privileged mode
|
||||
LDR r2, =_tx_thread_current_ptr ; Build current thread pointer address
|
||||
LDR r3, [r2] ; Pickup current thread pointer
|
||||
LDR lr, [r3, #0xA0] ; Pickup saved LR from original call
|
||||
|
||||
SVC 2 ; Exit kernel and return to user mode
|
||||
EXPORT _txm_module_user_mode_exit
|
||||
_txm_module_user_mode_exit
|
||||
BX lr ; Return to the caller
|
||||
;}
|
||||
ALIGN 32
|
||||
END
|
||||
Reference in New Issue
Block a user