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updated to 6.0.1 and added additional processors/toolchains

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tameraw
2020-07-16 14:32:40 -07:00
parent f8e91d4762
commit 2c35570dc9
1285 changed files with 550383 additions and 50 deletions
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14
ports/c667x/ccs/example_build/sample_threadx_c6678evm/.ccsproject Normal file
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167
ports/c667x/ccs/example_build/sample_threadx_c6678evm/.cproject Normal file
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89
ports/c667x/ccs/example_build/sample_threadx_c6678evm/.project Normal file
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<key>org.eclipse.cdt.make.core.enableAutoBuild</key>
<value>true</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.enableCleanBuild</key>
<value>true</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.enableFullBuild</key>
<value>true</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.fullBuildTarget</key>
<value>all</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.stopOnError</key>
<value>false</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>
<value>true</value>
</dictionary>
</arguments>
</buildCommand>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
<triggers>full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
</buildSpec>
<natures>
<nature>com.ti.ccstudio.core.ccsNature</nature>
<nature>org.eclipse.cdt.core.cnature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
<nature>org.eclipse.cdt.core.ccnature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
</natures>
<variableList>
<variable>
<name>ORIGINAL_PROJECT_ROOT</name>
<value>file:/C:/release/threadx/sample_threadx_c6678evm</value>
</variable>
</variableList>
</projectDescription>

3
ports/c667x/ccs/example_build/sample_threadx_c6678evm/.settings/org.eclipse.cdt.codan.core.prefs Normal file
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@@ -0,0 +1,3 @@
eclipse.preferences.version=1
inEditor=false
onBuild=false

2
ports/c667x/ccs/example_build/sample_threadx_c6678evm/.settings/org.eclipse.cdt.debug.core.prefs Normal file
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@@ -0,0 +1,2 @@
eclipse.preferences.version=1
org.eclipse.cdt.debug.core.toggleBreakpointModel=com.ti.ccstudio.debug.CCSBreakpointMarker

6
ports/c667x/ccs/example_build/sample_threadx_c6678evm/.settings/org.eclipse.core.resources.prefs Normal file
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@@ -0,0 +1,6 @@
eclipse.preferences.version=1
encoding//Debug/makefile=UTF-8
encoding//Debug/objects.mk=UTF-8
encoding//Debug/sources.mk=UTF-8
encoding//Debug/subdir_rules.mk=UTF-8
encoding//Debug/subdir_vars.mk=UTF-8

441
ports/c667x/ccs/example_build/sample_threadx_c6678evm/board_setup.c Normal file
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/*
* board_setup.c
*
*/
#include "board_setup.h"
#include "C66XX.h"
#include <string.h>
//=============================================================================
//============ General definitions ============================================
//=============================================================================
// DSP Timer-8 definition
#define C66XX_DSP_TIMER C66XX_TIMER_8
// DSP Timer-8 output frequency in Hz
#define C66XX_DSP_TIMER_FREQ 100
/* DSP Timer-8 interrupt event ID */
#define C66XX_DSP_TIMER_EVENT_ID 67
//=============================================================================
//=============================================================================
//============ Global functions ===============================================
//=============================================================================
void _tx_nmi_vector(void);
void _tx_int4_vector(void);
void _tx_int5_vector(void);
void _tx_int6_vector(void);
void _tx_int7_vector(void);
void _tx_int8_vector(void);
void _tx_int9_vector(void);
void _tx_int10_vector(void);
void _tx_int11_vector(void);
void _tx_int12_vector(void);
void _tx_int13_vector(void);
void _tx_int14_vector(void);
void _tx_int15_vector(void);
//=============================================================================
//=============================================================================
//============ Static functions ===============================================
//=============================================================================
static int32_t tx_timer_init(C66XX_TIMER timer, uint32_t frequency);
static int32_t tx_interrupt_init(void);
//=============================================================================
/*------------ init_output_timer() function -----------------------------------
* DESCRIPTION: Function initializes Timer64 module
* ARGUMENTS:
* None
* RETURNED VALUE: Error code
-----------------------------------------------------------------------------*/
static int32_t tx_timer_init(C66XX_TIMER timer, uint32_t frequency)
{
int32_t r;
C66XX_TIMER_CFG_DD cfg_dd;
// Reset 64-bit timer
if ((r = C66XX_TIMER_reset(timer, C66XX_TIMER_HW_CFG_64BIT)) != C66XX_OK)
goto exit;
// Fill configuration data descriptor
memset(&cfg_dd, 0, C66XX_TIMER_CFG_DD_LEN);
cfg_dd.timer_mode = C66XX_TIMER_MODE_32BIT_UNCHAINED;
cfg_dd.timer_high.clk_src_output_mode = C66XX_TIMER_CLK_OUTPUT_MODE_CLK;
// Init DSP Timer64 module
if ((r = C66XX_TIMER_init(timer, frequency, &cfg_dd)) != C66XX_OK)
goto exit;
// Enable timer interrupt
if ((r = C66XX_TIMER_enable_interrupts(timer, C66XX_TIMER_HW_CFG_32BIT_HIGH)) != C66XX_OK)
goto exit;
// Start 32-bit timer high to enable continuously
if ((r = C66XX_TIMER_start(timer, C66XX_TIMER_HW_CFG_32BIT_HIGH, C66XX_TIMER_COUNT_MODE_CONTINUOUSLY)) != C66XX_OK)
goto exit;
// TIMER module configuration is completed
printf("Timer #%u configuration is completed\n", timer);
exit:
return (r);
}
//-----------------------------------------------------------------------------
/*------------ tx_interrupt_init() function -----------------------------------
* DESCRIPTION: Function initializes CorePack interrupt module
* ARGUMENTS:
* None
* RETURNED VALUE: Error code
-----------------------------------------------------------------------------*/
static int32_t tx_interrupt_init(void)
{
int32_t r;
// Set DSP interrupt handlers to the ones defined in tx_initialize_low_level.asm
if ((r = C66XX_INT_set_core_dsp_interrupt_handler(C66XX_DSP_VECTID_NMI, _tx_nmi_vector)) != C66XX_OK)
goto exit;
if ((r = C66XX_INT_set_core_dsp_interrupt_handler(C66XX_DSP_VECTID_4, _tx_int4_vector)) != C66XX_OK)
goto exit;
if ((r = C66XX_INT_set_core_dsp_interrupt_handler(C66XX_DSP_VECTID_5, _tx_int5_vector)) != C66XX_OK)
goto exit;
if ((r = C66XX_INT_set_core_dsp_interrupt_handler(C66XX_DSP_VECTID_6, _tx_int6_vector)) != C66XX_OK)
goto exit;
if ((r = C66XX_INT_set_core_dsp_interrupt_handler(C66XX_DSP_VECTID_7, _tx_int7_vector)) != C66XX_OK)
goto exit;
if ((r = C66XX_INT_set_core_dsp_interrupt_handler(C66XX_DSP_VECTID_8, _tx_int8_vector)) != C66XX_OK)
goto exit;
if ((r = C66XX_INT_set_core_dsp_interrupt_handler(C66XX_DSP_VECTID_9, _tx_int9_vector)) != C66XX_OK)
goto exit;
if ((r = C66XX_INT_set_core_dsp_interrupt_handler(C66XX_DSP_VECTID_10, _tx_int10_vector)) != C66XX_OK)
goto exit;
if ((r = C66XX_INT_set_core_dsp_interrupt_handler(C66XX_DSP_VECTID_11, _tx_int11_vector)) != C66XX_OK)
goto exit;
if ((r = C66XX_INT_set_core_dsp_interrupt_handler(C66XX_DSP_VECTID_12, _tx_int12_vector)) != C66XX_OK)
goto exit;
if ((r = C66XX_INT_set_core_dsp_interrupt_handler(C66XX_DSP_VECTID_13, _tx_int13_vector)) != C66XX_OK)
goto exit;
if ((r = C66XX_INT_set_core_dsp_interrupt_handler(C66XX_DSP_VECTID_14, _tx_int14_vector)) != C66XX_OK)
goto exit;
if ((r = C66XX_INT_set_core_dsp_interrupt_handler(C66XX_DSP_VECTID_15, _tx_int15_vector)) != C66XX_OK)
goto exit;
/* CorePack interrupt module configuration is completed */
printf("INTC configuration is completed\n");
// Exit without errors
r = C66XX_OK;
exit:
return (r);
}
//-----------------------------------------------------------------------------
/*------------ hardware_setup() function --------------------------------------
* DESCRIPTION: Function intializes board hardware
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
int hardware_setup()
{
platform_init_flags init_flags;
platform_init_config init_config;
platform_info p_info;
int32_t r;
/*
* Initialize all platform peripherals with default values:
* PLL, DDR, TCSL, PHY, ECC
*/
init_flags.pll = 1;
init_flags.ddr = 1;
init_flags.tcsl = 1;
init_flags.phy = 1;
init_flags.ecc = 0;
memset(&init_config, 0, sizeof(platform_init_config));
if ((r = platform_init(&init_flags, &init_config)) != Platform_EOK)
goto exit;
/* Initialize platform UART */
if ((r = platform_uart_init()) != Platform_EOK)
goto exit;
if ((r = platform_uart_set_baudrate(115200)) != Platform_EOK)
goto exit;
/* Get platform info */
platform_get_info(&p_info);
/* Write data to the UART */
platform_write("Platform library version is %s\n", p_info.version);
platform_write("Board name is %s\n", p_info.board_name);
platform_write("Board serial number is %s\n", p_info.serial_nbr);
platform_write("Board revision ID is %u\n", p_info.board_rev);
platform_write("CPU name is %s\n", p_info.cpu.name);
platform_write("CPU revision ID is %u\n", p_info.cpu.revision_id);
platform_write("Number of CPU cores is %u\n", p_info.cpu.core_count);
platform_write("CPU frequency is %u MHz\n", p_info.frequency);
// Init CorePac INTC
if ((r = C66XX_INT_init_core()) != C66XX_OK)
goto exit;
// Init DSP Timer
if ((r = tx_timer_init(C66XX_DSP_TIMER, C66XX_DSP_TIMER_FREQ)) != C66XX_OK)
goto exit;
// Init DSP interrupt controller
if ((r = tx_interrupt_init()) != C66XX_OK)
goto exit;
printf("Board is initialized\n");
/* Exit with no errors */
exit:
return (r);
}
//-----------------------------------------------------------------------------
/*------------ tx_nmi_handler() function --------------------------------------
* DESCRIPTION: Function handles NMI interrupt
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
void tx_nmi_handler(void)
{
}
//-----------------------------------------------------------------------------
/*------------ tx_int4_handler() function -------------------------------------
* DESCRIPTION: Function handles INT4 interrupt
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
void tx_int4_handler(void)
{
}
//-----------------------------------------------------------------------------
/*------------ tx_int5_handler() function -------------------------------------
* DESCRIPTION: Function handles INT5 interrupt
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
void tx_int5_handler(void)
{
}
//-----------------------------------------------------------------------------
/*------------ tx_int6_handler() function -------------------------------------
* DESCRIPTION: Function handles INT6 interrupt
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
void tx_int6_handler(void)
{
}
//-----------------------------------------------------------------------------
/*------------ tx_int7_handler() function -------------------------------------
* DESCRIPTION: Function handles INT7 interrupt
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
void tx_int7_handler(void)
{
}
//-----------------------------------------------------------------------------
/*------------ tx_int8_handler() function -------------------------------------
* DESCRIPTION: Function handles INT8 interrupt
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
void tx_int8_handler(void)
{
}
//-----------------------------------------------------------------------------
/*------------ tx_int9_handler() function -------------------------------------
* DESCRIPTION: Function handles INT9 interrupt
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
void tx_int9_handler(void)
{
}
//-----------------------------------------------------------------------------
/*------------ tx_int10_handler() function ------------------------------------
* DESCRIPTION: Function handles INT10 interrupt
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
void tx_int10_handler(void)
{
}
//-----------------------------------------------------------------------------
/*------------ tx_int11_handler() function ------------------------------------
* DESCRIPTION: Function handles INT11 interrupt
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
void tx_int11_handler(void)
{
}
//-----------------------------------------------------------------------------
/*------------ tx_int12_handler() function ------------------------------------
* DESCRIPTION: Function handles INT12 interrupt
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
void tx_int12_handler(void)
{
}
//-----------------------------------------------------------------------------
/*------------ tx_int13_handler() function ------------------------------------
* DESCRIPTION: Function handles INT13 interrupt
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
void tx_int13_handler(void)
{
}
//-----------------------------------------------------------------------------
/*------------ tx_int14_handler() function ------------------------------------
* DESCRIPTION: Function handles INT14 interrupt
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
void tx_int14_handler(void)
{
}
//-----------------------------------------------------------------------------
/*------------ tx_int15_handler() function ------------------------------------
* DESCRIPTION: Function handles INT15 interrupt
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
void tx_int15_handler(void)
{
}
//-----------------------------------------------------------------------------
//=============================================================================
//============ Platform OSAL functions ========================================
//=============================================================================
/*------------ Osal_platformMalloc() function ----------------------------*//**
* @brief Function implements the memory allocate function for the platform
* library.
*
* This function allocates a memory block of a given size specified by input
* parameter 'num_bytes'.
*
* @param[in] num_bytes - number of bytes to be allocated
* @param[in] alignment - alignment of allocated memory block in bytes
*
* @return Allocated block address
*
-----------------------------------------------------------------------------*/
uint8_t *Osal_platformMalloc(uint32_t num_bytes, uint32_t alignment)
{
// Allocate memory from default system heap
return (NULL);
}
//-----------------------------------------------------------------------------
/*------------ Osal_platformFree() function ------------------------------*//**
* @brief Function implements the memory free function for the platform
* library.
*
* This function frees up memory allocated using Osal_platformMalloc()
* function call.
*
* @param[in] mem_ptr - pointer to the memory block to be cleaned up
* @param[in] num_bytes - size of the memory block to be cleaned up in bytes
*
* @return None
*
-----------------------------------------------------------------------------*/
void Osal_platformFree(uint8_t *mem_ptr, uint32_t num_bytes)
{
}
//-----------------------------------------------------------------------------
/*------------ Osal_platformSpiCsEnter() function ------------------------*//**
* @brief Function is used to enter a critical section
*
* Function protects against access from multiple cores and access from
* multiple threads on single core
*
* @param[out] key - pointer to a variable to receive a handle for unlocking
* critical section
* @return None
*
-----------------------------------------------------------------------------*/
void Osal_platformSpiCsEnter(void)
{
}
//-----------------------------------------------------------------------------
/*------------ Osal_platformSpiCsExit() function -------------------------*//**
* @brief Function is used to exit a critical section protected using
* Osal_paMtCsEnter() API.
*
* @param[in] key - handle for unlocking critical section
*
* @return None
*
-----------------------------------------------------------------------------*/
void Osal_platformSpiCsExit(void)
{
}
//-----------------------------------------------------------------------------
//=============================================================================

209
ports/c667x/ccs/example_build/sample_threadx_c6678evm/board_setup.h Normal file
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/*
* board_setup.h
*
*/
#ifndef BOARD_SETUP_H /* check for this file has been already included */
#define BOARD_SETUP_H 1
#include "ti\platform\platform.h"
/*===========================================================================*/
/*============ Printf output definitions ====================================*/
/*===========================================================================*/
#define printf platform_write
/*===========================================================================*/
/*------------ hardware_setup() function --------------------------------------
* DESCRIPTION: Function intializes board hardware
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
int hardware_setup();
/*------------ tx_nmi_handler() function --------------------------------------
* DESCRIPTION: Function handles NMI interrupt
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
void tx_nmi_handler(void);
/*------------ tx_int4_handler() function -------------------------------------
* DESCRIPTION: Function handles INT4 interrupt
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
void tx_int4_handler(void);
/*------------ tx_int5_handler() function -------------------------------------
* DESCRIPTION: Function handles INT5 interrupt
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
void tx_int5_handler(void);
/*------------ tx_int6_handler() function -------------------------------------
* DESCRIPTION: Function handles INT6 interrupt
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
void tx_int6_handler(void);
/*------------ tx_int7_handler() function -------------------------------------
* DESCRIPTION: Function handles INT7 interrupt
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
void tx_int7_handler(void);
/*------------ tx_int8_handler() function -------------------------------------
* DESCRIPTION: Function handles INT8 interrupt
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
void tx_int8_handler(void);
/*------------ tx_int9_handler() function -------------------------------------
* DESCRIPTION: Function handles INT9 interrupt
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
void tx_int9_handler(void);
/*------------ tx_int10_handler() function ------------------------------------
* DESCRIPTION: Function handles INT10 interrupt
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
void tx_int10_handler(void);
/*------------ tx_int11_handler() function ------------------------------------
* DESCRIPTION: Function handles INT11 interrupt
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
void tx_int11_handler(void);
/*------------ tx_int12_handler() function ------------------------------------
* DESCRIPTION: Function handles INT12 interrupt
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
void tx_int12_handler(void);
/*------------ tx_int13_handler() function ------------------------------------
* DESCRIPTION: Function handles INT13 interrupt
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
void tx_int13_handler(void);
/*------------ tx_int14_handler() function ------------------------------------
* DESCRIPTION: Function handles INT14 interrupt
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
void tx_int14_handler(void);
/*------------ tx_int15_handler() function ------------------------------------
* DESCRIPTION: Function handles INT15 interrupt
* ARGUMENTS:
* None
* RETURNED VALUE: None
-----------------------------------------------------------------------------*/
void tx_int15_handler(void);
/*------------ Osal_platformMalloc() function ----------------------------*//**
* @brief Function implements the memory allocate function for the platform
* library.
*
* This function allocates a memory block of a given size specified by input
* parameter 'num_bytes'.
*
* @param[in] num_bytes - number of bytes to be allocated
* @param[in] alignment - alignment of allocated memory block in bytes
*
* @return Allocated block address
*
-----------------------------------------------------------------------------*/
uint8_t *Osal_platformMalloc(uint32_t num_bytes, uint32_t alignment);
/*------------ Osal_platformFree() function ------------------------------*//**
* @brief Function implements the memory free function for the platform
* library.
*
* This function frees up memory allocated using Osal_platformMalloc()
* function call.
*
* @param[in] mem_ptr - pointer to the memory block to be cleaned up
* @param[in] num_bytes - size of the memory block to be cleaned up in bytes
*
* @return None
*
-----------------------------------------------------------------------------*/
void Osal_platformFree(uint8_t *mem_ptr, uint32_t num_bytes);
/*------------ Osal_platformSpiCsEnter() function ------------------------*//**
* @brief Function is used to enter a critical section
*
* Function protects against access from multiple cores and access from
* multiple threads on single core
*
* @param[out] key - pointer to a variable to receive a handle for unlocking
* critical section
* @return None
*
-----------------------------------------------------------------------------*/
void Osal_platformSpiCsEnter(void);
/*------------ Osal_platformSpiCsExit() function -------------------------*//**
* @brief Function is used to exit a critical section protected using
* Osal_paMtCsEnter() API.
*
* @param[in] key - handle for unlocking critical section
*
* @return None
*
-----------------------------------------------------------------------------*/
void Osal_platformSpiCsExit(void);
/*===========================================================================*/
#endif /* BOARD_SETUP_H */

528
ports/c667x/ccs/example_build/sample_threadx_c6678evm/sample_threadx.c Normal file
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/* This is a small demo of the high-performance ThreadX kernel. It includes examples of eight
threads of different priorities, using a message queue, semaphore, mutex, event flags group,
byte pool, and block pool. */
#include "tx_api.h"
#include "board_setup.h"
#define DEMO_STACK_SIZE 1024
#define DEMO_BYTE_POOL_SIZE 9120
#define DEMO_BLOCK_POOL_SIZE 100
#define DEMO_QUEUE_SIZE 100
/* Define TraceX trace oblects */
#define TRACE_BUFFER_SIZE (4 * 1024)
#define TRACE_OBJECTS_COUNT 20
/* Define TraceX trace buffer */
UCHAR tx_trace_buffer[TRACE_BUFFER_SIZE];
/* Define the ThreadX object control blocks... */
TX_THREAD thread_0;
TX_THREAD thread_1;
TX_THREAD thread_2;
TX_THREAD thread_3;
TX_THREAD thread_4;
TX_THREAD thread_5;
TX_THREAD thread_6;
TX_THREAD thread_7;
TX_QUEUE queue_0;
TX_SEMAPHORE semaphore_0;
TX_MUTEX mutex_0;
TX_EVENT_FLAGS_GROUP event_flags_0;
TX_BYTE_POOL byte_pool_0;
TX_BLOCK_POOL block_pool_0;
/* Define demo timer */
#define DEMO_TIMER_PERIOD 10
#define DEMO_TIMER_VALUE 0xaaaaaaaa
TX_TIMER timer_0;
ULONG timer_0_counter;
/* Define the counters used in the demo application... */
ULONG thread_0_counter;
ULONG thread_1_counter;
ULONG thread_1_messages_sent;
ULONG thread_2_counter;
ULONG thread_2_messages_received;
ULONG thread_3_counter;
ULONG thread_4_counter;
ULONG thread_5_counter;
ULONG thread_6_counter;
ULONG thread_7_counter;
/* Define thread prototypes. */
void thread_0_entry(ULONG thread_input);
void thread_1_entry(ULONG thread_input);
void thread_2_entry(ULONG thread_input);
void thread_3_and_4_entry(ULONG thread_input);
void thread_5_entry(ULONG thread_input);
void thread_6_and_7_entry(ULONG thread_input);
void my_stack_error_handler(TX_THREAD *thread_ptr);
void my_timer_function(ULONG timer_input);
/* Define main entry point. */
void main()
{
/* Setup the hardware. */
hardware_setup();
/* Enter the ThreadX kernel. */
tx_kernel_enter();
}
/* Define what the initial system looks like. */
void tx_application_define(void *first_unused_memory)
{
CHAR *pointer = TX_NULL;
UINT status;
/* Enable event tracing using the global <20>trace_buffer<65> memory and supporting
a maximum of TRACE_OBJECTS_COUNT ThreadX objects in the registry. */
if ((status = tx_trace_enable(tx_trace_buffer, TRACE_BUFFER_SIZE, TRACE_OBJECTS_COUNT)) != TX_SUCCESS)
{
while (1);
}
/* Register thread stack error notification callback */
if ((status = tx_thread_stack_error_notify(my_stack_error_handler)) != TX_SUCCESS)
{
while (1);
}
/* Create a byte memory pool from which to allocate the thread stacks. */
status = tx_byte_pool_create(&byte_pool_0, "byte pool 0", first_unused_memory, DEMO_BYTE_POOL_SIZE);
if (status != TX_SUCCESS)
{
while (1);
}
/* Put system definition stuff in here, e.g. thread creates and other assorted
create information. */
/* Allocate the stack for thread 0. */
status = tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
if (status != TX_SUCCESS)
{
while (1);
}
/* Create the main thread. */
status = tx_thread_create(&thread_0, "thread 0", thread_0_entry, 0,
pointer, DEMO_STACK_SIZE,
1, 1, TX_NO_TIME_SLICE, TX_AUTO_START);
if (status != TX_SUCCESS)
{
while (1);
}
/* Allocate the stack for thread 1. */
status = tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
if (status != TX_SUCCESS)
{
while (1);
}
/* Create threads 1 and 2. These threads pass information through a ThreadX
message queue. It is also interesting to note that these threads have a time
slice. */
status = tx_thread_create(&thread_1, "thread 1", thread_1_entry, 1,
pointer, DEMO_STACK_SIZE,
16, 16, 4, TX_AUTO_START);
if (status != TX_SUCCESS)
{
while (1);
}
/* Allocate the stack for thread 2. */
status = tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
if (status != TX_SUCCESS)
{
while (1);
}
status = tx_thread_create(&thread_2, "thread 2", thread_2_entry, 2,
pointer, DEMO_STACK_SIZE,
16, 16, 4, TX_AUTO_START);
if (status != TX_SUCCESS)
{
while (1);
}
/* Allocate the stack for thread 3. */
status = tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
if (status != TX_SUCCESS)
{
while (1);
}
/* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore.
An interesting thing here is that both threads share the same instruction area. */
status = tx_thread_create(&thread_3, "thread 3", thread_3_and_4_entry, 3,
pointer, DEMO_STACK_SIZE,
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
if (status != TX_SUCCESS)
{
while (1);
}
/* Allocate the stack for thread 4. */
status = tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
if (status != TX_SUCCESS)
{
while (1);
}
status = tx_thread_create(&thread_4, "thread 4", thread_3_and_4_entry, 4,
pointer, DEMO_STACK_SIZE,
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
if (status != TX_SUCCESS)
{
while (1);
}
/* Allocate the stack for thread 5. */
status = tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
if (status != TX_SUCCESS)
{
while (1);
}
/* Create thread 5. This thread simply pends on an event flag which will be set
by thread_0. */
status = tx_thread_create(&thread_5, "thread 5", thread_5_entry, 5,
pointer, DEMO_STACK_SIZE,
4, 4, TX_NO_TIME_SLICE, TX_AUTO_START);
if (status != TX_SUCCESS)
{
while (1);
}
/* Allocate the stack for thread 6. */
status = tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
if (status != TX_SUCCESS)
{
while (1);
}
/* Create threads 6 and 7. These threads compete for a ThreadX mutex. */
status = tx_thread_create(&thread_6, "thread 6", thread_6_and_7_entry, 6,
pointer, DEMO_STACK_SIZE,
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
if (status != TX_SUCCESS)
{
while (1);
}
/* Allocate the stack for thread 7. */
status = tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
if (status != TX_SUCCESS)
{
while (1);
}
status = tx_thread_create(&thread_7, "thread 7", thread_6_and_7_entry, 7,
pointer, DEMO_STACK_SIZE,
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
if (status != TX_SUCCESS)
{
while (1);
}
/* Allocate the message queue. */
status = tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_QUEUE_SIZE*sizeof(ULONG), TX_NO_WAIT);
if (status != TX_SUCCESS)
{
while (1);
}
/* Create the message queue shared by threads 1 and 2. */
status = tx_queue_create(&queue_0, "queue 0", TX_1_ULONG, pointer, DEMO_QUEUE_SIZE*sizeof(ULONG));
if (status != TX_SUCCESS)
{
while (1);
}
/* Create the semaphore used by threads 3 and 4. */
status = tx_semaphore_create(&semaphore_0, "semaphore 0", 1);
if (status != TX_SUCCESS)
{
while (1);
}
/* Create the event flags group used by threads 1 and 5. */
status = tx_event_flags_create(&event_flags_0, "event flags 0");
if (status != TX_SUCCESS)
{
while (1);
}
/* Create the mutex used by thread 6 and 7 without priority inheritance. */
status = tx_mutex_create(&mutex_0, "mutex 0", TX_NO_INHERIT);
if (status != TX_SUCCESS)
{
while (1);
}
/* Allocate the memory for a small block pool. */
status = tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_BLOCK_POOL_SIZE, TX_NO_WAIT);
if (status != TX_SUCCESS)
{
while (1);
}
/* Create a block memory pool to allocate a message buffer from. */
status = tx_block_pool_create(&block_pool_0, "block pool 0", sizeof(ULONG), pointer, DEMO_BLOCK_POOL_SIZE);
if (status != TX_SUCCESS)
{
while (1);
}
/* Allocate a block and release the block memory. */
status = tx_block_allocate(&block_pool_0, (VOID **) &pointer, TX_NO_WAIT);
if (status != TX_SUCCESS)
{
while (1);
}
/* Release the block back to the pool. */
status = tx_block_release(pointer);
if (status != TX_SUCCESS)
{
while (1);
}
/* Create the periodic timer. */
status = tx_timer_create(&timer_0, "timer 0", my_timer_function, (ULONG) DEMO_TIMER_VALUE, DEMO_TIMER_PERIOD, DEMO_TIMER_PERIOD, TX_AUTO_ACTIVATE);
if (status != TX_SUCCESS)
{
while (1);
}
}
/* Define the test threads. */
void thread_0_entry(ULONG thread_input)
{
UINT status;
/* This thread simply sits in while-forever-sleep loop. */
while(1)
{
/* Increment the thread counter. */
thread_0_counter++;
/* Sleep for 10 ticks. */
tx_thread_sleep(10);
/* Set event flag 0 to wakeup thread 5. */
status = tx_event_flags_set(&event_flags_0, 0x1, TX_OR);
/* Check status. */
if (status != TX_SUCCESS)
break;
}
}
void thread_1_entry(ULONG thread_input)
{
UINT status;
/* This thread simply sends messages to a queue shared by thread 2. */
while(1)
{
/* Increment the thread counter. */
thread_1_counter++;
/* Send message to queue 0. */
status = tx_queue_send(&queue_0, &thread_1_messages_sent, TX_WAIT_FOREVER);
/* Check completion status. */
if (status != TX_SUCCESS)
break;
/* Increment the message sent. */
thread_1_messages_sent++;
}
}
void thread_2_entry(ULONG thread_input)
{
ULONG received_message;
UINT status;
/* This thread retrieves messages placed on the queue by thread 1. */
while(1)
{
/* Increment the thread counter. */
thread_2_counter++;
/* Retrieve a message from the queue. */
status = tx_queue_receive(&queue_0, &received_message, TX_WAIT_FOREVER);
/* Check completion status and make sure the message is what we
expected. */
if ((status != TX_SUCCESS) || (received_message != thread_2_messages_received))
break;
/* Otherwise, all is okay. Increment the received message count. */
thread_2_messages_received++;
}
}
void thread_3_and_4_entry(ULONG thread_input)
{
UINT status;
/* This function is executed from thread 3 and thread 4. As the loop
below shows, these function compete for ownership of semaphore_0. */
while(1)
{
/* Increment the thread counter. */
if (thread_input == 3)
thread_3_counter++;
else
thread_4_counter++;
/* Get the semaphore with suspension. */
status = tx_semaphore_get(&semaphore_0, TX_WAIT_FOREVER);
/* Check status. */
if (status != TX_SUCCESS)
break;
/* Sleep for 2 ticks to hold the semaphore. */
tx_thread_sleep(2);
/* Release the semaphore. */
status = tx_semaphore_put(&semaphore_0);
/* Check status. */
if (status != TX_SUCCESS)
break;
}
}
void thread_5_entry(ULONG thread_input)
{
UINT status;
ULONG actual_flags;
/* This thread simply waits for an event in a forever loop. */
while(1)
{
/* Increment the thread counter. */
thread_5_counter++;
/* Wait for event flag 0. */
status = tx_event_flags_get(&event_flags_0, 0x1, TX_OR_CLEAR,
&actual_flags, TX_WAIT_FOREVER);
/* Check status. */
if ((status != TX_SUCCESS) || (actual_flags != 0x1))
break;
}
}
void thread_6_and_7_entry(ULONG thread_input)
{
UINT status;
/* This function is executed from thread 6 and thread 7. As the loop
below shows, these function compete for ownership of mutex_0. */
while(1)
{
/* Increment the thread counter. */
if (thread_input == 6)
thread_6_counter++;
else
thread_7_counter++;
/* Get the mutex with suspension. */
status = tx_mutex_get(&mutex_0, TX_WAIT_FOREVER);
/* Check status. */
if (status != TX_SUCCESS)
break;
/* Get the mutex again with suspension. This shows
that an owning thread may retrieve the mutex it
owns multiple times. */
status = tx_mutex_get(&mutex_0, TX_WAIT_FOREVER);
/* Check status. */
if (status != TX_SUCCESS)
break;
/* Sleep for 2 ticks to hold the mutex. */
tx_thread_sleep(2);
/* Release the mutex. */
status = tx_mutex_put(&mutex_0);
/* Check status. */
if (status != TX_SUCCESS)
break;
/* Release the mutex again. This will actually
release ownership since it was obtained twice. */
status = tx_mutex_put(&mutex_0);
/* Check status. */
if (status != TX_SUCCESS)
break;
}
}
void my_stack_error_handler(TX_THREAD *thread_ptr)
{
while(1);
}
void my_timer_function(ULONG timer_input)
{
/* Increment the thread counter. */
timer_0_counter++;
if (timer_input != DEMO_TIMER_VALUE)
while(1);
}

55
ports/c667x/ccs/example_build/sample_threadx_c6678evm/sample_threadx.cmd Normal file
View File

@@ -0,0 +1,55 @@
-c
-heap 0x400
-stack 0x1000
-l C:\ti\pdk_C6678_1_1_2_6\packages\ti\csl\lib\ti.csl.ae66
-l C:\ti\pdk_C6678_1_1_2_6\packages\ti\csl\lib\ti.csl.intc.ae66
-l c:\ti\pdk_C6678_1_1_2_6\packages\ti\platform\evmc6678l\platform_lib\lib\release\ti.platform.evm6678l.ae66
/* Memory Map */
MEMORY
{
L1PSRAM (RWX) : org = 0x00E00000, len = 0x00008000
L1DSRAM (RWX) : org = 0x00F00000, len = 0x00008000
CODE_RAM (RWX) : org = 0x00800000, len = 0x00020000
DATA_RAM (RWX) : org = 0x00820000, len = 0x00060000
MSMCSRAM (RWX) : org = 0x0c000000, len = 0x00400000
DDR3 (RWX) : org = 0x80000000, len = 0x80000000
}
SECTIONS
{
.text > CODE_RAM
.stack > CODE_RAM
.cio > CODE_RAM
.const > CODE_RAM
.data > CODE_RAM
.switch > CODE_RAM
.sysmem > CODE_RAM
.far > CODE_RAM
.args > CODE_RAM
.ppinfo > CODE_RAM
.ppdata > CODE_RAM
.csl_vect > CODE_RAM
platform_lib > CODE_RAM
GROUP
{
.neardata
.rodata
.bss
} > CODE_RAM
/* COFF sections */
.pinit > CODE_RAM
.cinit > CODE_RAM
/* EABI sections */
.binit > CODE_RAM
.init_array > CODE_RAM
.fardata > CODE_RAM
.c6xabi.exidx > CODE_RAM
.c6xabi.extab > CODE_RAM
/* ThreadX section which should be the last RAM section loaded */
.zend > DATA_RAM
}

17
ports/c667x/ccs/example_build/sample_threadx_c6678evm/targetConfigs/TMS320C6678.ccxml Normal file
View File

@@ -0,0 +1,17 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<configurations XML_version="1.2" id="configurations_0">
<configuration XML_version="1.2" id="Texas Instruments XDS100v1 USB Debug Probe_0">
<instance XML_version="1.2" desc="Texas Instruments XDS100v1 USB Debug Probe_0" href="connections/TIXDS100usb_Connection.xml" id="Texas Instruments XDS100v1 USB Debug Probe_0" xml="TIXDS100usb_Connection.xml" xmlpath="connections"/>
<connection XML_version="1.2" id="Texas Instruments XDS100v1 USB Debug Probe_0">
<instance XML_version="1.2" href="drivers/tixds100icepick_d.xml" id="drivers" xml="tixds100icepick_d.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/tixds100c66xx.xml" id="drivers" xml="tixds100c66xx.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/tixds100cs_dap.xml" id="drivers" xml="tixds100cs_dap.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/tixds100csstm.xml" id="drivers" xml="tixds100csstm.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/tixds100etbcs.xml" id="drivers" xml="tixds100etbcs.xml" xmlpath="drivers"/>
<platform XML_version="1.2" id="platform_0">
<instance XML_version="1.2" desc="TMS320C6678_0" href="devices/C6678.xml" id="TMS320C6678_0" xml="C6678.xml" xmlpath="devices"/>
</platform>
</connection>
</configuration>
</configurations>

9
ports/c667x/ccs/example_build/sample_threadx_c6678evm/targetConfigs/readme.txt Normal file
View File

@@ -0,0 +1,9 @@
The 'targetConfigs' folder contains target-configuration (.ccxml) files, automatically generated based
on the device and connection settings specified in your project on the Properties > General page.
Please note that in automatic target-configuration management, changes to the project's device and/or
connection settings will either modify an existing or generate a new target-configuration file. Thus,
if you manually edit these auto-generated files, you may need to re-apply your changes. Alternatively,
you may create your own target-configuration file for this project and manage it manually. You can
always switch back to automatic target-configuration management by checking the "Manage the project's
target-configuration automatically" checkbox on the project's Properties > General page.

405
ports/c667x/ccs/example_build/sample_threadx_c6678evm/tx_initialize_low_level.asm Normal file
View File

@@ -0,0 +1,405 @@
;/**************************************************************************/
;/* */
;/* Copyright (c) Microsoft Corporation. All rights reserved. */
;/* */
;/* This software is licensed under the Microsoft Software License */
;/* Terms for Microsoft Azure RTOS. Full text of the license can be */
;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
;/* and in the root directory of this software. */
;/* */
;/**************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
;/** */
;/** ThreadX Component */
;/** */
;/** Initialize */
;/** */
;/**************************************************************************/
;/**************************************************************************/
;
;
;#define TX_SOURCE_CODE
;
;
;/* Include necessary system files. */
;
;#include "tx_api.h"
;#include "tx_initialize.h"
;#include "tx_thread.h"
;#include "tx_timer.h"
;
SP .set B15
ADDRESS_MSK .set 0xFFFFFFF0 ; Ensure 16-byte alignment
; Use Timer 8 as it's available for all DSP cores at C6678
; Timer 8 interrupt high event (TINT8H) ID is 67
; Assume DSP core clock 1000 MHz
; Timer is clocked at DSP core clock / 6 = 167 MHz
; Timer frequency will set to 100 Hz
TMR8_INTCTLSTAT_ADDR .set 0x02280044 ; Timer 8 Interrupt Control and Status Register
INTCTLSTAT_VAL .set 0x00010000 ; Enable TIMHI interrupt
EVTCLR2_ADDR .set 0x01800048 ; Event Clear register 2 address
EVTCLR2_TMR8_VAL .set 0x00000008 ; Clear event 67 - TINT8H
EVTMASK2_ADDR .set 0x01800088 ; Event Mask register 2 address
EVTMASK2_TMR8_VAL .set 0x00000008 ; Mask event 67 - TINT8H
INTMUX1_ADDR .set 0x01800104 ; Interrupt Mux Register 1 address
INTMUX1_TMR8_VAL .set 0x43 ; Tie in Event 67 (TINT8H) to INT4
;
;
.global _tx_thread_system_stack_ptr
.global _tx_initialize_unused_memory
.global _tx_thread_context_save
.global _tx_thread_context_restore
.global _tx_timer_interrupt
; External interrupt handlers - should be defined by user
.global tx_nmi_handler
.global tx_int5_handler
.global tx_int6_handler
.global tx_int7_handler
.global tx_int8_handler
.global tx_int9_handler
.global tx_int10_handler
.global tx_int11_handler
.global tx_int12_handler
.global tx_int13_handler
.global tx_int14_handler
.global tx_int15_handler
;
;
;/* Define the first available address in memory, which is typically just the last
; RAM section loaded. */
.sect ".zend"
.space 20
.global _tx_first_free_memory
.align 16
_tx_first_free_memory:
.space 4
; Useful macro definitions
; Load 32-bit integer into register
MVK_LH .macro val,reg
MVKL val,reg
MVKH val,reg
.endm
; Interrupt entry - allocate stack space, save A0-A4 and B3 registers to stack,
; build return address in B3 register for context save function and
; call context save function
TX_INTERRUPT_ENTRY .macro
ADDK.S2 -288,SP
STW B3,*+SP(96)
STW A0,*+SP(20)
STW A1,*+SP(24)
STW A2,*+SP(28)
STW A3,*+SP(32)
STW A4,*+SP(36)
B _tx_thread_context_save
.endm
; Interrupt exit - jump to context restore function
TX_INTERRUPT_EXIT .macro
B _tx_thread_context_restore
NOP 5
.endm
.sect ".text"
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_initialize_low_level C667x/TI */
;/* 6.0 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
;/* */
;/* DESCRIPTION */
;/* */
;/* This function is responsible for any low-level processor */
;/* initialization, including setting up interrupt vectors, setting */
;/* up a periodic timer interrupt source, saving the system stack */
;/* pointer for use in ISR processing later, and finding the first */
;/* available RAM memory address for tx_application_define. */
;/* */
;/* INPUT */
;/* */
;/* None */
;/* */
;/* OUTPUT */
;/* */
;/* None */
;/* */
;/* CALLS */
;/* */
;/* None */
;/* */
;/* CALLED BY */
;/* */
;/* _tx_initialize_kernel_enter ThreadX entry function */
;/* */
;/* RELEASE HISTORY */
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* 05-19-2020 William E. Lamie Initial Version 6.0 */
;/* */
;/**************************************************************************/
;VOID _tx_initialize_low_level(VOID)
;{
.global _tx_initialize_low_level
_tx_initialize_low_level:
;
; /* Save the system stack pointer. */
; _tx_thread_system_stack_ptr = (VOID_PTR) (SP);
;
MVK_LH _tx_thread_system_stack_ptr,A0 ; Build address of system stack
STW SP,*A0 ; Save system stack address
;
; /* Pickup the first available memory address. */
;
MVK_LH ADDRESS_MSK,A0 ; Build address mask
MVK_LH _tx_first_free_memory,A1 ; Build address of free memory
AND A0,A1,A1 ; Ensure alignment
;
; /* Save the first available memory address. */
; _tx_initialize_unused_memory = (VOID_PTR) end;
;
MVK_LH _tx_initialize_unused_memory,A0 ; Build address of variable
STW A1,*A0 ; Save free memory address
;
; /* Setup Timer 8 HIGH interrupt event */
;
MVK_LH INTMUX1_ADDR,A0 ; Select event 67 to send through INT4
MVK_LH INTMUX1_TMR8_VAL,A1
STW A1,*A0
MVK_LH EVTMASK2_ADDR,A0 ; Build address of Event Mask 2 Register
MVK_LH EVTMASK2_TMR8_VAL,A1 ; Build value of Event Mask 2 Register
STW A1,*A0
;
; /* Done, return to caller. */
;
B B3 ; Return to caller
NOP 5 ; Delay slots
;}
;
.global _tx_nmi_vector
.global _tx_nmi_vector_processing
_tx_nmi_vector:
TX_INTERRUPT_ENTRY
;
; /* Application specific processing goes here! */
;
MVKL _tx_nmi_vector_processing,B3
MVKH _tx_nmi_vector_processing,B3
NOP 3
_tx_nmi_vector_processing:
CALLP tx_nmi_handler,B3 ; CALLP instruction should be used here to call handler and save return address to B3
TX_INTERRUPT_EXIT
.global _tx_int4_vector
_tx_int4_vector:
ADDK.S2 -288,SP ; Allocate stack space
STW B3,*+SP(96) ; Save B3
STW A0,*+SP(20) ; Save A0
STW A1,*+SP(24) ; Save A1
STW A2,*+SP(28) ; Save A2
STW A3,*+SP(32) ; Save A3
STW A4,*+SP(36) ; Save A4
NOP
;_tx_timer_interrupt_preamble:
MVK_LH TMR8_INTCTLSTAT_ADDR,A0 ; Build address of Timer Interrupt Control Register
MVK_LH INTCTLSTAT_VAL,A1 ; Build value of Timer Interrupt Control Register
STW A1,*A0 ; Clear Timer Interrupts
; Clear DSP Event flag - DSP events are not self-cleared
MVK_LH EVTCLR2_ADDR,A0 ; Build address of Event Clear 2 Register
MVK_LH EVTCLR2_TMR8_VAL,A1 ; Build value of Event Clear 2 Register
STW A1,*A0 ; Clear Timer Event
MVK_LH _tx_timer_interrupt,A0
B A0 ; Branch ThreadX timer ISR routine
NOP 5 ; Delay slots
NOP
.global _tx_int5_vector
.global _tx_int5_vector_processing
_tx_int5_vector:
TX_INTERRUPT_ENTRY
;
; /* Application specific processing goes here! */
;
MVKL _tx_int5_vector_processing,B3
MVKH _tx_int5_vector_processing,B3
NOP 3
_tx_int5_vector_processing:
CALLP tx_int5_handler,B3 ; CALLP instruction should be used here to call handler and save return address to B3
TX_INTERRUPT_EXIT
.global _tx_int6_vector
.global _tx_int6_vector_processing
_tx_int6_vector:
TX_INTERRUPT_ENTRY
;
; /* Application specific processing goes here! */
;
MVKL _tx_int6_vector_processing,B3
MVKH _tx_int6_vector_processing,B3
NOP 3
_tx_int6_vector_processing:
CALLP tx_int6_handler,B3 ; CALLP instruction should be used here to call handler and save return address to B3
TX_INTERRUPT_EXIT
.global _tx_int7_vector
.global _tx_int7_vector_processing
_tx_int7_vector:
TX_INTERRUPT_ENTRY
;
; /* Application specific processing goes here! */
;
MVKL _tx_int7_vector_processing,B3
MVKH _tx_int7_vector_processing,B3
NOP 3
_tx_int7_vector_processing:
CALLP tx_int7_handler,B3 ; CALLP instruction should be used here to call handler and save return address to B3
TX_INTERRUPT_EXIT
.global _tx_int8_vector
.global _tx_int8_vector_processing
_tx_int8_vector:
TX_INTERRUPT_ENTRY
;
; /* Application specific processing goes here! */
;
MVKL _tx_int8_vector_processing,B3
MVKH _tx_int8_vector_processing,B3
NOP 3
_tx_int8_vector_processing:
CALLP tx_int8_handler,B3 ; CALLP instruction should be used here to call handler and save return address to B3
TX_INTERRUPT_EXIT
.global _tx_int9_vector
.global _tx_int9_vector_processing
_tx_int9_vector:
TX_INTERRUPT_ENTRY
;
; /* Application specific processing goes here! */
;
MVKL _tx_int9_vector_processing,B3
MVKH _tx_int9_vector_processing,B3
NOP 3
_tx_int9_vector_processing:
CALLP tx_int9_handler,B3 ; CALLP instruction should be used here to call handler and save return address to B3
TX_INTERRUPT_EXIT
.global _tx_int10_vector
.global _tx_int10_vector_processing
_tx_int10_vector:
TX_INTERRUPT_ENTRY
;
; /* Application specific processing goes here! */
;
MVKL _tx_int10_vector_processing,B3
MVKH _tx_int10_vector_processing,B3
NOP 3
_tx_int10_vector_processing:
CALLP tx_int10_handler,B3 ; CALLP instruction should be used here to call handler and save return address to B3
TX_INTERRUPT_EXIT
.global _tx_int11_vector
.global _tx_int11_vector_processing
_tx_int11_vector:
TX_INTERRUPT_ENTRY
;
; /* Application specific processing goes here! */
;
MVKL _tx_int11_vector_processing,B3
MVKH _tx_int11_vector_processing,B3
NOP 3
_tx_int11_vector_processing:
CALLP tx_int11_handler,B3 ; CALLP instruction should be used here to call handler and save return address to B3
TX_INTERRUPT_EXIT
.global _tx_int12_vector
.global _tx_int12_vector_processing
_tx_int12_vector:
TX_INTERRUPT_ENTRY
;
; /* Application specific processing goes here! */
;
MVKL _tx_int12_vector_processing,B3
MVKH _tx_int12_vector_processing,B3
NOP 3
_tx_int12_vector_processing:
CALLP tx_int12_handler,B3 ; CALLP instruction should be used here to call handler and save return address to B3
TX_INTERRUPT_EXIT
.global _tx_int13_vector
.global _tx_int13_vector_processing
_tx_int13_vector:
TX_INTERRUPT_ENTRY
;
; /* Application specific processing goes here! */
;
MVKL _tx_int13_vector_processing,B3
MVKH _tx_int13_vector_processing,B3
NOP 3
_tx_int13_vector_processing:
CALLP tx_int13_handler,B3 ; CALLP instruction should be used here to call handler and save return address to B3
TX_INTERRUPT_EXIT
.global _tx_int14_vector
.global _tx_int14_vector_processing
_tx_int14_vector:
TX_INTERRUPT_ENTRY
;
; /* Application specific processing goes here! */
;
MVKL _tx_int14_vector_processing,B3
MVKH _tx_int14_vector_processing,B3
NOP 3
_tx_int14_vector_processing:
CALLP tx_int14_handler,B3 ; CALLP instruction should be used here to call handler and save return address to B3
TX_INTERRUPT_EXIT
.global _tx_int15_vector
.global _tx_int15_vector_processing
_tx_int15_vector:
TX_INTERRUPT_ENTRY
;
; /* Application specific processing goes here! */
;
MVKL _tx_int15_vector_processing,B3
MVKH _tx_int15_vector_processing,B3
NOP 3
_tx_int15_vector_processing:
CALLP tx_int15_handler,B3 ; CALLP instruction should be used here to call handler and save return address to B3
TX_INTERRUPT_EXIT