add ARM11
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113
ports/arm11/iar/src/tx_thread_interrupt_disable.s
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113
ports/arm11/iar/src/tx_thread_interrupt_disable.s
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;/**************************************************************************/
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;/* */
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;/* Copyright (c) 1996-2018 by Express Logic Inc. */
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;/* */
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;/* This software is copyrighted by and is the sole property of Express */
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;/* Logic, Inc. All rights, title, ownership, or other interests */
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;/* in the software remain the property of Express Logic, Inc. This */
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;/* software may only be used in accordance with the corresponding */
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;/* license agreement. Any unauthorized use, duplication, transmission, */
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;/* distribution, or disclosure of this software is expressly forbidden. */
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;/* */
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;/* This Copyright notice may not be removed or modified without prior */
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;/* written consent of Express Logic, Inc. */
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;/* */
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;/* Express Logic, Inc. reserves the right to modify this software */
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;/* without notice. */
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;/* */
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;/* Express Logic, Inc. info@expresslogic.com */
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;/* 11423 West Bernardo Court http://www.expresslogic.com */
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;/* San Diego, CA 92127 */
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;/* */
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;/**************************************************************************/
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;
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;
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;/**************************************************************************/
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;/**************************************************************************/
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;/** */
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;/** ThreadX Component */
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;/** */
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;/** Thread */
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;/** */
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;/**************************************************************************/
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;/**************************************************************************/
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;
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;#define TX_SOURCE_CODE
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;
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;
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;/* Include necessary system files. */
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;
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;#include "tx_api.h"
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;#include "tx_thread.h"
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;
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;
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#ifdef TX_ENABLE_FIQ_SUPPORT
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DISABLE_INTS DEFINE 0xC0 ; IRQ & FIQ interrupts disabled
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#else
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DISABLE_INTS DEFINE 0x80 ; IRQ interrupts disabled
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#endif
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;
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;
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;
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;/**************************************************************************/
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;/* */
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;/* FUNCTION RELEASE */
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;/* */
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;/* _tx_thread_interrupt_disable ARM11/IAR */
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;/* 6.0.1 */
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;/* AUTHOR */
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;/* */
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;/* William E. Lamie, Express Logic, Inc. */
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;/* */
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;/* DESCRIPTION */
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;/* */
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;/* This function is responsible for disabling interrupts */
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;/* */
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;/* INPUT */
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;/* */
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;/* None */
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;/* */
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;/* OUTPUT */
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;/* */
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;/* old_posture Old interrupt lockout posture */
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;/* */
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;/* CALLS */
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;/* */
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;/* None */
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;/* */
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;/* CALLED BY */
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;/* */
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;/* Application Code */
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;/* */
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;/* RELEASE HISTORY */
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;/* */
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;/* DATE NAME DESCRIPTION */
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;/* */
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;/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
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;/* */
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;/**************************************************************************/
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;UINT _tx_thread_interrupt_disable(VOID)
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;{
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RSEG .text:CODE:NOROOT(2)
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PUBLIC _tx_thread_interrupt_disable
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CODE32
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_tx_thread_interrupt_disable??rA
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_tx_thread_interrupt_disable
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;
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; /* Pickup current interrupt lockout posture. */
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;
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MRS r0, CPSR ; Pickup current CPSR
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;
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; /* Mask interrupts. */
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;
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ORR r1, r0, #DISABLE_INTS ; Mask interrupts
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MSR CPSR_cxsf, r1 ; Setup new CPSR
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#ifdef TX_THUMB
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BX lr ; Return to caller
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#else
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MOV pc, lr ; Return to caller
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#endif
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;}
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;
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;
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END
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