add SMP, Modules, and more processor/tools releases
This commit is contained in:
Scott Larson
496
ports/cortex_m7/ac6/inc/tx_port.h
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496
ports/cortex_m7/ac6/inc/tx_port.h
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@@ -0,0 +1,496 @@
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/**************************************************************************/
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/* */
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/* Copyright (c) Microsoft Corporation. All rights reserved. */
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/* */
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/* This software is licensed under the Microsoft Software License */
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/* Terms for Microsoft Azure RTOS. Full text of the license can be */
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/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
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/* and in the root directory of this software. */
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/* */
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/**************************************************************************/
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/**************************************************************************/
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/**************************************************************************/
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/** */
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/** ThreadX Component */
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/** */
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/** Port Specific */
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/** */
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/**************************************************************************/
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/**************************************************************************/
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/**************************************************************************/
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/* */
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/* PORT SPECIFIC C INFORMATION RELEASE */
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/* */
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/* tx_port.h Cortex-M7/AC6 */
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/* 6.0.1 */
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/* */
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/* AUTHOR */
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/* */
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/* William E. Lamie, Microsoft Corporation */
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/* */
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/* DESCRIPTION */
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/* */
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/* This file contains data type definitions that make the ThreadX */
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/* real-time kernel function identically on a variety of different */
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/* processor architectures. For example, the size or number of bits */
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/* in an "int" data type vary between microprocessor architectures and */
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/* even C compilers for the same microprocessor. ThreadX does not */
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/* directly use native C data types. Instead, ThreadX creates its */
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/* own special types that can be mapped to actual data types by this */
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/* file to guarantee consistency in the interface and functionality. */
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/* */
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/* RELEASE HISTORY */
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/* */
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/* DATE NAME DESCRIPTION */
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/* */
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/* 06-30-2020 William E. Lamie Initial Version 6.0.1 */
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/* */
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/**************************************************************************/
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#ifndef TX_PORT_H
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#define TX_PORT_H
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/* Determine if the optional ThreadX user define file should be used. */
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#ifdef TX_INCLUDE_USER_DEFINE_FILE
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/* Yes, include the user defines in tx_user.h. The defines in this file may
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alternately be defined on the command line. */
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#include "tx_user.h"
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#endif
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/* Define compiler library include files. */
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#include <stdlib.h>
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#include <string.h>
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/* Define ThreadX basic types for this port. */
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#define VOID void
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typedef char CHAR;
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typedef unsigned char UCHAR;
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typedef int INT;
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typedef unsigned int UINT;
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typedef long LONG;
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typedef unsigned long ULONG;
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typedef short SHORT;
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typedef unsigned short USHORT;
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/* Define the priority levels for ThreadX. Legal values range
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from 32 to 1024 and MUST be evenly divisible by 32. */
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#ifndef TX_MAX_PRIORITIES
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#define TX_MAX_PRIORITIES 32
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#endif
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/* Define the minimum stack for a ThreadX thread on this processor. If the size supplied during
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thread creation is less than this value, the thread create call will return an error. */
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#ifndef TX_MINIMUM_STACK
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#define TX_MINIMUM_STACK 200 /* Minimum stack size for this port */
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#endif
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/* Define the system timer thread's default stack size and priority. These are only applicable
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if TX_TIMER_PROCESS_IN_ISR is not defined. */
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#ifndef TX_TIMER_THREAD_STACK_SIZE
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#define TX_TIMER_THREAD_STACK_SIZE 1024 /* Default timer thread stack size */
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#endif
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#ifndef TX_TIMER_THREAD_PRIORITY
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#define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */
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#endif
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/* Define various constants for the ThreadX Cortex-M7 port. */
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#define TX_INT_DISABLE 1 /* Disable interrupts */
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#define TX_INT_ENABLE 0 /* Enable interrupts */
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/* Define the clock source for trace event entry time stamp. The following two item are port specific.
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For example, if the time source is at the address 0x0a800024 and is 16-bits in size, the clock
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source constants would be:
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#define TX_TRACE_TIME_SOURCE *((ULONG *) 0x0a800024)
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#define TX_TRACE_TIME_MASK 0x0000FFFFUL
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*/
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#ifndef TX_TRACE_TIME_SOURCE
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#define TX_TRACE_TIME_SOURCE *((ULONG *) 0xE0001004)
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#endif
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#ifndef TX_TRACE_TIME_MASK
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#define TX_TRACE_TIME_MASK 0xFFFFFFFFUL
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#endif
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/* Define the port specific options for the _tx_build_options variable. This variable indicates
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how the ThreadX library was built. */
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#define TX_PORT_SPECIFIC_BUILD_OPTIONS 0
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/* Define the in-line initialization constant so that modules with in-line
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initialization capabilities can prevent their initialization from being
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a function call. */
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#define TX_INLINE_INITIALIZATION
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/* Determine whether or not stack checking is enabled. By default, ThreadX stack checking is
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disabled. When the following is defined, ThreadX thread stack checking is enabled. If stack
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checking is enabled (TX_ENABLE_STACK_CHECKING is defined), the TX_DISABLE_STACK_FILLING
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define is negated, thereby forcing the stack fill which is necessary for the stack checking
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logic. */
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#ifdef TX_ENABLE_STACK_CHECKING
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#undef TX_DISABLE_STACK_FILLING
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#endif
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/* Define the TX_THREAD control block extensions for this port. The main reason
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for the multiple macros is so that backward compatibility can be maintained with
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existing ThreadX kernel awareness modules. */
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#define TX_THREAD_EXTENSION_0
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#define TX_THREAD_EXTENSION_1
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#define TX_THREAD_EXTENSION_2
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#define TX_THREAD_EXTENSION_3
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/* Define the port extensions of the remaining ThreadX objects. */
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#define TX_BLOCK_POOL_EXTENSION
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#define TX_BYTE_POOL_EXTENSION
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#define TX_EVENT_FLAGS_GROUP_EXTENSION
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#define TX_MUTEX_EXTENSION
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#define TX_QUEUE_EXTENSION
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#define TX_SEMAPHORE_EXTENSION
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#define TX_TIMER_EXTENSION
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/* Define the user extension field of the thread control block. Nothing
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additional is needed for this port so it is defined as white space. */
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#ifndef TX_THREAD_USER_EXTENSION
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#define TX_THREAD_USER_EXTENSION
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#endif
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/* Define the macros for processing extensions in tx_thread_create, tx_thread_delete,
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tx_thread_shell_entry, and tx_thread_terminate. */
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#define TX_THREAD_CREATE_EXTENSION(thread_ptr)
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#define TX_THREAD_DELETE_EXTENSION(thread_ptr)
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#ifdef TX_ENABLE_FPU_SUPPORT
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#ifdef TX_MISRA_ENABLE
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ULONG _tx_misra_control_get(void);
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void _tx_misra_control_set(ULONG value);
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ULONG _tx_misra_fpccr_get(void);
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void _tx_misra_vfp_touch(void);
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#else
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__attribute__( ( always_inline ) ) static inline ULONG __get_control(void)
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{
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ULONG control_value;
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__asm__ volatile (" MRS %0,CONTROL ": "=r" (control_value) );
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return(control_value);
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}
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__attribute__( ( always_inline ) ) static inline void __set_control(ULONG control_value)
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{
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__asm__ volatile (" MSR CONTROL,%0": : "r" (control_value): "memory" );
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}
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#endif
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/* A completed thread falls into _thread_shell_entry and we can simply deactivate the FPU via CONTROL.FPCA
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in order to ensure no lazy stacking will occur. */
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#ifndef TX_MISRA_ENABLE
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#define TX_THREAD_COMPLETED_EXTENSION(thread_ptr) { \
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ULONG _tx_vfp_state; \
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_tx_vfp_state = __get_control(); \
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_tx_vfp_state = _tx_vfp_state & ~((ULONG) 0x4); \
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__set_control(_tx_vfp_state); \
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}
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#else
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#define TX_THREAD_COMPLETED_EXTENSION(thread_ptr) { \
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ULONG _tx_vfp_state; \
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_tx_vfp_state = _tx_misra_control_get(); \
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_tx_vfp_state = _tx_vfp_state & ~((ULONG) 0x4); \
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_tx_misra_control_set(_tx_vfp_state); \
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}
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#endif
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/* A thread can be terminated by another thread, so we first check if it's self-terminating and not in an ISR.
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If so, deactivate the FPU via CONTROL.FPCA. Otherwise we are in an interrupt or another thread is terminating
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this one, so if the FPCCR.LSPACT bit is set, we need to save the CONTROL.FPCA state, touch the FPU to flush
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the lazy FPU save, then restore the CONTROL.FPCA state. */
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#ifndef TX_MISRA_ENABLE
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#define TX_THREAD_TERMINATED_EXTENSION(thread_ptr) { \
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ULONG _tx_system_state; \
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_tx_system_state = TX_THREAD_GET_SYSTEM_STATE(); \
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if ((_tx_system_state == ((ULONG) 0)) && ((thread_ptr) == _tx_thread_current_ptr)) \
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{ \
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ULONG _tx_vfp_state; \
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_tx_vfp_state = __get_control(); \
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_tx_vfp_state = _tx_vfp_state & ~((ULONG) 0x4); \
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__set_control(_tx_vfp_state); \
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} \
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else \
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{ \
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ULONG _tx_fpccr; \
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_tx_fpccr = *((ULONG *) 0xE000EF34); \
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_tx_fpccr = _tx_fpccr & ((ULONG) 0x01); \
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if (_tx_fpccr == ((ULONG) 0x01)) \
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{ \
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ULONG _tx_vfp_state; \
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_tx_vfp_state = __get_control(); \
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_tx_vfp_state = _tx_vfp_state & ((ULONG) 0x4); \
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__asm__ volatile ("vmov.f32 s0, s0"); \
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if (_tx_vfp_state == ((ULONG) 0)) \
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{ \
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_tx_vfp_state = __get_control(); \
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_tx_vfp_state = _tx_vfp_state & ~((ULONG) 0x4); \
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__set_control(_tx_vfp_state); \
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} \
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} \
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} \
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}
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#else
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#define TX_THREAD_TERMINATED_EXTENSION(thread_ptr) { \
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ULONG _tx_system_state; \
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_tx_system_state = TX_THREAD_GET_SYSTEM_STATE(); \
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if ((_tx_system_state == ((ULONG) 0)) && ((thread_ptr) == _tx_thread_current_ptr)) \
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{ \
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ULONG _tx_vfp_state; \
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_tx_vfp_state = _tx_misra_control_get(); \
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_tx_vfp_state = _tx_vfp_state & ~((ULONG) 0x4); \
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_tx_misra_control_set(_tx_vfp_state); \
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} \
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else \
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{ \
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ULONG _tx_fpccr; \
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_tx_fpccr = _tx_misra_fpccr_get(); \
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_tx_fpccr = _tx_fpccr & ((ULONG) 0x01); \
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if (_tx_fpccr == ((ULONG) 0x01)) \
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{ \
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ULONG _tx_vfp_state; \
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_tx_vfp_state = _tx_misra_control_get(); \
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_tx_vfp_state = _tx_vfp_state & ((ULONG) 0x4); \
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_tx_misra_vfp_touch(); \
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if (_tx_vfp_state == ((ULONG) 0)) \
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{ \
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_tx_vfp_state = _tx_misra_control_get(); \
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_tx_vfp_state = _tx_vfp_state & ~((ULONG) 0x4); \
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_tx_misra_control_set(_tx_vfp_state); \
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} \
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} \
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} \
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}
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#endif
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#else
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#define TX_THREAD_COMPLETED_EXTENSION(thread_ptr)
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#define TX_THREAD_TERMINATED_EXTENSION(thread_ptr)
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#endif
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/* Define the ThreadX object creation extensions for the remaining objects. */
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#define TX_BLOCK_POOL_CREATE_EXTENSION(pool_ptr)
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#define TX_BYTE_POOL_CREATE_EXTENSION(pool_ptr)
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#define TX_EVENT_FLAGS_GROUP_CREATE_EXTENSION(group_ptr)
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#define TX_MUTEX_CREATE_EXTENSION(mutex_ptr)
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#define TX_QUEUE_CREATE_EXTENSION(queue_ptr)
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#define TX_SEMAPHORE_CREATE_EXTENSION(semaphore_ptr)
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#define TX_TIMER_CREATE_EXTENSION(timer_ptr)
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/* Define the ThreadX object deletion extensions for the remaining objects. */
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#define TX_BLOCK_POOL_DELETE_EXTENSION(pool_ptr)
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#define TX_BYTE_POOL_DELETE_EXTENSION(pool_ptr)
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#define TX_EVENT_FLAGS_GROUP_DELETE_EXTENSION(group_ptr)
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#define TX_MUTEX_DELETE_EXTENSION(mutex_ptr)
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#define TX_QUEUE_DELETE_EXTENSION(queue_ptr)
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#define TX_SEMAPHORE_DELETE_EXTENSION(semaphore_ptr)
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#define TX_TIMER_DELETE_EXTENSION(timer_ptr)
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/* Define the get system state macro. */
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#ifndef TX_THREAD_GET_SYSTEM_STATE
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#ifndef TX_MISRA_ENABLE
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__attribute__( ( always_inline ) ) static inline unsigned int __get_ipsr_value(void)
|
||||
{
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||||
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unsigned int ipsr_value;
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||||
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__asm__ volatile (" MRS %0,IPSR ": "=r" (ipsr_value) );
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return(ipsr_value);
|
||||
}
|
||||
|
||||
|
||||
#define TX_THREAD_GET_SYSTEM_STATE() (_tx_thread_system_state | __get_ipsr_value())
|
||||
#else
|
||||
ULONG _tx_misra_ipsr_get(VOID);
|
||||
#define TX_THREAD_GET_SYSTEM_STATE() (_tx_thread_system_state | _tx_misra_ipsr_get())
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
/* Define the check for whether or not to call the _tx_thread_system_return function. A non-zero value
|
||||
indicates that _tx_thread_system_return should not be called. */
|
||||
|
||||
#ifndef TX_THREAD_SYSTEM_RETURN_CHECK
|
||||
#define TX_THREAD_SYSTEM_RETURN_CHECK(c) (c) = ((ULONG) _tx_thread_preempt_disable);
|
||||
#endif
|
||||
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||||
/* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to
|
||||
prevent early scheduling on Cortex-M parts. */
|
||||
|
||||
#define TX_PORT_SPECIFIC_POST_INITIALIZATION _tx_thread_preempt_disable++;
|
||||
|
||||
|
||||
/* This ARM architecture has the CLZ instruction. This is available on
|
||||
architectures v5 and above. If available, redefine the macro for calculating the
|
||||
lowest bit set. */
|
||||
|
||||
#ifndef TX_DISABLE_INLINE
|
||||
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||||
#define TX_LOWEST_SET_BIT_CALCULATE(m, b) __asm__ volatile (" RBIT %0,%1 ": "=r" (m) : "r" (m) ); \
|
||||
__asm__ volatile (" CLZ %0,%1 ": "=r" (b) : "r" (m) );
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#ifndef TX_DISABLE_INLINE
|
||||
|
||||
/* Define AC6 specific macros, with in-line assembly for performance. */
|
||||
|
||||
__attribute__( ( always_inline ) ) static inline unsigned int __disable_interrupts(void)
|
||||
{
|
||||
|
||||
unsigned int primask_value;
|
||||
|
||||
__asm__ volatile (" MRS %0,PRIMASK ": "=r" (primask_value) );
|
||||
__asm__ volatile (" CPSID i" : : : "memory" );
|
||||
return(primask_value);
|
||||
}
|
||||
|
||||
__attribute__( ( always_inline ) ) static inline void __restore_interrupts(unsigned int primask_value)
|
||||
{
|
||||
|
||||
__asm__ volatile (" MSR PRIMASK,%0": : "r" (primask_value): "memory" );
|
||||
}
|
||||
|
||||
__attribute__( ( always_inline ) ) static inline unsigned int __get_primask_value(void)
|
||||
{
|
||||
|
||||
unsigned int primask_value;
|
||||
|
||||
__asm__ volatile (" MRS %0,PRIMASK ": "=r" (primask_value) );
|
||||
return(primask_value);
|
||||
}
|
||||
|
||||
__attribute__( ( always_inline ) ) static inline void __enable_interrupts(void)
|
||||
{
|
||||
|
||||
__asm__ volatile (" CPSIE i": : : "memory" );
|
||||
}
|
||||
|
||||
|
||||
__attribute__( ( always_inline ) ) static inline void _tx_thread_system_return_inline(void)
|
||||
{
|
||||
unsigned int interrupt_save;
|
||||
|
||||
*((ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
|
||||
if (__get_ipsr_value() == 0)
|
||||
{
|
||||
interrupt_save = __get_primask_value();
|
||||
__enable_interrupts();
|
||||
__restore_interrupts(interrupt_save);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
|
||||
|
||||
#define TX_DISABLE interrupt_save = __disable_interrupts();
|
||||
#define TX_RESTORE __restore_interrupts(interrupt_save);
|
||||
|
||||
|
||||
/* Redefine _tx_thread_system_return for improved performance. */
|
||||
|
||||
#define _tx_thread_system_return _tx_thread_system_return_inline
|
||||
|
||||
|
||||
#else
|
||||
|
||||
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
|
||||
|
||||
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE);
|
||||
#define TX_RESTORE _tx_thread_interrupt_control(interrupt_save);
|
||||
#endif
|
||||
|
||||
|
||||
/* Define FPU extension for the Cortex-M7. Each is assumed to be called in the context of the executing
|
||||
thread. This is for legacy only, and not needed any longer. */
|
||||
|
||||
void tx_thread_fpu_enable(void);
|
||||
void tx_thread_fpu_disable(void);
|
||||
|
||||
|
||||
/* Define the version ID of ThreadX. This may be utilized by the application. */
|
||||
|
||||
#ifdef TX_THREAD_INIT
|
||||
CHAR _tx_version_id[] =
|
||||
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/AC6 Version 6.0.1 *";
|
||||
#else
|
||||
extern CHAR _tx_version_id[];
|
||||
#endif
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
Reference in New Issue
Block a user