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Release 6.1.6

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This commit is contained in:
Yuxin Zhou
2021-04-03 01:03:21 +00:00
parent 6ffaf848a0
commit b12bd44faa
388 changed files with 33113 additions and 1136 deletions
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9
ports/cortex_m33/ac5/inc/tx_port.h
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@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-M33/AC5 */
/* 6.1 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 Scott Larson Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -506,7 +509,7 @@ VOID _tx_thread_interrupt_restore(UIN
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int was_masked;
#define TX_INTERRUPT_SAVE_AREA UINT was_masked;
#define TX_DISABLE was_masked = __disable_irq();
#define TX_RESTORE if (was_masked == 0) __enable_irq();
@@ -535,7 +538,7 @@ unsigned int was_masked;
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33/AC5 Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33/AC5 Version 6.1.6 *";
#else
#ifdef TX_MISRA_ENABLE
extern CHAR _tx_version_id[100];

3
ports/cortex_m33/ac5/readme_threadx.txt
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@@ -204,6 +204,9 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
09-30-2020 Initial ThreadX 6.1 version for Cortex-M33 using AC5 tools.

2
ports/cortex_m33/ac6/inc/tx_port.h
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@@ -510,7 +510,7 @@ VOID _tx_thread_interrupt_restore(UIN
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int was_masked;
#define TX_INTERRUPT_SAVE_AREA UINT was_masked;
#define TX_DISABLE was_masked = __disable_irq();
#define TX_RESTORE if (was_masked == 0) __enable_irq();

7
ports/cortex_m33/ac6/readme_threadx.txt
View File

@@ -205,6 +205,13 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
tx_thread_schedule.s Added low power support
03-02-2021 The following files were changed/added for version 6.1.5:
tx_port.h Added ULONG64_DEFINED
09-30-2020 Initial ThreadX 6.1 version for Cortex-M33 using AC6 tools.

19
ports/cortex_m33/ac6/src/tx_thread_schedule.S
View File

@@ -26,7 +26,7 @@
/* FUNCTION RELEASE */
/* */
/* _tx_thread_schedule Cortex-M33/AC6 */
/* 6.1 */
/* 6.1.6 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -59,6 +59,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 Scott Larson Initial Version 6.1 */
/* 04-02-2021 Scott Larson Modified comment(s), added */
/* low power code, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
// VOID _tx_thread_schedule(VOID)
@@ -248,11 +251,25 @@ __tx_ts_wait:
LDR r1, [r2] // Pickup the next thread to execute pointer
STR r1, [r0] // Store it in the current pointer
CBNZ r1, __tx_ts_ready // If non-NULL, a new thread is ready!
#ifdef TX_LOW_POWER
PUSH {r0-r3}
BL tx_low_power_enter // Possibly enter low power mode
POP {r0-r3}
#endif
#ifdef TX_ENABLE_WFI
DSB // Ensure no outstanding memory transactions
WFI // Wait for interrupt
ISB // Ensure pipeline is flushed
#endif
#ifdef TX_LOW_POWER
PUSH {r0-r3}
BL tx_low_power_exit // Exit low power mode
POP {r0-r3}
#endif
CPSIE i // Enable interrupts
B __tx_ts_wait // Loop to continue waiting

4
ports/cortex_m33/gnu/inc/tx_port.h
View File

@@ -546,7 +546,7 @@ unsigned int interrupt_save;
}
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = __disable_interrupts();
#define TX_RESTORE __restore_interrupts(interrupt_save);
@@ -559,7 +559,7 @@ unsigned int interrupt_save;
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE);
#define TX_RESTORE _tx_thread_interrupt_control(interrupt_save);

7
ports/cortex_m33/gnu/readme_threadx.txt
View File

@@ -188,6 +188,13 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
tx_thread_schedule.s Added low power support
03-02-2021 The following files were changed/added for version 6.1.5:
tx_port.h Added ULONG64_DEFINED
09-30-2020 Initial ThreadX 6.1 version for Cortex-M33 using GNU tools.

19
ports/cortex_m33/gnu/src/tx_thread_schedule.S
View File

@@ -26,7 +26,7 @@
/* FUNCTION RELEASE */
/* */
/* _tx_thread_schedule Cortex-M33/GNU */
/* 6.1 */
/* 6.1.6 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -59,6 +59,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 Scott Larson Initial Version 6.1 */
/* 04-02-2021 Scott Larson Modified comment(s), added */
/* low power code, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
// VOID _tx_thread_schedule(VOID)
@@ -248,11 +251,25 @@ __tx_ts_wait:
LDR r1, [r2] // Pickup the next thread to execute pointer
STR r1, [r0] // Store it in the current pointer
CBNZ r1, __tx_ts_ready // If non-NULL, a new thread is ready!
#ifdef TX_LOW_POWER
PUSH {r0-r3}
BL tx_low_power_enter // Possibly enter low power mode
POP {r0-r3}
#endif
#ifdef TX_ENABLE_WFI
DSB // Ensure no outstanding memory transactions
WFI // Wait for interrupt
ISB // Ensure pipeline is flushed
#endif
#ifdef TX_LOW_POWER
PUSH {r0-r3}
BL tx_low_power_exit // Exit low power mode
POP {r0-r3}
#endif
CPSIE i // Enable interrupts
B __tx_ts_wait // Loop to continue waiting

7
ports/cortex_m33/iar/readme_threadx.txt
View File

@@ -199,6 +199,13 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
tx_thread_schedule.s Added low power support
03-02-2021 The following files were changed/added for version 6.1.5:
tx_port.h Added ULONG64_DEFINED
09-30-2020 Initial ThreadX 6.1 version for Cortex-M33 using IAR's ARM tools.

23
ports/cortex_m33/iar/src/tx_thread_schedule.s
View File

@@ -32,6 +32,10 @@
EXTERN _tx_thread_secure_stack_context_save
EXTERN _tx_thread_secure_mode_stack_allocate
EXTERN _tx_thread_secure_mode_stack_free
#ifdef TX_LOW_POWER
EXTERN tx_low_power_enter
EXTERN tx_low_power_exit
#endif
;
;
SECTION `.text`:CODE:NOROOT(2)
@@ -41,7 +45,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_schedule Cortex-M33/IAR */
;/* 6.1 */
;/* 6.1.6 */
;/* AUTHOR */
;/* */
;/* Scott Larson, Microsoft Corporation */
@@ -74,6 +78,9 @@
;/* DATE NAME DESCRIPTION */
;/* */
;/* 09-30-2020 Scott Larson Initial Version 6.1 */
;/* 04-02-2021 Scott Larson Modified comment(s), added */
;/* low power code, */
;/* resulting in version 6.1.6 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_schedule(VOID)
@@ -261,11 +268,25 @@ __tx_ts_wait:
LDR r1, [r2] ; Pickup the next thread to execute pointer
STR r1, [r0] ; Store it in the current pointer
CBNZ r1, __tx_ts_ready ; If non-NULL, a new thread is ready!
#ifdef TX_LOW_POWER
PUSH {r0-r3}
BL tx_low_power_enter ; Possibly enter low power mode
POP {r0-r3}
#endif
#ifdef TX_ENABLE_WFI
DSB ; Ensure no outstanding memory transactions
WFI ; Wait for interrupt
ISB ; Ensure pipeline is flushed
#endif
#ifdef TX_LOW_POWER
PUSH {r0-r3}
BL tx_low_power_exit ; Exit low power mode
POP {r0-r3}
#endif
CPSIE i ; Enable interrupts
B __tx_ts_wait ; Loop to continue waiting
;