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Release 6.1.6

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This commit is contained in:
Yuxin Zhou
2021-04-03 01:03:21 +00:00
parent 6ffaf848a0
commit b12bd44faa
388 changed files with 33113 additions and 1136 deletions
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9
ports_module/cortex-m7/gnu/inc/tx_port.h
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@@ -48,6 +48,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -470,7 +473,7 @@ unsigned int interrupt_save;
}
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = __disable_interrupts();
#define TX_RESTORE __restore_interrupts(interrupt_save);
@@ -483,7 +486,7 @@ unsigned int interrupt_save;
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE);
#define TX_RESTORE _tx_thread_interrupt_control(interrupt_save);
@@ -501,7 +504,7 @@ void tx_thread_fpu_disable(void);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/GNU Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/GNU Version 6.1.6 *";
#else
extern CHAR _tx_version_id[];
#endif

7
ports_module/cortex-m7/gnu/inc/txm_module_port.h
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@@ -101,12 +101,17 @@ The following extensions must also be defined in tx_port.h:
/* For the following 3 access control settings, change TEX and C, B, S (bits 21 through 16 of MPU_RASR)
* to reflect your system memory attributes (cache, shareable, memory type). */
/* Code region access control: privileged read-only, outer & inner write-back, normal memory, shareable. */
#ifndef TXM_MODULE_MPU_CODE_ACCESS_CONTROL
#define TXM_MODULE_MPU_CODE_ACCESS_CONTROL 0x06070000
#endif
/* Data region access control: execute never, read/write, outer & inner write-back, normal memory, shareable. */
#ifndef TXM_MODULE_MPU_DATA_ACCESS_CONTROL
#define TXM_MODULE_MPU_DATA_ACCESS_CONTROL 0x13070000
#endif
/* Shared region access control: execute never, read-only, outer & inner write-back, normal memory, shareable. */
#ifndef TXM_MODULE_MPU_SHARED_ACCESS_CONTROL
#define TXM_MODULE_MPU_SHARED_ACCESS_CONTROL 0x12070000
#endif
/* Define constants specific to the tools the module can be built with for this particular modules port. */