Release 6.1.6

This commit is contained in:
Yuxin Zhou
2021-04-03 01:03:21 +00:00
parent 6ffaf848a0
commit b12bd44faa
388 changed files with 33113 additions and 1136 deletions

View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-M33/AC6 */
/* 6.1.3 */
/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -47,7 +47,10 @@
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 12-31-2020 Scott Larson Initial Version 6.1.3 */
/* 09-30-2020 Scott Larson Initial Version 6.1 */
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
/* macro definition, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -538,7 +541,7 @@ VOID _tx_thread_interrupt_restore(UIN
#else
#define TX_INTERRUPT_SAVE_AREA unsigned int was_masked;
#define TX_INTERRUPT_SAVE_AREA UINT was_masked;
#define TX_DISABLE was_masked = __disable_irq();
#define TX_RESTORE if (was_masked == 0) __enable_irq();
@@ -567,7 +570,7 @@ unsigned int was_masked;
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33/AC6 Version 6.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33/AC6 Version 6.1.6 *";
#else
#ifdef TX_MISRA_ENABLE
extern CHAR _tx_version_id[100];

View File

@@ -26,7 +26,7 @@
/* FUNCTION RELEASE */
/* */
/* _tx_thread_schedule Cortex-M33/MPU/AC6 */
/* 6.1.3 */
/* 6.1.6 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -59,6 +59,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 12-31-2020 Scott Larson Initial Version 6.1.3 */
/* 04-02-2021 Scott Larson Modified comments and fixed */
/* MPU region configuration, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
// VOID _tx_thread_schedule(VOID)
@@ -379,6 +382,8 @@ _skip_secure_restore:
LDR r1, =0xE000ED9C // Build address of MPU base register
// Use alias registers to quickly load MPU
LDR r2, =0xE000ED98 // Get region register
STR r3, [r2] // Set region to 0
ADD r0, r0, #0x64 // Build address of MPU register start in thread control block
LDM r0!, {r2-r9} // Load first four MPU regions
STM r1, {r2-r9} // Store first four MPU regions

View File

@@ -29,8 +29,8 @@
/* */
/* FUNCTION RELEASE */
/* */
/* _txm_module_manager_mm_register_setup Cortex-M33/MPU */
/* 6.1.3 */
/* _txm_module_manager_mm_register_setup Cortex-M33/Generic */
/* 6.1.6 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -60,7 +60,10 @@
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 12-31-2020 Scott Larson Initial Version 6.1.3 */
/* 12-31-2020 Scott Larson Initial Version 6.1.3 */
/* 04-02-2021 Scott Larson Modified comments and check */
/* for overflow, */
/* resulting 6.1.6 */
/* */
/**************************************************************************/
VOID _txm_module_manager_mm_register_setup(TXM_MODULE_INSTANCE *module_instance)
@@ -120,8 +123,8 @@ ULONG callback_stack_size;
/* */
/* FUNCTION RELEASE */
/* */
/* _txm_module_manager_inside_data_check Cortex-M33/MPU/AC6 */
/* 6.1.3 */
/* _txm_module_manager_inside_data_check Cortex-M33/Generic */
/* 6.1.6 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -153,7 +156,9 @@ ULONG callback_stack_size;
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 12-31-2020 Scott Larson Initial Version 6.1.3 */
/* 12-31-2020 Scott Larson Initial Version 6.1.3 */
/* 04-02-2021 Scott Larson Modified comments, */
/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
UINT _txm_module_manager_inside_data_check(TXM_MODULE_INSTANCE *module_instance, ALIGN_TYPE obj_ptr, UINT obj_size)
@@ -164,6 +169,12 @@ UINT num_shared_memory_mpu_entries;
ALIGN_TYPE shared_memory_address_start;
ALIGN_TYPE shared_memory_address_end;
/* Check for overflow. */
if ((obj_ptr) > ((obj_ptr) + (obj_size)))
{
return(TX_FALSE);
}
/* Check if the object is inside the module data. */
if ((obj_ptr >= (ALIGN_TYPE) module_instance -> txm_module_instance_data_start) &&
((obj_ptr + obj_size) <= ((ALIGN_TYPE) module_instance -> txm_module_instance_data_end + 1)))