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Added thumb mode support under IAR for module manager on Cortex-A7 pl… (#289)

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* Added thumb mode support under IAR for module manager on Cortex-A7 platform.

* update code for comments.
This commit is contained in:
yajunxiaMS
2023-08-07 17:35:31 +08:00
committed by GitHub
parent 7fa087d061
commit bc8bed494d
33 changed files with 809 additions and 694 deletions
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12
ports_module/cortex_a7/gnu/example_build/txm_module_preamble.s
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@@ -14,14 +14,18 @@ __txm_module_preamble:
.dc.l 0x1 // Module Minor Version
.dc.l 32 // Module Preamble Size in 32-bit words
.dc.l 0x12345678 // Module ID (application defined)
.dc.l 0x01000001 // Module Properties where:
.dc.l 0x02000001 // Module Properties where:
// Bits 31-24: Compiler ID
// 0 -> IAR
// 1 -> RVDS
// 2 -> GNU
// Bits 23-1: Reserved
// Bit 0: 0 -> Privileged mode execution (no MMU protection)
// 1 -> User mode execution (MMU protection)
// Bits 23-3: Reserved
// Bit 2: 0 -> Disable shared/external memory access
// 1 -> Enable shared/external memory access
// Bit 1: 0 -> No MPU protection
// 1 -> MPU protection (must have user mode selected - bit 0 set)
// Bit 0: 0 -> Privileged mode execution
// 1 -> User mode execution
.dc.l _txm_module_thread_shell_entry // Module Shell Entry Point
.dc.l demo_module_start // Module Start Thread Entry Point
.dc.l 0 // Module Stop Thread Entry Point

2
ports_module/cortex_a7/gnu/inc/txm_module_port.h
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@@ -410,7 +410,7 @@ UINT _txm_module_manager_inside_data_check(ULONG pointer);
#define TXM_MODULE_MANAGER_VERSION_ID \
CHAR _txm_module_manager_version_id[] = \
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Module Cortex-A7/MMU/GNU Version 6.2.1 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Module Cortex-A7/MMU/GNU Version 6.x *";
#endif

4
ports_module/cortex_a7/gnu/module_manager/src/tx_thread_context_save.s
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@@ -30,7 +30,9 @@
.global _tx_thread_system_state
.global _tx_thread_current_ptr
.global __tx_irq_processing_return
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
.global _tx_execution_isr_enter
#endif
/* No 16-bit Thumb mode veneer code is needed for _tx_thread_context_save
since it will never be called 16-bit mode. */

2
ports_module/cortex_a7/gnu/module_manager/src/tx_thread_stack_build.s
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@@ -38,6 +38,8 @@ CPSR_MASK = 0xFF // Mask initial CPSR, T, IRQ & F
CPSR_MASK = 0xBF // Mask initial CPSR, T, IRQ interrupts enabled
#endif
.global _tx_thread_schedule
.text
.align 2
/**************************************************************************/