Release 6.1.11
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1033
ports/cortex_m4/gnu/src/tx_misra.S
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1033
ports/cortex_m4/gnu/src/tx_misra.S
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@@ -37,7 +37,7 @@
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/* FUNCTION RELEASE */
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/* */
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/* _tx_thread_schedule Cortex-M4/GNU */
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/* 6.1.10 */
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/* 6.1.11 */
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/* AUTHOR */
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/* */
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/* Scott Larson, Microsoft Corporation */
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@@ -72,6 +72,8 @@
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/* 06-02-2021 Scott Larson Initial Version 6.1.7 */
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/* 01-31-2022 Scott Larson Fixed predefined macro name, */
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/* resulting in version 6.1.10 */
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/* 04-25-2022 Scott Larson Added BASEPRI support, */
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/* resulting in version 6.1.11 */
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/* */
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/**************************************************************************/
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// VOID _tx_thread_schedule(VOID)
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@@ -131,12 +133,22 @@ __tx_ts_handler:
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#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
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/* Call the thread exit function to indicate the thread is no longer executing. */
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#ifdef TX_PORT_USE_BASEPRI
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LDR r1, =TX_PORT_BASEPRI // Mask interrupt priorities =< TX_PORT_BASEPRI
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MSR BASEPRI, r1
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#else
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CPSID i // Disable interrupts
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#endif /* TX_PORT_USE_BASEPRI */
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PUSH {r0, lr} // Save LR (and r0 just for alignment)
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BL _tx_execution_thread_exit // Call the thread exit function
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POP {r0, lr} // Recover LR
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#ifdef TX_PORT_USE_BASEPRI
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MOV r0, 0 // Disable BASEPRI masking (enable interrupts)
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MSR BASEPRI, r0
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#else
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CPSIE i // Enable interrupts
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#endif
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#endif /* TX_PORT_USE_BASEPRI */
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#endif /* EXECUTION PROFILE */
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LDR r0, =_tx_thread_current_ptr // Build current thread pointer address
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LDR r2, =_tx_thread_execute_ptr // Build execute thread pointer address
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@@ -181,14 +193,24 @@ __tx_ts_new:
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/* Now we are looking for a new thread to execute! */
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#ifdef TX_PORT_USE_BASEPRI
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LDR r1, =TX_PORT_BASEPRI // Mask interrupt priorities =< TX_PORT_BASEPRI
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MSR BASEPRI, r1
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#else
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CPSID i // Disable interrupts
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#endif
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LDR r1, [r2] // Is there another thread ready to execute?
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CBZ r1, __tx_ts_wait // No, skip to the wait processing
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/* Yes, another thread is ready for else, make the current thread the new thread. */
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STR r1, [r0] // Setup the current thread pointer to the new thread
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#ifdef TX_PORT_USE_BASEPRI
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MOV r4, #0 // Disable BASEPRI masking (enable interrupts)
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MSR BASEPRI, r4
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#else
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CPSIE i // Enable interrupts
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#endif
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/* Increment the thread run count. */
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@@ -232,7 +254,12 @@ _skip_vfp_restore:
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are disabled to allow use of WFI for waiting for a thread to arrive. */
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__tx_ts_wait:
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#ifdef TX_PORT_USE_BASEPRI
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LDR r1, =TX_PORT_BASEPRI // Mask interrupt priorities =< TX_PORT_BASEPRI
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MSR BASEPRI, r1
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#else
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CPSID i // Disable interrupts
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#endif
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LDR r1, [r2] // Pickup the next thread to execute pointer
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STR r1, [r0] // Store it in the current pointer
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CBNZ r1, __tx_ts_ready // If non-NULL, a new thread is ready!
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@@ -255,7 +282,12 @@ __tx_ts_wait:
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POP {r0-r3}
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#endif
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#ifdef TX_PORT_USE_BASEPRI
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MOV r4, #0 // Disable BASEPRI masking (enable interrupts)
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MSR BASEPRI, r4
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#else
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CPSIE i // Enable interrupts
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#endif
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B __tx_ts_wait // Loop to continue waiting
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/* At this point, we have a new thread ready to go. Clear any newly pended PendSV - since we are
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@@ -267,8 +299,12 @@ __tx_ts_ready:
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STR r7, [r8, #0xD04] // Clear any PendSV
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/* Re-enable interrupts and restore new thread. */
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#ifdef TX_PORT_USE_BASEPRI
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MOV r4, #0 // Disable BASEPRI masking (enable interrupts)
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MSR BASEPRI, r4
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#else
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CPSIE i // Enable interrupts
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#endif
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B __tx_ts_restore // Restore the thread
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// }
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