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Release 6.1.8

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This commit is contained in:
Yuxin Zhou
2021-07-28 07:24:02 +00:00
parent 244365fc6a
commit d0dab58250
651 changed files with 11636 additions and 10696 deletions
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7
ports/cortex_m23/gnu/inc/tx_secure_interface.h
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@@ -25,8 +25,8 @@
/* */
/* COMPONENT DEFINITION RELEASE */
/* */
/* tx_secure_interface.h Cortex-M23 */
/* 6.1 */
/* tx_secure_interface.h PORTABLE C */
/* 6.1 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -51,9 +51,10 @@
/* Define internal secure thread stack function prototypes. */
extern void _tx_thread_secure_stack_initialize(void);
extern UINT _tx_thread_secure_mode_stack_initialize(void);
extern UINT _tx_thread_secure_mode_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size);
extern UINT _tx_thread_secure_mode_stack_free(TX_THREAD *thread_ptr);
extern void _tx_thread_secure_stack_initialize(void);
extern void _tx_thread_secure_stack_context_save(TX_THREAD *thread_ptr);
extern void _tx_thread_secure_stack_context_restore(TX_THREAD *thread_ptr);

17
ports/cortex_m23/gnu/src/tx_initialize_low_level.S
View File

@@ -29,13 +29,12 @@ SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1)
STACK_SIZE = 0x00000400
HEAP_SIZE = 0x00000000
/**************************************************************************/
/* */
/* FUNCTION RELEASE */
/* */
/* _tx_initialize_low_level Cortex-M23/GNU */
/* 6.1 */
/* 6.1 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -165,10 +164,14 @@ __tx_IntHandler:
// VOID InterruptHandler (VOID)
// {
PUSH {r0,lr} // Save LR (and dummy r0 to maintain stack alignment)
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
BL _tx_execution_isr_enter // Call the ISR enter function
#endif
/* Do interrupt handler work here */
/* .... */
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
BL _tx_execution_isr_exit // Call the ISR exit function
#endif
POP {r0, r1}
MOV lr, r1
BX lr
@@ -186,7 +189,13 @@ SysTick_Handler:
// VOID TimerInterruptHandler (VOID)
// {
PUSH {r0,lr} // Save LR (and dummy r0 to maintain stack alignment)
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
BL _tx_execution_isr_enter // Call the ISR enter function
#endif
BL _tx_timer_interrupt
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
BL _tx_execution_isr_exit // Call the ISR exit function
#endif
POP {r0, r1}
MOV lr, r1
BX lr

9
ports/cortex_m23/gnu/src/tx_thread_context_restore.s
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@@ -19,11 +19,10 @@
/** */
/**************************************************************************/
/**************************************************************************/
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
.global _tx_execution_isr_exit
#endif
/**************************************************************************/
/* */
/* FUNCTION RELEASE */
@@ -48,11 +47,11 @@
/* */
/* CALLS */
/* */
/* None */
/* [_tx_execution_isr_exit] Execution profiling ISR exit */
/* */
/* CALLED BY */
/* */
/* None */
/* ISRs Interrupt Service Routines */
/* */
/* RELEASE HISTORY */
/* */

12
ports/cortex_m23/gnu/src/tx_thread_context_save.s
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@@ -20,7 +20,9 @@
/**************************************************************************/
/**************************************************************************/
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
.global _tx_execution_isr_enter
#endif
/**************************************************************************/
/* */
/* FUNCTION RELEASE */
@@ -45,11 +47,11 @@
/* */
/* CALLS */
/* */
/* None */
/* [_tx_execution_isr_enter] Execution profiling ISR enter */
/* */
/* CALLED BY */
/* */
/* None */
/* ISRs */
/* */
/* RELEASE HISTORY */
/* */
@@ -69,15 +71,13 @@
.type _tx_thread_context_save, function
_tx_thread_context_save:
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
/* Call the ISR enter function to indicate an ISR is starting. */
PUSH {r0, lr} // Save return address
BL _tx_execution_isr_enter // Call the ISR enter function
POP {r0, lr} // Recover return address
#endif
/* Context is already saved - just return. */
BX lr
// }
.end

10
ports/cortex_m23/gnu/src/tx_thread_interrupt_control.s
View File

@@ -68,11 +68,9 @@
.thumb_func
.type _tx_thread_interrupt_control, function
_tx_thread_interrupt_control:
/* Pickup current interrupt lockout posture. */
MRS r1, PRIMASK
MSR PRIMASK, r0
MOV r0, r1
BX lr
MRS r1, PRIMASK // Pickup current interrupt lockout
MSR PRIMASK, r0 // Apply the new interrupt lockout
MOV r0, r1 // Transfer old to return register
BX lr // Return to caller
// }
.end

6
ports/cortex_m23/gnu/src/tx_thread_interrupt_disable.s
View File

@@ -38,11 +38,11 @@
/* */
/* INPUT */
/* */
/* old_posture Old interrupt lockout posture */
/* None */
/* */
/* OUTPUT */
/* */
/* None */
/* old_posture Old interrupt lockout posture */
/* */
/* CALLS */
/* */
@@ -59,7 +59,7 @@
/* 09-30-2020 Scott Larson Initial Version 6.1 */
/* */
/**************************************************************************/
// UINT _tx_thread_interrupt_disable(UINT new_posture)
// UINT _tx_thread_interrupt_disable(VOID)
// {
.section .text
.balign 4

6
ports/cortex_m23/gnu/src/tx_thread_interrupt_restore.s
View File

@@ -38,11 +38,11 @@
/* */
/* INPUT */
/* */
/* None */
/* previous_posture Previous interrupt posture */
/* */
/* OUTPUT */
/* */
/* previous_posture Previous interrupt posture */
/* None */
/* */
/* CALLS */
/* */
@@ -59,7 +59,7 @@
/* 09-30-2020 Scott Larson Initial Version 6.1 */
/* */
/**************************************************************************/
// VOID _tx_thread_interrupt_restore(UINT new_posture)
// VOID _tx_thread_interrupt_restore(UINT previous_posture)
// {
.section .text
.balign 4

90
ports/cortex_m23/gnu/src/tx_thread_schedule.s
View File

@@ -90,7 +90,6 @@ _tx_thread_schedule:
CPSIE i
/* Enter the scheduler for the first time. */
LDR r0, =0x10000000 // Load PENDSVSET bit
LDR r1, =0xE000ED04 // Load ICSR address
STR r0, [r1] // Set PENDSVBIT in ICSR
@@ -104,7 +103,7 @@ __tx_wait_here:
// }
/* Generic context switching PendSV handler. */
.section .text
.balign 4
.syntax unified
@@ -116,7 +115,7 @@ __tx_wait_here:
PendSV_Handler:
__tx_ts_handler:
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
/* Call the thread exit function to indicate the thread is no longer executing. */
CPSID i // Disable interrupts
PUSH {r0, lr} // Save LR (and r0 just for alignment)
@@ -125,11 +124,9 @@ __tx_ts_handler:
MOV lr, r1 //
CPSIE i // Enable interrupts
#endif
MOVW r0, #:lower16:_tx_thread_current_ptr // Build current thread pointer address
MOVT r0, #:upper16:_tx_thread_current_ptr
MOVW r2, #:lower16:_tx_thread_execute_ptr // Build execute thread pointer address
MOVT r2, #:upper16:_tx_thread_execute_ptr
LDR r0, =_tx_thread_current_ptr // Build current thread pointer address
LDR r2, =_tx_thread_execute_ptr // Build execute thread pointer address
MOVW r3, #0 // Build NULL value
LDR r1, [r0] // Pickup current thread pointer
@@ -142,27 +139,27 @@ __tx_ts_handler:
STR r3, [r0] // Set _tx_thread_current_ptr to NULL
MRS r3, PSP // Pickup PSP pointer (thread's stack pointer)
SUBS r3, r3, #16 // Allocate stack space
STM r3!, {r4-r7} // Save its remaining registers (M3 Instruction: STMDB r12!, {r4-r11})
MOV r4, r8 //
MOV r5, r9 //
MOV r6, r10 //
MOV r7, r11 //
STM r3!, {r4-r7} // Save r4-r7 (M4 Instruction: STMDB r12!, {r4-r11})
MOV r4, r8 // Copy r8-r11 to multisave registers
MOV r5, r9
MOV r6, r10
MOV r7, r11
SUBS r3, r3, #32 // Allocate stack space
STM r3!, {r4-r7} //
STM r3!, {r4-r7} // Save r8-r11
SUBS r3, r3, #20 // Allocate stack space
MOV r5, lr //
STR r5, [r3] // Save LR on the stack
MOV r5, lr // Copy lr to saveable register
STR r5, [r3] // Save lr on the stack
STR r3, [r1, #8] // Save the thread stack pointer
#if (!defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE))
// Save secure context
LDR r5, =0x90 // Secure stack index offset
LDR r5, [r1, r5] // Load secure stack index
CBZ r5, _skip_secure_save // Skip save if there is no secure context
PUSH {r0, r1, r2, r3} // Save scratch registers
PUSH {r0-r3} // Save scratch registers
MOV r0, r1 // Move thread ptr to r0
BL _tx_thread_secure_stack_context_save // Save secure stack
POP {r0, r1, r2, r3} // Restore secure registers
POP {r0-r3} // Restore secure registers
_skip_secure_save:
#endif
@@ -200,8 +197,7 @@ __tx_ts_new:
__tx_ts_restore:
LDR r7, [r1, #4] // Pickup the current thread run count
MOVW r4, #:lower16:_tx_timer_time_slice // Build address of time-slice variable
MOVT r4, #:upper16:_tx_timer_time_slice
LDR r4, =_tx_timer_time_slice // Build address of time-slice variable
LDR r5, [r1, #24] // Pickup thread's current time-slice
ADDS r7, r7, #1 // Increment the thread run count
STR r7, [r1, #4] // Store the new run count
@@ -210,7 +206,7 @@ __tx_ts_restore:
STR r5, [r4] // Setup global time-slice
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
/* Call the thread entry function to indicate the thread is executing. */
PUSH {r0, r1} // Save r0 and r1
BL _tx_execution_thread_enter // Call the thread execution enter function
@@ -239,15 +235,14 @@ _skip_secure_restore:
LDR r5, [r3] // Recover saved LR
ADDS r3, r3, #4 // Position past LR
MOV lr, r5 // Restore LR
LDM r3!, {r4-r7} // Recover thread's registers (r4-r11)
MOV r11, r7 //
MOV r10, r6 //
MOV r9, r5 //
MOV r8, r4 //
LDM r3!, {r4-r7} //
LDM r3!, {r4-r7} // Recover thread's registers (r8-r11)
MOV r11, r7
MOV r10, r6
MOV r9, r5
MOV r8, r4
LDM r3!, {r4-r7} // Recover thread's registers (r4-r7)
MSR PSP, r3 // Setup the thread's stack pointer
/* Return to thread. */
BX lr // Return to thread!
/* The following is the idle wait processing... in this case, no threads are ready for execution and the
@@ -291,6 +286,7 @@ __tx_ts_ready:
/* Re-enable interrupts and restore new thread. */
CPSIE i // Enable interrupts
B __tx_ts_restore // Restore the thread
// }
#if (!defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE))
@@ -303,27 +299,27 @@ __tx_ts_ready:
.thumb_func
.type SVC_Handler, function
SVC_Handler:
MOVW r0, #4
MOV r1, lr
TST r1, r0 // Determine return stack from EXC_RETURN bit 2
BEQ _tx_get_msp
MRS r0, PSP // Get PSP if return stack is PSP
B _tx_got_sp
_tx_get_msp:
MRS r0, MSP // Get MSP if return stack is MSP
_tx_got_sp:
LDR r1, [r0, #24] // Load saved PC from stack
SUBS r1, r1, #2 // Calculate SVC number address
LDRB r1, [r1] // Load SVC number
MOV r0, lr
MOVS r1, #0x04
TST r1, r0 // Determine return stack from EXC_RETURN bit 2
BEQ _tx_load_msp
MRS r0, PSP // Get PSP if return stack is PSP
B _tx_get_svc
_tx_load_msp:
MRS r0, MSP // Get MSP if return stack is MSP
_tx_get_svc:
LDR r1, [r0,#24] // Load saved PC from stack
LDR r3, =-2
LDRB r1, [r1,r3] // Load SVC number
CMP r1, #1 // Is it a secure stack allocate request?
BEQ _tx_svc_secure_alloc // Yes, go there
CMP r1, #1 // Is it a secure stack allocate request?
BEQ _tx_svc_secure_alloc // Yes, go there
CMP r1, #2 // Is it a secure stack free request?
BEQ _tx_svc_secure_free // Yes, go there
CMP r1, #2 // Is it a secure stack free request?
BEQ _tx_svc_secure_free // Yes, go there
CMP r1, #3 // Is it a secure stack init request?
BEQ _tx_svc_secure_init // Yes, go there
CMP r1, #3 // Is it a secure stack init request?
BEQ _tx_svc_secure_init // Yes, go there
// Unknown SVC argument - just return
BX lr

1
ports/cortex_m23/gnu/src/tx_thread_secure_stack.c
View File

@@ -105,6 +105,7 @@ UINT _tx_thread_secure_mode_stack_initialize(void)
{
UINT status;
ULONG control;
ULONG ipsr;
/* Make sure function is called from interrupt (threads should not call). */
asm volatile("MRS %0, IPSR" : "=r" (ipsr)); /* Get IPSR register. */

3
ports/cortex_m23/gnu/src/tx_thread_secure_stack_allocate.s
View File

@@ -57,7 +57,7 @@
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 Scott Larson Initial Version 6.1 */
/* 09-30-2020 Scott Larson Initial Version 6.1 */
/* */
/**************************************************************************/
// UINT _tx_thread_secure_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size)
@@ -78,7 +78,6 @@ _tx_thread_secure_stack_allocate:
BEQ _alloc_return_interrupt_enabled
CPSID i // Otherwise, disable interrupts
#else
// Executing in single mode - this function is not needed.
MOVS r0, #0xFF // Feature not enabled
#endif
_alloc_return_interrupt_enabled:

3
ports/cortex_m23/gnu/src/tx_thread_secure_stack_free.s
View File

@@ -55,7 +55,7 @@
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 Scott Larson Initial Version 6.1 */
/* 09-30-2020 Scott Larson Initial Version 6.1 */
/* */
/**************************************************************************/
// UINT _tx_thread_secure_stack_free(TX_THREAD *thread_ptr)
@@ -76,7 +76,6 @@ _tx_thread_secure_stack_free:
BEQ _free_return_interrupt_enabled
CPSID i // Otherwise, disable interrupts
#else
// Executing in single mode - this function is not needed.
MOVS r0, #0xFF // Feature not enabled
#endif
_free_return_interrupt_enabled:

2
ports/cortex_m23/gnu/src/tx_thread_stack_build.s
View File

@@ -58,7 +58,7 @@
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 Scott Larson Initial Version 6.1 */
/* 09-30-2020 Scott Larson Initial Version 6.1 */
/* */
/**************************************************************************/
// VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID))

2
ports/cortex_m23/gnu/src/tx_thread_system_return.s
View File

@@ -71,7 +71,7 @@
.thumb_func
.type _tx_thread_system_return, function
_tx_thread_system_return:
/* Return to real scheduler via PendSV. Note that this routine is often
/* Return to real scheduler via PendSV. Note that this routine is often
replaced with in-line assembly in tx_port.h to improved performance. */
LDR r0, =0x10000000 // Load PENDSVSET bit

97
ports/cortex_m23/gnu/src/tx_timer_interrupt.s
View File

@@ -36,8 +36,7 @@
/* This function processes the hardware timer interrupt. This */
/* processing includes incrementing the system clock and checking for */
/* time slice and/or timer expiration. If either is found, the */
/* interrupt context save/restore functions are called along with the */
/* expiration functions. */
/* expiration functions are called. */
/* */
/* INPUT */
/* */
@@ -63,8 +62,8 @@
/* 09-30-2020 Scott Larson Initial Version 6.1 */
/* */
/**************************************************************************/
/* VOID _tx_timer_interrupt(VOID)
{ */
// VOID _tx_timer_interrupt(VOID)
// {
.section .text
.balign 4
.syntax unified
@@ -80,8 +79,7 @@ _tx_timer_interrupt:
/* Increment the system clock. */
// _tx_timer_system_clock++;
MOVW r1, #:lower16:_tx_timer_system_clock // Pickup address of system clock
MOVT r1, #:upper16:_tx_timer_system_clock
LDR r1, =_tx_timer_system_clock // Pickup address of system clock
LDR r0, [r1, #0] // Pickup system clock
ADDS r0, r0, #1 // Increment system clock
STR r0, [r1, #0] // Store new system clock
@@ -90,28 +88,27 @@ _tx_timer_interrupt:
// if (_tx_timer_time_slice)
// {
MOVW r3, #:lower16:_tx_timer_time_slice // Pickup address of time-slice
MOVT r3, #:upper16:_tx_timer_time_slice
LDR r3, =_tx_timer_time_slice // Pickup address of time-slice
LDR r2, [r3, #0] // Pickup time-slice
CBZ r2, __tx_timer_no_time_slice // Is it non-active?
CBZ r2, __tx_timer_no_time_slice // Is it non-active?
// Yes, skip time-slice processing
/* Decrement the time_slice. */
// _tx_timer_time_slice--;
/* Decrement the time_slice. */
// _tx_timer_time_slice--;
SUBS r2, r2, #1 // Decrement the time-slice
STR r2, [r3, #0] // Store new time-slice value
/* Check for expiration. */
// if (__tx_timer_time_slice == 0)
/* Check for expiration. */
// if (__tx_timer_time_slice == 0)
CBNZ r2, __tx_timer_no_time_slice // Has it expired?
// No, skip expiration processing
/* Set the time-slice expired flag. */
// _tx_timer_expired_time_slice = TX_TRUE;
/* Set the time-slice expired flag. */
// _tx_timer_expired_time_slice = TX_TRUE;
MOVW r3, #:lower16:_tx_timer_expired_time_slice // Pickup address of expired flag
MOVT r3, #:upper16:_tx_timer_expired_time_slice
LDR r3, =_tx_timer_expired_time_slice // Pickup address of expired flag
MOVW r0, #1 // Build expired value
STR r0, [r3, #0] // Set time-slice expiration flag
@@ -123,18 +120,16 @@ __tx_timer_no_time_slice:
// if (*_tx_timer_current_ptr)
// {
MOVW r1, #:lower16:_tx_timer_current_ptr // Pickup current timer pointer address
MOVT r1, #:upper16:_tx_timer_current_ptr
LDR r1, =_tx_timer_current_ptr // Pickup current timer pointer address
LDR r0, [r1, #0] // Pickup current timer
LDR r2, [r0, #0] // Pickup timer list entry
CBZ r2, __tx_timer_no_timer // Is there anything in the list?
// No, just increment the timer
/* Set expiration flag. */
// _tx_timer_expired = TX_TRUE;
/* Set expiration flag. */
// _tx_timer_expired = TX_TRUE;
MOVW r3, #:lower16:_tx_timer_expired // Pickup expiration flag address
MOVT r3, #:upper16:_tx_timer_expired
LDR r3, =_tx_timer_expired // Pickup expiration flag address
MOVW r2, #1 // Build expired value
STR r2, [r3, #0] // Set expired flag
B __tx_timer_done // Finished timer processing
@@ -144,25 +139,23 @@ __tx_timer_no_time_slice:
// {
__tx_timer_no_timer:
/* No timer expired, increment the timer pointer. */
// _tx_timer_current_ptr++;
/* No timer expired, increment the timer pointer. */
// _tx_timer_current_ptr++;
ADDS r0, r0, #4 // Move to next timer
/* Check for wrap-around. */
// if (_tx_timer_current_ptr == _tx_timer_list_end)
/* Check for wrap-around. */
// if (_tx_timer_current_ptr == _tx_timer_list_end)
MOVW r3, #:lower16:_tx_timer_list_end // Pickup addr of timer list end
MOVT r3, #:upper16:_tx_timer_list_end
LDR r3, =_tx_timer_list_end // Pickup addr of timer list end
LDR r2, [r3, #0] // Pickup list end
CMP r0, r2 // Are we at list end?
BNE __tx_timer_skip_wrap // No, skip wrap-around logic
/* Wrap to beginning of list. */
// _tx_timer_current_ptr = _tx_timer_list_start;
/* Wrap to beginning of list. */
// _tx_timer_current_ptr = _tx_timer_list_start;
MOVW r3, #:lower16:_tx_timer_list_start // Pickup addr of timer list start
MOVT r3, #:upper16:_tx_timer_list_start
LDR r3, =_tx_timer_list_start // Pickup addr of timer list start
LDR r0, [r3, #0] // Set current pointer to list start
__tx_timer_skip_wrap:
@@ -172,18 +165,15 @@ __tx_timer_skip_wrap:
__tx_timer_done:
/* See if anything has expired. */
// if ((_tx_timer_expired_time_slice) || (_tx_timer_expired))
// {
MOVW r3, #:lower16:_tx_timer_expired_time_slice // Pickup addr of expired flag
MOVT r3, #:upper16:_tx_timer_expired_time_slice
LDR r3, =_tx_timer_expired_time_slice // Pickup addr of expired flag
LDR r2, [r3, #0] // Pickup time-slice expired flag
CBNZ r2, __tx_something_expired // Did a time-slice expire?
// If non-zero, time-slice expired
MOVW r1, #:lower16:_tx_timer_expired // Pickup addr of other expired flag
MOVT r1, #:upper16:_tx_timer_expired
LDR r1, =_tx_timer_expired // Pickup addr of other expired flag
LDR r0, [r1, #0] // Pickup timer expired flag
CBZ r0, __tx_timer_nothing_expired // Did a timer expire?
// No, nothing expired
@@ -197,14 +187,13 @@ __tx_something_expired:
// if (_tx_timer_expired)
// {
MOVW r1, #:lower16:_tx_timer_expired // Pickup addr of expired flag
MOVT r1, #:upper16:_tx_timer_expired
LDR r1, =_tx_timer_expired // Pickup addr of expired flag
LDR r0, [r1, #0] // Pickup timer expired flag
CBZ r0, __tx_timer_dont_activate // Check for timer expiration
// If not set, skip timer activation
/* Process timer expiration. */
// _tx_timer_expiration_process();
/* Process timer expiration. */
// _tx_timer_expiration_process();
BL _tx_timer_expiration_process // Call the timer expiration handling routine
@@ -215,28 +204,21 @@ __tx_timer_dont_activate:
// if (_tx_timer_expired_time_slice)
// {
MOVW r3, #:lower16:_tx_timer_expired_time_slice // Pickup addr of time-slice expired
MOVT r3, #:upper16:_tx_timer_expired_time_slice
LDR r3, =_tx_timer_expired_time_slice // Pickup addr of time-slice expired
LDR r2, [r3, #0] // Pickup the actual flag
CBZ r2, __tx_timer_not_ts_expiration // See if the flag is set
// No, skip time-slice processing
/* Time slice interrupted thread. */
// _tx_thread_time_slice();
/* Time slice interrupted thread. */
// _tx_thread_time_slice();
BL _tx_thread_time_slice // Call time-slice processing
MOVW r0, #:lower16:_tx_thread_preempt_disable // Build address of preempt disable flag
MOVT r0, #:upper16:_tx_thread_preempt_disable
LDR r0, =_tx_thread_preempt_disable // Build address of preempt disable flag
LDR r1, [r0] // Is the preempt disable flag set?
CBNZ r1, __tx_timer_skip_time_slice // Yes, skip the PendSV logic
MOVW r0, #:lower16:_tx_thread_current_ptr // Build current thread pointer address
MOVT r0, #:upper16:_tx_thread_current_ptr
LDR r0, =_tx_thread_current_ptr // Build current thread pointer address
LDR r1, [r0] // Pickup the current thread pointer
MOVW r2, #:lower16:_tx_thread_execute_ptr // Build execute thread pointer address
MOVT r2, #:upper16:_tx_thread_execute_ptr
LDR r2, =_tx_thread_execute_ptr // Build execute thread pointer address
LDR r3, [r2] // Pickup the execute thread pointer
LDR r0, =0xE000ED04 // Build address of control register
LDR r2, =0x10000000 // Build value for PendSV bit
@@ -248,8 +230,8 @@ __tx_timer_skip_time_slice:
__tx_timer_not_ts_expiration:
POP {r0, r1} // Recover lr register (r0 is just there for
MOV lr, r1 // the 8-byte stack alignment
POP {r0, r1} // Recover lr register (r0 is just there for
MOV lr, r1 // the 8-byte stack alignment
// }
@@ -257,6 +239,5 @@ __tx_timer_nothing_expired:
DSB // Complete all memory access
BX lr // Return to caller
// }
.end