Release 6.1.8
This commit is contained in:
Yuxin Zhou
@@ -1,102 +1,102 @@
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del txm.a
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_allocate.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_pool_create.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_pool_delete.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_pool_info_get.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_pool_performance_info_get.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_pool_performance_system_info_get.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_pool_prioritize.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_release.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_allocate.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_pool_create.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_pool_delete.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_pool_info_get.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_pool_performance_info_get.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_pool_performance_system_info_get.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_pool_prioritize.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_release.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_create.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_delete.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_get.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_info_get.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_performance_info_get.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_performance_system_info_get.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_set.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_set_notify.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_application_request.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_callback_request_thread_entry.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_object_allocate.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_object_deallocate.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_object_pointer_get.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\module_lib\src\txm_module_thread_shell_entry.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_thread_system_suspend.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_create.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_delete.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_get.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_info_get.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_performance_info_get.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_performance_system_info_get.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_prioritize.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_put.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_create.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_delete.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_flush.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_front_send.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_info_get.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_performance_info_get.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_performance_system_info_get.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_prioritize.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_receive.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_send.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_send_notify.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_ceiling_put.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_create.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_delete.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_get.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_info_get.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_performance_info_get.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_performance_system_info_get.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_prioritize.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_put.c
|
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_put_notify.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_create.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_delete.c
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_entry_exit_notify.c
|
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_identify.c
|
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_info_get.c
|
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_interrupt_control.c
|
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_performance_info_get.c
|
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_performance_system_info_get.c
|
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_preemption_change.c
|
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_priority_change.c
|
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_relinquish.c
|
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_reset.c
|
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_resume.c
|
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_sleep.c
|
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arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_stack_error_notify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_suspend.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_terminate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_time_slice_change.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_wait_abort.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_time_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_time_set.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_activate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_change.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_deactivate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_performance_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_performance_system_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_buffer_full_notify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_disable.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_enable.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_event_filter.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_event_unfilter.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_isr_enter_insert.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_isr_exit_insert.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_user_event_insert.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_allocate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_pool_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_pool_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_pool_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_pool_performance_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_pool_performance_system_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_pool_prioritize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_release.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_allocate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_pool_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_pool_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_pool_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_pool_performance_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_pool_performance_system_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_pool_prioritize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_release.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_performance_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_performance_system_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_set.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_set_notify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_application_request.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_callback_request_thread_entry.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_object_allocate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_object_deallocate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_object_pointer_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\module_lib\src\txm_module_thread_shell_entry.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_thread_system_suspend.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_performance_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_performance_system_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_prioritize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_put.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_flush.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_front_send.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_performance_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_performance_system_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_prioritize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_receive.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_send.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_send_notify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_ceiling_put.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_performance_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_performance_system_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_prioritize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_put.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_put_notify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_entry_exit_notify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_identify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_interrupt_control.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_performance_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_performance_system_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_preemption_change.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_priority_change.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_relinquish.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_reset.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_resume.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_sleep.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_stack_error_notify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_suspend.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_terminate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_time_slice_change.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_wait_abort.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_time_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_time_set.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_activate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_change.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_deactivate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_performance_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_performance_system_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_buffer_full_notify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_disable.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_enable.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_event_filter.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_event_unfilter.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_isr_enter_insert.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_isr_exit_insert.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_user_event_insert.c
|
||||
|
||||
arm-none-eabi-ar -r txm.a txm_block_allocate.o txm_block_pool_create.o txm_block_pool_delete.o txm_block_pool_info_get.o txm_block_pool_performance_info_get.o txm_block_pool_performance_system_info_get.o
|
||||
arm-none-eabi-ar -r txm.a txm_block_pool_prioritize.o txm_block_release.o
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -fpie -fno-plt -mpic-data-is-text-relative -msingle-pic-base txm_module_preamble.s
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -fpie -fno-plt -mpic-data-is-text-relative -msingle-pic-base gcc_setup.S
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -fpie -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc sample_threadx_module.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -fpie -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base txm_module_preamble.s
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -fpie -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base gcc_setup.S
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -fpie -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc sample_threadx_module.c
|
||||
arm-none-eabi-ld -A cortex-m3 -T sample_threadx_module.ld txm_module_preamble.o gcc_setup.o sample_threadx_module.o -e _txm_module_thread_shell_entry txm.a -o sample_threadx_module.axf -M > sample_threadx_module.map
|
||||
|
||||
|
||||
@@ -9,8 +9,8 @@ SECTIONS
|
||||
{
|
||||
__FLASH_segment_start__ = 0x00030000;
|
||||
__FLASH_segment_end__ = 0x00040000;
|
||||
__RAM_segment_start__ = 0;
|
||||
__RAM_segment_end__ = 0x8000;
|
||||
__RAM_segment_start__ = 0x10000000;
|
||||
__RAM_segment_end__ = 0x10008000;
|
||||
|
||||
__HEAPSIZE__ = 128;
|
||||
|
||||
@@ -136,7 +136,7 @@ SECTIONS
|
||||
}
|
||||
__rodata_end__ = __rodata_start__ + SIZEOF(.rodata);
|
||||
|
||||
__code_size__ = __rodata_end__ - __FLASH_segment_start__;
|
||||
__code_size__ = SIZEOF(.data) + __rodata_end__ - __FLASH_segment_start__;
|
||||
|
||||
__fast_load_start__ = ALIGN(__rodata_end__ , 4);
|
||||
|
||||
|
||||
@@ -94,6 +94,11 @@ The following extensions must also be defined in tx_port.h:
|
||||
VOID (*tx_timer_module_expiration_function)(ULONG id);
|
||||
*/
|
||||
|
||||
|
||||
/* Size of module heap. */
|
||||
#define TXM_MODULE_HEAP_SIZE 512
|
||||
|
||||
|
||||
/* Define the kernel stack size for a module thread. */
|
||||
#ifndef TXM_MODULE_KERNEL_STACK_SIZE
|
||||
#define TXM_MODULE_KERNEL_STACK_SIZE 768
|
||||
@@ -153,9 +158,9 @@ The following extensions must also be defined in tx_port.h:
|
||||
|
||||
#define INLINE_DECLARE inline
|
||||
|
||||
/* Define the number of MPU entries assigned to the code and data sections. On Cortex-M parts, there can only be 7 total
|
||||
entries, since ThreadX uses one for access to the kernel dispatch function. */
|
||||
|
||||
/* Define the number of MPU entries assigned to the code and data sections.
|
||||
On Cortex-M3 parts, there are 8 total entries. ThreadX uses one for access
|
||||
to the kernel entry function, thus 7 remain for code and data protection. */
|
||||
#define TXM_MODULE_MANAGER_CODE_MPU_ENTRIES 4
|
||||
#define TXM_MODULE_MANAGER_DATA_MPU_ENTRIES 3
|
||||
#define TXM_MODULE_MANAGER_SHARED_MPU_INDEX 8
|
||||
@@ -322,7 +327,7 @@ ULONG _txm_module_manager_calculate_srd_bits(ULONG block_size, ULONG length);
|
||||
ULONG _txm_module_manager_region_size_get(ULONG block_size);
|
||||
|
||||
#define TXM_MODULE_MANAGER_VERSION_ID \
|
||||
CHAR _txm_module_manager_version_id[] = \
|
||||
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Module Cortex-M3/MPU/GNU Version 6.1 *";
|
||||
CHAR _txm_module_manager_version_id[] = \
|
||||
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Module Cortex-M3/MPU/GNU Version 6.1.8 *";
|
||||
|
||||
#endif
|
||||
|
||||
@@ -91,7 +91,7 @@ extern VOID _gcc_setup(TXM_MODULE_INSTANCE *);
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
VOID _txm_module_thread_shell_entry(TX_THREAD *thread_ptr, TXM_MODULE_THREAD_ENTRY_INFO *thread_info)
|
||||
|
||||
@@ -1,87 +1,82 @@
|
||||
@/**************************************************************************/
|
||||
@/* */
|
||||
@/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
@/* */
|
||||
@/* This software is licensed under the Microsoft Software License */
|
||||
@/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
@/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
@/* and in the root directory of this software. */
|
||||
@/* */
|
||||
@/**************************************************************************/
|
||||
@
|
||||
@
|
||||
@/**************************************************************************/
|
||||
@/**************************************************************************/
|
||||
@/** */
|
||||
@/** ThreadX Component */
|
||||
@/** */
|
||||
@/** Thread */
|
||||
@/** */
|
||||
@/**************************************************************************/
|
||||
@/**************************************************************************/
|
||||
@
|
||||
@
|
||||
.global _tx_thread_system_state
|
||||
.global _tx_thread_current_ptr
|
||||
.global _tx_thread_system_stack_ptr
|
||||
.global _tx_thread_execute_ptr
|
||||
.global _tx_timer_time_slice
|
||||
.global _tx_thread_schedule
|
||||
.global _tx_thread_preempt_disable
|
||||
.global _tx_execution_isr_exit
|
||||
@
|
||||
@
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
/* */
|
||||
/* This software is licensed under the Microsoft Software License */
|
||||
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
/* and in the root directory of this software. */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Thread */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
|
||||
.global _tx_execution_isr_exit
|
||||
#endif
|
||||
|
||||
.text
|
||||
.align 4
|
||||
.syntax unified
|
||||
@/**************************************************************************/
|
||||
@/* */
|
||||
@/* FUNCTION RELEASE */
|
||||
@/* */
|
||||
@/* _tx_thread_context_restore Cortex-M3/GNU */
|
||||
@/* 6.1 */
|
||||
@/* AUTHOR */
|
||||
@/* */
|
||||
@/* William E. Lamie, Microsoft Corporation */
|
||||
@/* */
|
||||
@/* DESCRIPTION */
|
||||
@/* */
|
||||
@/* This function is only needed for legacy applications and it should */
|
||||
@/* not be called in any new development on a Cortex-M. */
|
||||
@/* This function restores the interrupt context if it is processing a */
|
||||
@/* nested interrupt. If not, it returns to the interrupt thread if no */
|
||||
@/* preemption is necessary. Otherwise, if preemption is necessary or */
|
||||
@/* if no thread was running, the function returns to the scheduler. */
|
||||
@/* */
|
||||
@/* INPUT */
|
||||
@/* */
|
||||
@/* None */
|
||||
@/* */
|
||||
@/* OUTPUT */
|
||||
@/* */
|
||||
@/* None */
|
||||
@/* */
|
||||
@/* CALLS */
|
||||
@/* */
|
||||
@/* _tx_thread_schedule Thread scheduling routine */
|
||||
@/* */
|
||||
@/* CALLED BY */
|
||||
@/* */
|
||||
@/* ISRs Interrupt Service Routines */
|
||||
@/* */
|
||||
@/* RELEASE HISTORY */
|
||||
@/* */
|
||||
@/* DATE NAME DESCRIPTION */
|
||||
@/* */
|
||||
@/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
@/* */
|
||||
@/**************************************************************************/
|
||||
@VOID _tx_thread_context_restore(VOID)
|
||||
@{
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _tx_thread_context_restore Cortex-Mx/GNU */
|
||||
/* 6.1.8 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function is only needed for legacy applications and it should */
|
||||
/* not be called in any new development on a Cortex-M. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* [_tx_execution_isr_exit] Execution profiling ISR exit */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* ISRs Interrupt Service Routines */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 08-02-2021 Scott Larson Initial Version 6.1.8 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
// VOID _tx_thread_context_restore(VOID)
|
||||
// {
|
||||
.global _tx_thread_context_restore
|
||||
.thumb_func
|
||||
_tx_thread_context_restore:
|
||||
@
|
||||
@ /* Not needed for this port - just return! */
|
||||
|
||||
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
|
||||
/* Call the ISR exit function to indicate an ISR is complete. */
|
||||
PUSH {r0, lr} // Save return address
|
||||
BL _tx_execution_isr_exit // Call the ISR exit function
|
||||
POP {r0, lr} // Recover return address
|
||||
#endif
|
||||
|
||||
BX lr
|
||||
@}
|
||||
// }
|
||||
|
||||
@@ -1,81 +1,80 @@
|
||||
@/**************************************************************************/
|
||||
@/* */
|
||||
@/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
@/* */
|
||||
@/* This software is licensed under the Microsoft Software License */
|
||||
@/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
@/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
@/* and in the root directory of this software. */
|
||||
@/* */
|
||||
@/**************************************************************************/
|
||||
@
|
||||
@
|
||||
@/**************************************************************************/
|
||||
@/**************************************************************************/
|
||||
@/** */
|
||||
@/** ThreadX Component */
|
||||
@/** */
|
||||
@/** Thread */
|
||||
@/** */
|
||||
@/**************************************************************************/
|
||||
@/**************************************************************************/
|
||||
@
|
||||
@
|
||||
.global _tx_thread_system_state
|
||||
.global _tx_thread_current_ptr
|
||||
.global _tx_execution_isr_enter
|
||||
@
|
||||
@
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
/* */
|
||||
/* This software is licensed under the Microsoft Software License */
|
||||
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
/* and in the root directory of this software. */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Thread */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
.text
|
||||
.align 4
|
||||
.syntax unified
|
||||
@/**************************************************************************/
|
||||
@/* */
|
||||
@/* FUNCTION RELEASE */
|
||||
@/* */
|
||||
@/* _tx_thread_context_save Cortex-M3/GNU */
|
||||
@/* 6.1 */
|
||||
@/* AUTHOR */
|
||||
@/* */
|
||||
@/* William E. Lamie, Microsoft Corporation */
|
||||
@/* */
|
||||
@/* DESCRIPTION */
|
||||
@/* */
|
||||
@/* This function is only needed for legacy applications and it should */
|
||||
@/* not be called in any new development on a Cortex-M. */
|
||||
@/* This function saves the context of an executing thread in the */
|
||||
@/* beginning of interrupt processing. The function also ensures that */
|
||||
@/* the system stack is used upon return to the calling ISR. */
|
||||
@/* */
|
||||
@/* INPUT */
|
||||
@/* */
|
||||
@/* None */
|
||||
@/* */
|
||||
@/* OUTPUT */
|
||||
@/* */
|
||||
@/* None */
|
||||
@/* */
|
||||
@/* CALLS */
|
||||
@/* */
|
||||
@/* None */
|
||||
@/* */
|
||||
@/* CALLED BY */
|
||||
@/* */
|
||||
@/* ISRs */
|
||||
@/* */
|
||||
@/* RELEASE HISTORY */
|
||||
@/* */
|
||||
@/* DATE NAME DESCRIPTION */
|
||||
@/* */
|
||||
@/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
@/* */
|
||||
@/**************************************************************************/
|
||||
@VOID _tx_thread_context_save(VOID)
|
||||
@{
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _tx_thread_context_save Cortex-Mx/GNU */
|
||||
/* 6.1.8 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function is only needed for legacy applications and it should */
|
||||
/* not be called in any new development on a Cortex-M. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* [_tx_execution_isr_enter] Execution profiling ISR enter */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* ISRs */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 08-02-2021 Scott Larson Initial Version 6.1.8 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
// VOID _tx_thread_context_save(VOID)
|
||||
// {
|
||||
.global _tx_thread_context_save
|
||||
.thumb_func
|
||||
_tx_thread_context_save:
|
||||
@
|
||||
@ /* Not needed for this port - just return! */
|
||||
|
||||
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
|
||||
/* Call the ISR enter function to indicate an ISR is starting. */
|
||||
PUSH {r0, lr} // Save return address
|
||||
BL _tx_execution_isr_enter // Call the ISR enter function
|
||||
POP {r0, lr} // Recover return address
|
||||
#endif
|
||||
|
||||
/* Context is already saved - just return. */
|
||||
|
||||
BX lr
|
||||
@}
|
||||
// }
|
||||
|
||||
@@ -1,81 +1,79 @@
|
||||
@/**************************************************************************/
|
||||
@/* */
|
||||
@/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
@/* */
|
||||
@/* This software is licensed under the Microsoft Software License */
|
||||
@/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
@/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
@/* and in the root directory of this software. */
|
||||
@/* */
|
||||
@/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
/* */
|
||||
/* This software is licensed under the Microsoft Software License */
|
||||
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
/* and in the root directory of this software. */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
@/**************************************************************************/
|
||||
@/**************************************************************************/
|
||||
@/** */
|
||||
@/** ThreadX Component */
|
||||
@/** */
|
||||
@/** Thread */
|
||||
@/** */
|
||||
@/**************************************************************************/
|
||||
@/**************************************************************************/
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Thread */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
.text 32
|
||||
.align 4
|
||||
.syntax unified
|
||||
@/**************************************************************************/
|
||||
@/* */
|
||||
@/* FUNCTION RELEASE */
|
||||
@/* */
|
||||
@/* _tx_thread_interrupt_control Cortex-M3/GNU */
|
||||
@/* 6.1 */
|
||||
@/* AUTHOR */
|
||||
@/* */
|
||||
@/* William E. Lamie, Microsoft Corporation */
|
||||
@/* */
|
||||
@/* DESCRIPTION */
|
||||
@/* */
|
||||
@/* This function is responsible for changing the interrupt lockout */
|
||||
@/* posture of the system. */
|
||||
@/* */
|
||||
@/* INPUT */
|
||||
@/* */
|
||||
@/* new_posture New interrupt lockout posture */
|
||||
@/* */
|
||||
@/* OUTPUT */
|
||||
@/* */
|
||||
@/* old_posture Old interrupt lockout posture */
|
||||
@/* */
|
||||
@/* CALLS */
|
||||
@/* */
|
||||
@/* None */
|
||||
@/* */
|
||||
@/* CALLED BY */
|
||||
@/* */
|
||||
@/* Application Code */
|
||||
@/* */
|
||||
@/* RELEASE HISTORY */
|
||||
@/* */
|
||||
@/* DATE NAME DESCRIPTION */
|
||||
@/* */
|
||||
@/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
@/* */
|
||||
@/**************************************************************************/
|
||||
@/* UINT _tx_thread_interrupt_control(UINT new_posture)
|
||||
{ */
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _tx_thread_interrupt_control Cortex-Mx/GNU */
|
||||
/* 6.1.8 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function is responsible for changing the interrupt lockout */
|
||||
/* posture of the system. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* new_posture New interrupt lockout posture */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* old_posture Old interrupt lockout posture */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Application Code */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 08-02-2021 Scott Larson Initial Version 6.1.8 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
// UINT _tx_thread_interrupt_control(UINT new_posture)
|
||||
// {
|
||||
.global _tx_thread_interrupt_control
|
||||
.thumb_func
|
||||
_tx_thread_interrupt_control:
|
||||
|
||||
@/* Pickup current interrupt lockout posture. */
|
||||
|
||||
MRS r1, PRIMASK @ Pickup current interrupt lockout
|
||||
|
||||
@/* Apply the new interrupt posture. */
|
||||
|
||||
MSR PRIMASK, r0 @ Apply the new interrupt lockout
|
||||
MOV r0, r1 @ Transfer old to return register
|
||||
BX lr @ Return to caller
|
||||
|
||||
@/* } */
|
||||
#ifdef TX_PORT_USE_BASEPRI
|
||||
MRS r1, BASEPRI // Pickup current interrupt posture
|
||||
MSR BASEPRI, r0 // Apply the new interrupt posture
|
||||
MOV r0, r1 // Transfer old to return register
|
||||
#else
|
||||
MRS r1, PRIMASK // Pickup current interrupt lockout
|
||||
MSR PRIMASK, r0 // Apply the new interrupt lockout
|
||||
MOV r0, r1 // Transfer old to return register
|
||||
#endif
|
||||
BX lr // Return to caller
|
||||
// }
|
||||
|
||||
@@ -20,16 +20,18 @@
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
.global _tx_thread_current_ptr
|
||||
.global _tx_thread_execute_ptr
|
||||
.global _tx_timer_time_slice
|
||||
.global _tx_thread_system_stack_ptr
|
||||
.global _tx_execution_thread_enter
|
||||
.global _tx_execution_thread_exit
|
||||
.global _tx_thread_preempt_disable
|
||||
.global _txm_module_manager_memory_fault_handler
|
||||
.global _txm_module_manager_memory_fault_info
|
||||
|
||||
.global _tx_thread_current_ptr
|
||||
.global _tx_thread_execute_ptr
|
||||
.global _tx_timer_time_slice
|
||||
.global _tx_execution_thread_enter
|
||||
.global _tx_execution_thread_exit
|
||||
.global _tx_thread_preempt_disable
|
||||
.global _txm_module_manager_memory_fault_handler
|
||||
.global _txm_module_manager_memory_fault_info
|
||||
#ifdef TX_LOW_POWER
|
||||
.global tx_low_power_enter
|
||||
.global tx_low_power_exit
|
||||
#endif
|
||||
.text
|
||||
.align 4
|
||||
.syntax unified
|
||||
@@ -71,7 +73,7 @@
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
// VOID _tx_thread_schedule(VOID)
|
||||
@@ -82,7 +84,7 @@ _tx_thread_schedule:
|
||||
|
||||
/* This function should only ever be called on Cortex-M
|
||||
from the first schedule request. Subsequent scheduling occurs
|
||||
from the PendSV handling routines below. */
|
||||
from the PendSV handling routine below. */
|
||||
|
||||
/* Clear the preempt-disable flag to enable rescheduling after initialization on Cortex-M targets. */
|
||||
|
||||
@@ -97,7 +99,6 @@ _tx_thread_schedule:
|
||||
STR r1, [r0] //
|
||||
|
||||
/* Enable interrupts */
|
||||
|
||||
CPSIE i
|
||||
|
||||
/* Enter the scheduler for the first time. */
|
||||
@@ -186,10 +187,8 @@ UsageFault_Handler:
|
||||
|
||||
BL _txm_module_manager_memory_fault_handler // Call memory manager fault handler
|
||||
|
||||
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
|
||||
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
|
||||
/* Call the thread exit function to indicate the thread is no longer executing. */
|
||||
|
||||
CPSID i // Disable interrupts
|
||||
BL _tx_execution_thread_exit // Call the thread exit function
|
||||
CPSIE i // Enable interrupts
|
||||
@@ -223,10 +222,8 @@ __tx_PendSVHandler:
|
||||
|
||||
__tx_ts_handler:
|
||||
|
||||
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
|
||||
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
|
||||
/* Call the thread exit function to indicate the thread is no longer executing. */
|
||||
|
||||
CPSID i // Disable interrupts
|
||||
PUSH {r0, lr} // Save LR (and r0 just for alignment)
|
||||
BL _tx_execution_thread_exit // Call the thread exit function
|
||||
@@ -293,10 +290,8 @@ __tx_ts_restore:
|
||||
|
||||
STR r5, [r4] // Setup global time-slice
|
||||
|
||||
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
|
||||
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
|
||||
/* Call the thread entry function to indicate the thread is executing. */
|
||||
|
||||
PUSH {r0, r1} // Save r0 and r1
|
||||
BL _tx_execution_thread_enter // Call the thread execution enter function
|
||||
POP {r0, r1} // Recover r0 and r1
|
||||
@@ -348,11 +343,25 @@ __tx_ts_wait:
|
||||
LDR r1, [r2] // Pickup the next thread to execute pointer
|
||||
STR r1, [r0] // Store it in the current pointer
|
||||
CBNZ r1, __tx_ts_ready // If non-NULL, a new thread is ready!
|
||||
|
||||
#ifdef TX_LOW_POWER
|
||||
PUSH {r0-r3}
|
||||
BL tx_low_power_enter // Possibly enter low power mode
|
||||
POP {r0-r3}
|
||||
#endif
|
||||
|
||||
#ifdef TX_ENABLE_WFI
|
||||
DSB // Ensure no outstanding memory transactions
|
||||
WFI // Wait for interrupt
|
||||
ISB // Ensure pipeline is flushed
|
||||
#endif
|
||||
|
||||
#ifdef TX_LOW_POWER
|
||||
PUSH {r0-r3}
|
||||
BL tx_low_power_exit // Exit low power mode
|
||||
POP {r0-r3}
|
||||
#endif
|
||||
|
||||
CPSIE i // Enable interrupts
|
||||
B __tx_ts_wait // Loop to continue waiting
|
||||
|
||||
@@ -368,6 +377,7 @@ __tx_ts_ready:
|
||||
|
||||
CPSIE i // Enable interrupts
|
||||
B __tx_ts_restore // Restore the thread
|
||||
// }
|
||||
|
||||
|
||||
/* SVC Handler. */
|
||||
@@ -393,6 +403,7 @@ __tx_SVCallHandler:
|
||||
the kernel from a module thread with user mode selected. */
|
||||
|
||||
LDR r2, =_txm_module_priv // Load address of where we should have come from
|
||||
// Subtract 1 because of THUMB mode.
|
||||
CMP r1, r2 // Did we come from user_mode_entry?
|
||||
IT NE // If no (not equal), then...
|
||||
BXNE lr // return from where we came.
|
||||
@@ -425,14 +436,14 @@ __tx_SVCallHandler:
|
||||
|
||||
/* Build kernel stack by copying thread stack two registers at a time */
|
||||
ADD r3, r3, #32 // Start at bottom of hardware stack
|
||||
LDMDB r3!,{r1-r2}
|
||||
STMDB r0!,{r1-r2}
|
||||
LDMDB r3!,{r1-r2}
|
||||
STMDB r0!,{r1-r2}
|
||||
LDMDB r3!,{r1-r2}
|
||||
STMDB r0!,{r1-r2}
|
||||
LDMDB r3!,{r1-r2}
|
||||
STMDB r0!,{r1-r2}
|
||||
LDMDB r3!, {r1-r2}
|
||||
STMDB r0!, {r1-r2}
|
||||
LDMDB r3!, {r1-r2}
|
||||
STMDB r0!, {r1-r2}
|
||||
LDMDB r3!, {r1-r2}
|
||||
STMDB r0!, {r1-r2}
|
||||
LDMDB r3!, {r1-r2}
|
||||
STMDB r0!, {r1-r2}
|
||||
|
||||
MSR PSP, r0 // Set kernel stack pointer
|
||||
|
||||
@@ -444,6 +455,7 @@ _tx_skip_kernel_stack_enter:
|
||||
|
||||
_tx_thread_user_return:
|
||||
LDR r2, =_txm_module_user_mode_exit // Load address of where we should have come from
|
||||
// Subtract 1 because of THUMB mode.
|
||||
CMP r1, r2 // Did we come from user_mode_exit?
|
||||
IT NE // If no (not equal), then...
|
||||
BXNE lr // return from where we came
|
||||
@@ -471,14 +483,14 @@ _tx_thread_user_return:
|
||||
MRS r3, PSP // Pickup kernel stack pointer
|
||||
|
||||
/* Copy kernel hardware stack to module thread stack. */
|
||||
LDM r3!,{r1-r2}
|
||||
STM r0!,{r1-r2}
|
||||
LDM r3!,{r1-r2}
|
||||
STM r0!,{r1-r2}
|
||||
LDM r3!,{r1-r2}
|
||||
STM r0!,{r1-r2}
|
||||
LDM r3!,{r1-r2}
|
||||
STM r0!,{r1-r2}
|
||||
LDM r3!, {r1-r2}
|
||||
STM r0!, {r1-r2}
|
||||
LDM r3!, {r1-r2}
|
||||
STM r0!, {r1-r2}
|
||||
LDM r3!, {r1-r2}
|
||||
STM r0!, {r1-r2}
|
||||
LDM r3!, {r1-r2}
|
||||
STM r0!, {r1-r2}
|
||||
SUB r0, r0, #32 // Subtract 32 to get back to top of stack
|
||||
MSR PSP, r0 // Set thread stack pointer
|
||||
|
||||
@@ -493,7 +505,7 @@ _tx_skip_kernel_stack_exit:
|
||||
BX lr // Return to thread
|
||||
|
||||
|
||||
/* Kernel entry function from user mode. */
|
||||
/* Kernel entry function from user mode. */
|
||||
|
||||
.global _txm_module_manager_kernel_dispatch
|
||||
.align 5
|
||||
|
||||
@@ -1,135 +1,133 @@
|
||||
@/**************************************************************************/
|
||||
@/* */
|
||||
@/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
@/* */
|
||||
@/* This software is licensed under the Microsoft Software License */
|
||||
@/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
@/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
@/* and in the root directory of this software. */
|
||||
@/* */
|
||||
@/**************************************************************************/
|
||||
@
|
||||
@
|
||||
@/**************************************************************************/
|
||||
@/**************************************************************************/
|
||||
@/** */
|
||||
@/** ThreadX Component */
|
||||
@/** */
|
||||
@/** Thread */
|
||||
@/** */
|
||||
@/**************************************************************************/
|
||||
@/**************************************************************************/
|
||||
@
|
||||
@
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
/* */
|
||||
/* This software is licensed under the Microsoft Software License */
|
||||
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
/* and in the root directory of this software. */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Thread */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
.text
|
||||
.align 4
|
||||
.syntax unified
|
||||
@/**************************************************************************/
|
||||
@/* */
|
||||
@/* FUNCTION RELEASE */
|
||||
@/* */
|
||||
@/* _tx_thread_stack_build Cortex-M3/GNU */
|
||||
@/* 6.1 */
|
||||
@/* AUTHOR */
|
||||
@/* */
|
||||
@/* William E. Lamie, Microsoft Corporation */
|
||||
@/* */
|
||||
@/* DESCRIPTION */
|
||||
@/* */
|
||||
@/* This function builds a stack frame on the supplied thread's stack. */
|
||||
@/* The stack frame results in a fake interrupt return to the supplied */
|
||||
@/* function pointer. */
|
||||
@/* */
|
||||
@/* INPUT */
|
||||
@/* */
|
||||
@/* thread_ptr Pointer to thread control blk */
|
||||
@/* function_ptr Pointer to return function */
|
||||
@/* */
|
||||
@/* OUTPUT */
|
||||
@/* */
|
||||
@/* None */
|
||||
@/* */
|
||||
@/* CALLS */
|
||||
@/* */
|
||||
@/* None */
|
||||
@/* */
|
||||
@/* CALLED BY */
|
||||
@/* */
|
||||
@/* _tx_thread_create Create thread service */
|
||||
@/* */
|
||||
@/* RELEASE HISTORY */
|
||||
@/* */
|
||||
@/* DATE NAME DESCRIPTION */
|
||||
@/* */
|
||||
@/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
@/* */
|
||||
@/**************************************************************************/
|
||||
@VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID))
|
||||
@{
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _tx_thread_stack_build Cortex-Mx/GNU */
|
||||
/* 6.1.8 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function builds a stack frame on the supplied thread's stack. */
|
||||
/* The stack frame results in a fake interrupt return to the supplied */
|
||||
/* function pointer. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* thread_ptr Pointer to thread control blk */
|
||||
/* function_ptr Pointer to return function */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* _tx_thread_create Create thread service */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 08-02-2021 Scott Larson Initial Version 6.1.8 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
// VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID))
|
||||
// {
|
||||
.global _tx_thread_stack_build
|
||||
.thumb_func
|
||||
_tx_thread_stack_build:
|
||||
@
|
||||
@
|
||||
@ /* Build a fake interrupt frame. The form of the fake interrupt stack
|
||||
@ on the Cortex-M3 should look like the following after it is built:
|
||||
@
|
||||
@ Stack Top:
|
||||
@ LR Interrupted LR (LR at time of PENDSV)
|
||||
@ r4 Initial value for r4
|
||||
@ r5 Initial value for r5
|
||||
@ r6 Initial value for r6
|
||||
@ r7 Initial value for r7
|
||||
@ r8 Initial value for r8
|
||||
@ r9 Initial value for r9
|
||||
@ r10 Initial value for r10
|
||||
@ r11 Initial value for r11
|
||||
@ r0 Initial value for r0 (Hardware stack starts here!!)
|
||||
@ r1 Initial value for r1
|
||||
@ r2 Initial value for r2
|
||||
@ r3 Initial value for r3
|
||||
@ r12 Initial value for r12
|
||||
@ lr Initial value for lr
|
||||
@ pc Initial value for pc
|
||||
@ xPSR Initial value for xPSR
|
||||
@
|
||||
@ Stack Bottom: (higher memory address) */
|
||||
@
|
||||
LDR r2, [r0, #16] @ Pickup end of stack area
|
||||
BIC r2, r2, #0x7 @ Align frame
|
||||
SUB r2, r2, #68 @ Subtract frame size
|
||||
LDR r3, =0xFFFFFFFD @ Build initial LR value
|
||||
STR r3, [r2, #0] @ Save on the stack
|
||||
@
|
||||
@ /* Actually build the stack frame. */
|
||||
@
|
||||
MOV r3, #0 @ Build initial register value
|
||||
STR r3, [r2, #4] @ Store initial r4
|
||||
STR r3, [r2, #8] @ Store initial r5
|
||||
STR r3, [r2, #12] @ Store initial r6
|
||||
STR r3, [r2, #16] @ Store initial r7
|
||||
STR r3, [r2, #20] @ Store initial r8
|
||||
STR r3, [r2, #24] @ Store initial r9
|
||||
STR r3, [r2, #28] @ Store initial r10
|
||||
STR r3, [r2, #32] @ Store initial r11
|
||||
@
|
||||
@ /* Hardware stack follows. */
|
||||
@
|
||||
STR r3, [r2, #36] @ Store initial r0
|
||||
STR r3, [r2, #40] @ Store initial r1
|
||||
STR r3, [r2, #44] @ Store initial r2
|
||||
STR r3, [r2, #48] @ Store initial r3
|
||||
STR r3, [r2, #52] @ Store initial r12
|
||||
MOV r3, #0xFFFFFFFF @ Poison EXC_RETURN value
|
||||
STR r3, [r2, #56] @ Store initial lr
|
||||
STR r1, [r2, #60] @ Store initial pc
|
||||
MOV r3, #0x01000000 @ Only T-bit need be set
|
||||
STR r3, [r2, #64] @ Store initial xPSR
|
||||
@
|
||||
@ /* Setup stack pointer. */
|
||||
@ thread_ptr -> tx_thread_stack_ptr = r2;
|
||||
@
|
||||
STR r2, [r0, #8] @ Save stack pointer in thread's
|
||||
@ control block
|
||||
BX lr @ Return to caller
|
||||
@}
|
||||
|
||||
/* Build a fake interrupt frame. The form of the fake interrupt stack
|
||||
on the Cortex-M should look like the following after it is built:
|
||||
|
||||
Stack Top:
|
||||
LR Interrupted LR (LR at time of PENDSV)
|
||||
r4 Initial value for r4
|
||||
r5 Initial value for r5
|
||||
r6 Initial value for r6
|
||||
r7 Initial value for r7
|
||||
r8 Initial value for r8
|
||||
r9 Initial value for r9
|
||||
r10 Initial value for r10
|
||||
r11 Initial value for r11
|
||||
r0 Initial value for r0 (Hardware stack starts here!!)
|
||||
r1 Initial value for r1
|
||||
r2 Initial value for r2
|
||||
r3 Initial value for r3
|
||||
r12 Initial value for r12
|
||||
lr Initial value for lr
|
||||
pc Initial value for pc
|
||||
xPSR Initial value for xPSR
|
||||
|
||||
Stack Bottom: (higher memory address) */
|
||||
|
||||
LDR r2, [r0, #16] // Pickup end of stack area
|
||||
BIC r2, r2, #0x7 // Align frame for 8-byte alignment
|
||||
SUB r2, r2, #68 // Subtract frame size
|
||||
LDR r3, =0xFFFFFFFD // Build initial LR value
|
||||
STR r3, [r2, #0] // Save on the stack
|
||||
|
||||
/* Actually build the stack frame. */
|
||||
|
||||
MOV r3, #0 // Build initial register value
|
||||
STR r3, [r2, #4] // Store initial r4
|
||||
STR r3, [r2, #8] // Store initial r5
|
||||
STR r3, [r2, #12] // Store initial r6
|
||||
STR r3, [r2, #16] // Store initial r7
|
||||
STR r3, [r2, #20] // Store initial r8
|
||||
STR r3, [r2, #24] // Store initial r9
|
||||
STR r3, [r2, #28] // Store initial r10
|
||||
STR r3, [r2, #32] // Store initial r11
|
||||
|
||||
/* Hardware stack follows. */
|
||||
|
||||
STR r3, [r2, #36] // Store initial r0
|
||||
STR r3, [r2, #40] // Store initial r1
|
||||
STR r3, [r2, #44] // Store initial r2
|
||||
STR r3, [r2, #48] // Store initial r3
|
||||
STR r3, [r2, #52] // Store initial r12
|
||||
MOV r3, #0xFFFFFFFF // Poison EXC_RETURN value
|
||||
STR r3, [r2, #56] // Store initial lr
|
||||
STR r1, [r2, #60] // Store initial pc
|
||||
MOV r3, #0x01000000 // Only T-bit need be set
|
||||
STR r3, [r2, #64] // Store initial xPSR
|
||||
|
||||
/* Setup stack pointer. */
|
||||
// thread_ptr -> tx_thread_stack_ptr = r2;
|
||||
|
||||
STR r2, [r0, #8] // Save stack pointer in thread's
|
||||
// control block
|
||||
BX lr // Return to caller
|
||||
// }
|
||||
|
||||
@@ -1,88 +1,93 @@
|
||||
@/**************************************************************************/
|
||||
@/* */
|
||||
@/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
@/* */
|
||||
@/* This software is licensed under the Microsoft Software License */
|
||||
@/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
@/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
@/* and in the root directory of this software. */
|
||||
@/* */
|
||||
@/**************************************************************************/
|
||||
@
|
||||
@
|
||||
@/**************************************************************************/
|
||||
@/**************************************************************************/
|
||||
@/** */
|
||||
@/** ThreadX Component */
|
||||
@/** */
|
||||
@/** Thread */
|
||||
@/** */
|
||||
@/**************************************************************************/
|
||||
@/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
/* */
|
||||
/* This software is licensed under the Microsoft Software License */
|
||||
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
/* and in the root directory of this software. */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Thread */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
.text 32
|
||||
.align 4
|
||||
.syntax unified
|
||||
@/**************************************************************************/
|
||||
@/* */
|
||||
@/* FUNCTION RELEASE */
|
||||
@/* */
|
||||
@/* _tx_thread_system_return Cortex-M3/GNU */
|
||||
@/* 6.1 */
|
||||
@/* AUTHOR */
|
||||
@/* */
|
||||
@/* William E. Lamie, Microsoft Corporation */
|
||||
@/* */
|
||||
@/* DESCRIPTION */
|
||||
@/* */
|
||||
@/* This function is target processor specific. It is used to transfer */
|
||||
@/* control from a thread back to the ThreadX system. Only a */
|
||||
@/* minimal context is saved since the compiler assumes temp registers */
|
||||
@/* are going to get slicked by a function call anyway. */
|
||||
@/* */
|
||||
@/* INPUT */
|
||||
@/* */
|
||||
@/* None */
|
||||
@/* */
|
||||
@/* OUTPUT */
|
||||
@/* */
|
||||
@/* None */
|
||||
@/* */
|
||||
@/* CALLS */
|
||||
@/* */
|
||||
@/* _tx_thread_schedule Thread scheduling loop */
|
||||
@/* */
|
||||
@/* CALLED BY */
|
||||
@/* */
|
||||
@/* ThreadX components */
|
||||
@/* */
|
||||
@/* RELEASE HISTORY */
|
||||
@/* */
|
||||
@/* DATE NAME DESCRIPTION */
|
||||
@/* */
|
||||
@/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
@/* */
|
||||
@/**************************************************************************/
|
||||
@/* VOID _tx_thread_system_return(VOID)
|
||||
@{ */
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _tx_thread_system_return Cortex-Mx/GNU */
|
||||
/* 6.1.8 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function is target processor specific. It is used to transfer */
|
||||
/* control from a thread back to the ThreadX system. Only a */
|
||||
/* minimal context is saved since the compiler assumes temp registers */
|
||||
/* are going to get slicked by a function call anyway. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* _tx_thread_schedule Thread scheduling loop */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* ThreadX components */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 08-02-2021 Scott Larson Initial Version 6.1.8 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
// VOID _tx_thread_system_return(VOID)
|
||||
// {
|
||||
.thumb_func
|
||||
.global _tx_thread_system_return
|
||||
_tx_thread_system_return:
|
||||
@
|
||||
@ /* Return to real scheduler via PendSV. Note that this routine is often
|
||||
@ replaced with in-line assembly in tx_port.h to improved performance. */
|
||||
@
|
||||
MOV r0, #0x10000000 @ Load PENDSVSET bit
|
||||
MOV r1, #0xE000E000 @ Load NVIC base
|
||||
STR r0, [r1, #0xD04] @ Set PENDSVBIT in ICSR
|
||||
MRS r0, IPSR @ Pickup IPSR
|
||||
CMP r0, #0 @ Is it a thread returning?
|
||||
BNE _isr_context @ If ISR, skip interrupt enable
|
||||
MRS r1, PRIMASK @ Thread context returning, pickup PRIMASK
|
||||
CPSIE i @ Enable interrupts
|
||||
MSR PRIMASK, r1 @ Restore original interrupt posture
|
||||
_isr_context:
|
||||
BX lr @ Return to caller
|
||||
|
||||
@/* } */
|
||||
/* Return to real scheduler via PendSV. Note that this routine is often
|
||||
replaced with in-line assembly in tx_port.h to improved performance. */
|
||||
|
||||
MOV r0, #0x10000000 // Load PENDSVSET bit
|
||||
MOV r1, #0xE000E000 // Load NVIC base
|
||||
STR r0, [r1, #0xD04] // Set PENDSVBIT in ICSR
|
||||
MRS r0, IPSR // Pickup IPSR
|
||||
CMP r0, #0 // Is it a thread returning?
|
||||
BNE _isr_context // If ISR, skip interrupt enable
|
||||
#ifdef TX_PORT_USE_BASEPRI
|
||||
MRS r1, BASEPRI // Thread context returning, pickup BASEPRI
|
||||
MOV r0, #0
|
||||
MSR BASEPRI, r0 // Enable interrupts
|
||||
MSR BASEPRI, r1 // Restore original interrupt posture
|
||||
#else
|
||||
MRS r1, PRIMASK // Thread context returning, pickup PRIMASK
|
||||
CPSIE i // Enable interrupts
|
||||
MSR PRIMASK, r1 // Restore original interrupt posture
|
||||
#endif
|
||||
_isr_context:
|
||||
BX lr // Return to caller
|
||||
// }
|
||||
|
||||
@@ -1,257 +1,250 @@
|
||||
@/**************************************************************************/
|
||||
@/* */
|
||||
@/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
@/* */
|
||||
@/* This software is licensed under the Microsoft Software License */
|
||||
@/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
@/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
@/* and in the root directory of this software. */
|
||||
@/* */
|
||||
@/**************************************************************************/
|
||||
@
|
||||
@
|
||||
@/**************************************************************************/
|
||||
@/**************************************************************************/
|
||||
@/** */
|
||||
@/** ThreadX Component */
|
||||
@/** */
|
||||
@/** Timer */
|
||||
@/** */
|
||||
@/**************************************************************************/
|
||||
@/**************************************************************************/
|
||||
@
|
||||
@
|
||||
.global _tx_timer_time_slice
|
||||
.global _tx_timer_system_clock
|
||||
.global _tx_timer_current_ptr
|
||||
.global _tx_timer_list_start
|
||||
.global _tx_timer_list_end
|
||||
.global _tx_timer_expired_time_slice
|
||||
.global _tx_timer_expired
|
||||
.global _tx_thread_time_slice
|
||||
.global _tx_timer_expiration_process
|
||||
@
|
||||
@
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
/* */
|
||||
/* This software is licensed under the Microsoft Software License */
|
||||
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
/* and in the root directory of this software. */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Timer */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
.global _tx_timer_time_slice
|
||||
.global _tx_timer_system_clock
|
||||
.global _tx_timer_current_ptr
|
||||
.global _tx_timer_list_start
|
||||
.global _tx_timer_list_end
|
||||
.global _tx_timer_expired_time_slice
|
||||
.global _tx_timer_expired
|
||||
.global _tx_thread_time_slice
|
||||
.global _tx_timer_expiration_process
|
||||
|
||||
.text
|
||||
.align 4
|
||||
.syntax unified
|
||||
@/**************************************************************************/
|
||||
@/* */
|
||||
@/* FUNCTION RELEASE */
|
||||
@/* */
|
||||
@/* _tx_timer_interrupt Cortex-M3/GNU */
|
||||
@/* 6.1 */
|
||||
@/* AUTHOR */
|
||||
@/* */
|
||||
@/* William E. Lamie, Microsoft Corporation */
|
||||
@/* */
|
||||
@/* DESCRIPTION */
|
||||
@/* */
|
||||
@/* This function processes the hardware timer interrupt. This */
|
||||
@/* processing includes incrementing the system clock and checking for */
|
||||
@/* time slice and/or timer expiration. If either is found, the */
|
||||
@/* interrupt context save/restore functions are called along with the */
|
||||
@/* expiration functions. */
|
||||
@/* */
|
||||
@/* INPUT */
|
||||
@/* */
|
||||
@/* None */
|
||||
@/* */
|
||||
@/* OUTPUT */
|
||||
@/* */
|
||||
@/* None */
|
||||
@/* */
|
||||
@/* CALLS */
|
||||
@/* */
|
||||
@/* _tx_timer_expiration_process Timer expiration processing */
|
||||
@/* _tx_thread_time_slice Time slice interrupted thread */
|
||||
@/* */
|
||||
@/* CALLED BY */
|
||||
@/* */
|
||||
@/* interrupt vector */
|
||||
@/* */
|
||||
@/* RELEASE HISTORY */
|
||||
@/* */
|
||||
@/* DATE NAME DESCRIPTION */
|
||||
@/* */
|
||||
@/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
@/* */
|
||||
@/**************************************************************************/
|
||||
@VOID _tx_timer_interrupt(VOID)
|
||||
@{
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _tx_timer_interrupt Cortex-Mx/GNU */
|
||||
/* 6.1.8 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function processes the hardware timer interrupt. This */
|
||||
/* processing includes incrementing the system clock and checking for */
|
||||
/* time slice and/or timer expiration. If either is found, the */
|
||||
/* expiration functions are called. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* _tx_timer_expiration_process Timer expiration processing */
|
||||
/* _tx_thread_time_slice Time slice interrupted thread */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* interrupt vector */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 08-02-2021 Scott Larson Initial Version 6.1.8 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
// VOID _tx_timer_interrupt(VOID)
|
||||
// {
|
||||
.global _tx_timer_interrupt
|
||||
.thumb_func
|
||||
_tx_timer_interrupt:
|
||||
@
|
||||
@ /* Upon entry to this routine, it is assumed that context save has already
|
||||
@ been called, and therefore the compiler scratch registers are available
|
||||
@ for use. */
|
||||
@
|
||||
@ /* Increment the system clock. */
|
||||
@ _tx_timer_system_clock++;
|
||||
@
|
||||
LDR r1, =_tx_timer_system_clock @ Pickup address of system clock
|
||||
LDR r0, [r1, #0] @ Pickup system clock
|
||||
ADD r0, r0, #1 @ Increment system clock
|
||||
STR r0, [r1, #0] @ Store new system clock
|
||||
@
|
||||
@ /* Test for time-slice expiration. */
|
||||
@ if (_tx_timer_time_slice)
|
||||
@ {
|
||||
@
|
||||
LDR r3, =_tx_timer_time_slice @ Pickup address of time-slice
|
||||
LDR r2, [r3, #0] @ Pickup time-slice
|
||||
CMP r2, #0 @ Is it non-active?
|
||||
BEQ __tx_timer_no_time_slice @ Yes, skip time-slice processing
|
||||
@
|
||||
@ /* Decrement the time_slice. */
|
||||
@ _tx_timer_time_slice--;
|
||||
@
|
||||
SUB r2, r2, #1 @ Decrement the time-slice
|
||||
STR r2, [r3, #0] @ Store new time-slice value
|
||||
@
|
||||
@ /* Check for expiration. */
|
||||
@ if (__tx_timer_time_slice == 0)
|
||||
@
|
||||
CMP r2, #0 @ Has it expired?
|
||||
BNE __tx_timer_no_time_slice @ No, skip expiration processing
|
||||
@
|
||||
@ /* Set the time-slice expired flag. */
|
||||
@ _tx_timer_expired_time_slice = TX_TRUE;
|
||||
@
|
||||
LDR r3, =_tx_timer_expired_time_slice @ Pickup address of expired flag
|
||||
MOV r0, #1 @ Build expired value
|
||||
STR r0, [r3, #0] @ Set time-slice expiration flag
|
||||
@
|
||||
@ }
|
||||
@
|
||||
|
||||
/* Upon entry to this routine, it is assumed that the compiler scratch registers are available
|
||||
for use. */
|
||||
|
||||
/* Increment the system clock. */
|
||||
// _tx_timer_system_clock++;
|
||||
|
||||
LDR r1, =_tx_timer_system_clock // Pickup address of system clock
|
||||
LDR r0, [r1, #0] // Pickup system clock
|
||||
ADD r0, r0, #1 // Increment system clock
|
||||
STR r0, [r1, #0] // Store new system clock
|
||||
|
||||
/* Test for time-slice expiration. */
|
||||
// if (_tx_timer_time_slice)
|
||||
// {
|
||||
|
||||
LDR r3, =_tx_timer_time_slice // Pickup address of time-slice
|
||||
LDR r2, [r3, #0] // Pickup time-slice
|
||||
CBZ r2, __tx_timer_no_time_slice // Is it non-active?
|
||||
// Yes, skip time-slice processing
|
||||
|
||||
/* Decrement the time_slice. */
|
||||
// _tx_timer_time_slice--;
|
||||
|
||||
SUB r2, r2, #1 // Decrement the time-slice
|
||||
STR r2, [r3, #0] // Store new time-slice value
|
||||
|
||||
/* Check for expiration. */
|
||||
// if (__tx_timer_time_slice == 0)
|
||||
|
||||
CBNZ r2, __tx_timer_no_time_slice // Has it expired?
|
||||
// No, skip expiration processing
|
||||
|
||||
/* Set the time-slice expired flag. */
|
||||
// _tx_timer_expired_time_slice = TX_TRUE;
|
||||
|
||||
LDR r3, =_tx_timer_expired_time_slice // Pickup address of expired flag
|
||||
MOV r0, #1 // Build expired value
|
||||
STR r0, [r3, #0] // Set time-slice expiration flag
|
||||
|
||||
// }
|
||||
|
||||
__tx_timer_no_time_slice:
|
||||
@
|
||||
@ /* Test for timer expiration. */
|
||||
@ if (*_tx_timer_current_ptr)
|
||||
@ {
|
||||
@
|
||||
LDR r1, =_tx_timer_current_ptr @ Pickup current timer pointer address
|
||||
LDR r0, [r1, #0] @ Pickup current timer
|
||||
LDR r2, [r0, #0] @ Pickup timer list entry
|
||||
CMP r2, #0 @ Is there anything in the list?
|
||||
BEQ __tx_timer_no_timer @ No, just increment the timer
|
||||
@
|
||||
@ /* Set expiration flag. */
|
||||
@ _tx_timer_expired = TX_TRUE;
|
||||
@
|
||||
LDR r3, =_tx_timer_expired @ Pickup expiration flag address
|
||||
MOV r2, #1 @ Build expired value
|
||||
STR r2, [r3, #0] @ Set expired flag
|
||||
B __tx_timer_done @ Finished timer processing
|
||||
@
|
||||
@ }
|
||||
@ else
|
||||
@ {
|
||||
|
||||
/* Test for timer expiration. */
|
||||
// if (*_tx_timer_current_ptr)
|
||||
// {
|
||||
|
||||
LDR r1, =_tx_timer_current_ptr // Pickup current timer pointer address
|
||||
LDR r0, [r1, #0] // Pickup current timer
|
||||
LDR r2, [r0, #0] // Pickup timer list entry
|
||||
CBZ r2, __tx_timer_no_timer // Is there anything in the list?
|
||||
// No, just increment the timer
|
||||
|
||||
/* Set expiration flag. */
|
||||
// _tx_timer_expired = TX_TRUE;
|
||||
|
||||
LDR r3, =_tx_timer_expired // Pickup expiration flag address
|
||||
MOV r2, #1 // Build expired value
|
||||
STR r2, [r3, #0] // Set expired flag
|
||||
B __tx_timer_done // Finished timer processing
|
||||
|
||||
// }
|
||||
// else
|
||||
// {
|
||||
__tx_timer_no_timer:
|
||||
@
|
||||
@ /* No timer expired, increment the timer pointer. */
|
||||
@ _tx_timer_current_ptr++;
|
||||
@
|
||||
ADD r0, r0, #4 @ Move to next timer
|
||||
@
|
||||
@ /* Check for wrap-around. */
|
||||
@ if (_tx_timer_current_ptr == _tx_timer_list_end)
|
||||
@
|
||||
LDR r3, =_tx_timer_list_end @ Pickup addr of timer list end
|
||||
LDR r2, [r3, #0] @ Pickup list end
|
||||
CMP r0, r2 @ Are we at list end?
|
||||
BNE __tx_timer_skip_wrap @ No, skip wrap-around logic
|
||||
@
|
||||
@ /* Wrap to beginning of list. */
|
||||
@ _tx_timer_current_ptr = _tx_timer_list_start;
|
||||
@
|
||||
LDR r3, =_tx_timer_list_start @ Pickup addr of timer list start
|
||||
LDR r0, [r3, #0] @ Set current pointer to list start
|
||||
@
|
||||
|
||||
/* No timer expired, increment the timer pointer. */
|
||||
// _tx_timer_current_ptr++;
|
||||
|
||||
ADD r0, r0, #4 // Move to next timer
|
||||
|
||||
/* Check for wrap-around. */
|
||||
// if (_tx_timer_current_ptr == _tx_timer_list_end)
|
||||
|
||||
LDR r3, =_tx_timer_list_end // Pickup addr of timer list end
|
||||
LDR r2, [r3, #0] // Pickup list end
|
||||
CMP r0, r2 // Are we at list end?
|
||||
BNE __tx_timer_skip_wrap // No, skip wrap-around logic
|
||||
|
||||
/* Wrap to beginning of list. */
|
||||
// _tx_timer_current_ptr = _tx_timer_list_start;
|
||||
|
||||
LDR r3, =_tx_timer_list_start // Pickup addr of timer list start
|
||||
LDR r0, [r3, #0] // Set current pointer to list start
|
||||
|
||||
__tx_timer_skip_wrap:
|
||||
@
|
||||
STR r0, [r1, #0] @ Store new current timer pointer
|
||||
@ }
|
||||
@
|
||||
|
||||
STR r0, [r1, #0] // Store new current timer pointer
|
||||
// }
|
||||
|
||||
__tx_timer_done:
|
||||
@
|
||||
@
|
||||
@ /* See if anything has expired. */
|
||||
@ if ((_tx_timer_expired_time_slice) || (_tx_timer_expired))
|
||||
@ {
|
||||
@
|
||||
LDR r3, =_tx_timer_expired_time_slice @ Pickup addr of expired flag
|
||||
LDR r2, [r3, #0] @ Pickup time-slice expired flag
|
||||
CMP r2, #0 @ Did a time-slice expire?
|
||||
BNE __tx_something_expired @ If non-zero, time-slice expired
|
||||
LDR r1, =_tx_timer_expired @ Pickup addr of other expired flag
|
||||
LDR r0, [r1, #0] @ Pickup timer expired flag
|
||||
CMP r0, #0 @ Did a timer expire?
|
||||
BEQ __tx_timer_nothing_expired @ No, nothing expired
|
||||
@
|
||||
|
||||
/* See if anything has expired. */
|
||||
// if ((_tx_timer_expired_time_slice) || (_tx_timer_expired))
|
||||
// {
|
||||
|
||||
LDR r3, =_tx_timer_expired_time_slice // Pickup addr of expired flag
|
||||
LDR r2, [r3, #0] // Pickup time-slice expired flag
|
||||
CBNZ r2, __tx_something_expired // Did a time-slice expire?
|
||||
// If non-zero, time-slice expired
|
||||
LDR r1, =_tx_timer_expired // Pickup addr of other expired flag
|
||||
LDR r0, [r1, #0] // Pickup timer expired flag
|
||||
CBZ r0, __tx_timer_nothing_expired // Did a timer expire?
|
||||
// No, nothing expired
|
||||
|
||||
__tx_something_expired:
|
||||
@
|
||||
@
|
||||
STMDB sp!, {r0, lr} @ Save the lr register on the stack
|
||||
@ and save r0 just to keep 8-byte alignment
|
||||
@
|
||||
@ /* Did a timer expire? */
|
||||
@ if (_tx_timer_expired)
|
||||
@ {
|
||||
@
|
||||
LDR r1, =_tx_timer_expired @ Pickup addr of expired flag
|
||||
LDR r0, [r1, #0] @ Pickup timer expired flag
|
||||
CMP r0, #0 @ Check for timer expiration
|
||||
BEQ __tx_timer_dont_activate @ If not set, skip timer activation
|
||||
@
|
||||
@ /* Process timer expiration. */
|
||||
@ _tx_timer_expiration_process();
|
||||
@
|
||||
BL _tx_timer_expiration_process @ Call the timer expiration handling routine
|
||||
@
|
||||
@ }
|
||||
|
||||
STMDB sp!, {r0, lr} // Save the lr register on the stack
|
||||
// and save r0 just to keep 8-byte alignment
|
||||
|
||||
/* Did a timer expire? */
|
||||
// if (_tx_timer_expired)
|
||||
// {
|
||||
|
||||
LDR r1, =_tx_timer_expired // Pickup addr of expired flag
|
||||
LDR r0, [r1, #0] // Pickup timer expired flag
|
||||
CBZ r0, __tx_timer_dont_activate // Check for timer expiration
|
||||
// If not set, skip timer activation
|
||||
|
||||
/* Process timer expiration. */
|
||||
// _tx_timer_expiration_process();
|
||||
|
||||
BL _tx_timer_expiration_process // Call the timer expiration handling routine
|
||||
|
||||
// }
|
||||
__tx_timer_dont_activate:
|
||||
@
|
||||
@ /* Did time slice expire? */
|
||||
@ if (_tx_timer_expired_time_slice)
|
||||
@ {
|
||||
@
|
||||
LDR r3, =_tx_timer_expired_time_slice @ Pickup addr of time-slice expired
|
||||
LDR r2, [r3, #0] @ Pickup the actual flag
|
||||
CMP r2, #0 @ See if the flag is set
|
||||
BEQ __tx_timer_not_ts_expiration @ No, skip time-slice processing
|
||||
@
|
||||
@ /* Time slice interrupted thread. */
|
||||
@ _tx_thread_time_slice();
|
||||
@
|
||||
BL _tx_thread_time_slice @ Call time-slice processing
|
||||
LDR r0, =_tx_thread_preempt_disable @ Build address of preempt disable flag
|
||||
LDR r1, [r0] @ Is the preempt disable flag set?
|
||||
CBNZ r1, __tx_timer_skip_time_slice @ Yes, skip the PendSV logic
|
||||
LDR r0, =_tx_thread_current_ptr @ Build current thread pointer address
|
||||
LDR r1, [r0] @ Pickup the current thread pointer
|
||||
LDR r2, =_tx_thread_execute_ptr @ Build execute thread pointer address
|
||||
LDR r3, [r2] @ Pickup the execute thread pointer
|
||||
LDR r0, =0xE000ED04 @ Build address of control register
|
||||
LDR r2, =0x10000000 @ Build value for PendSV bit
|
||||
CMP r1, r3 @ Are they the same?
|
||||
BEQ __tx_timer_skip_time_slice @ If the same, there was no time-slice performed
|
||||
STR r2, [r0] @ Not the same, issue the PendSV for preemption
|
||||
|
||||
/* Did time slice expire? */
|
||||
// if (_tx_timer_expired_time_slice)
|
||||
// {
|
||||
|
||||
LDR r3, =_tx_timer_expired_time_slice // Pickup addr of time-slice expired
|
||||
LDR r2, [r3, #0] // Pickup the actual flag
|
||||
CBZ r2, __tx_timer_not_ts_expiration // See if the flag is set
|
||||
// No, skip time-slice processing
|
||||
|
||||
/* Time slice interrupted thread. */
|
||||
// _tx_thread_time_slice();
|
||||
|
||||
BL _tx_thread_time_slice // Call time-slice processing
|
||||
LDR r0, =_tx_thread_preempt_disable // Build address of preempt disable flag
|
||||
LDR r1, [r0] // Is the preempt disable flag set?
|
||||
CBNZ r1, __tx_timer_skip_time_slice // Yes, skip the PendSV logic
|
||||
LDR r0, =_tx_thread_current_ptr // Build current thread pointer address
|
||||
LDR r1, [r0] // Pickup the current thread pointer
|
||||
LDR r2, =_tx_thread_execute_ptr // Build execute thread pointer address
|
||||
LDR r3, [r2] // Pickup the execute thread pointer
|
||||
LDR r0, =0xE000ED04 // Build address of control register
|
||||
LDR r2, =0x10000000 // Build value for PendSV bit
|
||||
CMP r1, r3 // Are they the same?
|
||||
BEQ __tx_timer_skip_time_slice // If the same, there was no time-slice performed
|
||||
STR r2, [r0] // Not the same, issue the PendSV for preemption
|
||||
__tx_timer_skip_time_slice:
|
||||
@
|
||||
@ }
|
||||
@
|
||||
|
||||
// }
|
||||
|
||||
__tx_timer_not_ts_expiration:
|
||||
@
|
||||
LDMIA sp!, {r0, lr} @ Recover lr register (r0 is just there for
|
||||
@ the 8-byte stack alignment
|
||||
@
|
||||
@ }
|
||||
@
|
||||
|
||||
LDMIA sp!, {r0, lr} // Recover lr register (r0 is just there for
|
||||
// the 8-byte stack alignment
|
||||
|
||||
// }
|
||||
|
||||
__tx_timer_nothing_expired:
|
||||
|
||||
DSB @ Complete all memory access
|
||||
BX lr @ Return to caller
|
||||
@
|
||||
@}
|
||||
DSB // Complete all memory access
|
||||
BX lr // Return to caller
|
||||
// }
|
||||
|
||||
@@ -61,7 +61,7 @@
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
ULONG _txm_power_of_two_block_size(ULONG size)
|
||||
@@ -128,7 +128,7 @@ ULONG _txm_power_of_two_block_size(ULONG size)
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
VOID _txm_module_manager_alignment_adjust(TXM_MODULE_PREAMBLE *module_preamble,
|
||||
|
||||
@@ -70,7 +70,7 @@
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
UINT _txm_module_manager_external_memory_enable(TXM_MODULE_INSTANCE *module_instance,
|
||||
|
||||
@@ -76,7 +76,7 @@ TXM_MODULE_MANAGER_FAULT_INFO
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
VOID _txm_module_manager_memory_fault_handler(VOID)
|
||||
|
||||
@@ -71,7 +71,7 @@ extern VOID (*_txm_module_manager_fault_notify)(TX_THREAD *, TXM_MODULE_INSTA
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
UINT _txm_module_manager_memory_fault_notify(VOID (*notify_function)(TX_THREAD *, TXM_MODULE_INSTANCE *))
|
||||
|
||||
@@ -61,7 +61,7 @@
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
ULONG _txm_module_manager_region_size_get(ULONG block_size)
|
||||
@@ -184,7 +184,7 @@ ULONG return_value;
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
ULONG _txm_module_manager_calculate_srd_bits(ULONG block_size, ULONG length)
|
||||
@@ -261,7 +261,7 @@ UINT srd_bit_index;
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
VOID _txm_module_manager_mm_register_setup(TXM_MODULE_INSTANCE *module_instance)
|
||||
|
||||
@@ -23,7 +23,6 @@
|
||||
.text
|
||||
.align 4
|
||||
.syntax unified
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
@@ -61,7 +60,7 @@
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
// VOID _txm_module_manager_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(TX_THREAD *, TXM_MODULE_INSTANCE *))
|
||||
@@ -73,8 +72,8 @@ _txm_module_manager_thread_stack_build:
|
||||
/* Build a fake interrupt frame. The form of the fake interrupt stack
|
||||
on the Cortex-M should look like the following after it is built:
|
||||
|
||||
Stack Top:
|
||||
LR Interrupted LR (LR at time of PENDSV)
|
||||
Stack Top:
|
||||
lr Interrupted lr (lr at time of PENDSV)
|
||||
r4 Initial value for r4
|
||||
r5 Initial value for r5
|
||||
r6 Initial value for r6
|
||||
@@ -111,7 +110,7 @@ _txm_module_manager_thread_stack_build:
|
||||
STR r3, [r2, #28] // Store initial r10
|
||||
STR r3, [r2, #32] // Store initial r11
|
||||
|
||||
/* Hardware stack follows. */
|
||||
/* Hardware stack follows. */
|
||||
|
||||
STR r0, [r2, #36] // Store initial r0, which is the thread control block
|
||||
|
||||
@@ -137,3 +136,4 @@ _txm_module_manager_thread_stack_build:
|
||||
|
||||
STR r2, [r0, #8] // Save stack pointer in thread's control block
|
||||
BX lr // Return to caller
|
||||
// }
|
||||
|
||||
Reference in New Issue
Block a user