riscv : add riscv qemu virt support and fix fs bit error in mstatus
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46
ports/risc-v64/gnu/example_build/qemu_virt/trap.c
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46
ports/risc-v64/gnu/example_build/qemu_virt/trap.c
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@@ -0,0 +1,46 @@
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#include "csr.h"
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#include <stdint.h>
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#include "uart.h"
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#include "hwtimer.h"
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#include "plic.h"
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#include <tx_port.h>
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#include <tx_api.h>
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#define OS_IS_INTERUPT(mcause) (mcause & 0x8000000000000000ull)
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#define OS_IS_EXCEPTION(mcause) (~(OS_IS_INTERUPT))
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#define OS_IS_TICK_INT(mcause) (mcause == 0x8000000000000007ull)
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#define OS_IS_SOFT_INT(mcause) (mcause == 0x8000000000000003ull)
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#define OS_IS_EXT_INT(mcause) (mcause == 0x800000000000000bull)
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#define OS_IS_TRAP_USER(mcause) (mcause == 0x000000000000000bull)
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extern void _tx_timer_interrupt(void);
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void trap_handler(uintptr_t mcause, uintptr_t mepc, uintptr_t mtval)
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{
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if(OS_IS_INTERUPT(mcause))
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{
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if(OS_IS_TICK_INT(mcause))
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{
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hwtimer_handler();
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_tx_timer_interrupt();
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}
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else if(OS_IS_EXT_INT(mcause))
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{
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int ret = plic_irq_intr();
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if(ret)
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{
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puts("[INTERRUPT]: handler irq error!");
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while(1) ;
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}
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}
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else
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{
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puts("[INTERRUPT]: now can't deal with the interrupt!");
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while(1) ;
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}
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}
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else
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{
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puts("[EXCEPTION] : Unkown Error!!");
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while(1) ;
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}
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}
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