riscv : add riscv qemu virt support and fix fs bit error in mstatus

2024-10-25 20:03:11 +08:00
parent 485a02faec
commit d24da0e2ea
20 changed files with 1463 additions and 0 deletions
--- a/ports/risc-v64/gnu/src/tx_initialize_low_level.S
+++ b/ports/risc-v64/gnu/src/tx_initialize_low_level.S
@@ -69,6 +69,7 @@ __tx_free_memory_start:
 /* VOID   _tx_initialize_low_level(VOID)
 {  */
    .global  _tx_initialize_low_level
+    .weak    _tx_initialize_low_level
 _tx_initialize_low_level:
    sd      sp, _tx_thread_system_stack_ptr, t0     // Save system stack pointer