update to v6.1.3
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125
ports/xtensa/xcc/src/xtensa_intr_wrapper.c
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125
ports/xtensa/xcc/src/xtensa_intr_wrapper.c
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/**************************************************************************/
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/* Copyright (c) Cadence Design Systems, Inc. */
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/* */
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/* Permission is hereby granted, free of charge, to any person obtaining */
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/* a copy of this software and associated documentation files (the */
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/* "Software"), to deal in the Software without restriction, including */
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/* without limitation the rights to use, copy, modify, merge, publish, */
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/* distribute, sublicense, and/or sell copies of the Software, and to */
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/* permit persons to whom the Software is furnished to do so, subject to */
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/* the following conditions: */
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/* */
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/* The above copyright notice and this permission notice shall be */
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/* included in all copies or substantial portions of the Software. */
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/* */
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/* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, */
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/* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF */
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/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. */
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/* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY */
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/* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, */
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/* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE */
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/* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
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/**************************************************************************/
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/**************************************************************************/
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/* */
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/* DESCRIPTION */
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/* */
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/* Xtensa-specific interrupt handler wrapper. */
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/* */
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/* RELEASE HISTORY */
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/* */
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/* DATE NAME DESCRIPTION */
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/* */
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/* 12-31-2020 Cadence Design Systems Initial Version 6.1.3 */
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/* */
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/**************************************************************************/
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#include <xtensa/config/core.h>
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#include <xtensa/core-macros.h>
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#include "xtensa_rtos.h"
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#include "xtensa_api.h"
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#include "tx_api.h"
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#include "tx_thread.h"
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#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
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#include "tx_execution_profile.h"
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#endif
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#if (XCHAL_HAVE_XEA3 && XCHAL_HAVE_INTERRUPTS)
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/* Table of interrupt hooks. Used for testing ONLY. */
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#ifdef XT_INTEXC_HOOKS
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volatile XT_INTEXC_HOOK _xt_intexc_hooks[XT_INTEXC_HOOK_NUM];
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#endif
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/* Handler table is in xtensa_intr_asm.S */
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typedef struct xt_handler_table_entry {
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void * handler;
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void * arg;
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} xt_handler_table_entry;
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extern xt_handler_table_entry _xt_interrupt_table[XCHAL_NUM_INTERRUPTS + 1];
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extern int32_t xt_sw_intnum;
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static int32_t xt_wflag;
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/**************************************************************************/
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/* Wrapper for interrupt handlers. Argument is (intnum << 2). */
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/* Execution comes here from the dispatch code if the wrapper is */
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/* enabled. */
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/**************************************************************************/
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void
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xt_interrupt_wrapper(void * arg)
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{
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uint32_t intnum = (uint32_t)(arg) >> 2;
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xt_handler_table_entry * entry;
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xt_handler handler;
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/* Increment interrupt nest counter. */
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_tx_thread_system_state++;
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#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
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/* Call the ISR enter function to indicate an ISR is executing. */
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_tx_execution_isr_enter();
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#endif
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/* Load handler address and argument from table. Note that the
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first entry in the table points to this wrapper, so we have
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to skip ahead one.
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*/
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entry = _xt_interrupt_table + intnum + 1;
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handler = (xt_handler) entry->handler;
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(*handler)(entry->arg);
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#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
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/* Call the ISR exit function to indicate an ISR is complete. */
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_tx_execution_isr_exit();
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#endif
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/* If a context switch is pending, trigger the SW interrupt
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to process the switch. Set an internal flag so we don't
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trigger the sw interrupt again when handling it.
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*/
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if (xt_wflag != 0) {
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xt_wflag = 0;
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}
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else if (_tx_thread_current_ptr != _tx_thread_execute_ptr) {
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xt_wflag = 1;
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xt_interrupt_trigger(xt_sw_intnum);
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}
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/* Decrement interrupt nest counter. */
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_tx_thread_system_state--;
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}
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#endif /* XCHAL_HAVE_XEA3 && XCHAL_HAVE_INTERRUPTS */
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