Release 6.1.7

This commit is contained in:
Bo Chen
2021-06-02 06:45:05 +00:00
parent d759e6bb9e
commit f5056f4923
1269 changed files with 57325 additions and 55178 deletions

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@@ -53,6 +53,10 @@
/* use builtins, added */
/* ULONG64_DEFINED, */
/* resulting in version 6.1.5 */
/* 06-02-2021 Yuxin Zhou Modified comment(s), added */
/* conditional compilation */
/* for ARMv8-M (Cortex M23/33) */
/* resulting in version 6.1.7 */
/* */
/**************************************************************************/
@@ -87,6 +91,12 @@ typedef short SHORT;
typedef unsigned short USHORT;
#define ULONG64_DEFINED
/* This port overrides tx_thread_stack_error_notify with an architecture specific version */
#define TX_PORT_THREAD_STACK_ERROR_NOTIFY
/* This port overrides tx_thread_stack_error_handler with an architecture specific version */
#define TX_PORT_THREAD_STACK_ERROR_HANDLER
/* Function prototypes for this port. */
struct TX_THREAD_STRUCT;
UINT _txe_thread_secure_stack_allocate(struct TX_THREAD_STRUCT *thread_ptr, ULONG stack_size);

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@@ -128,6 +128,11 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
06-02-2021 Release 6.1.7 changes:
tx_thread_secure_stack_initialize.S New file
tx_thread_schedule.S Added secure stack initialize to SVC hander
tx_thread_secure_stack.c Fixed stack pointer save, initialize in handler mode
04-02-2021 Release 6.1.6 changes:
tx_port.h Updated macro definition
tx_thread_schedule.s Added low power support

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@@ -19,6 +19,9 @@
/** */
/**************************************************************************/
/**************************************************************************/
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
.global _tx_execution_isr_exit
#endif
/**************************************************************************/
@@ -68,7 +71,14 @@
.thumb_func
.type _tx_thread_context_restore, function
_tx_thread_context_restore:
/* Return to interrupt processing. */
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
/* Call the ISR exit function to indicate an ISR is complete. */
PUSH {r0, lr} // Save return address
BL _tx_execution_isr_exit // Call the ISR exit function
POP {r0, lr} // Recover return address
#endif
BX lr
// }
.end

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@@ -68,7 +68,16 @@
.thumb_func
.type _tx_thread_context_save, function
_tx_thread_context_save:
/* Return to interrupt processing. */
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
/* Call the ISR enter function to indicate an ISR is starting. */
PUSH {r0, lr} // Save return address
BL _tx_execution_isr_enter // Call the ISR enter function
POP {r0, lr} // Recover return address
#endif
/* Context is already saved - just return. */
BX lr
// }
.end

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@@ -62,6 +62,9 @@
/* 04-02-2021 Scott Larson Modified comment(s), added */
/* low power code, */
/* resulting in version 6.1.6 */
/* 06-02-2021 Scott Larson Added secure stack initialize */
/* in SVC handler, */
/* resulting in version 6.1.7 */
/* */
/**************************************************************************/
// VOID _tx_thread_schedule(VOID)
@@ -113,13 +116,13 @@ __tx_wait_here:
PendSV_Handler:
__tx_ts_handler:
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
/* Call the thread exit function to indicate the thread is no longer executing. */
CPSID i // Disable interrupts
PUSH {r0, lr} // Save LR (and r0 just for alignment)
BL _tx_execution_thread_exit // Call the thread exit function
POP {r0, r1} // Recover LR
MOV lr, r1
MOV lr, r1 //
CPSIE i // Enable interrupts
#endif
@@ -207,11 +210,11 @@ __tx_ts_restore:
STR r5, [r4] // Setup global time-slice
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
/* Call the thread entry function to indicate the thread is executing. */
PUSH {r0, r1} // Save r0/r1
PUSH {r0, r1} // Save r0 and r1
BL _tx_execution_thread_enter // Call the thread execution enter function
POP {r0, r1} // Recover r0/r1
POP {r0, r1} // Recover r0 and r1
#endif
#if (!defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE))
@@ -248,7 +251,7 @@ _skip_secure_restore:
BX lr // Return to thread!
/* The following is the idle wait processing... in this case, no threads are ready for execution and the
system will simply be idle until an interrupt occurs that makes a thread ready. Note that interrupts
system will simply be idle until an interrupt occurs that makes a thread ready. Note that interrupts
are disabled to allow use of WFI for waiting for a thread to arrive. */
__tx_ts_wait:
@@ -278,13 +281,12 @@ __tx_ts_wait:
CPSIE i // Enable interrupts
B __tx_ts_wait // Loop to continue waiting
/* At this point, we have a new thread ready to go. Clear any newly pended PendSV - since we are
/* At this point, we have a new thread ready to go. Clear any newly pended PendSV - since we are
already in the handler! */
__tx_ts_ready:
LDR r7, =0x08000000 // Build clear PendSV value
LDR r5, =0xE000ED04 // Build ICSR address
STR r7, [r5] // Clear any PendSV
STR r7, [r5] // Clear any PendSV
/* Re-enable interrupts and restore new thread. */
CPSIE i // Enable interrupts
@@ -320,9 +322,12 @@ _tx_got_sp:
CMP r1, #2 // Is it a secure stack free request?
BEQ _tx_svc_secure_free // Yes, go there
CMP r1, #3 // Is it a secure stack init request?
BEQ _tx_svc_secure_init // Yes, go there
// Unknown SVC argument - just return
BX lr
_tx_svc_secure_alloc:
PUSH {r0, lr} // Save SP and EXC_RETURN
LDM r0, {r0-r3} // Load function parameters from stack
@@ -339,6 +344,12 @@ _tx_svc_secure_free:
STR r0, [r1] // Store function return value
MOV lr, r2
BX lr
#endif // End of ifndef TX_SINGLE_MODE_SECURE, TX_SINGLE_MODE_NON_SECURE
_tx_svc_secure_init:
PUSH {r0,lr} // Save SP and EXC_RETURN
BL _tx_thread_secure_mode_stack_initialize
POP {r1, r2} // Restore SP and EXC_RETURN
MOV lr, r2
BX lr
#endif // End of ifndef TX_SINGLE_MODE_SECURE, TX_SINGLE_MODE_NON_SECURE
.end

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@@ -61,8 +61,8 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
/* */
/* FUNCTION RELEASE */
/* */
/* _tx_thread_secure_stack_initialize Cortex-M23/GNU */
/* 6.1.3 */
/* _tx_thread_secure_mode_stack_initialize Cortex-M23/GNU */
/* 6.1.7 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -77,7 +77,7 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
/* */
/* OUTPUT */
/* */
/* None */
/* status */
/* */
/* CALLS */
/* */
@@ -94,27 +94,39 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
/* 09-30-2020 Scott Larson Initial Version 6.1 */
/* 10-16-2020 Scott Larson Modified comment(s), */
/* resulting in version 6.1.1 */
/* 12-31-2020 Scott Larson Modified comment(s), and */
/* fixed M23 GCC build, */
/* resulting in version 6.1.3 */
/* 06-02-2021 Scott Larson Modified comment(s), changed */
/* name, execute in handler */
/* mode, disable optimization, */
/* resulting in version 6.1.7 */
/* */
/**************************************************************************/
__attribute__((cmse_nonsecure_entry))
void _tx_thread_secure_stack_initialize(void)
__attribute__((cmse_nonsecure_entry, optimize(0)))
UINT _tx_thread_secure_mode_stack_initialize(void)
{
ULONG control;
/* Set secure mode to use PSP. */
asm volatile("MRS %0, CONTROL" : "=r" (control)); /* Get CONTROL register. */
control |= 2; /* Use PSP. */
asm volatile("MSR CONTROL, %0" :: "r" (control)); /* Set CONTROL register. */
/* Set process stack pointer and stack limit to 0 to throw exception when a thread
without a secure stack calls a secure function that tries to use secure stack. */
asm volatile("MSR PSPLIM, %0" :: "r" (0));
asm volatile("MSR PSP, %0" :: "r" (0));
return;
UINT status;
ULONG control;
/* Make sure function is called from interrupt (threads should not call). */
asm volatile("MRS %0, IPSR" : "=r" (ipsr)); /* Get IPSR register. */
if (ipsr == 0)
{
status = TX_CALLER_ERROR;
}
else
{
/* Set secure mode to use PSP. */
asm volatile("MRS %0, CONTROL" : "=r" (control)); /* Get CONTROL register. */
control |= 2; /* Use PSP. */
asm volatile("MSR CONTROL, %0" :: "r" (control)); /* Set CONTROL register. */
/* Set process stack pointer and stack limit to 0 to throw exception when a thread
without a secure stack calls a secure function that tries to use secure stack. */
asm volatile("MSR PSPLIM, %0" :: "r" (0));
asm volatile("MSR PSP, %0" :: "r" (0));
status = TX_SUCCESS;
}
return status;
}
@@ -342,7 +354,7 @@ ULONG ipsr;
/* FUNCTION RELEASE */
/* */
/* _tx_thread_secure_stack_context_save Cortex-M23/GNU */
/* 6.1.3 */
/* 6.1.7 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -377,6 +389,8 @@ ULONG ipsr;
/* 12-31-2020 Scott Larson Modified comment(s), and */
/* fixed M23 GCC build, */
/* resulting in version 6.1.3 */
/* 06-02-2021 Scott Larson Fix stack pointer save, */
/* resulting in version 6.1.7 */
/* */
/**************************************************************************/
__attribute__((cmse_nonsecure_entry))
@@ -411,7 +425,7 @@ ULONG ipsr;
}
/* Save stack pointer. */
*(ULONG *) info_ptr -> tx_thread_secure_stack_ptr = sp;
info_ptr -> tx_thread_secure_stack_ptr = (VOID *) sp;
/* Set process stack pointer and stack limit to 0 to throw exception when a thread
without a secure stack calls a secure function that tries to use secure stack. */

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@@ -0,0 +1,79 @@
/**************************************************************************/
/* */
/* Copyright (c) Microsoft Corporation. All rights reserved. */
/* */
/* This software is licensed under the Microsoft Software License */
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
/* and in the root directory of this software. */
/* */
/**************************************************************************/
/**************************************************************************/
/**************************************************************************/
/** */
/** ThreadX Component */
/** */
/** Thread */
/** */
/**************************************************************************/
/**************************************************************************/
/**************************************************************************/
/* */
/* FUNCTION RELEASE */
/* */
/* _tx_thread_secure_stack_initialize Cortex-M23/GNU */
/* 6.1.7 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
/* */
/* DESCRIPTION */
/* */
/* This function enters the SVC handler to initialize a secure stack. */
/* */
/* INPUT */
/* */
/* none */
/* */
/* OUTPUT */
/* */
/* none */
/* */
/* CALLS */
/* */
/* SVC 3 */
/* */
/* CALLED BY */
/* */
/* TX_INITIALIZE_KERNEL_ENTER_EXTENSION */
/* */
/* RELEASE HISTORY */
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 06-02-2021 Scott Larson Initial Version 6.1.7 */
/* */
/**************************************************************************/
// VOID _tx_thread_secure_stack_initialize(VOID)
// {
.section .text
.balign 4
.syntax unified
.eabi_attribute Tag_ABI_align_preserved, 1
.global _tx_thread_secure_stack_initialize
.thumb_func
.type _tx_thread_secure_stack_initialize, function
_tx_thread_secure_stack_initialize:
#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
CPSIE i // Enable interrupts for SVC call
SVC 3
CPSID i // Disable interrupts
#else
MOV r0, #0xFF // Feature not enabled
#endif
BX lr
.end