Release 6.1.7
This commit is contained in:
@@ -53,6 +53,10 @@
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/* use builtins, added */
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/* ULONG64_DEFINED, */
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/* resulting in version 6.1.5 */
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/* 06-02-2021 Yuxin Zhou Modified comment(s), added */
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/* conditional compilation */
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/* for ARMv8-M (Cortex M23/33) */
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/* resulting in version 6.1.7 */
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/* */
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/**************************************************************************/
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@@ -87,6 +91,12 @@ typedef short SHORT;
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typedef unsigned short USHORT;
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#define ULONG64_DEFINED
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/* This port overrides tx_thread_stack_error_notify with an architecture specific version */
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#define TX_PORT_THREAD_STACK_ERROR_NOTIFY
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/* This port overrides tx_thread_stack_error_handler with an architecture specific version */
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#define TX_PORT_THREAD_STACK_ERROR_HANDLER
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/* Function prototypes for this port. */
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struct TX_THREAD_STRUCT;
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UINT _txe_thread_secure_stack_allocate(struct TX_THREAD_STRUCT *thread_ptr, ULONG stack_size);
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@@ -128,6 +128,11 @@ For generic code revision information, please refer to the readme_threadx_generi
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file, which is included in your distribution. The following details the revision
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information associated with this specific port of ThreadX:
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06-02-2021 Release 6.1.7 changes:
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tx_thread_secure_stack_initialize.S New file
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tx_thread_schedule.S Added secure stack initialize to SVC hander
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tx_thread_secure_stack.c Fixed stack pointer save, initialize in handler mode
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04-02-2021 Release 6.1.6 changes:
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tx_port.h Updated macro definition
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tx_thread_schedule.s Added low power support
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@@ -19,6 +19,9 @@
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/** */
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/**************************************************************************/
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/**************************************************************************/
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#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
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.global _tx_execution_isr_exit
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#endif
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/**************************************************************************/
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@@ -68,7 +71,14 @@
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.thumb_func
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.type _tx_thread_context_restore, function
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_tx_thread_context_restore:
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/* Return to interrupt processing. */
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#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
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/* Call the ISR exit function to indicate an ISR is complete. */
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PUSH {r0, lr} // Save return address
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BL _tx_execution_isr_exit // Call the ISR exit function
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POP {r0, lr} // Recover return address
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#endif
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BX lr
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// }
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.end
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@@ -68,7 +68,16 @@
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.thumb_func
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.type _tx_thread_context_save, function
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_tx_thread_context_save:
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/* Return to interrupt processing. */
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#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
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/* Call the ISR enter function to indicate an ISR is starting. */
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PUSH {r0, lr} // Save return address
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BL _tx_execution_isr_enter // Call the ISR enter function
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POP {r0, lr} // Recover return address
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#endif
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/* Context is already saved - just return. */
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BX lr
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// }
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.end
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@@ -62,6 +62,9 @@
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/* 04-02-2021 Scott Larson Modified comment(s), added */
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/* low power code, */
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/* resulting in version 6.1.6 */
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/* 06-02-2021 Scott Larson Added secure stack initialize */
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/* in SVC handler, */
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/* resulting in version 6.1.7 */
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/* */
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/**************************************************************************/
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// VOID _tx_thread_schedule(VOID)
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@@ -113,13 +116,13 @@ __tx_wait_here:
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PendSV_Handler:
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__tx_ts_handler:
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#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
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#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
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/* Call the thread exit function to indicate the thread is no longer executing. */
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CPSID i // Disable interrupts
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PUSH {r0, lr} // Save LR (and r0 just for alignment)
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BL _tx_execution_thread_exit // Call the thread exit function
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POP {r0, r1} // Recover LR
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MOV lr, r1
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MOV lr, r1 //
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CPSIE i // Enable interrupts
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#endif
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@@ -207,11 +210,11 @@ __tx_ts_restore:
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STR r5, [r4] // Setup global time-slice
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#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
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#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
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/* Call the thread entry function to indicate the thread is executing. */
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PUSH {r0, r1} // Save r0/r1
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PUSH {r0, r1} // Save r0 and r1
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BL _tx_execution_thread_enter // Call the thread execution enter function
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POP {r0, r1} // Recover r0/r1
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POP {r0, r1} // Recover r0 and r1
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#endif
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#if (!defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE))
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@@ -248,7 +251,7 @@ _skip_secure_restore:
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BX lr // Return to thread!
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/* The following is the idle wait processing... in this case, no threads are ready for execution and the
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system will simply be idle until an interrupt occurs that makes a thread ready. Note that interrupts
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system will simply be idle until an interrupt occurs that makes a thread ready. Note that interrupts
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are disabled to allow use of WFI for waiting for a thread to arrive. */
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__tx_ts_wait:
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@@ -278,13 +281,12 @@ __tx_ts_wait:
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CPSIE i // Enable interrupts
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B __tx_ts_wait // Loop to continue waiting
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/* At this point, we have a new thread ready to go. Clear any newly pended PendSV - since we are
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/* At this point, we have a new thread ready to go. Clear any newly pended PendSV - since we are
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already in the handler! */
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__tx_ts_ready:
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LDR r7, =0x08000000 // Build clear PendSV value
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LDR r5, =0xE000ED04 // Build ICSR address
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STR r7, [r5] // Clear any PendSV
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STR r7, [r5] // Clear any PendSV
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/* Re-enable interrupts and restore new thread. */
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CPSIE i // Enable interrupts
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@@ -320,9 +322,12 @@ _tx_got_sp:
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CMP r1, #2 // Is it a secure stack free request?
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BEQ _tx_svc_secure_free // Yes, go there
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CMP r1, #3 // Is it a secure stack init request?
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BEQ _tx_svc_secure_init // Yes, go there
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// Unknown SVC argument - just return
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BX lr
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_tx_svc_secure_alloc:
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PUSH {r0, lr} // Save SP and EXC_RETURN
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LDM r0, {r0-r3} // Load function parameters from stack
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@@ -339,6 +344,12 @@ _tx_svc_secure_free:
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STR r0, [r1] // Store function return value
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MOV lr, r2
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BX lr
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#endif // End of ifndef TX_SINGLE_MODE_SECURE, TX_SINGLE_MODE_NON_SECURE
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_tx_svc_secure_init:
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PUSH {r0,lr} // Save SP and EXC_RETURN
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BL _tx_thread_secure_mode_stack_initialize
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POP {r1, r2} // Restore SP and EXC_RETURN
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MOV lr, r2
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BX lr
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#endif // End of ifndef TX_SINGLE_MODE_SECURE, TX_SINGLE_MODE_NON_SECURE
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.end
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@@ -61,8 +61,8 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
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/* */
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/* FUNCTION RELEASE */
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/* */
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/* _tx_thread_secure_stack_initialize Cortex-M23/GNU */
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/* 6.1.3 */
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/* _tx_thread_secure_mode_stack_initialize Cortex-M23/GNU */
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/* 6.1.7 */
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/* AUTHOR */
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/* */
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/* Scott Larson, Microsoft Corporation */
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@@ -77,7 +77,7 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
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/* */
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/* OUTPUT */
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/* */
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/* None */
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/* status */
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/* */
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/* CALLS */
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/* */
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@@ -94,27 +94,39 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
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/* 09-30-2020 Scott Larson Initial Version 6.1 */
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/* 10-16-2020 Scott Larson Modified comment(s), */
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/* resulting in version 6.1.1 */
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/* 12-31-2020 Scott Larson Modified comment(s), and */
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/* fixed M23 GCC build, */
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/* resulting in version 6.1.3 */
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/* 06-02-2021 Scott Larson Modified comment(s), changed */
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/* name, execute in handler */
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/* mode, disable optimization, */
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/* resulting in version 6.1.7 */
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/* */
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/**************************************************************************/
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__attribute__((cmse_nonsecure_entry))
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void _tx_thread_secure_stack_initialize(void)
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__attribute__((cmse_nonsecure_entry, optimize(0)))
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UINT _tx_thread_secure_mode_stack_initialize(void)
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{
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ULONG control;
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/* Set secure mode to use PSP. */
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asm volatile("MRS %0, CONTROL" : "=r" (control)); /* Get CONTROL register. */
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control |= 2; /* Use PSP. */
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asm volatile("MSR CONTROL, %0" :: "r" (control)); /* Set CONTROL register. */
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/* Set process stack pointer and stack limit to 0 to throw exception when a thread
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without a secure stack calls a secure function that tries to use secure stack. */
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asm volatile("MSR PSPLIM, %0" :: "r" (0));
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asm volatile("MSR PSP, %0" :: "r" (0));
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return;
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UINT status;
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ULONG control;
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/* Make sure function is called from interrupt (threads should not call). */
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asm volatile("MRS %0, IPSR" : "=r" (ipsr)); /* Get IPSR register. */
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if (ipsr == 0)
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{
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status = TX_CALLER_ERROR;
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}
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else
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{
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/* Set secure mode to use PSP. */
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asm volatile("MRS %0, CONTROL" : "=r" (control)); /* Get CONTROL register. */
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control |= 2; /* Use PSP. */
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asm volatile("MSR CONTROL, %0" :: "r" (control)); /* Set CONTROL register. */
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/* Set process stack pointer and stack limit to 0 to throw exception when a thread
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without a secure stack calls a secure function that tries to use secure stack. */
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asm volatile("MSR PSPLIM, %0" :: "r" (0));
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asm volatile("MSR PSP, %0" :: "r" (0));
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status = TX_SUCCESS;
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}
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return status;
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}
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@@ -342,7 +354,7 @@ ULONG ipsr;
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/* FUNCTION RELEASE */
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/* */
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/* _tx_thread_secure_stack_context_save Cortex-M23/GNU */
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/* 6.1.3 */
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/* 6.1.7 */
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/* AUTHOR */
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/* */
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/* Scott Larson, Microsoft Corporation */
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@@ -377,6 +389,8 @@ ULONG ipsr;
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/* 12-31-2020 Scott Larson Modified comment(s), and */
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/* fixed M23 GCC build, */
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/* resulting in version 6.1.3 */
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/* 06-02-2021 Scott Larson Fix stack pointer save, */
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/* resulting in version 6.1.7 */
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/* */
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/**************************************************************************/
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__attribute__((cmse_nonsecure_entry))
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@@ -411,7 +425,7 @@ ULONG ipsr;
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}
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/* Save stack pointer. */
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*(ULONG *) info_ptr -> tx_thread_secure_stack_ptr = sp;
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info_ptr -> tx_thread_secure_stack_ptr = (VOID *) sp;
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/* Set process stack pointer and stack limit to 0 to throw exception when a thread
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without a secure stack calls a secure function that tries to use secure stack. */
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79
ports/cortex_m23/gnu/src/tx_thread_secure_stack_initialize.S
Normal file
79
ports/cortex_m23/gnu/src/tx_thread_secure_stack_initialize.S
Normal file
@@ -0,0 +1,79 @@
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/**************************************************************************/
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/* */
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/* Copyright (c) Microsoft Corporation. All rights reserved. */
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/* */
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/* This software is licensed under the Microsoft Software License */
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/* Terms for Microsoft Azure RTOS. Full text of the license can be */
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/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
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/* and in the root directory of this software. */
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/* */
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/**************************************************************************/
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/**************************************************************************/
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/**************************************************************************/
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/** */
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/** ThreadX Component */
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/** */
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/** Thread */
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/** */
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/**************************************************************************/
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/**************************************************************************/
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/**************************************************************************/
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/* */
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/* FUNCTION RELEASE */
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/* */
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/* _tx_thread_secure_stack_initialize Cortex-M23/GNU */
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/* 6.1.7 */
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/* AUTHOR */
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/* */
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/* Scott Larson, Microsoft Corporation */
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/* */
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/* DESCRIPTION */
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/* */
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/* This function enters the SVC handler to initialize a secure stack. */
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/* */
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/* INPUT */
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/* */
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/* none */
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/* */
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/* OUTPUT */
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/* */
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/* none */
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/* */
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/* CALLS */
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/* */
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/* SVC 3 */
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/* */
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/* CALLED BY */
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/* */
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/* TX_INITIALIZE_KERNEL_ENTER_EXTENSION */
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/* */
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/* RELEASE HISTORY */
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/* */
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/* DATE NAME DESCRIPTION */
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/* */
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/* 06-02-2021 Scott Larson Initial Version 6.1.7 */
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/* */
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/**************************************************************************/
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// VOID _tx_thread_secure_stack_initialize(VOID)
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// {
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.section .text
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.balign 4
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.syntax unified
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.eabi_attribute Tag_ABI_align_preserved, 1
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.global _tx_thread_secure_stack_initialize
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.thumb_func
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.type _tx_thread_secure_stack_initialize, function
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_tx_thread_secure_stack_initialize:
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#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
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CPSIE i // Enable interrupts for SVC call
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SVC 3
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CPSID i // Disable interrupts
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#else
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MOV r0, #0xFF // Feature not enabled
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#endif
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BX lr
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.end
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