Release 6.1.7
This commit is contained in:
Bo Chen
5
ports_module/cortex_m3/gnu/example_build/build_all.bat
Normal file
5
ports_module/cortex_m3/gnu/example_build/build_all.bat
Normal file
@@ -0,0 +1,5 @@
|
||||
|
||||
call build_threadx.bat
|
||||
call build_threadx_module_library.bat
|
||||
call build_threadx_module_sample.bat
|
||||
call build_threadx_module_manager_sample.bat
|
||||
280
ports_module/cortex_m3/gnu/example_build/build_threadx.bat
Normal file
280
ports_module/cortex_m3/gnu/example_build/build_threadx.bat
Normal file
@@ -0,0 +1,280 @@
|
||||
del tx.a
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb tx_initialize_low_level.S
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ..\module_manager\src\tx_thread_stack_build.S
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ..\module_manager\src\tx_thread_schedule.S
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ..\module_manager\src\tx_thread_system_return.S
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ..\module_manager\src\tx_thread_context_save.S
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ..\module_manager\src\tx_thread_context_restore.S
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ..\module_manager\src\tx_thread_interrupt_control.S
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ..\module_manager\src\tx_timer_interrupt.S
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ..\module_manager\src\txm_module_manager_thread_stack_build.S
|
||||
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_block_allocate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_block_pool_cleanup.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_block_pool_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_block_pool_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_block_pool_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_block_pool_initialize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_block_pool_performance_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_block_pool_performance_system_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_block_pool_prioritize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_block_release.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_byte_allocate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_byte_pool_cleanup.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_byte_pool_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_byte_pool_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_byte_pool_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_byte_pool_initialize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_byte_pool_performance_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_byte_pool_performance_system_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_byte_pool_prioritize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_byte_pool_search.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_byte_release.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_event_flags_cleanup.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_event_flags_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_event_flags_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_event_flags_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_event_flags_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_event_flags_initialize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_event_flags_performance_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_event_flags_performance_system_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_event_flags_set.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_event_flags_set_notify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_initialize_high_level.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_initialize_kernel_enter.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_initialize_kernel_setup.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_mutex_cleanup.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_mutex_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_mutex_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_mutex_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_mutex_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_mutex_initialize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_mutex_performance_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_mutex_performance_system_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_mutex_prioritize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_mutex_priority_change.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_mutex_put.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_queue_cleanup.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_queue_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_queue_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_queue_flush.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_queue_front_send.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_queue_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_queue_initialize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_queue_performance_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_queue_performance_system_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_queue_prioritize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_queue_receive.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_queue_send.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_queue_send_notify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_semaphore_ceiling_put.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_semaphore_cleanup.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_semaphore_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_semaphore_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_semaphore_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_semaphore_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_semaphore_initialize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_semaphore_performance_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_semaphore_performance_system_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_semaphore_prioritize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_semaphore_put.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_semaphore_put_notify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_entry_exit_notify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_identify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_initialize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_performance_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_performance_system_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_preemption_change.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_priority_change.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_relinquish.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_reset.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_resume.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_shell_entry.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_sleep.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_stack_analyze.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_stack_error_handler.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_stack_error_notify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_suspend.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_system_preempt_check.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_system_resume.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_system_suspend.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_terminate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_time_slice.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_time_slice_change.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_timeout.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_thread_wait_abort.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_time_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_time_set.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_timer_activate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_timer_change.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_timer_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_timer_deactivate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_timer_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_timer_expiration_process.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_timer_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_timer_initialize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_timer_performance_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_timer_performance_system_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_timer_system_activate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_timer_system_deactivate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_timer_thread_entry.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_trace_enable.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_trace_disable.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_trace_initialize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_trace_interrupt_control.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_trace_isr_enter_insert.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_trace_isr_exit_insert.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_trace_object_register.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_trace_object_unregister.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_trace_user_event_insert.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_trace_buffer_full_notify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_trace_event_filter.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\tx_trace_event_unfilter.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_block_allocate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_block_pool_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_block_pool_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_block_pool_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_block_pool_prioritize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_block_release.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_byte_allocate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_byte_pool_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_byte_pool_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_byte_pool_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_byte_pool_prioritize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_byte_release.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_event_flags_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_event_flags_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_event_flags_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_event_flags_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_event_flags_set.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_event_flags_set_notify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_mutex_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_mutex_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_mutex_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_mutex_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_mutex_prioritize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_mutex_put.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_queue_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_queue_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_queue_flush.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_queue_front_send.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_queue_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_queue_prioritize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_queue_receive.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_queue_send.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_queue_send_notify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_semaphore_ceiling_put.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_semaphore_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_semaphore_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_semaphore_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_semaphore_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_semaphore_prioritize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_semaphore_put.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_semaphore_put_notify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_thread_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_thread_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_thread_entry_exit_notify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_thread_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_thread_preemption_change.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_thread_priority_change.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_thread_relinquish.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_thread_reset.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_thread_resume.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_thread_suspend.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_thread_terminate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_thread_time_slice_change.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_thread_wait_abort.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_timer_activate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_timer_change.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_timer_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_timer_deactivate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_timer_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc ..\..\..\..\common\src\txe_timer_info_get.c
|
||||
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\module_manager\src\txm_module_manager_alignment_adjust.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_application_request.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_callback_request.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_event_flags_notify_trampoline.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\module_manager\src\txm_module_manager_external_memory_enable.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_file_load.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_in_place_load.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_internal_load.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_initialize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_kernel_dispatch.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_maximum_module_priority_set.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\module_manager\src\txm_module_manager_memory_fault_handler.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\module_manager\src\txm_module_manager_memory_fault_notify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_memory_load.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_object_allocate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_object_deallocate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_object_pointer_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_object_pointer_get_extended.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_object_pool_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_properties_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_queue_notify_trampoline.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_semaphore_notify_trampoline.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\module_manager\src\txm_module_manager_mm_register_setup.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_start.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_stop.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_thread_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_thread_notify_trampoline.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_thread_reset.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_timer_notify_trampoline.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_unload.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc -I..\..\..\..\common_modules\module_manager\inc ..\..\..\..\common_modules\module_manager\src\txm_module_manager_util.c
|
||||
|
||||
|
||||
arm-none-eabi-ar -r tx.a tx_thread_stack_build.o tx_thread_schedule.o tx_thread_system_return.o tx_thread_context_save.o tx_thread_context_restore.o tx_timer_interrupt.o
|
||||
arm-none-eabi-ar -r tx.a tx_thread_interrupt_control.o tx_initialize_low_level.o
|
||||
arm-none-eabi-ar -r tx.a tx_block_allocate.o tx_block_pool_cleanup.o tx_block_pool_create.o tx_block_pool_delete.o tx_block_pool_info_get.o
|
||||
arm-none-eabi-ar -r tx.a tx_block_pool_initialize.o tx_block_pool_performance_info_get.o tx_block_pool_performance_system_info_get.o tx_block_pool_prioritize.o
|
||||
arm-none-eabi-ar -r tx.a tx_block_release.o tx_byte_allocate.o tx_byte_pool_cleanup.o tx_byte_pool_create.o tx_byte_pool_delete.o tx_byte_pool_info_get.o
|
||||
arm-none-eabi-ar -r tx.a tx_byte_pool_initialize.o tx_byte_pool_performance_info_get.o tx_byte_pool_performance_system_info_get.o tx_byte_pool_prioritize.o
|
||||
arm-none-eabi-ar -r tx.a tx_byte_pool_search.o tx_byte_release.o tx_event_flags_cleanup.o tx_event_flags_create.o tx_event_flags_delete.o tx_event_flags_get.o
|
||||
arm-none-eabi-ar -r tx.a tx_event_flags_info_get.o tx_event_flags_initialize.o tx_event_flags_performance_info_get.o tx_event_flags_performance_system_info_get.o
|
||||
arm-none-eabi-ar -r tx.a tx_event_flags_set.o tx_event_flags_set_notify.o tx_initialize_high_level.o tx_initialize_kernel_enter.o tx_initialize_kernel_setup.o
|
||||
arm-none-eabi-ar -r tx.a tx_mutex_cleanup.o tx_mutex_create.o tx_mutex_delete.o tx_mutex_get.o tx_mutex_info_get.o tx_mutex_initialize.o tx_mutex_performance_info_get.o
|
||||
arm-none-eabi-ar -r tx.a tx_mutex_performance_system_info_get.o tx_mutex_prioritize.o tx_mutex_priority_change.o tx_mutex_put.o tx_queue_cleanup.o tx_queue_create.o
|
||||
arm-none-eabi-ar -r tx.a tx_queue_delete.o tx_queue_flush.o tx_queue_front_send.o tx_queue_info_get.o tx_queue_initialize.o tx_queue_performance_info_get.o
|
||||
arm-none-eabi-ar -r tx.a tx_queue_performance_system_info_get.o tx_queue_prioritize.o tx_queue_receive.o tx_queue_send.o tx_queue_send_notify.o tx_semaphore_ceiling_put.o
|
||||
arm-none-eabi-ar -r tx.a tx_semaphore_cleanup.o tx_semaphore_create.o tx_semaphore_delete.o tx_semaphore_get.o tx_semaphore_info_get.o tx_semaphore_initialize.o
|
||||
arm-none-eabi-ar -r tx.a tx_semaphore_performance_info_get.o tx_semaphore_performance_system_info_get.o tx_semaphore_prioritize.o tx_semaphore_put.o tx_semaphore_put_notify.o
|
||||
arm-none-eabi-ar -r tx.a tx_thread_create.o tx_thread_delete.o tx_thread_entry_exit_notify.o tx_thread_identify.o tx_thread_info_get.o tx_thread_initialize.o
|
||||
arm-none-eabi-ar -r tx.a tx_thread_performance_info_get.o tx_thread_performance_system_info_get.o tx_thread_preemption_change.o tx_thread_priority_change.o tx_thread_relinquish.o
|
||||
arm-none-eabi-ar -r tx.a tx_thread_reset.o tx_thread_resume.o tx_thread_shell_entry.o tx_thread_sleep.o tx_thread_stack_analyze.o tx_thread_stack_error_handler.o
|
||||
arm-none-eabi-ar -r tx.a tx_thread_stack_error_notify.o tx_thread_suspend.o tx_thread_system_preempt_check.o tx_thread_system_resume.o tx_thread_system_suspend.o
|
||||
arm-none-eabi-ar -r tx.a tx_thread_terminate.o tx_thread_time_slice.o tx_thread_time_slice_change.o tx_thread_timeout.o tx_thread_wait_abort.o tx_time_get.o
|
||||
arm-none-eabi-ar -r tx.a tx_time_set.o tx_timer_activate.o tx_timer_change.o tx_timer_create.o tx_timer_deactivate.o tx_timer_delete.o tx_timer_expiration_process.o
|
||||
arm-none-eabi-ar -r tx.a tx_timer_info_get.o tx_timer_initialize.o tx_timer_performance_info_get.o tx_timer_performance_system_info_get.o tx_timer_system_activate.o
|
||||
arm-none-eabi-ar -r tx.a tx_timer_system_deactivate.o tx_timer_thread_entry.o tx_trace_enable.o tx_trace_disable.o tx_trace_initialize.o tx_trace_interrupt_control.o
|
||||
arm-none-eabi-ar -r tx.a tx_trace_isr_enter_insert.o tx_trace_isr_exit_insert.o tx_trace_object_register.o tx_trace_object_unregister.o tx_trace_user_event_insert.o
|
||||
arm-none-eabi-ar -r tx.a tx_trace_buffer_full_notify.o tx_trace_event_filter.o tx_trace_event_unfilter.o
|
||||
arm-none-eabi-ar -r tx.a txe_block_allocate.o txe_block_pool_create.o txe_block_pool_delete.o txe_block_pool_info_get.o txe_block_pool_prioritize.o txe_block_release.o
|
||||
arm-none-eabi-ar -r tx.a txe_byte_allocate.o txe_byte_pool_create.o txe_byte_pool_delete.o txe_byte_pool_info_get.o txe_byte_pool_prioritize.o txe_byte_release.o
|
||||
arm-none-eabi-ar -r tx.a txe_event_flags_create.o txe_event_flags_delete.o txe_event_flags_get.o txe_event_flags_info_get.o txe_event_flags_set.o
|
||||
arm-none-eabi-ar -r tx.a txe_event_flags_set_notify.o txe_mutex_create.o txe_mutex_delete.o txe_mutex_get.o txe_mutex_info_get.o txe_mutex_prioritize.o
|
||||
arm-none-eabi-ar -r tx.a txe_mutex_put.o txe_queue_create.o txe_queue_delete.o txe_queue_flush.o txe_queue_front_send.o txe_queue_info_get.o txe_queue_prioritize.o
|
||||
arm-none-eabi-ar -r tx.a txe_queue_receive.o txe_queue_send.o txe_queue_send_notify.o txe_semaphore_ceiling_put.o txe_semaphore_create.o txe_semaphore_delete.o
|
||||
arm-none-eabi-ar -r tx.a txe_semaphore_get.o txe_semaphore_info_get.o txe_semaphore_prioritize.o txe_semaphore_put.o txe_semaphore_put_notify.o txe_thread_create.o
|
||||
arm-none-eabi-ar -r tx.a txe_thread_delete.o txe_thread_entry_exit_notify.o txe_thread_info_get.o txe_thread_preemption_change.o txe_thread_priority_change.o
|
||||
arm-none-eabi-ar -r tx.a txe_thread_relinquish.o txe_thread_reset.o txe_thread_resume.o txe_thread_suspend.o txe_thread_terminate.o txe_thread_time_slice_change.o
|
||||
arm-none-eabi-ar -r tx.a txe_thread_wait_abort.o txe_timer_activate.o txe_timer_change.o txe_timer_create.o txe_timer_deactivate.o txe_timer_delete.o txe_timer_info_get.o
|
||||
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_alignment_adjust.o txm_module_manager_application_request.o txm_module_manager_callback_request.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_event_flags_notify_trampoline.o txm_module_manager_external_memory_enable.o txm_module_manager_file_load.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_in_place_load.o txm_module_manager_initialize.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_kernel_dispatch.o txm_module_manager_maximum_module_priority_set.o txm_module_manager_memory_fault_handler.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_memory_fault_notify.o txm_module_manager_memory_load.o txm_module_manager_object_pointer_get.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_object_pool_create.o txm_module_manager_queue_notify_trampoline.o txm_module_manager_semaphore_notify_trampoline.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_mm_register_setup.o txm_module_manager_start.o txm_module_manager_stop.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_thread_create.o txm_module_manager_thread_notify_trampoline.o txm_module_manager_thread_reset.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_timer_notify_trampoline.o txm_module_manager_unload.o txm_module_manager_thread_stack_build.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_internal_load.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_object_allocate.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_object_deallocate.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_object_pointer_get_extended.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_properties_get.o
|
||||
arm-none-eabi-ar -r tx.a txm_module_manager_util.o
|
||||
@@ -0,0 +1,118 @@
|
||||
del txm.a
|
||||
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_allocate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_pool_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_pool_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_pool_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_pool_performance_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_pool_performance_system_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_pool_prioritize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_block_release.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_allocate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_pool_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_pool_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_pool_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_pool_performance_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_pool_performance_system_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_pool_prioritize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_byte_release.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_performance_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_performance_system_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_set.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_event_flags_set_notify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_application_request.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_callback_request_thread_entry.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_object_allocate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_object_deallocate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_object_pointer_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\module_lib\src\txm_module_thread_shell_entry.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_module_thread_system_suspend.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_performance_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_performance_system_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_prioritize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_mutex_put.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_flush.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_front_send.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_performance_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_performance_system_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_prioritize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_receive.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_send.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_queue_send_notify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_ceiling_put.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_performance_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_performance_system_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_prioritize.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_put.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_semaphore_put_notify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_entry_exit_notify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_identify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_interrupt_control.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_performance_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_performance_system_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_preemption_change.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_priority_change.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_relinquish.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_reset.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_resume.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_sleep.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_stack_error_notify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_suspend.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_terminate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_time_slice_change.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_thread_wait_abort.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_time_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_time_set.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_activate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_change.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_create.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_deactivate.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_delete.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_performance_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_timer_performance_system_info_get.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_buffer_full_notify.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_disable.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_enable.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_event_filter.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_event_unfilter.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_isr_enter_insert.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_isr_exit_insert.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -fpic -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc ..\..\..\..\common_modules\module_lib\src\txm_trace_user_event_insert.c
|
||||
|
||||
arm-none-eabi-ar -r txm.a txm_block_allocate.o txm_block_pool_create.o txm_block_pool_delete.o txm_block_pool_info_get.o txm_block_pool_performance_info_get.o txm_block_pool_performance_system_info_get.o
|
||||
arm-none-eabi-ar -r txm.a txm_block_pool_prioritize.o txm_block_release.o
|
||||
arm-none-eabi-ar -r txm.a txm_byte_allocate.o txm_byte_pool_create.o txm_byte_pool_delete.o txm_byte_pool_info_get.o txm_byte_pool_performance_info_get.o txm_byte_pool_performance_system_info_get.o
|
||||
arm-none-eabi-ar -r txm.a txm_byte_pool_prioritize.o txm_byte_release.o
|
||||
arm-none-eabi-ar -r txm.a txm_event_flags_create.o txm_event_flags_delete.o txm_event_flags_get.o txm_event_flags_info_get.o txm_event_flags_performance_info_get.o txm_event_flags_performance_system_info_get.o
|
||||
arm-none-eabi-ar -r txm.a txm_event_flags_set.o txm_event_flags_set_notify.o
|
||||
arm-none-eabi-ar -r txm.a txm_module_application_request.o txm_module_callback_request_thread_entry.o txm_module_object_allocate.o txm_module_object_deallocate.o txm_module_object_pointer_get.o txm_module_thread_shell_entry.o txm_module_thread_system_suspend.o
|
||||
arm-none-eabi-ar -r txm.a txm_mutex_create.o txm_mutex_delete.o txm_mutex_get.o txm_mutex_info_get.o txm_mutex_performance_info_get.o txm_mutex_performance_system_info_get.o txm_mutex_prioritize.o txm_mutex_put.o
|
||||
arm-none-eabi-ar -r txm.a txm_queue_create.o txm_queue_delete.o txm_queue_flush.o txm_queue_front_send.o txm_queue_info_get.o txm_queue_performance_info_get.o txm_queue_performance_system_info_get.o
|
||||
arm-none-eabi-ar -r txm.a txm_queue_prioritize.o txm_queue_receive.o txm_queue_send.o txm_queue_send_notify.o
|
||||
arm-none-eabi-ar -r txm.a txm_semaphore_ceiling_put.o txm_semaphore_create.o txm_semaphore_delete.o txm_semaphore_get.o txm_semaphore_info_get.o txm_semaphore_performance_info_get.o txm_semaphore_performance_system_info_get.o
|
||||
arm-none-eabi-ar -r txm.a txm_semaphore_prioritize.o txm_semaphore_put.o txm_semaphore_put_notify.o
|
||||
arm-none-eabi-ar -r txm.a txm_thread_create.o txm_thread_delete.o txm_thread_entry_exit_notify.o txm_thread_identify.o txm_thread_info_get.o txm_thread_interrupt_control.o txm_thread_performance_info_get.o
|
||||
arm-none-eabi-ar -r txm.a txm_thread_performance_system_info_get.o txm_thread_preemption_change.o txm_thread_priority_change.o txm_thread_relinquish.o txm_thread_reset.o txm_thread_resume.o
|
||||
arm-none-eabi-ar -r txm.a txm_thread_sleep.o txm_thread_stack_error_notify.o txm_thread_suspend.o txm_thread_terminate.o txm_thread_time_slice_change.o txm_thread_wait_abort.o
|
||||
arm-none-eabi-ar -r txm.a txm_time_get.o txm_time_set.o
|
||||
arm-none-eabi-ar -r txm.a txm_timer_activate.o txm_timer_change.o txm_timer_create.o txm_timer_deactivate.o txm_timer_delete.o txm_timer_info_get.o txm_timer_performance_info_get.o txm_timer_performance_system_info_get.o
|
||||
arm-none-eabi-ar -r txm.a txm_trace_buffer_full_notify.o txm_trace_disable.o txm_trace_enable.o txm_trace_event_filter.o txm_trace_event_unfilter.o txm_trace_isr_enter_insert.o txm_trace_isr_exit_insert.o txm_trace_user_event_insert.o
|
||||
@@ -0,0 +1,4 @@
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc sample_threadx_module_manager.c
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb tx_simulator_startup.S
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb cortexm_crt0.S
|
||||
arm-none-eabi-ld -A cortex-m3 -ereset_handler -T sample_threadx.ld tx_simulator_startup.o cortexm_crt0.o sample_threadx_module_manager.o tx.a libc.a -o sample_threadx_module_manager.axf -M > sample_threadx_module_manager.map
|
||||
@@ -0,0 +1,5 @@
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -fpie -fno-plt -mpic-data-is-text-relative -msingle-pic-base txm_module_preamble.s
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -fpie -fno-plt -mpic-data-is-text-relative -msingle-pic-base gcc_setup.S
|
||||
arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -fpie -fno-plt -mpic-data-is-text-relative -msingle-pic-base -I..\inc -I..\..\..\..\common\inc -I..\..\..\..\common_modules\inc sample_threadx_module.c
|
||||
arm-none-eabi-ld -A cortex-m3 -T sample_threadx_module.ld txm_module_preamble.o gcc_setup.o sample_threadx_module.o -e _txm_module_thread_shell_entry txm.a -o sample_threadx_module.axf -M > sample_threadx_module.map
|
||||
|
||||
127
ports_module/cortex_m3/gnu/example_build/cortexm_crt0.s
Normal file
127
ports_module/cortex_m3/gnu/example_build/cortexm_crt0.s
Normal file
@@ -0,0 +1,127 @@
|
||||
.global _start
|
||||
.extern main
|
||||
|
||||
|
||||
.section .init, "ax"
|
||||
.code 16
|
||||
.align 2
|
||||
.thumb_func
|
||||
|
||||
|
||||
_start:
|
||||
CPSID i
|
||||
ldr r1, =__stack_end__
|
||||
mov sp, r1
|
||||
|
||||
|
||||
/* Copy initialised sections into RAM if required. */
|
||||
ldr r0, =__data_load_start__
|
||||
ldr r1, =__data_start__
|
||||
ldr r2, =__data_end__
|
||||
bl crt0_memory_copy
|
||||
ldr r0, =__text_load_start__
|
||||
ldr r1, =__text_start__
|
||||
ldr r2, =__text_end__
|
||||
bl crt0_memory_copy
|
||||
ldr r0, =__fast_load_start__
|
||||
ldr r1, =__fast_start__
|
||||
ldr r2, =__fast_end__
|
||||
bl crt0_memory_copy
|
||||
ldr r0, =__ctors_load_start__
|
||||
ldr r1, =__ctors_start__
|
||||
ldr r2, =__ctors_end__
|
||||
bl crt0_memory_copy
|
||||
ldr r0, =__dtors_load_start__
|
||||
ldr r1, =__dtors_start__
|
||||
ldr r2, =__dtors_end__
|
||||
bl crt0_memory_copy
|
||||
ldr r0, =__rodata_load_start__
|
||||
ldr r1, =__rodata_start__
|
||||
ldr r2, =__rodata_end__
|
||||
bl crt0_memory_copy
|
||||
|
||||
|
||||
/* Zero bss. */
|
||||
ldr r0, =__bss_start__
|
||||
ldr r1, =__bss_end__
|
||||
mov r2, #0
|
||||
bl crt0_memory_set
|
||||
|
||||
|
||||
/* Setup heap - not recommended for Threadx but here for compatibility reasons */
|
||||
ldr r0, = __heap_start__
|
||||
ldr r1, = __heap_end__
|
||||
sub r1, r1, r0
|
||||
mov r2, #0
|
||||
str r2, [r0]
|
||||
add r0, r0, #4
|
||||
str r1, [r0]
|
||||
|
||||
|
||||
/* constructors in case of using C++ */
|
||||
ldr r0, =__ctors_start__
|
||||
ldr r1, =__ctors_end__
|
||||
crt0_ctor_loop:
|
||||
cmp r0, r1
|
||||
beq crt0_ctor_end
|
||||
ldr r2, [r0]
|
||||
add r0, #4
|
||||
push {r0-r1}
|
||||
blx r2
|
||||
pop {r0-r1}
|
||||
b crt0_ctor_loop
|
||||
crt0_ctor_end:
|
||||
|
||||
|
||||
/* Setup call frame for main() */
|
||||
mov r0, #0
|
||||
mov lr, r0
|
||||
mov r12, sp
|
||||
|
||||
|
||||
start:
|
||||
/* Jump to main() */
|
||||
mov r0, #0
|
||||
mov r1, #0
|
||||
ldr r2, =main
|
||||
blx r2
|
||||
/* when main returns, loop forever. */
|
||||
crt0_exit_loop:
|
||||
b crt0_exit_loop
|
||||
|
||||
|
||||
|
||||
/* Startup helper functions. */
|
||||
|
||||
|
||||
crt0_memory_copy:
|
||||
cmp r0, r1
|
||||
beq memory_copy_done
|
||||
sub r2, r2, r1
|
||||
beq memory_copy_done
|
||||
memory_copy_loop:
|
||||
ldrb r3, [r0]
|
||||
add r0, r0, #1
|
||||
strb r3, [r1]
|
||||
add r1, r1, #1
|
||||
sub r2, r2, #1
|
||||
bne memory_copy_loop
|
||||
memory_copy_done:
|
||||
bx lr
|
||||
|
||||
|
||||
crt0_memory_set:
|
||||
cmp r0, r1
|
||||
beq memory_set_done
|
||||
strb r2, [r0]
|
||||
add r0, r0, #1
|
||||
b crt0_memory_set
|
||||
memory_set_done:
|
||||
bx lr
|
||||
|
||||
|
||||
/* Setup attibutes of stack and heap sections so they don't take up room in the elf file */
|
||||
.section .stack, "wa", %nobits
|
||||
.section .stack_process, "wa", %nobits
|
||||
.section .heap, "wa", %nobits
|
||||
|
||||
127
ports_module/cortex_m3/gnu/example_build/gcc_setup.s
Normal file
127
ports_module/cortex_m3/gnu/example_build/gcc_setup.s
Normal file
@@ -0,0 +1,127 @@
|
||||
|
||||
.text
|
||||
.align 4
|
||||
.syntax unified
|
||||
|
||||
.global _gcc_setup
|
||||
.thumb_func
|
||||
_gcc_setup:
|
||||
|
||||
STMDB sp!, {r3, r4, r5, r6, r7, lr} // Store other preserved registers
|
||||
|
||||
ldr r3, =__FLASH_segment_start__
|
||||
ldr r4, =__RAM_segment_start__
|
||||
mov r5,r0
|
||||
|
||||
/* Copy GOT table. */
|
||||
|
||||
ldr r0, =__got_load_start__
|
||||
sub r0,r0,r3
|
||||
add r0,r0,r5
|
||||
ldr r1, =__new_got_start__
|
||||
sub r1,r1, r4
|
||||
add r1,r1,r9
|
||||
ldr r2, =__new_got_end__
|
||||
sub r2,r2,r4
|
||||
add r2,r2,r9
|
||||
|
||||
new_got_setup:
|
||||
cmp r1, r2 // See if there are more GOT entries
|
||||
beq got_setup_done // No, done with GOT setup
|
||||
ldr r6, [r0] // Pickup current GOT entry
|
||||
cmp r6, #0 // Is it 0?
|
||||
beq address_built // Yes, just skip the adjustment
|
||||
cmp r6, r4 // Is it in the code or data area?
|
||||
blt flash_area // If less than, it is a code address
|
||||
sub r6, r6, r4 // Compute offset of data area
|
||||
add r6, r6, r9 // Build address based on the loaded data address
|
||||
b address_built // Finished building address
|
||||
flash_area:
|
||||
sub r6, r6, r3 // Compute offset of code area
|
||||
add r6, r6, r5 // Build address based on the loaded code address
|
||||
address_built:
|
||||
str r6, [r1] // Store in new GOT table
|
||||
add r0, r0, #4 // Move to next entry
|
||||
add r1, r1, #4 //
|
||||
b new_got_setup // Continue at the top of the loop
|
||||
got_setup_done:
|
||||
|
||||
|
||||
/* Copy initialised sections into RAM if required. */
|
||||
|
||||
ldr r0, =__data_load_start__
|
||||
sub r0,r0,r3
|
||||
add r0,r0,r5
|
||||
ldr r1, =__data_start__
|
||||
sub r1,r1, r4
|
||||
add r1,r1,r9
|
||||
ldr r2, =__data_end__
|
||||
sub r2,r2,r4
|
||||
add r2,r2,r9
|
||||
bl crt0_memory_copy
|
||||
|
||||
/* Zero bss. */
|
||||
|
||||
ldr r0, =__bss_start__
|
||||
sub r0,r0,r4
|
||||
add r0,r0,r9
|
||||
ldr r1, =__bss_end__
|
||||
sub r1,r1,r4
|
||||
add r1,r1,r9
|
||||
mov r2, #0
|
||||
bl crt0_memory_set
|
||||
|
||||
|
||||
/* Setup heap - not recommended for Threadx but here for compatibility reasons */
|
||||
|
||||
ldr r0, =__heap_start__
|
||||
sub r0,r0,r4
|
||||
add r0,r0,r9
|
||||
ldr r1, =__heap_end__
|
||||
sub r1,r1,r4
|
||||
add r1,r1,r9
|
||||
sub r1,r1,r0
|
||||
mov r2, #0
|
||||
str r2, [r0]
|
||||
add r0, r0, #4
|
||||
str r1, [r0]
|
||||
|
||||
LDMIA sp!, {r3, r4, r5, r6, r7, lr} // Store other preserved registers
|
||||
bx lr // Return to caller
|
||||
|
||||
.align 4
|
||||
|
||||
/* Startup helper functions. */
|
||||
|
||||
.thumb_func
|
||||
crt0_memory_copy:
|
||||
|
||||
cmp r0, r1
|
||||
beq memory_copy_done
|
||||
cmp r2, r1
|
||||
beq memory_copy_done
|
||||
sub r2, r2, r1
|
||||
memory_copy_loop:
|
||||
ldrb r3, [r0]
|
||||
add r0, r0, #1
|
||||
strb r3, [r1]
|
||||
add r1, r1, #1
|
||||
sub r2, r2, #1
|
||||
cmp r2, #0
|
||||
bne memory_copy_loop
|
||||
memory_copy_done:
|
||||
bx lr
|
||||
|
||||
.thumb_func
|
||||
crt0_memory_set:
|
||||
cmp r0, r1
|
||||
beq memory_set_done
|
||||
strb r2, [r0]
|
||||
add r0, r0, #1
|
||||
b crt0_memory_set
|
||||
memory_set_done:
|
||||
bx lr
|
||||
|
||||
/* Setup attibutes of heap section so it doesn't take up room in the elf file */
|
||||
.section .heap, "wa", %nobits
|
||||
|
||||
206
ports_module/cortex_m3/gnu/example_build/sample_threadx.ld
Normal file
206
ports_module/cortex_m3/gnu/example_build/sample_threadx.ld
Normal file
@@ -0,0 +1,206 @@
|
||||
MEMORY
|
||||
{
|
||||
UNPLACED_SECTIONS (wx) : ORIGIN = 0x100000000, LENGTH = 0
|
||||
CM3_System_Control_Space (wx) : ORIGIN = 0xe000e000, LENGTH = 0x00001000
|
||||
AHB_Peripherals (wx) : ORIGIN = 0x50000000, LENGTH = 0x00200000
|
||||
APB1_Peripherals (wx) : ORIGIN = 0x40080000, LENGTH = 0x00080000
|
||||
APB0_Peripherals (wx) : ORIGIN = 0x40000000, LENGTH = 0x00080000
|
||||
GPIO (wx) : ORIGIN = 0x2009c000, LENGTH = 0x00004000
|
||||
AHBSRAM1 (wx) : ORIGIN = 0x20080000, LENGTH = 0x00004000
|
||||
AHBSRAM0 (wx) : ORIGIN = 0x2007c000, LENGTH = 0x00004000
|
||||
RAM (wx) : ORIGIN = 0x20000000, LENGTH = 0x00020000
|
||||
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000
|
||||
}
|
||||
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
__CM3_System_Control_Space_segment_start__ = 0xe000e000;
|
||||
__CM3_System_Control_Space_segment_end__ = 0xe000f000;
|
||||
__AHB_Peripherals_segment_start__ = 0x50000000;
|
||||
__AHB_Peripherals_segment_end__ = 0x50200000;
|
||||
__APB1_Peripherals_segment_start__ = 0x40080000;
|
||||
__APB1_Peripherals_segment_end__ = 0x40100000;
|
||||
__APB0_Peripherals_segment_start__ = 0x40000000;
|
||||
__APB0_Peripherals_segment_end__ = 0x40080000;
|
||||
__GPIO_segment_start__ = 0x2009c000;
|
||||
__GPIO_segment_end__ = 0x200a0000;
|
||||
__AHBSRAM1_segment_start__ = 0x20080000;
|
||||
__AHBSRAM1_segment_end__ = 0x20084000;
|
||||
__AHBSRAM0_segment_start__ = 0x2007c000;
|
||||
__AHBSRAM0_segment_end__ = 0x20080000;
|
||||
__RAM_segment_start__ = 0x20000000;
|
||||
__RAM_segment_end__ = 0x20008000;
|
||||
__FLASH_segment_start__ = 0x00000000;
|
||||
__FLASH_segment_end__ = 0x00030000;
|
||||
|
||||
__STACKSIZE__ = 1024;
|
||||
__STACKSIZE_PROCESS__ = 0;
|
||||
__STACKSIZE_IRQ__ = 0;
|
||||
__STACKSIZE_FIQ__ = 0;
|
||||
__STACKSIZE_SVC__ = 0;
|
||||
__STACKSIZE_ABT__ = 0;
|
||||
__STACKSIZE_UND__ = 0;
|
||||
__HEAPSIZE__ = 128;
|
||||
|
||||
__vectors_load_start__ = __FLASH_segment_start__;
|
||||
.vectors __FLASH_segment_start__ : AT(__FLASH_segment_start__)
|
||||
{
|
||||
__vectors_start__ = .;
|
||||
*(.vectors .vectors.*)
|
||||
}
|
||||
__vectors_end__ = __vectors_start__ + SIZEOF(.vectors);
|
||||
|
||||
. = ASSERT(__vectors_end__ >= __FLASH_segment_start__ && __vectors_end__ <= (__FLASH_segment_start__ + 0x00030000) , "error: .vectors is too large to fit in FLASH memory segment");
|
||||
|
||||
__init_load_start__ = ALIGN(__vectors_end__ , 4);
|
||||
.init ALIGN(__vectors_end__ , 4) : AT(ALIGN(__vectors_end__ , 4))
|
||||
{
|
||||
__init_start__ = .;
|
||||
*(.init .init.*)
|
||||
}
|
||||
__init_end__ = __init_start__ + SIZEOF(.init);
|
||||
|
||||
. = ASSERT(__init_end__ >= __FLASH_segment_start__ && __init_end__ <= (__FLASH_segment_start__ + 0x00030000) , "error: .init is too large to fit in FLASH memory segment");
|
||||
|
||||
__text_load_start__ = ALIGN(__init_end__ , 4);
|
||||
.text ALIGN(__init_end__ , 4) : AT(ALIGN(__init_end__ , 4))
|
||||
{
|
||||
__text_start__ = .;
|
||||
*(.text .text.* .glue_7t .glue_7 .gnu.linkonce.t.* .gcc_except_table)
|
||||
}
|
||||
__text_end__ = __text_start__ + SIZEOF(.text);
|
||||
|
||||
. = ASSERT(__text_end__ >= __FLASH_segment_start__ && __text_end__ <= (__FLASH_segment_start__ + 0x00030000) , "error: .text is too large to fit in FLASH memory segment");
|
||||
|
||||
__dtors_load_start__ = ALIGN(__text_end__ , 4);
|
||||
.dtors ALIGN(__text_end__ , 4) : AT(ALIGN(__text_end__ , 4))
|
||||
{
|
||||
__dtors_start__ = .;
|
||||
KEEP (*(SORT(.dtors.*))) KEEP (*(.dtors))
|
||||
}
|
||||
__dtors_end__ = __dtors_start__ + SIZEOF(.dtors);
|
||||
|
||||
. = ASSERT(__dtors_end__ >= __FLASH_segment_start__ && __dtors_end__ <= (__FLASH_segment_start__ + 0x00030000) , "error: .dtors is too large to fit in FLASH memory segment");
|
||||
|
||||
__ctors_load_start__ = ALIGN(__dtors_end__ , 4);
|
||||
.ctors ALIGN(__dtors_end__ , 4) : AT(ALIGN(__dtors_end__ , 4))
|
||||
{
|
||||
__ctors_start__ = .;
|
||||
KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors))
|
||||
}
|
||||
__ctors_end__ = __ctors_start__ + SIZEOF(.ctors);
|
||||
|
||||
. = ASSERT(__ctors_end__ >= __FLASH_segment_start__ && __ctors_end__ <= (__FLASH_segment_start__ + 0x00030000) , "error: .ctors is too large to fit in FLASH memory segment");
|
||||
|
||||
__rodata_load_start__ = ALIGN(__ctors_end__ , 4);
|
||||
.rodata ALIGN(__ctors_end__ , 4) : AT(ALIGN(__ctors_end__ , 4))
|
||||
{
|
||||
__rodata_start__ = .;
|
||||
*(.rodata .rodata.* .gnu.linkonce.r.*)
|
||||
}
|
||||
__rodata_end__ = __rodata_start__ + SIZEOF(.rodata);
|
||||
|
||||
. = ASSERT(__rodata_end__ >= __FLASH_segment_start__ && __rodata_end__ <= (__FLASH_segment_start__ + 0x00030000) , "error: .rodata is too large to fit in FLASH memory segment");
|
||||
|
||||
__fast_load_start__ = ALIGN(__rodata_end__ , 4);
|
||||
.fast ALIGN(__RAM_segment_start__ , 4) : AT(ALIGN(__rodata_end__ , 4))
|
||||
{
|
||||
__fast_start__ = .;
|
||||
*(.fast .fast.*)
|
||||
}
|
||||
__fast_end__ = __fast_start__ + SIZEOF(.fast);
|
||||
|
||||
__fast_load_end__ = __fast_load_start__ + SIZEOF(.fast);
|
||||
|
||||
. = ASSERT((__fast_load_start__ + SIZEOF(.fast)) >= __FLASH_segment_start__ && (__fast_load_start__ + SIZEOF(.fast)) <= (__FLASH_segment_start__ + 0x00030000) , "error: .fast is too large to fit in FLASH memory segment");
|
||||
|
||||
.fast_run ALIGN(__RAM_segment_start__ , 4) (NOLOAD) :
|
||||
{
|
||||
__fast_run_start__ = .;
|
||||
. = MAX(__fast_run_start__ + SIZEOF(.fast), .);
|
||||
}
|
||||
__fast_run_end__ = __fast_run_start__ + SIZEOF(.fast_run);
|
||||
|
||||
. = ASSERT(__fast_run_end__ >= __RAM_segment_start__ && __fast_run_end__ <= (__RAM_segment_start__ + 0x00020000) , "error: .fast_run is too large to fit in RAM memory segment");
|
||||
|
||||
__data_load_start__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4);
|
||||
.data ALIGN(__fast_run_end__ , 4) : AT(ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4))
|
||||
{
|
||||
__data_start__ = .;
|
||||
*(.data .data.* .gnu.linkonce.d.*)
|
||||
}
|
||||
__data_end__ = __data_start__ + SIZEOF(.data);
|
||||
|
||||
__data_load_end__ = __data_load_start__ + SIZEOF(.data);
|
||||
|
||||
__FLASH_segment_used_end__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4) + SIZEOF(.data);
|
||||
|
||||
. = ASSERT((__data_load_start__ + SIZEOF(.data)) >= __FLASH_segment_start__ && (__data_load_start__ + SIZEOF(.data)) <= (__FLASH_segment_start__ + 0x00030000) , "error: .data is too large to fit in FLASH memory segment");
|
||||
|
||||
.data_run ALIGN(__fast_run_end__ , 4) (NOLOAD) :
|
||||
{
|
||||
__data_run_start__ = .;
|
||||
. = MAX(__data_run_start__ + SIZEOF(.data), .);
|
||||
}
|
||||
__data_run_end__ = __data_run_start__ + SIZEOF(.data_run);
|
||||
|
||||
. = ASSERT(__data_run_end__ >= __RAM_segment_start__ && __data_run_end__ <= (__RAM_segment_start__ + 0x00020000) , "error: .data_run is too large to fit in RAM memory segment");
|
||||
|
||||
__bss_load_start__ = ALIGN(__data_run_end__ , 4);
|
||||
.bss ALIGN(__data_run_end__ , 4) (NOLOAD) : AT(ALIGN(__data_run_end__ , 4))
|
||||
{
|
||||
__bss_start__ = .;
|
||||
*(.bss .bss.* .gnu.linkonce.b.*) *(COMMON)
|
||||
}
|
||||
__bss_end__ = __bss_start__ + SIZEOF(.bss);
|
||||
|
||||
. = ASSERT(__bss_end__ >= __RAM_segment_start__ && __bss_end__ <= (__RAM_segment_start__ + 0x00020000) , "error: .bss is too large to fit in RAM memory segment");
|
||||
|
||||
__non_init_load_start__ = ALIGN(__bss_end__ , 4);
|
||||
.non_init ALIGN(__bss_end__ , 4) (NOLOAD) : AT(ALIGN(__bss_end__ , 4))
|
||||
{
|
||||
__non_init_start__ = .;
|
||||
*(.non_init .non_init.*)
|
||||
}
|
||||
__non_init_end__ = __non_init_start__ + SIZEOF(.non_init);
|
||||
|
||||
. = ASSERT(__non_init_end__ >= __RAM_segment_start__ && __non_init_end__ <= (__RAM_segment_start__ + 0x00020000) , "error: .non_init is too large to fit in RAM memory segment");
|
||||
|
||||
__heap_load_start__ = ALIGN(__non_init_end__ , 4);
|
||||
.heap ALIGN(__non_init_end__ , 4) (NOLOAD) : AT(ALIGN(__non_init_end__ , 4))
|
||||
{
|
||||
__heap_start__ = .;
|
||||
*(.heap)
|
||||
. = ALIGN(MAX(__heap_start__ + __HEAPSIZE__ , .), 4);
|
||||
}
|
||||
__heap_end__ = __heap_start__ + SIZEOF(.heap);
|
||||
|
||||
. = ASSERT(__heap_end__ >= __RAM_segment_start__ && __heap_end__ <= (__RAM_segment_start__ + 0x00020000) , "error: .heap is too large to fit in RAM memory segment");
|
||||
|
||||
__stack_load_start__ = ALIGN(__heap_end__ , 4);
|
||||
.stack ALIGN(__heap_end__ , 4) (NOLOAD) : AT(ALIGN(__heap_end__ , 4))
|
||||
{
|
||||
__stack_start__ = .;
|
||||
*(.stack)
|
||||
. = ALIGN(MAX(__stack_start__ + __STACKSIZE__ , .), 4);
|
||||
}
|
||||
__stack_end__ = __stack_start__ + SIZEOF(.stack);
|
||||
|
||||
. = ASSERT(__stack_end__ >= __RAM_segment_start__ && __stack_end__ <= (__RAM_segment_start__ + 0x00020000) , "error: .stack is too large to fit in RAM memory segment");
|
||||
|
||||
__stack_process_load_start__ = ALIGN(__stack_end__ , 4);
|
||||
.stack_process ALIGN(__stack_end__ , 4) (NOLOAD) : AT(ALIGN(__stack_end__ , 4))
|
||||
{
|
||||
__stack_process_start__ = .;
|
||||
*(.stack_process)
|
||||
. = ALIGN(MAX(__stack_process_start__ + __STACKSIZE_PROCESS__ , .), 4);
|
||||
}
|
||||
__stack_process_end__ = __stack_process_start__ + SIZEOF(.stack_process);
|
||||
|
||||
__RAM_segment_used_end__ = ALIGN(__stack_end__ , 4) + SIZEOF(.stack_process);
|
||||
|
||||
. = ASSERT(__stack_process_end__ >= __RAM_segment_start__ && __stack_process_end__ <= (__RAM_segment_start__ + 0x00020000) , "error: .stack_process is too large to fit in RAM memory segment");
|
||||
|
||||
}
|
||||
|
||||
428
ports_module/cortex_m3/gnu/example_build/sample_threadx_module.c
Normal file
428
ports_module/cortex_m3/gnu/example_build/sample_threadx_module.c
Normal file
@@ -0,0 +1,428 @@
|
||||
/* This is a small demo of the high-performance ThreadX kernel running as a module. It includes
|
||||
examples of eight threads of different priorities, using a message queue, semaphore, mutex,
|
||||
event flags group, byte pool, and block pool. */
|
||||
|
||||
/* Specify that this is a module! */
|
||||
|
||||
#define TXM_MODULE
|
||||
|
||||
|
||||
/* Include the ThreadX module definitions. */
|
||||
|
||||
#include "txm_module.h"
|
||||
|
||||
|
||||
/* Define constants. */
|
||||
|
||||
#define DEMO_STACK_SIZE 512
|
||||
#define DEMO_BYTE_POOL_SIZE 6000
|
||||
#define DEMO_BLOCK_POOL_SIZE 100
|
||||
#define DEMO_QUEUE_SIZE 100
|
||||
|
||||
|
||||
/* Define the pool space in the bss section of the module. ULONG is used to
|
||||
get the word alignment. */
|
||||
|
||||
ULONG demo_module_pool_space[DEMO_BYTE_POOL_SIZE / 4];
|
||||
|
||||
|
||||
/* Define the ThreadX object control blocks... */
|
||||
|
||||
TX_THREAD *thread_0;
|
||||
TX_THREAD *thread_1;
|
||||
TX_THREAD *thread_2;
|
||||
TX_THREAD *thread_3;
|
||||
TX_THREAD *thread_4;
|
||||
TX_THREAD *thread_5;
|
||||
TX_THREAD *thread_6;
|
||||
TX_THREAD *thread_7;
|
||||
TX_QUEUE *queue_0;
|
||||
TX_SEMAPHORE *semaphore_0;
|
||||
TX_MUTEX *mutex_0;
|
||||
TX_EVENT_FLAGS_GROUP *event_flags_0;
|
||||
TX_BYTE_POOL *byte_pool_0;
|
||||
TX_BLOCK_POOL *block_pool_0;
|
||||
|
||||
|
||||
/* Define the counters used in the demo application... */
|
||||
|
||||
ULONG thread_0_counter;
|
||||
ULONG thread_1_counter;
|
||||
ULONG thread_1_messages_sent;
|
||||
ULONG thread_2_counter;
|
||||
ULONG thread_2_messages_received;
|
||||
ULONG thread_3_counter;
|
||||
ULONG thread_4_counter;
|
||||
ULONG thread_5_counter;
|
||||
ULONG thread_6_counter;
|
||||
ULONG thread_7_counter;
|
||||
ULONG semaphore_0_puts;
|
||||
ULONG event_0_sets;
|
||||
ULONG queue_0_sends;
|
||||
|
||||
/* Define thread prototypes. */
|
||||
|
||||
void thread_0_entry(ULONG thread_input);
|
||||
void thread_1_entry(ULONG thread_input);
|
||||
void thread_2_entry(ULONG thread_input);
|
||||
void thread_3_and_4_entry(ULONG thread_input);
|
||||
void thread_5_entry(ULONG thread_input);
|
||||
void thread_6_and_7_entry(ULONG thread_input);
|
||||
|
||||
void semaphore_0_notify(TX_SEMAPHORE *semaphore_ptr)
|
||||
{
|
||||
|
||||
if (semaphore_ptr == semaphore_0)
|
||||
semaphore_0_puts++;
|
||||
}
|
||||
|
||||
|
||||
void event_0_notify(TX_EVENT_FLAGS_GROUP *event_flag_group_ptr)
|
||||
{
|
||||
|
||||
if (event_flag_group_ptr == event_flags_0)
|
||||
event_0_sets++;
|
||||
}
|
||||
|
||||
|
||||
void queue_0_notify(TX_QUEUE *queue_ptr)
|
||||
{
|
||||
|
||||
if (queue_ptr == queue_0)
|
||||
queue_0_sends++;
|
||||
}
|
||||
|
||||
|
||||
/* Define the module start function. */
|
||||
|
||||
void demo_module_start(ULONG id)
|
||||
{
|
||||
|
||||
CHAR *pointer;
|
||||
|
||||
/* Allocate all the objects. In MPU mode, modules cannot allocate control blocks within
|
||||
their own memory area so they cannot corrupt the resident portion of ThreadX by overwriting
|
||||
the control block(s). */
|
||||
txm_module_object_allocate((void*)&thread_0, sizeof(TX_THREAD));
|
||||
txm_module_object_allocate((void*)&thread_1, sizeof(TX_THREAD));
|
||||
txm_module_object_allocate((void*)&thread_2, sizeof(TX_THREAD));
|
||||
txm_module_object_allocate((void*)&thread_3, sizeof(TX_THREAD));
|
||||
txm_module_object_allocate((void*)&thread_4, sizeof(TX_THREAD));
|
||||
txm_module_object_allocate((void*)&thread_5, sizeof(TX_THREAD));
|
||||
txm_module_object_allocate((void*)&thread_6, sizeof(TX_THREAD));
|
||||
txm_module_object_allocate((void*)&thread_7, sizeof(TX_THREAD));
|
||||
txm_module_object_allocate((void*)&queue_0, sizeof(TX_QUEUE));
|
||||
txm_module_object_allocate((void*)&semaphore_0, sizeof(TX_SEMAPHORE));
|
||||
txm_module_object_allocate((void*)&mutex_0, sizeof(TX_MUTEX));
|
||||
txm_module_object_allocate((void*)&event_flags_0, sizeof(TX_EVENT_FLAGS_GROUP));
|
||||
txm_module_object_allocate((void*)&byte_pool_0, sizeof(TX_BYTE_POOL));
|
||||
txm_module_object_allocate((void*)&block_pool_0, sizeof(TX_BLOCK_POOL));
|
||||
|
||||
|
||||
/* Create a byte memory pool from which to allocate the thread stacks. */
|
||||
tx_byte_pool_create(byte_pool_0, "module byte pool 0", (UCHAR*)demo_module_pool_space, DEMO_BYTE_POOL_SIZE);
|
||||
|
||||
/* Put system definition stuff in here, e.g. thread creates and other assorted
|
||||
create information. */
|
||||
|
||||
/* Allocate the stack for thread 0. */
|
||||
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||
|
||||
/* Create the main thread. */
|
||||
tx_thread_create(thread_0, "module thread 0", thread_0_entry, 0,
|
||||
pointer, DEMO_STACK_SIZE,
|
||||
1, 1, TX_NO_TIME_SLICE, TX_AUTO_START);
|
||||
|
||||
|
||||
/* Allocate the stack for thread 1. */
|
||||
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||
|
||||
/* Create threads 1 and 2. These threads pass information through a ThreadX
|
||||
message queue. It is also interesting to note that these threads have a time
|
||||
slice. */
|
||||
tx_thread_create(thread_1, "module thread 1", thread_1_entry, 1,
|
||||
pointer, DEMO_STACK_SIZE,
|
||||
16, 16, 4, TX_AUTO_START);
|
||||
|
||||
/* Allocate the stack for thread 2. */
|
||||
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||
|
||||
tx_thread_create(thread_2, "module thread 2", thread_2_entry, 2,
|
||||
pointer, DEMO_STACK_SIZE,
|
||||
16, 16, 4, TX_AUTO_START);
|
||||
|
||||
/* Allocate the stack for thread 3. */
|
||||
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||
|
||||
/* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore.
|
||||
An interesting thing here is that both threads share the same instruction area. */
|
||||
tx_thread_create(thread_3, "module thread 3", thread_3_and_4_entry, 3,
|
||||
pointer, DEMO_STACK_SIZE,
|
||||
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
|
||||
|
||||
/* Allocate the stack for thread 4. */
|
||||
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||
|
||||
tx_thread_create(thread_4, "module thread 4", thread_3_and_4_entry, 4,
|
||||
pointer, DEMO_STACK_SIZE,
|
||||
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
|
||||
|
||||
/* Allocate the stack for thread 5. */
|
||||
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||
|
||||
/* Create thread 5. This thread simply pends on an event flag which will be set
|
||||
by thread_0. */
|
||||
tx_thread_create(thread_5, "module thread 5", thread_5_entry, 5,
|
||||
pointer, DEMO_STACK_SIZE,
|
||||
4, 4, TX_NO_TIME_SLICE, TX_AUTO_START);
|
||||
|
||||
/* Allocate the stack for thread 6. */
|
||||
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||
|
||||
/* Create threads 6 and 7. These threads compete for a ThreadX mutex. */
|
||||
tx_thread_create(thread_6, "module thread 6", thread_6_and_7_entry, 6,
|
||||
pointer, DEMO_STACK_SIZE,
|
||||
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
|
||||
|
||||
/* Allocate the stack for thread 7. */
|
||||
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
|
||||
|
||||
tx_thread_create(thread_7, "module thread 7", thread_6_and_7_entry, 7,
|
||||
pointer, DEMO_STACK_SIZE,
|
||||
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
|
||||
|
||||
/* Allocate the message queue. */
|
||||
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_QUEUE_SIZE*sizeof(ULONG), TX_NO_WAIT);
|
||||
|
||||
/* Create the message queue shared by threads 1 and 2. */
|
||||
tx_queue_create(queue_0, "module queue 0", TX_1_ULONG, pointer, DEMO_QUEUE_SIZE*sizeof(ULONG));
|
||||
|
||||
tx_queue_send_notify(queue_0, queue_0_notify);
|
||||
|
||||
/* Create the semaphore used by threads 3 and 4. */
|
||||
tx_semaphore_create(semaphore_0, "module semaphore 0", 1);
|
||||
|
||||
tx_semaphore_put_notify(semaphore_0, semaphore_0_notify);
|
||||
|
||||
/* Create the event flags group used by threads 1 and 5. */
|
||||
tx_event_flags_create(event_flags_0, "module event flags 0");
|
||||
|
||||
tx_event_flags_set_notify(event_flags_0, event_0_notify);
|
||||
|
||||
/* Create the mutex used by thread 6 and 7 without priority inheritance. */
|
||||
tx_mutex_create(mutex_0, "module mutex 0", TX_NO_INHERIT);
|
||||
|
||||
/* Allocate the memory for a small block pool. */
|
||||
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_BLOCK_POOL_SIZE, TX_NO_WAIT);
|
||||
|
||||
/* Create a block memory pool to allocate a message buffer from. */
|
||||
tx_block_pool_create(block_pool_0, "module block pool 0", sizeof(ULONG), pointer, DEMO_BLOCK_POOL_SIZE);
|
||||
|
||||
/* Allocate a block and release the block memory. */
|
||||
tx_block_allocate(block_pool_0, (VOID **) &pointer, TX_NO_WAIT);
|
||||
|
||||
/* Release the block back to the pool. */
|
||||
tx_block_release(pointer);
|
||||
}
|
||||
|
||||
|
||||
/* Define the test threads. */
|
||||
|
||||
void thread_0_entry(ULONG thread_input)
|
||||
{
|
||||
|
||||
UINT status;
|
||||
|
||||
|
||||
/* This thread simply sits in while-forever-sleep loop. */
|
||||
while(1)
|
||||
{
|
||||
|
||||
/* Increment the thread counter. */
|
||||
thread_0_counter++;
|
||||
|
||||
/* Sleep for 10 ticks. */
|
||||
tx_thread_sleep(10);
|
||||
|
||||
/* Set event flag 0 to wakeup thread 5. */
|
||||
status = tx_event_flags_set(event_flags_0, 0x1, TX_OR);
|
||||
|
||||
/* Check status. */
|
||||
if (status != TX_SUCCESS)
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void thread_1_entry(ULONG thread_input)
|
||||
{
|
||||
|
||||
UINT status;
|
||||
|
||||
|
||||
/* This thread simply sends messages to a queue shared by thread 2. */
|
||||
while(1)
|
||||
{
|
||||
|
||||
/* Increment the thread counter. */
|
||||
thread_1_counter++;
|
||||
|
||||
/* Send message to queue 0. */
|
||||
status = tx_queue_send(queue_0, &thread_1_messages_sent, TX_WAIT_FOREVER);
|
||||
|
||||
/* Check completion status. */
|
||||
if (status != TX_SUCCESS)
|
||||
break;
|
||||
|
||||
/* Increment the message sent. */
|
||||
thread_1_messages_sent++;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void thread_2_entry(ULONG thread_input)
|
||||
{
|
||||
|
||||
ULONG received_message;
|
||||
UINT status;
|
||||
|
||||
/* This thread retrieves messages placed on the queue by thread 1. */
|
||||
while(1)
|
||||
{
|
||||
/* Test memory handler. */
|
||||
*(ULONG *)0x20010000 = 0xCDCDCDCD;
|
||||
|
||||
|
||||
/* Increment the thread counter. */
|
||||
thread_2_counter++;
|
||||
|
||||
/* Retrieve a message from the queue. */
|
||||
status = tx_queue_receive(queue_0, &received_message, TX_WAIT_FOREVER);
|
||||
|
||||
/* Check completion status and make sure the message is what we
|
||||
expected. */
|
||||
if ((status != TX_SUCCESS) || (received_message != thread_2_messages_received))
|
||||
break;
|
||||
|
||||
/* Otherwise, all is okay. Increment the received message count. */
|
||||
thread_2_messages_received++;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void thread_3_and_4_entry(ULONG thread_input)
|
||||
{
|
||||
|
||||
UINT status;
|
||||
|
||||
|
||||
/* This function is executed from thread 3 and thread 4. As the loop
|
||||
below shows, these function compete for ownership of semaphore_0. */
|
||||
while(1)
|
||||
{
|
||||
|
||||
/* Increment the thread counter. */
|
||||
if (thread_input == 3)
|
||||
thread_3_counter++;
|
||||
else
|
||||
thread_4_counter++;
|
||||
|
||||
/* Get the semaphore with suspension. */
|
||||
status = tx_semaphore_get(semaphore_0, TX_WAIT_FOREVER);
|
||||
|
||||
/* Check status. */
|
||||
if (status != TX_SUCCESS)
|
||||
break;
|
||||
|
||||
/* Sleep for 2 ticks to hold the semaphore. */
|
||||
tx_thread_sleep(2);
|
||||
|
||||
/* Release the semaphore. */
|
||||
status = tx_semaphore_put(semaphore_0);
|
||||
|
||||
/* Check status. */
|
||||
if (status != TX_SUCCESS)
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void thread_5_entry(ULONG thread_input)
|
||||
{
|
||||
|
||||
UINT status;
|
||||
ULONG actual_flags;
|
||||
|
||||
|
||||
/* This thread simply waits for an event in a forever loop. */
|
||||
while(1)
|
||||
{
|
||||
|
||||
/* Increment the thread counter. */
|
||||
thread_5_counter++;
|
||||
|
||||
/* Wait for event flag 0. */
|
||||
status = tx_event_flags_get(event_flags_0, 0x1, TX_OR_CLEAR,
|
||||
&actual_flags, TX_WAIT_FOREVER);
|
||||
|
||||
/* Check status. */
|
||||
if ((status != TX_SUCCESS) || (actual_flags != 0x1))
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void thread_6_and_7_entry(ULONG thread_input)
|
||||
{
|
||||
|
||||
UINT status;
|
||||
|
||||
|
||||
/* This function is executed from thread 6 and thread 7. As the loop
|
||||
below shows, these function compete for ownership of mutex_0. */
|
||||
while(1)
|
||||
{
|
||||
|
||||
/* Increment the thread counter. */
|
||||
if (thread_input == 6)
|
||||
thread_6_counter++;
|
||||
else
|
||||
thread_7_counter++;
|
||||
|
||||
/* Get the mutex with suspension. */
|
||||
status = tx_mutex_get(mutex_0, TX_WAIT_FOREVER);
|
||||
|
||||
/* Check status. */
|
||||
if (status != TX_SUCCESS)
|
||||
break;
|
||||
|
||||
/* Get the mutex again with suspension. This shows
|
||||
that an owning thread may retrieve the mutex it
|
||||
owns multiple times. */
|
||||
status = tx_mutex_get(mutex_0, TX_WAIT_FOREVER);
|
||||
|
||||
/* Check status. */
|
||||
if (status != TX_SUCCESS)
|
||||
break;
|
||||
|
||||
/* Sleep for 2 ticks to hold the mutex. */
|
||||
tx_thread_sleep(2);
|
||||
|
||||
/* Release the mutex. */
|
||||
status = tx_mutex_put(mutex_0);
|
||||
|
||||
/* Check status. */
|
||||
if (status != TX_SUCCESS)
|
||||
break;
|
||||
|
||||
/* Release the mutex again. This will actually
|
||||
release ownership since it was obtained twice. */
|
||||
status = tx_mutex_put(mutex_0);
|
||||
|
||||
/* Check status. */
|
||||
if (status != TX_SUCCESS)
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -0,0 +1,210 @@
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x00030000, LENGTH = 0x00010000
|
||||
RAM (wx) : ORIGIN = 0, LENGTH = 0x00100000
|
||||
}
|
||||
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
__FLASH_segment_start__ = 0x00030000;
|
||||
__FLASH_segment_end__ = 0x00040000;
|
||||
__RAM_segment_start__ = 0;
|
||||
__RAM_segment_end__ = 0x8000;
|
||||
|
||||
__HEAPSIZE__ = 128;
|
||||
|
||||
__preamble_load_start__ = __FLASH_segment_start__;
|
||||
.preamble __FLASH_segment_start__ : AT(__FLASH_segment_start__)
|
||||
{
|
||||
__preamble_start__ = .;
|
||||
*(.preamble .preamble.*)
|
||||
}
|
||||
__preamble_end__ = __preamble_start__ + SIZEOF(.preamble);
|
||||
|
||||
__dynsym_load_start__ = ALIGN(__preamble_end__ , 4);
|
||||
.dynsym ALIGN(__dynsym_load_start__ , 4) : AT(ALIGN(__dynsym_load_start__ , 4))
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP (*(.dynsym))
|
||||
KEEP (*(.dynsym*))
|
||||
. = ALIGN(4);
|
||||
}
|
||||
__dynsym_end__ = __dynsym_load_start__ + SIZEOF(.dynsym);
|
||||
|
||||
__dynstr_load_start__ = ALIGN(__dynsym_end__ , 4);
|
||||
.dynstr ALIGN(__dynstr_load_start__ , 4) : AT(ALIGN(__dynstr_load_start__, 4))
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP (*(.dynstr))
|
||||
KEEP (*(.dynstr*))
|
||||
. = ALIGN(4);
|
||||
}
|
||||
__dynstr_end__ = __dynstr_load_start__ + SIZEOF(.dynstr);
|
||||
|
||||
__reldyn_load_start__ = ALIGN(__dynstr_end__ , 4);
|
||||
.rel.dyn ALIGN(__reldyn_load_start__ , 4) : AT(ALIGN(__reldyn_load_start__ , 4))
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP (*(.rel.dyn))
|
||||
KEEP (*(.rel.dyn*))
|
||||
. = ALIGN(4);
|
||||
}
|
||||
__reldyn_end__ = __reldyn_load_start__ + SIZEOF(.rel.dyn);
|
||||
|
||||
__relplt_load_start__ = ALIGN(__reldyn_end__ , 4);
|
||||
.rel.plt ALIGN(__relplt_load_start__ , 4) : AT(ALIGN(__relplt_load_start__ , 4))
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP (*(.rel.plt))
|
||||
KEEP (*(.rel.plt*))
|
||||
. = ALIGN(4);
|
||||
}
|
||||
__relplt_end__ = __relplt_load_start__ + SIZEOF(.rel.plt);
|
||||
|
||||
__plt_load_start__ = ALIGN(__relplt_end__ , 4);
|
||||
.plt ALIGN(__plt_load_start__ , 4) : AT(ALIGN(__plt_load_start__ , 4))
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP (*(.plt))
|
||||
KEEP (*(.plt*))
|
||||
. = ALIGN(4);
|
||||
}
|
||||
__plt_end__ = __plt_load_start__ + SIZEOF(.plt);
|
||||
|
||||
__interp_load_start__ = ALIGN(__plt_end__ , 4);
|
||||
.interp ALIGN(__interp_load_start__ , 4) : AT(ALIGN(__interp_load_start__ , 4))
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP (*(.interp))
|
||||
KEEP (*(.interp*))
|
||||
. = ALIGN(4);
|
||||
}
|
||||
__interp_end__ = __interp_load_start__ + SIZEOF(.interp);
|
||||
|
||||
__hash_load_start__ = ALIGN(__interp_end__ , 4);
|
||||
.hash ALIGN(__hash_load_start__ , 4) : AT(ALIGN(__hash_load_start__, 4))
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP (*(.hash))
|
||||
KEEP (*(.hash*))
|
||||
. = ALIGN(4);
|
||||
}
|
||||
__hash_end__ = __hash_load_start__ + SIZEOF(.hash);
|
||||
|
||||
__text_load_start__ = ALIGN(__hash_end__ , 4);
|
||||
.text ALIGN(__text_load_start__ , 4) : AT(ALIGN(__text_load_start__, 4))
|
||||
{
|
||||
__text_start__ = .;
|
||||
*(.text .text.* .glue_7t .glue_7 .gnu.linkonce.t.* .gcc_except_table )
|
||||
}
|
||||
__text_end__ = __text_start__ + SIZEOF(.text);
|
||||
|
||||
__dtors_load_start__ = ALIGN(__text_end__ , 4);
|
||||
.dtors ALIGN(__text_end__ , 4) : AT(ALIGN(__text_end__ , 4))
|
||||
{
|
||||
__dtors_start__ = .;
|
||||
KEEP (*(SORT(.dtors.*))) KEEP (*(.dtors))
|
||||
}
|
||||
__dtors_end__ = __dtors_start__ + SIZEOF(.dtors);
|
||||
|
||||
__ctors_load_start__ = ALIGN(__dtors_end__ , 4);
|
||||
.ctors ALIGN(__dtors_end__ , 4) : AT(ALIGN(__dtors_end__ , 4))
|
||||
{
|
||||
__ctors_start__ = .;
|
||||
KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors))
|
||||
}
|
||||
__ctors_end__ = __ctors_start__ + SIZEOF(.ctors);
|
||||
|
||||
__got_load_start__ = ALIGN(__ctors_end__ , 4);
|
||||
.got ALIGN(__ctors_end__ , 4) : AT(ALIGN(__ctors_end__ , 4))
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sgot = .;
|
||||
KEEP (*(.got))
|
||||
KEEP (*(.got*))
|
||||
. = ALIGN(4);
|
||||
_egot = .;
|
||||
}
|
||||
__got_end__ = __got_load_start__ + SIZEOF(.got);
|
||||
|
||||
__rodata_load_start__ = ALIGN(__got_end__ , 4);
|
||||
.rodata ALIGN(__got_end__ , 4) : AT(ALIGN(__got_end__ , 4))
|
||||
{
|
||||
__rodata_start__ = .;
|
||||
*(.rodata .rodata.* .gnu.linkonce.r.*)
|
||||
}
|
||||
__rodata_end__ = __rodata_start__ + SIZEOF(.rodata);
|
||||
|
||||
__code_size__ = __rodata_end__ - __FLASH_segment_start__;
|
||||
|
||||
__fast_load_start__ = ALIGN(__rodata_end__ , 4);
|
||||
|
||||
__fast_load_end__ = __fast_load_start__ + SIZEOF(.fast);
|
||||
|
||||
__new_got_start__ = ALIGN(__RAM_segment_start__ , 4);
|
||||
|
||||
__new_got_end__ = __new_got_start__ + SIZEOF(.got);
|
||||
|
||||
.fast ALIGN(__new_got_end__ , 4) : AT(ALIGN(__rodata_end__ , 4))
|
||||
{
|
||||
__fast_start__ = .;
|
||||
*(.fast .fast.*)
|
||||
}
|
||||
__fast_end__ = __fast_start__ + SIZEOF(.fast);
|
||||
|
||||
.fast_run ALIGN(__fast_end__ , 4) (NOLOAD) :
|
||||
{
|
||||
__fast_run_start__ = .;
|
||||
. = MAX(__fast_run_start__ + SIZEOF(.fast), .);
|
||||
}
|
||||
__fast_run_end__ = __fast_run_start__ + SIZEOF(.fast_run);
|
||||
|
||||
__data_load_start__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4);
|
||||
.data ALIGN(__fast_run_end__ , 4) : AT(ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4))
|
||||
{
|
||||
__data_start__ = .;
|
||||
*(.data .data.* .gnu.linkonce.d.*)
|
||||
}
|
||||
__data_end__ = __data_start__ + SIZEOF(.data);
|
||||
|
||||
__data_load_end__ = __data_load_start__ + SIZEOF(.data);
|
||||
|
||||
__FLASH_segment_used_end__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4) + SIZEOF(.data);
|
||||
|
||||
.data_run ALIGN(__fast_run_end__ , 4) (NOLOAD) :
|
||||
{
|
||||
__data_run_start__ = .;
|
||||
. = MAX(__data_run_start__ + SIZEOF(.data), .);
|
||||
}
|
||||
__data_run_end__ = __data_run_start__ + SIZEOF(.data_run);
|
||||
|
||||
__bss_load_start__ = ALIGN(__data_run_end__ , 4);
|
||||
.bss ALIGN(__data_run_end__ , 4) (NOLOAD) : AT(ALIGN(__data_run_end__ , 4))
|
||||
{
|
||||
__bss_start__ = .;
|
||||
*(.bss .bss.* .gnu.linkonce.b.*) *(COMMON)
|
||||
}
|
||||
__bss_end__ = __bss_start__ + SIZEOF(.bss);
|
||||
|
||||
__non_init_load_start__ = ALIGN(__bss_end__ , 4);
|
||||
.non_init ALIGN(__bss_end__ , 4) (NOLOAD) : AT(ALIGN(__bss_end__ , 4))
|
||||
{
|
||||
__non_init_start__ = .;
|
||||
*(.non_init .non_init.*)
|
||||
}
|
||||
__non_init_end__ = __non_init_start__ + SIZEOF(.non_init);
|
||||
|
||||
__heap_load_start__ = ALIGN(__non_init_end__ , 4);
|
||||
.heap ALIGN(__non_init_end__ , 4) (NOLOAD) : AT(ALIGN(__non_init_end__ , 4))
|
||||
{
|
||||
__heap_start__ = .;
|
||||
*(.heap)
|
||||
. = ALIGN(MAX(__heap_start__ + __HEAPSIZE__ , .), 4);
|
||||
}
|
||||
__heap_end__ = __heap_start__ + SIZEOF(.heap);
|
||||
|
||||
__data_size__ = __heap_end__ - __RAM_segment_start__;
|
||||
|
||||
}
|
||||
|
||||
@@ -0,0 +1,109 @@
|
||||
/* Small demonstration of the ThreadX module manager. */
|
||||
|
||||
#include "tx_api.h"
|
||||
#include "txm_module.h"
|
||||
|
||||
|
||||
#define DEMO_STACK_SIZE 1024
|
||||
|
||||
/* Define the ThreadX object control blocks... */
|
||||
|
||||
TX_THREAD module_manager;
|
||||
TXM_MODULE_INSTANCE my_module;
|
||||
|
||||
|
||||
/* Define the object pool area. */
|
||||
|
||||
UCHAR object_memory[16384];
|
||||
UCHAR module_ram[32768];
|
||||
|
||||
/* Define the count of memory faults. */
|
||||
|
||||
ULONG memory_faults;
|
||||
|
||||
|
||||
/* Define thread prototypes. */
|
||||
|
||||
void module_manager_entry(ULONG thread_input);
|
||||
|
||||
|
||||
/* Define fault handler. */
|
||||
|
||||
VOID module_fault_handler(TX_THREAD *thread, TXM_MODULE_INSTANCE *module)
|
||||
{
|
||||
|
||||
/* Just increment the fault counter. */
|
||||
memory_faults++;
|
||||
}
|
||||
|
||||
/* Define main entry point. */
|
||||
|
||||
int main()
|
||||
{
|
||||
|
||||
/* Enter the ThreadX kernel. */
|
||||
tx_kernel_enter();
|
||||
}
|
||||
|
||||
|
||||
/* Define what the initial system looks like. */
|
||||
|
||||
void tx_application_define(void *first_unused_memory)
|
||||
{
|
||||
|
||||
CHAR *pointer = (CHAR*)first_unused_memory;
|
||||
|
||||
|
||||
tx_thread_create(&module_manager, "Module Manager Thread", module_manager_entry, 0,
|
||||
pointer, DEMO_STACK_SIZE,
|
||||
1, 1, TX_NO_TIME_SLICE, TX_AUTO_START);
|
||||
pointer = pointer + DEMO_STACK_SIZE;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/* Define the test threads. */
|
||||
|
||||
void module_manager_entry(ULONG thread_input)
|
||||
{
|
||||
|
||||
/* Initialize the module manager. */
|
||||
txm_module_manager_initialize((VOID *) module_ram, 32768);
|
||||
|
||||
txm_module_manager_object_pool_create(object_memory, sizeof(object_memory));
|
||||
|
||||
/* Register a fault handler. */
|
||||
txm_module_manager_memory_fault_notify(module_fault_handler);
|
||||
|
||||
/* Load the module that is already there, in this example it is placed there by the multiple image download. */
|
||||
txm_module_manager_memory_load(&my_module, "my module", (VOID *) 0x00030000);
|
||||
|
||||
/* Enable 128 byte read/write shared memory region at 0x20010000. */
|
||||
txm_module_manager_external_memory_enable(&my_module, (void *) 0x20010000, 128, TXM_MODULE_MANAGER_SHARED_ATTRIBUTE_WRITE);
|
||||
|
||||
/* Start the module. */
|
||||
txm_module_manager_start(&my_module);
|
||||
|
||||
/* Sleep for a while.... */
|
||||
tx_thread_sleep(1000);
|
||||
|
||||
/* Stop the module. */
|
||||
txm_module_manager_stop(&my_module);
|
||||
|
||||
/* Unload the module. */
|
||||
txm_module_manager_unload(&my_module);
|
||||
|
||||
/* Load the module that is already there. */
|
||||
txm_module_manager_in_place_load(&my_module, "my module", (VOID *) 0x00030000);
|
||||
|
||||
/* Start the module again. */
|
||||
txm_module_manager_start(&my_module);
|
||||
|
||||
/* Now just spin... */
|
||||
while(1)
|
||||
{
|
||||
|
||||
tx_thread_sleep(100);
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,209 @@
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
/* */
|
||||
/* This software is licensed under the Microsoft Software License */
|
||||
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
/* and in the root directory of this software. */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Initialize */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
.global _tx_thread_system_stack_ptr
|
||||
.global _tx_initialize_unused_memory
|
||||
.global __RAM_segment_used_end__
|
||||
.global _tx_timer_interrupt
|
||||
.global __main
|
||||
.global _vectors
|
||||
.global __tx_NMIHandler @ NMI
|
||||
.global __tx_BadHandler @ HardFault
|
||||
.global __tx_DBGHandler @ Monitor
|
||||
.global __tx_PendSVHandler @ PendSV
|
||||
.global __tx_SysTickHandler @ SysTick
|
||||
.global __tx_IntHandler @ Int 0
|
||||
|
||||
SYSTEM_CLOCK = 6000000
|
||||
SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1)
|
||||
|
||||
.text 32
|
||||
.align 4
|
||||
.syntax unified
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _tx_initialize_low_level Cortex-M3/GNU */
|
||||
/* 6.1 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* William E. Lamie, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function is responsible for any low-level processor */
|
||||
/* initialization, including setting up interrupt vectors, setting */
|
||||
/* up a periodic timer interrupt source, saving the system stack */
|
||||
/* pointer for use in ISR processing later, and finding the first */
|
||||
/* available RAM memory address for tx_application_define. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* _tx_initialize_kernel_enter ThreadX entry function */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
//VOID _tx_initialize_low_level(VOID)
|
||||
//{
|
||||
.global _tx_initialize_low_level
|
||||
.thumb_func
|
||||
_tx_initialize_low_level:
|
||||
|
||||
/* Disable interrupts during ThreadX initialization. */
|
||||
CPSID i
|
||||
|
||||
/* Set base of available memory to end of non-initialised RAM area. */
|
||||
LDR r0, =_tx_initialize_unused_memory @ Build address of unused memory pointer
|
||||
LDR r1, =__RAM_segment_used_end__ @ Build first free address
|
||||
ADD r1, r1, #4 @
|
||||
STR r1, [r0] @ Setup first unused memory pointer
|
||||
|
||||
/* Setup Vector Table Offset Register. */
|
||||
MOV r0, #0xE000E000 @ Build address of NVIC registers
|
||||
LDR r1, =_vectors @ Pickup address of vector table
|
||||
STR r1, [r0, #0xD08] @ Set vector table address
|
||||
|
||||
/* Set system stack pointer from vector value. */
|
||||
LDR r0, =_tx_thread_system_stack_ptr @ Build address of system stack pointer
|
||||
LDR r1, =_vectors @ Pickup address of vector table
|
||||
LDR r1, [r1] @ Pickup reset stack pointer
|
||||
STR r1, [r0] @ Save system stack pointer
|
||||
|
||||
/* Enable the cycle count register. */
|
||||
LDR r0, =0xE0001000 @ Build address of DWT register
|
||||
LDR r1, [r0] @ Pickup the current value
|
||||
ORR r1, r1, #1 @ Set the CYCCNTENA bit
|
||||
STR r1, [r0] @ Enable the cycle count register
|
||||
|
||||
/* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */
|
||||
MOV r0, #0xE000E000 @ Build address of NVIC registers
|
||||
LDR r1, =SYSTICK_CYCLES
|
||||
STR r1, [r0, #0x14] @ Setup SysTick Reload Value
|
||||
MOV r1, #0x7 @ Build SysTick Control Enable Value
|
||||
STR r1, [r0, #0x10] @ Setup SysTick Control
|
||||
|
||||
/* Configure handler priorities. */
|
||||
LDR r1, =0x00000000 @ Rsrv, UsgF, BusF, MemM
|
||||
STR r1, [r0, #0xD18] @ Setup System Handlers 4-7 Priority Registers
|
||||
|
||||
LDR r1, =0xFF000000 @ SVCl, Rsrv, Rsrv, Rsrv
|
||||
STR r1, [r0, #0xD1C] @ Setup System Handlers 8-11 Priority Registers
|
||||
@ Note: SVC must be lowest priority, which is 0xFF
|
||||
|
||||
LDR r1, =0x40FF0000 @ SysT, PnSV, Rsrv, DbgM
|
||||
STR r1, [r0, #0xD20] @ Setup System Handlers 12-15 Priority Registers
|
||||
@ Note: PnSV must be lowest priority, which is 0xFF
|
||||
|
||||
|
||||
/* Return to caller. */
|
||||
BX lr
|
||||
//}
|
||||
|
||||
|
||||
/* Define shells for each of the unused vectors. */
|
||||
|
||||
.global __tx_BadHandler
|
||||
.thumb_func
|
||||
__tx_BadHandler:
|
||||
B __tx_BadHandler
|
||||
|
||||
/* added to catch the hardfault */
|
||||
|
||||
.global __tx_HardfaultHandler
|
||||
.thumb_func
|
||||
__tx_HardfaultHandler:
|
||||
B __tx_HardfaultHandler
|
||||
|
||||
/* Generic interrupt handler template */
|
||||
.global __tx_IntHandler
|
||||
.thumb_func
|
||||
__tx_IntHandler:
|
||||
// VOID InterruptHandler (VOID)
|
||||
// {
|
||||
PUSH {r0, lr}
|
||||
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
BL _tx_execution_isr_enter // Call the ISR enter function
|
||||
#endif
|
||||
|
||||
/* Do interrupt handler work here */
|
||||
/* BL <your C Function>.... */
|
||||
|
||||
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
BL _tx_execution_isr_exit // Call the ISR exit function
|
||||
#endif
|
||||
POP {r0, lr}
|
||||
BX LR
|
||||
// }
|
||||
|
||||
/* System Tick timer interrupt handler */
|
||||
.global __tx_SysTickHandler
|
||||
.global SysTick_Handler
|
||||
.thumb_func
|
||||
__tx_SysTickHandler:
|
||||
.thumb_func
|
||||
SysTick_Handler:
|
||||
// VOID TimerInterruptHandler (VOID)
|
||||
// {
|
||||
|
||||
PUSH {r0, lr}
|
||||
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
BL _tx_execution_isr_enter // Call the ISR enter function
|
||||
#endif
|
||||
BL _tx_timer_interrupt
|
||||
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
BL _tx_execution_isr_exit // Call the ISR exit function
|
||||
#endif
|
||||
POP {r0, lr}
|
||||
BX LR
|
||||
// }
|
||||
|
||||
|
||||
/* NMI, DBG handlers */
|
||||
.global __tx_NMIHandler
|
||||
.thumb_func
|
||||
__tx_NMIHandler:
|
||||
B __tx_NMIHandler
|
||||
|
||||
.global __tx_DBGHandler
|
||||
.thumb_func
|
||||
__tx_DBGHandler:
|
||||
B __tx_DBGHandler
|
||||
|
||||
@@ -0,0 +1,73 @@
|
||||
|
||||
.syntax unified
|
||||
.section .vectors, "ax"
|
||||
.code 16
|
||||
.align 0
|
||||
.global _vectors
|
||||
|
||||
_vectors:
|
||||
.word __stack_end__
|
||||
.word reset_handler
|
||||
.word __tx_NMIHandler
|
||||
.word __tx_HardfaultHandler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0 // Reserved
|
||||
.word 0 // Reserved
|
||||
.word 0 // Reserved
|
||||
.word 0 // Reserved
|
||||
.word __tx_SVCallHandler //_SVC_Handler - used by Threadx scheduler //
|
||||
.word __tx_DBGHandler
|
||||
.word 0 // Reserved
|
||||
.word __tx_PendSVHandler
|
||||
.word __tx_SysTickHandler // Used by Threadx timer functionality
|
||||
.word __tx_BadHandler // Populate with user Interrupt handler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
.word __tx_BadHandler
|
||||
|
||||
|
||||
|
||||
.section .init, "ax"
|
||||
.global reset_handler
|
||||
.thumb_func
|
||||
reset_handler:
|
||||
|
||||
// low level hardware config, such as PLL setup goes here
|
||||
|
||||
b _start
|
||||
|
||||
|
||||
|
||||
@@ -0,0 +1,58 @@
|
||||
.text
|
||||
.align 4
|
||||
.syntax unified
|
||||
|
||||
/* Define public symbols. */
|
||||
.global __txm_module_preamble
|
||||
|
||||
/* Define application-specific start/stop entry points for the module. */
|
||||
.global demo_module_start
|
||||
|
||||
/* Define common external refrences. */
|
||||
.global _txm_module_thread_shell_entry
|
||||
.global _txm_module_callback_request_thread_entry
|
||||
|
||||
__txm_module_preamble:
|
||||
.dc.l 0x4D4F4455 // Module ID
|
||||
.dc.l 0x6 // Module Major Version
|
||||
.dc.l 0x1 // Module Minor Version
|
||||
.dc.l 32 // Module Preamble Size in 32-bit words
|
||||
.dc.l 0x12345678 // Module ID (application defined)
|
||||
.dc.l 0x02000007 // Module Properties where:
|
||||
// Bits 31-24: Compiler ID
|
||||
// 0 -> IAR
|
||||
// 1 -> RVDS
|
||||
// 2 -> GNU
|
||||
// Bits 23-3: Reserved
|
||||
// Bit 2: 0 -> Disable shared/external memory access
|
||||
// 1 -> Enable shared/external memory access
|
||||
// Bit 1: 0 -> No MPU protection
|
||||
// 1 -> MPU protection (must have user mode selected - bit 0 set)
|
||||
// Bit 0: 0 -> Privileged mode execution
|
||||
// 1 -> User mode execution
|
||||
.dc.l _txm_module_thread_shell_entry - . - 0 // Module Shell Entry Point
|
||||
.dc.l demo_module_start - . - 0 // Module Start Thread Entry Point
|
||||
.dc.l 0 // Module Stop Thread Entry Point
|
||||
.dc.l 1 // Module Start/Stop Thread Priority
|
||||
.dc.l 1024 // Module Start/Stop Thread Stack Size
|
||||
.dc.l _txm_module_callback_request_thread_entry - . - 0 // Module Callback Thread Entry
|
||||
.dc.l 1 // Module Callback Thread Priority
|
||||
.dc.l 1024 // Module Callback Thread Stack Size
|
||||
.dc.l __code_size__ // Module Code Size
|
||||
.dc.l __data_size__ // Module Data Size
|
||||
.dc.l 0 // Reserved 0
|
||||
.dc.l 0 // Reserved 1
|
||||
.dc.l 0 // Reserved 2
|
||||
.dc.l 0 // Reserved 3
|
||||
.dc.l 0 // Reserved 4
|
||||
.dc.l 0 // Reserved 5
|
||||
.dc.l 0 // Reserved 6
|
||||
.dc.l 0 // Reserved 7
|
||||
.dc.l 0 // Reserved 8
|
||||
.dc.l 0 // Reserved 9
|
||||
.dc.l 0 // Reserved 10
|
||||
.dc.l 0 // Reserved 11
|
||||
.dc.l 0 // Reserved 12
|
||||
.dc.l 0 // Reserved 13
|
||||
.dc.l 0 // Reserved 14
|
||||
.dc.l 0 // Reserved 15
|
||||
379
ports_module/cortex_m3/gnu/inc/tx_port.h
Normal file
379
ports_module/cortex_m3/gnu/inc/tx_port.h
Normal file
@@ -0,0 +1,379 @@
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
/* */
|
||||
/* This software is licensed under the Microsoft Software License */
|
||||
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
/* and in the root directory of this software. */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Port Specific */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* PORT SPECIFIC C INFORMATION RELEASE */
|
||||
/* */
|
||||
/* tx_port.h Cortex-M3/GNU */
|
||||
/* 6.1 */
|
||||
/* */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* William E. Lamie, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This file contains data type definitions that make the ThreadX */
|
||||
/* real-time kernel function identically on a variety of different */
|
||||
/* processor architectures. For example, the size or number of bits */
|
||||
/* in an "int" data type vary between microprocessor architectures and */
|
||||
/* even C compilers for the same microprocessor. ThreadX does not */
|
||||
/* directly use native C data types. Instead, ThreadX creates its */
|
||||
/* own special types that can be mapped to actual data types by this */
|
||||
/* file to guarantee consistency in the interface and functionality. */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
|
||||
/* macro definition, */
|
||||
/* resulting in version 6.1.6 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
#ifndef TX_PORT_H
|
||||
#define TX_PORT_H
|
||||
|
||||
|
||||
/* Determine if the optional ThreadX user define file should be used. */
|
||||
|
||||
#ifdef TX_INCLUDE_USER_DEFINE_FILE
|
||||
|
||||
/* Yes, include the user defines in tx_user.h. The defines in this file may
|
||||
alternately be defined on the command line. */
|
||||
|
||||
#include "tx_user.h"
|
||||
#endif
|
||||
|
||||
|
||||
/* Define compiler library include files. */
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
|
||||
|
||||
/* Define ThreadX basic types for this port. */
|
||||
|
||||
#define VOID void
|
||||
typedef char CHAR;
|
||||
typedef unsigned char UCHAR;
|
||||
typedef int INT;
|
||||
typedef unsigned int UINT;
|
||||
typedef long LONG;
|
||||
typedef unsigned long ULONG;
|
||||
typedef short SHORT;
|
||||
typedef unsigned short USHORT;
|
||||
|
||||
|
||||
/* Define the priority levels for ThreadX. Legal values range
|
||||
from 32 to 1024 and MUST be evenly divisible by 32. */
|
||||
|
||||
#ifndef TX_MAX_PRIORITIES
|
||||
#define TX_MAX_PRIORITIES 32
|
||||
#endif
|
||||
|
||||
|
||||
/* Define the minimum stack for a ThreadX thread on this processor. If the size supplied during
|
||||
thread creation is less than this value, the thread create call will return an error. */
|
||||
|
||||
#ifndef TX_MINIMUM_STACK
|
||||
#define TX_MINIMUM_STACK 200 /* Minimum stack size for this port */
|
||||
#endif
|
||||
|
||||
|
||||
/* Define the system timer thread's default stack size and priority. These are only applicable
|
||||
if TX_TIMER_PROCESS_IN_ISR is not defined. */
|
||||
|
||||
#ifndef TX_TIMER_THREAD_STACK_SIZE
|
||||
#define TX_TIMER_THREAD_STACK_SIZE 1024 /* Default timer thread stack size */
|
||||
#endif
|
||||
|
||||
#ifndef TX_TIMER_THREAD_PRIORITY
|
||||
#define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */
|
||||
#endif
|
||||
|
||||
|
||||
/* Define various constants for the ThreadX Cortex-M7 port. */
|
||||
|
||||
#define TX_INT_DISABLE 1 /* Disable interrupts */
|
||||
#define TX_INT_ENABLE 0 /* Enable interrupts */
|
||||
|
||||
|
||||
/* Define the clock source for trace event entry time stamp. The following two item are port specific.
|
||||
For example, if the time source is at the address 0x0a800024 and is 16-bits in size, the clock
|
||||
source constants would be:
|
||||
|
||||
#define TX_TRACE_TIME_SOURCE *((ULONG *) 0x0a800024)
|
||||
#define TX_TRACE_TIME_MASK 0x0000FFFFUL
|
||||
|
||||
*/
|
||||
|
||||
#ifndef TX_TRACE_TIME_SOURCE
|
||||
#define TX_TRACE_TIME_SOURCE *((ULONG *) 0xE0001004)
|
||||
#endif
|
||||
#ifndef TX_TRACE_TIME_MASK
|
||||
#define TX_TRACE_TIME_MASK 0xFFFFFFFFUL
|
||||
#endif
|
||||
|
||||
|
||||
/* Define the port specific options for the _tx_build_options variable. This variable indicates
|
||||
how the ThreadX library was built. */
|
||||
|
||||
#define TX_PORT_SPECIFIC_BUILD_OPTIONS 0
|
||||
|
||||
|
||||
/* Define the in-line initialization constant so that modules with in-line
|
||||
initialization capabilities can prevent their initialization from being
|
||||
a function call. */
|
||||
|
||||
#define TX_INLINE_INITIALIZATION
|
||||
|
||||
|
||||
/* Determine whether or not stack checking is enabled. By default, ThreadX stack checking is
|
||||
disabled. When the following is defined, ThreadX thread stack checking is enabled. If stack
|
||||
checking is enabled (TX_ENABLE_STACK_CHECKING is defined), the TX_DISABLE_STACK_FILLING
|
||||
define is negated, thereby forcing the stack fill which is necessary for the stack checking
|
||||
logic. */
|
||||
|
||||
#ifdef TX_ENABLE_STACK_CHECKING
|
||||
#undef TX_DISABLE_STACK_FILLING
|
||||
#endif
|
||||
|
||||
|
||||
/* Define the TX_THREAD control block extensions for this port. The main reason
|
||||
for the multiple macros is so that backward compatibility can be maintained with
|
||||
existing ThreadX kernel awareness modules. */
|
||||
|
||||
#define TX_THREAD_EXTENSION_0
|
||||
#define TX_THREAD_EXTENSION_1
|
||||
#define TX_THREAD_EXTENSION_2 VOID *tx_thread_module_instance_ptr; \
|
||||
VOID *tx_thread_module_entry_info_ptr; \
|
||||
ULONG tx_thread_module_current_user_mode; \
|
||||
ULONG tx_thread_module_user_mode; \
|
||||
ULONG tx_thread_module_saved_lr; \
|
||||
VOID *tx_thread_module_kernel_stack_start; \
|
||||
VOID *tx_thread_module_kernel_stack_end; \
|
||||
ULONG tx_thread_module_kernel_stack_size; \
|
||||
VOID *tx_thread_module_stack_ptr; \
|
||||
VOID *tx_thread_module_stack_start; \
|
||||
VOID *tx_thread_module_stack_end; \
|
||||
ULONG tx_thread_module_stack_size; \
|
||||
VOID *tx_thread_module_reserved;
|
||||
#define TX_THREAD_EXTENSION_3
|
||||
|
||||
|
||||
/* Define the port extensions of the remaining ThreadX objects. */
|
||||
|
||||
#define TX_BLOCK_POOL_EXTENSION
|
||||
#define TX_BYTE_POOL_EXTENSION
|
||||
#define TX_MUTEX_EXTENSION
|
||||
#define TX_EVENT_FLAGS_GROUP_EXTENSION VOID *tx_event_flags_group_module_instance; \
|
||||
VOID (*tx_event_flags_group_set_module_notify)(struct TX_EVENT_FLAGS_GROUP_STRUCT *group_ptr);
|
||||
|
||||
#define TX_QUEUE_EXTENSION VOID *tx_queue_module_instance; \
|
||||
VOID (*tx_queue_send_module_notify)(struct TX_QUEUE_STRUCT *queue_ptr);
|
||||
|
||||
#define TX_SEMAPHORE_EXTENSION VOID *tx_semaphore_module_instance; \
|
||||
VOID (*tx_semaphore_put_module_notify)(struct TX_SEMAPHORE_STRUCT *semaphore_ptr);
|
||||
|
||||
#define TX_TIMER_EXTENSION VOID *tx_timer_module_instance; \
|
||||
VOID (*tx_timer_module_expiration_function)(ULONG id);
|
||||
|
||||
|
||||
/* Define the user extension field of the thread control block. Nothing
|
||||
additional is needed for this port so it is defined as white space. */
|
||||
|
||||
#ifndef TX_THREAD_USER_EXTENSION
|
||||
#define TX_THREAD_USER_EXTENSION
|
||||
#endif
|
||||
|
||||
|
||||
/* Define the macros for processing extensions in tx_thread_create, tx_thread_delete,
|
||||
tx_thread_shell_entry, and tx_thread_terminate. */
|
||||
|
||||
|
||||
#define TX_THREAD_CREATE_EXTENSION(thread_ptr)
|
||||
#define TX_THREAD_DELETE_EXTENSION(thread_ptr)
|
||||
#define TX_THREAD_COMPLETED_EXTENSION(thread_ptr)
|
||||
#define TX_THREAD_TERMINATED_EXTENSION(thread_ptr)
|
||||
|
||||
|
||||
/* Define the ThreadX object creation extensions for the remaining objects. */
|
||||
|
||||
#define TX_BLOCK_POOL_CREATE_EXTENSION(pool_ptr)
|
||||
#define TX_BYTE_POOL_CREATE_EXTENSION(pool_ptr)
|
||||
#define TX_EVENT_FLAGS_GROUP_CREATE_EXTENSION(group_ptr)
|
||||
#define TX_MUTEX_CREATE_EXTENSION(mutex_ptr)
|
||||
#define TX_QUEUE_CREATE_EXTENSION(queue_ptr)
|
||||
#define TX_SEMAPHORE_CREATE_EXTENSION(semaphore_ptr)
|
||||
#define TX_TIMER_CREATE_EXTENSION(timer_ptr)
|
||||
|
||||
|
||||
/* Define the ThreadX object deletion extensions for the remaining objects. */
|
||||
|
||||
#define TX_BLOCK_POOL_DELETE_EXTENSION(pool_ptr)
|
||||
#define TX_BYTE_POOL_DELETE_EXTENSION(pool_ptr)
|
||||
#define TX_EVENT_FLAGS_GROUP_DELETE_EXTENSION(group_ptr)
|
||||
#define TX_MUTEX_DELETE_EXTENSION(mutex_ptr)
|
||||
#define TX_QUEUE_DELETE_EXTENSION(queue_ptr)
|
||||
#define TX_SEMAPHORE_DELETE_EXTENSION(semaphore_ptr)
|
||||
#define TX_TIMER_DELETE_EXTENSION(timer_ptr)
|
||||
|
||||
|
||||
/* Define the get system state macro. */
|
||||
|
||||
#ifndef TX_THREAD_GET_SYSTEM_STATE
|
||||
#ifndef TX_MISRA_ENABLE
|
||||
|
||||
__attribute__( ( always_inline ) ) static inline unsigned int __get_ipsr_value(void)
|
||||
{
|
||||
|
||||
unsigned int ipsr_value;
|
||||
|
||||
__asm__ volatile (" MRS %0,IPSR ": "=r" (ipsr_value) );
|
||||
return(ipsr_value);
|
||||
}
|
||||
|
||||
|
||||
#define TX_THREAD_GET_SYSTEM_STATE() (_tx_thread_system_state | __get_ipsr_value())
|
||||
#else
|
||||
ULONG _tx_misra_ipsr_get(VOID);
|
||||
#define TX_THREAD_GET_SYSTEM_STATE() (_tx_thread_system_state | _tx_misra_ipsr_get())
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
/* Define the check for whether or not to call the _tx_thread_system_return function. A non-zero value
|
||||
indicates that _tx_thread_system_return should not be called. */
|
||||
|
||||
#ifndef TX_THREAD_SYSTEM_RETURN_CHECK
|
||||
#define TX_THREAD_SYSTEM_RETURN_CHECK(c) (c) = ((ULONG) _tx_thread_preempt_disable);
|
||||
#endif
|
||||
|
||||
/* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to
|
||||
prevent early scheduling on Cortex-M parts. */
|
||||
|
||||
#define TX_PORT_SPECIFIC_POST_INITIALIZATION _tx_thread_preempt_disable++;
|
||||
|
||||
|
||||
/* This ARM architecture has the CLZ instruction. This is available on
|
||||
architectures v5 and above. If available, redefine the macro for calculating the
|
||||
lowest bit set. */
|
||||
|
||||
#ifndef TX_DISABLE_INLINE
|
||||
|
||||
#define TX_LOWEST_SET_BIT_CALCULATE(m, b) __asm__ volatile (" RBIT %0,%1 ": "=r" (m) : "r" (m) ); \
|
||||
__asm__ volatile (" CLZ %0,%1 ": "=r" (b) : "r" (m) );
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#ifndef TX_DISABLE_INLINE
|
||||
|
||||
/* Define GNU specific macros, with in-line assembly for performance. */
|
||||
|
||||
__attribute__( ( always_inline ) ) static inline unsigned int __disable_interrupts(void)
|
||||
{
|
||||
|
||||
unsigned int primask_value;
|
||||
|
||||
__asm__ volatile (" MRS %0,PRIMASK ": "=r" (primask_value) );
|
||||
__asm__ volatile (" CPSID i" : : : "memory" );
|
||||
return(primask_value);
|
||||
}
|
||||
|
||||
__attribute__( ( always_inline ) ) static inline void __restore_interrupts(unsigned int primask_value)
|
||||
{
|
||||
|
||||
__asm__ volatile (" MSR PRIMASK,%0": : "r" (primask_value): "memory" );
|
||||
}
|
||||
|
||||
__attribute__( ( always_inline ) ) static inline unsigned int __get_primask_value(void)
|
||||
{
|
||||
|
||||
unsigned int primask_value;
|
||||
|
||||
__asm__ volatile (" MRS %0,PRIMASK ": "=r" (primask_value) );
|
||||
return(primask_value);
|
||||
}
|
||||
|
||||
__attribute__( ( always_inline ) ) static inline void __enable_interrupts(void)
|
||||
{
|
||||
|
||||
__asm__ volatile (" CPSIE i": : : "memory" );
|
||||
}
|
||||
|
||||
|
||||
__attribute__( ( always_inline ) ) static inline void _tx_thread_system_return_inline(void)
|
||||
{
|
||||
unsigned int interrupt_save;
|
||||
|
||||
*((ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
|
||||
if (__get_ipsr_value() == 0)
|
||||
{
|
||||
interrupt_save = __get_primask_value();
|
||||
__enable_interrupts();
|
||||
__restore_interrupts(interrupt_save);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
|
||||
|
||||
#define TX_DISABLE interrupt_save = __disable_interrupts();
|
||||
#define TX_RESTORE __restore_interrupts(interrupt_save);
|
||||
|
||||
|
||||
/* Redefine _tx_thread_system_return for improved performance. */
|
||||
|
||||
#define _tx_thread_system_return _tx_thread_system_return_inline
|
||||
|
||||
|
||||
#else
|
||||
|
||||
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
|
||||
|
||||
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE);
|
||||
#define TX_RESTORE _tx_thread_interrupt_control(interrupt_save);
|
||||
#endif
|
||||
|
||||
|
||||
/* Define the version ID of ThreadX. This may be utilized by the application. */
|
||||
|
||||
#ifdef TX_THREAD_INIT
|
||||
CHAR _tx_version_id[] =
|
||||
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/GNU Version 6.1.6 *";
|
||||
#else
|
||||
extern CHAR _tx_version_id[];
|
||||
#endif
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
328
ports_module/cortex_m3/gnu/inc/txm_module_port.h
Normal file
328
ports_module/cortex_m3/gnu/inc/txm_module_port.h
Normal file
@@ -0,0 +1,328 @@
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
/* */
|
||||
/* This software is licensed under the Microsoft Software License */
|
||||
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
/* and in the root directory of this software. */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Module */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* APPLICATION INTERFACE DEFINITION RELEASE */
|
||||
/* */
|
||||
/* txm_module_port.h Cortex-M3/MPU/GNU */
|
||||
/* 6.1.6 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This file defines the basic module constants, interface structures, */
|
||||
/* and function prototypes. */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* 04-02-2021 Scott Larson Modified comment(s) and */
|
||||
/* added check for overflow, */
|
||||
/* resulting in version 6.1.6 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
#ifndef TXM_MODULE_PORT_H
|
||||
#define TXM_MODULE_PORT_H
|
||||
|
||||
/* Determine if the optional Modules user define file should be used. */
|
||||
|
||||
#ifdef TXM_MODULE_INCLUDE_USER_DEFINE_FILE
|
||||
|
||||
|
||||
/* Yes, include the user defines in txm_module_user.h. The defines in this file may
|
||||
alternately be defined on the command line. */
|
||||
|
||||
#include "txm_module_user.h"
|
||||
#endif
|
||||
|
||||
/* It is assumed that the base ThreadX tx_port.h file has been modified to add the
|
||||
following extensions to the ThreadX thread control block (this code should replace
|
||||
the corresponding macro define in tx_port.h):
|
||||
|
||||
#define TX_THREAD_EXTENSION_2 VOID *tx_thread_module_instance_ptr; \
|
||||
VOID *tx_thread_module_entry_info_ptr; \
|
||||
ULONG tx_thread_module_current_user_mode; \
|
||||
ULONG tx_thread_module_user_mode; \
|
||||
ULONG tx_thread_module_saved_lr; \
|
||||
VOID *tx_thread_module_kernel_stack_start; \
|
||||
VOID *tx_thread_module_kernel_stack_end; \
|
||||
ULONG tx_thread_module_kernel_stack_size; \
|
||||
VOID *tx_thread_module_stack_ptr; \
|
||||
VOID *tx_thread_module_stack_start; \
|
||||
VOID *tx_thread_module_stack_end; \
|
||||
ULONG tx_thread_module_stack_size; \
|
||||
VOID *tx_thread_module_reserved;
|
||||
|
||||
The following extensions must also be defined in tx_port.h:
|
||||
|
||||
#define TX_EVENT_FLAGS_GROUP_EXTENSION VOID *tx_event_flags_group_module_instance; \
|
||||
VOID (*tx_event_flags_group_set_module_notify)(struct TX_EVENT_FLAGS_GROUP_STRUCT *group_ptr);
|
||||
|
||||
#define TX_QUEUE_EXTENSION VOID *tx_queue_module_instance; \
|
||||
VOID (*tx_queue_send_module_notify)(struct TX_QUEUE_STRUCT *queue_ptr);
|
||||
|
||||
#define TX_SEMAPHORE_EXTENSION VOID *tx_semaphore_module_instance; \
|
||||
VOID (*tx_semaphore_put_module_notify)(struct TX_SEMAPHORE_STRUCT *semaphore_ptr);
|
||||
|
||||
#define TX_TIMER_EXTENSION VOID *tx_timer_module_instance; \
|
||||
VOID (*tx_timer_module_expiration_function)(ULONG id);
|
||||
*/
|
||||
|
||||
/* Define the kernel stack size for a module thread. */
|
||||
#ifndef TXM_MODULE_KERNEL_STACK_SIZE
|
||||
#define TXM_MODULE_KERNEL_STACK_SIZE 768
|
||||
#endif
|
||||
|
||||
/* Define constants specific to the tools the module can be built with for this particular modules port. */
|
||||
|
||||
#define TXM_MODULE_IAR_COMPILER 0x00000000
|
||||
#define TXM_MODULE_RVDS_COMPILER 0x01000000
|
||||
#define TXM_MODULE_GNU_COMPILER 0x02000000
|
||||
#define TXM_MODULE_COMPILER_MASK 0xFF000000
|
||||
#define TXM_MODULE_OPTIONS_MASK 0x000000FF
|
||||
|
||||
|
||||
/* Define the properties for this particular module port. */
|
||||
|
||||
#define TXM_MODULE_MEMORY_PROTECTION_ENABLED
|
||||
|
||||
#ifdef TXM_MODULE_MEMORY_PROTECTION_ENABLED
|
||||
#define TXM_MODULE_REQUIRE_ALLOCATED_OBJECT_MEMORY
|
||||
#else
|
||||
#define TXM_MODULE_REQUIRE_LOCAL_OBJECT_MEMORY
|
||||
#endif
|
||||
|
||||
#define TXM_MODULE_USER_MODE 0x00000001
|
||||
#define TXM_MODULE_MEMORY_PROTECTION 0x00000002
|
||||
#define TXM_MODULE_SHARED_EXTERNAL_MEMORY_ACCESS 0x00000004
|
||||
|
||||
|
||||
/* Define the supported options for this module. */
|
||||
|
||||
#define TXM_MODULE_MANAGER_SUPPORTED_OPTIONS (TXM_MODULE_USER_MODE | TXM_MODULE_MEMORY_PROTECTION | TXM_MODULE_SHARED_EXTERNAL_MEMORY_ACCESS)
|
||||
#define TXM_MODULE_MANAGER_REQUIRED_OPTIONS 0
|
||||
|
||||
|
||||
/* Define offset adjustments according to the compiler used to build the module. */
|
||||
|
||||
#define TXM_MODULE_IAR_SHELL_ADJUST 24
|
||||
#define TXM_MODULE_IAR_START_ADJUST 28
|
||||
#define TXM_MODULE_IAR_STOP_ADJUST 32
|
||||
#define TXM_MODULE_IAR_CALLBACK_ADJUST 44
|
||||
|
||||
#define TXM_MODULE_RVDS_SHELL_ADJUST 0
|
||||
#define TXM_MODULE_RVDS_START_ADJUST 0
|
||||
#define TXM_MODULE_RVDS_STOP_ADJUST 0
|
||||
#define TXM_MODULE_RVDS_CALLBACK_ADJUST 0
|
||||
|
||||
#define TXM_MODULE_GNU_SHELL_ADJUST 24
|
||||
#define TXM_MODULE_GNU_START_ADJUST 28
|
||||
#define TXM_MODULE_GNU_STOP_ADJUST 32
|
||||
#define TXM_MODULE_GNU_CALLBACK_ADJUST 44
|
||||
|
||||
|
||||
/* Define other module port-specific constants. */
|
||||
|
||||
/* Define INLINE_DECLARE to inline for GNU compiler. */
|
||||
|
||||
#define INLINE_DECLARE inline
|
||||
|
||||
/* Define the number of MPU entries assigned to the code and data sections. On Cortex-M parts, there can only be 7 total
|
||||
entries, since ThreadX uses one for access to the kernel dispatch function. */
|
||||
|
||||
#define TXM_MODULE_MANAGER_CODE_MPU_ENTRIES 4
|
||||
#define TXM_MODULE_MANAGER_DATA_MPU_ENTRIES 3
|
||||
#define TXM_MODULE_MANAGER_SHARED_MPU_INDEX 8
|
||||
#define TXM_MODULE_MANAGER_SHARED_MPU_REGION 4
|
||||
|
||||
/* Shared memory region attributes. */
|
||||
#define TXM_MODULE_MANAGER_SHARED_ATTRIBUTE_WRITE 1
|
||||
#define TXM_MODULE_MANAGER_ATTRIBUTE_WRITE_MPU_BIT 0x01000000
|
||||
|
||||
/* Define the port-extensions to the module manager instance structure. */
|
||||
|
||||
#define TXM_MODULE_MANAGER_PORT_EXTENSION \
|
||||
ULONG txm_module_instance_mpu_registers[16]; \
|
||||
ULONG txm_module_instance_shared_memory_address; \
|
||||
ULONG txm_module_instance_shared_memory_length;
|
||||
|
||||
|
||||
/* Define the memory fault information structure that is populated when a memory fault occurs. */
|
||||
|
||||
|
||||
typedef struct TXM_MODULE_MANAGER_MEMORY_FAULT_INFO_STRUCT
|
||||
{
|
||||
TX_THREAD *txm_module_manager_memory_fault_info_thread_ptr;
|
||||
VOID *txm_module_manager_memory_fault_info_code_location;
|
||||
ULONG txm_module_manager_memory_fault_info_shcsr;
|
||||
ULONG txm_module_manager_memory_fault_info_cfsr;
|
||||
ULONG txm_module_manager_memory_fault_info_mmfar;
|
||||
ULONG txm_module_manager_memory_fault_info_bfar;
|
||||
ULONG txm_module_manager_memory_fault_info_control;
|
||||
ULONG txm_module_manager_memory_fault_info_sp;
|
||||
ULONG txm_module_manager_memory_fault_info_r0;
|
||||
ULONG txm_module_manager_memory_fault_info_r1;
|
||||
ULONG txm_module_manager_memory_fault_info_r2;
|
||||
ULONG txm_module_manager_memory_fault_info_r3;
|
||||
ULONG txm_module_manager_memory_fault_info_r4;
|
||||
ULONG txm_module_manager_memory_fault_info_r5;
|
||||
ULONG txm_module_manager_memory_fault_info_r6;
|
||||
ULONG txm_module_manager_memory_fault_info_r7;
|
||||
ULONG txm_module_manager_memory_fault_info_r8;
|
||||
ULONG txm_module_manager_memory_fault_info_r9;
|
||||
ULONG txm_module_manager_memory_fault_info_r10;
|
||||
ULONG txm_module_manager_memory_fault_info_r11;
|
||||
ULONG txm_module_manager_memory_fault_info_r12;
|
||||
ULONG txm_module_manager_memory_fault_info_lr;
|
||||
ULONG txm_module_manager_memory_fault_info_xpsr;
|
||||
} TXM_MODULE_MANAGER_MEMORY_FAULT_INFO;
|
||||
|
||||
|
||||
#define TXM_MODULE_MANAGER_FAULT_INFO \
|
||||
TXM_MODULE_MANAGER_MEMORY_FAULT_INFO _txm_module_manager_memory_fault_info;
|
||||
|
||||
/* Define the macro to check the code alignment. */
|
||||
|
||||
#define TXM_MODULE_MANAGER_CHECK_CODE_ALIGNMENT(module_location, code_alignment) \
|
||||
{ \
|
||||
ULONG temp; \
|
||||
temp = (ULONG) module_location; \
|
||||
temp = temp & (code_alignment - 1); \
|
||||
if (temp) \
|
||||
{ \
|
||||
_tx_mutex_put(&_txm_module_manager_mutex); \
|
||||
return(TXM_MODULE_ALIGNMENT_ERROR); \
|
||||
} \
|
||||
}
|
||||
|
||||
|
||||
/* Define the macro to adjust the alignment and size for code/data areas. */
|
||||
|
||||
#define TXM_MODULE_MANAGER_ALIGNMENT_ADJUST(module_preamble, code_size, code_alignment, data_size, data_alignment) _txm_module_manager_alignment_adjust(module_preamble, &code_size, &code_alignment, &data_size, &data_alignment);
|
||||
|
||||
|
||||
/* Define the macro to adjust the symbols in the module preamble. */
|
||||
|
||||
#define TXM_MODULE_MANAGER_CALCULATE_ADJUSTMENTS(properties, shell_function_adjust, start_function_adjust, stop_function_adjust, callback_function_adjust) \
|
||||
if ((properties & TXM_MODULE_COMPILER_MASK) == TXM_MODULE_IAR_COMPILER) \
|
||||
{ \
|
||||
shell_function_adjust = TXM_MODULE_IAR_SHELL_ADJUST; \
|
||||
start_function_adjust = TXM_MODULE_IAR_START_ADJUST; \
|
||||
stop_function_adjust = TXM_MODULE_IAR_STOP_ADJUST; \
|
||||
callback_function_adjust = TXM_MODULE_IAR_CALLBACK_ADJUST; \
|
||||
} \
|
||||
else if ((properties & TXM_MODULE_COMPILER_MASK) == TXM_MODULE_RVDS_COMPILER) \
|
||||
{ \
|
||||
shell_function_adjust = TXM_MODULE_RVDS_SHELL_ADJUST; \
|
||||
start_function_adjust = TXM_MODULE_RVDS_START_ADJUST; \
|
||||
stop_function_adjust = TXM_MODULE_RVDS_STOP_ADJUST; \
|
||||
callback_function_adjust = TXM_MODULE_RVDS_CALLBACK_ADJUST; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
shell_function_adjust = TXM_MODULE_GNU_SHELL_ADJUST; \
|
||||
start_function_adjust = TXM_MODULE_GNU_START_ADJUST; \
|
||||
stop_function_adjust = TXM_MODULE_GNU_STOP_ADJUST; \
|
||||
callback_function_adjust = TXM_MODULE_GNU_CALLBACK_ADJUST; \
|
||||
}
|
||||
|
||||
|
||||
/* Define the macro to populate the thread control block with module port-specific information.
|
||||
Check if the module is in user mode and set up txm_module_thread_entry_info_kernel_call_dispatcher accordingly.
|
||||
*/
|
||||
|
||||
#define TXM_MODULE_MANAGER_THREAD_SETUP(thread_ptr, module_instance) \
|
||||
thread_ptr -> tx_thread_module_current_user_mode = module_instance -> txm_module_instance_property_flags & TXM_MODULE_USER_MODE; \
|
||||
thread_ptr -> tx_thread_module_user_mode = module_instance -> txm_module_instance_property_flags & TXM_MODULE_USER_MODE; \
|
||||
if (thread_ptr -> tx_thread_module_user_mode) \
|
||||
{ \
|
||||
thread_entry_info -> txm_module_thread_entry_info_kernel_call_dispatcher = _txm_module_manager_user_mode_entry; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
thread_entry_info -> txm_module_thread_entry_info_kernel_call_dispatcher = _txm_module_manager_kernel_dispatch; \
|
||||
}
|
||||
|
||||
|
||||
/* Define the macro to populate the module control block with module port-specific information.
|
||||
If memory protection is enabled, set up the MPU registers.
|
||||
*/
|
||||
#define TXM_MODULE_MANAGER_MODULE_SETUP(module_instance) \
|
||||
if (module_instance -> txm_module_instance_property_flags & TXM_MODULE_USER_MODE) \
|
||||
{ \
|
||||
if (module_instance -> txm_module_instance_property_flags & TXM_MODULE_MEMORY_PROTECTION) \
|
||||
{ \
|
||||
_txm_module_manager_mm_register_setup(module_instance); \
|
||||
} \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
/* Do nothing. */ \
|
||||
}
|
||||
|
||||
/* Define the macro to perform port-specific functions when unloading the module. */
|
||||
/* Nothing needs to be done for this port. */
|
||||
#define TXM_MODULE_MANAGER_MODULE_UNLOAD(module_instance)
|
||||
|
||||
|
||||
/* Define the macros to perform port-specific checks when passing pointers to the kernel. */
|
||||
|
||||
/* Define macro to make sure object is inside the module's data. */
|
||||
#define TXM_MODULE_MANAGER_CHECK_INSIDE_DATA(module_instance, obj_ptr, obj_size) \
|
||||
/* Check for overflow. */ \
|
||||
(((obj_ptr) < ((obj_ptr) + (obj_size))) && \
|
||||
/* Check if it's inside module data. */ \
|
||||
((((obj_ptr) >= (ALIGN_TYPE) module_instance -> txm_module_instance_data_start) && \
|
||||
(((obj_ptr) + (obj_size)) <= ((ALIGN_TYPE) module_instance -> txm_module_instance_data_end + 1))) || \
|
||||
/* Check if it's inside shared memory. */ \
|
||||
(((obj_ptr) >= (ALIGN_TYPE) module_instance -> txm_module_instance_shared_memory_address) && \
|
||||
(((obj_ptr) + (obj_size)) <= (ALIGN_TYPE) (module_instance -> txm_module_instance_shared_memory_address + module_instance -> txm_module_instance_shared_memory_length)))))
|
||||
|
||||
|
||||
/* Define some internal prototypes to this module port. */
|
||||
|
||||
#ifndef TX_SOURCE_CODE
|
||||
#define txm_module_manager_memory_fault_notify _txm_module_manager_memory_fault_notify
|
||||
#endif
|
||||
|
||||
|
||||
#define TXM_MODULE_MANAGER_ADDITIONAL_PROTOTYPES \
|
||||
VOID _txm_module_manager_alignment_adjust(TXM_MODULE_PREAMBLE *module_preamble, ULONG *code_size, ULONG *code_alignment, ULONG *data_size, ULONG *data_alignment); \
|
||||
VOID _txm_module_manager_memory_fault_handler(VOID); \
|
||||
UINT _txm_module_manager_memory_fault_notify(VOID (*notify_function)(TX_THREAD *, TXM_MODULE_INSTANCE *)); \
|
||||
VOID _txm_module_manager_mm_register_setup(TXM_MODULE_INSTANCE *module_instance); \
|
||||
ULONG _txm_power_of_two_block_size(ULONG size); \
|
||||
ULONG _txm_module_manager_calculate_srd_bits(ULONG block_size, ULONG length); \
|
||||
ULONG _txm_module_manager_region_size_get(ULONG block_size);
|
||||
|
||||
#define TXM_MODULE_MANAGER_VERSION_ID \
|
||||
CHAR _txm_module_manager_version_id[] = \
|
||||
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Module Cortex-M3/MPU/GNU Version 6.1 *";
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,174 @@
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
/* */
|
||||
/* This software is licensed under the Microsoft Software License */
|
||||
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
/* and in the root directory of this software. */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Module */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
#ifndef TXM_MODULE
|
||||
#define TXM_MODULE
|
||||
#endif
|
||||
|
||||
#ifndef TX_SOURCE_CODE
|
||||
#define TX_SOURCE_CODE
|
||||
#endif
|
||||
|
||||
|
||||
/* Include necessary system files. */
|
||||
|
||||
#include "txm_module.h"
|
||||
#include "tx_thread.h"
|
||||
|
||||
/* Define the global module entry pointer from the start thread of the module. */
|
||||
|
||||
TXM_MODULE_THREAD_ENTRY_INFO *_txm_module_entry_info;
|
||||
|
||||
|
||||
/* Define the dispatch function pointer used in the module implementation. */
|
||||
|
||||
ULONG (*_txm_module_kernel_call_dispatcher)(ULONG kernel_request, ULONG param_1, ULONG param_2, ULONG param3);
|
||||
|
||||
|
||||
/* Define the GCC startup code that clears the uninitialized global data and sets up the
|
||||
preset global variables. */
|
||||
|
||||
extern VOID _gcc_setup(TXM_MODULE_INSTANCE *);
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_thread_shell_entry Cortex-M3/MPU/GNU */
|
||||
/* 6.1 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function calls the specified entry function of the thread. It */
|
||||
/* also provides a place for the thread's entry function to return. */
|
||||
/* If the thread returns, this function places the thread in a */
|
||||
/* "COMPLETED" state. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* thread_ptr Pointer to current thread */
|
||||
/* thread_info Pointer to thread entry info */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* _gcc_setup GNU global init function */
|
||||
/* thread_entry Thread's entry function */
|
||||
/* tx_thread_resume Resume the module callback thread */
|
||||
/* _txm_module_thread_system_suspend Module thread suspension routine */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Initial thread stack frame */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
VOID _txm_module_thread_shell_entry(TX_THREAD *thread_ptr, TXM_MODULE_THREAD_ENTRY_INFO *thread_info)
|
||||
{
|
||||
|
||||
#ifndef TX_DISABLE_NOTIFY_CALLBACKS
|
||||
VOID (*entry_exit_notify)(TX_THREAD *, UINT);
|
||||
#endif
|
||||
|
||||
|
||||
/* Determine if this is the start thread. If so, we must prepare the module for
|
||||
execution. If not, simply skip the C startup code. */
|
||||
if (thread_info -> txm_module_thread_entry_info_start_thread)
|
||||
{
|
||||
/* Initialize the GNU C environment. */
|
||||
_gcc_setup(thread_info -> txm_module_thread_entry_info_code_base_address);
|
||||
|
||||
/* Save the entry info pointer, for later use. */
|
||||
_txm_module_entry_info = thread_info;
|
||||
|
||||
/* Save the kernel function dispatch address. This is used to make all resident calls from
|
||||
the module. */
|
||||
_txm_module_kernel_call_dispatcher = thread_info -> txm_module_thread_entry_info_kernel_call_dispatcher;
|
||||
|
||||
/* Ensure that we have a valid pointer. */
|
||||
while (!_txm_module_kernel_call_dispatcher)
|
||||
{
|
||||
/* Loop here, if an error is present getting the dispatch function pointer!
|
||||
An error here typically indicates the resident portion of _tx_thread_schedule
|
||||
is not supporting the trap to obtain the function pointer. */
|
||||
}
|
||||
|
||||
/* Resume the module's callback thread, already created in the manager. */
|
||||
_txe_thread_resume(thread_info -> txm_module_thread_entry_info_callback_request_thread);
|
||||
}
|
||||
|
||||
#ifndef TX_DISABLE_NOTIFY_CALLBACKS
|
||||
|
||||
/* Pickup the entry/exit application callback routine. */
|
||||
entry_exit_notify = thread_info -> txm_module_thread_entry_info_exit_notify;
|
||||
|
||||
/* Determine if an application callback routine is specified. */
|
||||
if (entry_exit_notify != TX_NULL)
|
||||
{
|
||||
|
||||
/* Yes, notify application that this thread has been entered! */
|
||||
(entry_exit_notify)(thread_ptr, TX_THREAD_ENTRY);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Call current thread's entry function. */
|
||||
(thread_info -> txm_module_thread_entry_info_entry) (thread_info -> txm_module_thread_entry_info_parameter);
|
||||
|
||||
/* Suspend thread with a "completed" state. */
|
||||
|
||||
|
||||
#ifndef TX_DISABLE_NOTIFY_CALLBACKS
|
||||
|
||||
/* Pickup the entry/exit application callback routine again. */
|
||||
entry_exit_notify = thread_info -> txm_module_thread_entry_info_exit_notify;
|
||||
|
||||
/* Determine if an application callback routine is specified. */
|
||||
if (entry_exit_notify != TX_NULL)
|
||||
{
|
||||
|
||||
/* Yes, notify application that this thread has exited! */
|
||||
(entry_exit_notify)(thread_ptr, TX_THREAD_EXIT);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Call actual thread suspension routine. */
|
||||
_txm_module_thread_system_suspend(thread_ptr);
|
||||
|
||||
#ifdef TX_SAFETY_CRITICAL
|
||||
|
||||
/* If we ever get here, raise safety critical exception. */
|
||||
TX_SAFETY_CRITICAL_EXCEPTION(__FILE__, __LINE__, 0);
|
||||
#endif
|
||||
}
|
||||
|
||||
@@ -0,0 +1,87 @@
|
||||
@/**************************************************************************/
|
||||
@/* */
|
||||
@/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
@/* */
|
||||
@/* This software is licensed under the Microsoft Software License */
|
||||
@/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
@/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
@/* and in the root directory of this software. */
|
||||
@/* */
|
||||
@/**************************************************************************/
|
||||
@
|
||||
@
|
||||
@/**************************************************************************/
|
||||
@/**************************************************************************/
|
||||
@/** */
|
||||
@/** ThreadX Component */
|
||||
@/** */
|
||||
@/** Thread */
|
||||
@/** */
|
||||
@/**************************************************************************/
|
||||
@/**************************************************************************/
|
||||
@
|
||||
@
|
||||
.global _tx_thread_system_state
|
||||
.global _tx_thread_current_ptr
|
||||
.global _tx_thread_system_stack_ptr
|
||||
.global _tx_thread_execute_ptr
|
||||
.global _tx_timer_time_slice
|
||||
.global _tx_thread_schedule
|
||||
.global _tx_thread_preempt_disable
|
||||
.global _tx_execution_isr_exit
|
||||
@
|
||||
@
|
||||
.text
|
||||
.align 4
|
||||
.syntax unified
|
||||
@/**************************************************************************/
|
||||
@/* */
|
||||
@/* FUNCTION RELEASE */
|
||||
@/* */
|
||||
@/* _tx_thread_context_restore Cortex-M3/GNU */
|
||||
@/* 6.1 */
|
||||
@/* AUTHOR */
|
||||
@/* */
|
||||
@/* William E. Lamie, Microsoft Corporation */
|
||||
@/* */
|
||||
@/* DESCRIPTION */
|
||||
@/* */
|
||||
@/* This function is only needed for legacy applications and it should */
|
||||
@/* not be called in any new development on a Cortex-M. */
|
||||
@/* This function restores the interrupt context if it is processing a */
|
||||
@/* nested interrupt. If not, it returns to the interrupt thread if no */
|
||||
@/* preemption is necessary. Otherwise, if preemption is necessary or */
|
||||
@/* if no thread was running, the function returns to the scheduler. */
|
||||
@/* */
|
||||
@/* INPUT */
|
||||
@/* */
|
||||
@/* None */
|
||||
@/* */
|
||||
@/* OUTPUT */
|
||||
@/* */
|
||||
@/* None */
|
||||
@/* */
|
||||
@/* CALLS */
|
||||
@/* */
|
||||
@/* _tx_thread_schedule Thread scheduling routine */
|
||||
@/* */
|
||||
@/* CALLED BY */
|
||||
@/* */
|
||||
@/* ISRs Interrupt Service Routines */
|
||||
@/* */
|
||||
@/* RELEASE HISTORY */
|
||||
@/* */
|
||||
@/* DATE NAME DESCRIPTION */
|
||||
@/* */
|
||||
@/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
@/* */
|
||||
@/**************************************************************************/
|
||||
@VOID _tx_thread_context_restore(VOID)
|
||||
@{
|
||||
.global _tx_thread_context_restore
|
||||
.thumb_func
|
||||
_tx_thread_context_restore:
|
||||
@
|
||||
@ /* Not needed for this port - just return! */
|
||||
BX lr
|
||||
@}
|
||||
@@ -0,0 +1,81 @@
|
||||
@/**************************************************************************/
|
||||
@/* */
|
||||
@/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
@/* */
|
||||
@/* This software is licensed under the Microsoft Software License */
|
||||
@/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
@/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
@/* and in the root directory of this software. */
|
||||
@/* */
|
||||
@/**************************************************************************/
|
||||
@
|
||||
@
|
||||
@/**************************************************************************/
|
||||
@/**************************************************************************/
|
||||
@/** */
|
||||
@/** ThreadX Component */
|
||||
@/** */
|
||||
@/** Thread */
|
||||
@/** */
|
||||
@/**************************************************************************/
|
||||
@/**************************************************************************/
|
||||
@
|
||||
@
|
||||
.global _tx_thread_system_state
|
||||
.global _tx_thread_current_ptr
|
||||
.global _tx_execution_isr_enter
|
||||
@
|
||||
@
|
||||
.text
|
||||
.align 4
|
||||
.syntax unified
|
||||
@/**************************************************************************/
|
||||
@/* */
|
||||
@/* FUNCTION RELEASE */
|
||||
@/* */
|
||||
@/* _tx_thread_context_save Cortex-M3/GNU */
|
||||
@/* 6.1 */
|
||||
@/* AUTHOR */
|
||||
@/* */
|
||||
@/* William E. Lamie, Microsoft Corporation */
|
||||
@/* */
|
||||
@/* DESCRIPTION */
|
||||
@/* */
|
||||
@/* This function is only needed for legacy applications and it should */
|
||||
@/* not be called in any new development on a Cortex-M. */
|
||||
@/* This function saves the context of an executing thread in the */
|
||||
@/* beginning of interrupt processing. The function also ensures that */
|
||||
@/* the system stack is used upon return to the calling ISR. */
|
||||
@/* */
|
||||
@/* INPUT */
|
||||
@/* */
|
||||
@/* None */
|
||||
@/* */
|
||||
@/* OUTPUT */
|
||||
@/* */
|
||||
@/* None */
|
||||
@/* */
|
||||
@/* CALLS */
|
||||
@/* */
|
||||
@/* None */
|
||||
@/* */
|
||||
@/* CALLED BY */
|
||||
@/* */
|
||||
@/* ISRs */
|
||||
@/* */
|
||||
@/* RELEASE HISTORY */
|
||||
@/* */
|
||||
@/* DATE NAME DESCRIPTION */
|
||||
@/* */
|
||||
@/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
@/* */
|
||||
@/**************************************************************************/
|
||||
@VOID _tx_thread_context_save(VOID)
|
||||
@{
|
||||
.global _tx_thread_context_save
|
||||
.thumb_func
|
||||
_tx_thread_context_save:
|
||||
@
|
||||
@ /* Not needed for this port - just return! */
|
||||
BX lr
|
||||
@}
|
||||
@@ -0,0 +1,81 @@
|
||||
@/**************************************************************************/
|
||||
@/* */
|
||||
@/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
@/* */
|
||||
@/* This software is licensed under the Microsoft Software License */
|
||||
@/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
@/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
@/* and in the root directory of this software. */
|
||||
@/* */
|
||||
@/**************************************************************************/
|
||||
|
||||
|
||||
@/**************************************************************************/
|
||||
@/**************************************************************************/
|
||||
@/** */
|
||||
@/** ThreadX Component */
|
||||
@/** */
|
||||
@/** Thread */
|
||||
@/** */
|
||||
@/**************************************************************************/
|
||||
@/**************************************************************************/
|
||||
|
||||
|
||||
.text 32
|
||||
.align 4
|
||||
.syntax unified
|
||||
@/**************************************************************************/
|
||||
@/* */
|
||||
@/* FUNCTION RELEASE */
|
||||
@/* */
|
||||
@/* _tx_thread_interrupt_control Cortex-M3/GNU */
|
||||
@/* 6.1 */
|
||||
@/* AUTHOR */
|
||||
@/* */
|
||||
@/* William E. Lamie, Microsoft Corporation */
|
||||
@/* */
|
||||
@/* DESCRIPTION */
|
||||
@/* */
|
||||
@/* This function is responsible for changing the interrupt lockout */
|
||||
@/* posture of the system. */
|
||||
@/* */
|
||||
@/* INPUT */
|
||||
@/* */
|
||||
@/* new_posture New interrupt lockout posture */
|
||||
@/* */
|
||||
@/* OUTPUT */
|
||||
@/* */
|
||||
@/* old_posture Old interrupt lockout posture */
|
||||
@/* */
|
||||
@/* CALLS */
|
||||
@/* */
|
||||
@/* None */
|
||||
@/* */
|
||||
@/* CALLED BY */
|
||||
@/* */
|
||||
@/* Application Code */
|
||||
@/* */
|
||||
@/* RELEASE HISTORY */
|
||||
@/* */
|
||||
@/* DATE NAME DESCRIPTION */
|
||||
@/* */
|
||||
@/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
@/* */
|
||||
@/**************************************************************************/
|
||||
@/* UINT _tx_thread_interrupt_control(UINT new_posture)
|
||||
{ */
|
||||
.global _tx_thread_interrupt_control
|
||||
.thumb_func
|
||||
_tx_thread_interrupt_control:
|
||||
|
||||
@/* Pickup current interrupt lockout posture. */
|
||||
|
||||
MRS r1, PRIMASK @ Pickup current interrupt lockout
|
||||
|
||||
@/* Apply the new interrupt posture. */
|
||||
|
||||
MSR PRIMASK, r0 @ Apply the new interrupt lockout
|
||||
MOV r0, r1 @ Transfer old to return register
|
||||
BX lr @ Return to caller
|
||||
|
||||
@/* } */
|
||||
@@ -0,0 +1,524 @@
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
/* */
|
||||
/* This software is licensed under the Microsoft Software License */
|
||||
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
/* and in the root directory of this software. */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Thread */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
.global _tx_thread_current_ptr
|
||||
.global _tx_thread_execute_ptr
|
||||
.global _tx_timer_time_slice
|
||||
.global _tx_thread_system_stack_ptr
|
||||
.global _tx_execution_thread_enter
|
||||
.global _tx_execution_thread_exit
|
||||
.global _tx_thread_preempt_disable
|
||||
.global _txm_module_manager_memory_fault_handler
|
||||
.global _txm_module_manager_memory_fault_info
|
||||
|
||||
.text
|
||||
.align 4
|
||||
.syntax unified
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _tx_thread_schedule Cortex-M3/MPU/GNU */
|
||||
/* 6.1 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function waits for a thread control block pointer to appear in */
|
||||
/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */
|
||||
/* in the variable, the corresponding thread is resumed. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* _tx_initialize_kernel_enter ThreadX entry function */
|
||||
/* _tx_thread_system_return Return to system from thread */
|
||||
/* _tx_thread_context_restore Restore thread's context */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
// VOID _tx_thread_schedule(VOID)
|
||||
// {
|
||||
.global _tx_thread_schedule
|
||||
.thumb_func
|
||||
_tx_thread_schedule:
|
||||
|
||||
/* This function should only ever be called on Cortex-M
|
||||
from the first schedule request. Subsequent scheduling occurs
|
||||
from the PendSV handling routines below. */
|
||||
|
||||
/* Clear the preempt-disable flag to enable rescheduling after initialization on Cortex-M targets. */
|
||||
|
||||
MOV r0, #0 // Build value for TX_FALSE
|
||||
LDR r2, =_tx_thread_preempt_disable // Build address of preempt disable flag
|
||||
STR r0, [r2, #0] // Clear preempt disable flag
|
||||
|
||||
/* Enable memory fault registers. */
|
||||
|
||||
LDR r0, =0xE000ED24 // Build SHCSR address
|
||||
LDR r1, =0x70000 // Enable Usage, Bus, and MemManage faults
|
||||
STR r1, [r0] //
|
||||
|
||||
/* Enable interrupts */
|
||||
|
||||
CPSIE i
|
||||
|
||||
/* Enter the scheduler for the first time. */
|
||||
|
||||
MOV r0, #0x10000000 // Load PENDSVSET bit
|
||||
MOV r1, #0xE000E000 // Load NVIC base
|
||||
STR r0, [r1, #0xD04] // Set PENDSVBIT in ICSR
|
||||
DSB // Complete all memory accesses
|
||||
ISB // Flush pipeline
|
||||
|
||||
/* Wait here for the PendSV to take place. */
|
||||
|
||||
__tx_wait_here:
|
||||
B __tx_wait_here // Wait for the PendSV to happen
|
||||
// }
|
||||
|
||||
|
||||
/* Memory Exception Handler. */
|
||||
.global MemManage_Handler
|
||||
.global BusFault_Handler
|
||||
.global UsageFault_Handler
|
||||
.thumb_func
|
||||
MemManage_Handler:
|
||||
.thumb_func
|
||||
BusFault_Handler:
|
||||
.thumb_func
|
||||
UsageFault_Handler:
|
||||
|
||||
CPSID i // Disable interrupts
|
||||
|
||||
/* Now pickup and store all the fault related information. */
|
||||
|
||||
LDR r12,=_txm_module_manager_memory_fault_info // Pickup fault info struct
|
||||
LDR r0, =_tx_thread_current_ptr // Build current thread pointer address
|
||||
LDR r1, [r0] // Pickup the current thread pointer
|
||||
STR r1, [r12, #0] // Save current thread pointer in fault info structure
|
||||
LDR r0, =0xE000ED24 // Build SHCSR address
|
||||
LDR r1, [r0] // Pickup SHCSR
|
||||
STR r1, [r12, #8] // Save SHCSR
|
||||
LDR r0, =0xE000ED28 // Build CFSR address
|
||||
LDR r1, [r0] // Pickup CFSR
|
||||
STR r1, [r12, #12] // Save CFSR
|
||||
LDR r0, =0xE000ED34 // Build MMFAR address
|
||||
LDR r1, [r0] // Pickup MMFAR
|
||||
STR r1, [r12, #16] // Save MMFAR
|
||||
LDR r0, =0xE000ED38 // Build BFAR address
|
||||
LDR r1, [r0] // Pickup BFAR
|
||||
STR r1, [r12, #20] // Save BFAR
|
||||
MRS r0, CONTROL // Pickup current CONTROL register
|
||||
STR r0, [r12, #24] // Save CONTROL
|
||||
MRS r1, PSP // Pickup thread stack pointer
|
||||
STR r1, [r12, #28] // Save thread stack pointer
|
||||
LDR r0, [r1] // Pickup saved r0
|
||||
STR r0, [r12, #32] // Save r0
|
||||
LDR r0, [r1, #4] // Pickup saved r1
|
||||
STR r0, [r12, #36] // Save r1
|
||||
STR r2, [r12, #40] // Save r2
|
||||
STR r3, [r12, #44] // Save r3
|
||||
STR r4, [r12, #48] // Save r4
|
||||
STR r5, [r12, #52] // Save r5
|
||||
STR r6, [r12, #56] // Save r6
|
||||
STR r7, [r12, #60] // Save r7
|
||||
STR r8, [r12, #64] // Save r8
|
||||
STR r9, [r12, #68] // Save r9
|
||||
STR r10,[r12, #72] // Save r10
|
||||
STR r11,[r12, #76] // Save r11
|
||||
LDR r0, [r1, #16] // Pickup saved r12
|
||||
STR r0, [r12, #80] // Save r12
|
||||
LDR r0, [r1, #20] // Pickup saved lr
|
||||
STR r0, [r12, #84] // Save lr
|
||||
LDR r0, [r1, #24] // Pickup instruction address at point of fault
|
||||
STR r0, [r12, #4] // Save point of fault
|
||||
LDR r0, [r1, #28] // Pickup xPSR
|
||||
STR r0, [r12, #88] // Save xPSR
|
||||
|
||||
MRS r0, CONTROL // Pickup current CONTROL register
|
||||
BIC r0, r0, #1 // Clear the UNPRIV bit
|
||||
MSR CONTROL, r0 // Setup new CONTROL register
|
||||
|
||||
LDR r0, =0xE000ED28 // Build the Memory Management Fault Status Register (MMFSR)
|
||||
LDRB r1, [r0] // Pickup the MMFSR, with the following bit definitions:
|
||||
// Bit 0 = 1 -> Instruction address violation
|
||||
// Bit 1 = 1 -> Load/store address violation
|
||||
// Bit 7 = 1 -> MMFAR is valid
|
||||
STRB r1, [r0] // Clear the MMFSR
|
||||
|
||||
BL _txm_module_manager_memory_fault_handler // Call memory manager fault handler
|
||||
|
||||
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
|
||||
/* Call the thread exit function to indicate the thread is no longer executing. */
|
||||
|
||||
CPSID i // Disable interrupts
|
||||
BL _tx_execution_thread_exit // Call the thread exit function
|
||||
CPSIE i // Enable interrupts
|
||||
#endif
|
||||
|
||||
MOV r1, #0 // Build NULL value
|
||||
LDR r0, =_tx_thread_current_ptr // Pickup address of current thread pointer
|
||||
STR r1, [r0] // Clear current thread pointer
|
||||
|
||||
// Return from MemManage_Handler exception
|
||||
LDR r0, =0xE000ED04 // Load ICSR
|
||||
LDR r1, =0x10000000 // Set PENDSVSET bit
|
||||
STR r1, [r0] // Store ICSR
|
||||
DSB // Wait for memory access to complete
|
||||
CPSIE i // Enable interrupts
|
||||
MOV lr, #0xFFFFFFFD // Load exception return code
|
||||
BX lr // Return from exception
|
||||
|
||||
|
||||
/* Generic context PendSV handler. */
|
||||
|
||||
.global PendSV_Handler
|
||||
.global __tx_PendSVHandler
|
||||
.syntax unified
|
||||
.thumb_func
|
||||
PendSV_Handler:
|
||||
.thumb_func
|
||||
__tx_PendSVHandler:
|
||||
|
||||
/* Get current thread value and new thread pointer. */
|
||||
|
||||
__tx_ts_handler:
|
||||
|
||||
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
|
||||
/* Call the thread exit function to indicate the thread is no longer executing. */
|
||||
|
||||
CPSID i // Disable interrupts
|
||||
PUSH {r0, lr} // Save LR (and r0 just for alignment)
|
||||
BL _tx_execution_thread_exit // Call the thread exit function
|
||||
POP {r0, lr} // Recover LR
|
||||
CPSIE i // Enable interrupts
|
||||
#endif
|
||||
|
||||
LDR r0, =_tx_thread_current_ptr // Build current thread pointer address
|
||||
LDR r2, =_tx_thread_execute_ptr // Build execute thread pointer address
|
||||
MOV r3, #0 // Build NULL value
|
||||
LDR r1, [r0] // Pickup current thread pointer
|
||||
|
||||
/* Determine if there is a current thread to finish preserving. */
|
||||
|
||||
CBZ r1, __tx_ts_new // If NULL, skip preservation
|
||||
|
||||
/* Recover PSP and preserve current thread context. */
|
||||
|
||||
STR r3, [r0] // Set _tx_thread_current_ptr to NULL
|
||||
MRS r12, PSP // Pickup PSP pointer (thread's stack pointer)
|
||||
STMDB r12!, {r4-r11} // Save its remaining registers
|
||||
LDR r4, =_tx_timer_time_slice // Build address of time-slice variable
|
||||
STMDB r12!, {LR} // Save LR on the stack
|
||||
|
||||
/* Determine if time-slice is active. If it isn't, skip time handling processing. */
|
||||
|
||||
LDR r5, [r4] // Pickup current time-slice
|
||||
STR r12, [r1, #8] // Save the thread stack pointer
|
||||
CBZ r5, __tx_ts_new // If not active, skip processing
|
||||
|
||||
/* Time-slice is active, save the current thread's time-slice and clear the global time-slice variable. */
|
||||
|
||||
STR r5, [r1, #24] // Save current time-slice
|
||||
|
||||
/* Clear the global time-slice. */
|
||||
|
||||
STR r3, [r4] // Clear time-slice
|
||||
|
||||
/* Executing thread is now completely preserved!!! */
|
||||
|
||||
__tx_ts_new:
|
||||
|
||||
/* Now we are looking for a new thread to execute! */
|
||||
|
||||
CPSID i // Disable interrupts
|
||||
LDR r1, [r2] // Is there another thread ready to execute?
|
||||
CBZ r1, __tx_ts_wait // No, skip to the wait processing
|
||||
|
||||
/* Yes, another thread is ready for else, make the current thread the new thread. */
|
||||
|
||||
STR r1, [r0] // Setup the current thread pointer to the new thread
|
||||
CPSIE i // Enable interrupts
|
||||
|
||||
/* Increment the thread run count. */
|
||||
|
||||
__tx_ts_restore:
|
||||
LDR r7, [r1, #4] // Pickup the current thread run count
|
||||
LDR r4, =_tx_timer_time_slice // Build address of time-slice variable
|
||||
LDR r5, [r1, #24] // Pickup thread's current time-slice
|
||||
ADD r7, r7, #1 // Increment the thread run count
|
||||
STR r7, [r1, #4] // Store the new run count
|
||||
|
||||
/* Setup global time-slice with thread's current time-slice. */
|
||||
|
||||
STR r5, [r4] // Setup global time-slice
|
||||
|
||||
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
|
||||
|
||||
/* Call the thread entry function to indicate the thread is executing. */
|
||||
|
||||
PUSH {r0, r1} // Save r0 and r1
|
||||
BL _tx_execution_thread_enter // Call the thread execution enter function
|
||||
POP {r0, r1} // Recover r0 and r1
|
||||
#endif
|
||||
|
||||
/* Restore the thread context and PSP. */
|
||||
|
||||
LDR r12, [r1, #8] // Pickup thread's stack pointer
|
||||
|
||||
MRS r5, CONTROL // Pickup current CONTROL register
|
||||
LDR r4, [r1, #0x98] // Pickup current user mode flag
|
||||
BIC r5, r5, #1 // Clear the UNPRIV bit
|
||||
ORR r4, r4, r5 // Build new CONTROL register
|
||||
MSR CONTROL, r4 // Setup new CONTROL register
|
||||
|
||||
LDR r0, =0xE000ED94 // Build MPU control reg address
|
||||
MOV r3, #0 // Build disable value
|
||||
STR r3, [r0] // Disable MPU
|
||||
LDR r0, [r1, #0x90] // Pickup the module instance pointer
|
||||
CBZ r0, skip_mpu_setup // Is this thread owned by a module? No, skip MPU setup
|
||||
LDR r1, [r0, #0x64] // Pickup MPU register[0]
|
||||
CBZ r1, skip_mpu_setup // Is protection required for this module? No, skip MPU setup
|
||||
LDR r1, =0xE000ED9C // Build address of MPU base register
|
||||
|
||||
// Use alias registers to quickly load MPU
|
||||
ADD r0, r0, #100 // Build address of MPU register start in thread control block
|
||||
LDM r0!,{r2-r9} // Load first four MPU regions
|
||||
STM r1,{r2-r9} // Store first four MPU regions
|
||||
LDM r0,{r2-r9} // Load second four MPU regions
|
||||
STM r1,{r2-r9} // Store second four MPU regions
|
||||
LDR r0, =0xE000ED94 // Build MPU control reg address
|
||||
MOV r1, #5 // Build enable value with background region enabled
|
||||
STR r1, [r0] // Enable MPU
|
||||
skip_mpu_setup:
|
||||
LDMIA r12!, {LR} // Pickup LR
|
||||
LDMIA r12!, {r4-r11} // Recover thread's registers
|
||||
MSR PSP, r12 // Setup the thread's stack pointer
|
||||
|
||||
/* Return to thread. */
|
||||
|
||||
BX lr // Return to thread!
|
||||
|
||||
/* The following is the idle wait processing... in this case, no threads are ready for execution and the
|
||||
system will simply be idle until an interrupt occurs that makes a thread ready. Note that interrupts
|
||||
are disabled to allow use of WFI for waiting for a thread to arrive. */
|
||||
|
||||
__tx_ts_wait:
|
||||
CPSID i // Disable interrupts
|
||||
LDR r1, [r2] // Pickup the next thread to execute pointer
|
||||
STR r1, [r0] // Store it in the current pointer
|
||||
CBNZ r1, __tx_ts_ready // If non-NULL, a new thread is ready!
|
||||
#ifdef TX_ENABLE_WFI
|
||||
DSB // Ensure no outstanding memory transactions
|
||||
WFI // Wait for interrupt
|
||||
ISB // Ensure pipeline is flushed
|
||||
#endif
|
||||
CPSIE i // Enable interrupts
|
||||
B __tx_ts_wait // Loop to continue waiting
|
||||
|
||||
/* At this point, we have a new thread ready to go. Clear any newly pended PendSV - since we are
|
||||
already in the handler! */
|
||||
|
||||
__tx_ts_ready:
|
||||
MOV r7, #0x08000000 // Build clear PendSV value
|
||||
MOV r8, #0xE000E000 // Build base NVIC address
|
||||
STR r7, [r8, #0xD04] // Clear any PendSV
|
||||
|
||||
/* Re-enable interrupts and restore new thread. */
|
||||
|
||||
CPSIE i // Enable interrupts
|
||||
B __tx_ts_restore // Restore the thread
|
||||
|
||||
|
||||
/* SVC Handler. */
|
||||
|
||||
.global SVC_Handler
|
||||
.global __tx_SVCallHandler
|
||||
.syntax unified
|
||||
.thumb_func
|
||||
SVC_Handler:
|
||||
.thumb_func
|
||||
__tx_SVCallHandler:
|
||||
|
||||
MRS r0, PSP // Pickup the PSP stack
|
||||
LDR r1, [r0, #24] // Pickup the point of interrupt
|
||||
LDRB r2, [r1, #-2] // Pickup the SVC parameter
|
||||
|
||||
/* Determine which SVC trap we are processing */
|
||||
|
||||
CMP r2, #1 // Is it the entry into ThreadX?
|
||||
BNE _tx_thread_user_return // No, return to user mode
|
||||
|
||||
/* At this point we have an SVC 1, which means we are entering
|
||||
the kernel from a module thread with user mode selected. */
|
||||
|
||||
LDR r2, =_txm_module_priv // Load address of where we should have come from
|
||||
CMP r1, r2 // Did we come from user_mode_entry?
|
||||
IT NE // If no (not equal), then...
|
||||
BXNE lr // return from where we came.
|
||||
|
||||
LDR r3, [r0, #20] // This is the saved LR
|
||||
LDR r1, =_tx_thread_current_ptr // Build current thread pointer address
|
||||
LDR r2, [r1] // Pickup current thread pointer
|
||||
MOV r1, #0 // Build clear value
|
||||
STR r1, [r2, #0x98] // Clear the current user mode selection for thread
|
||||
STR r3, [r2, #0xA0] // Save the original LR in thread control block
|
||||
|
||||
/* If there is memory protection, use kernel stack */
|
||||
LDR r0, [r2, #0x90] // Load the module instance ptr
|
||||
LDR r0, [r0, #0x0C] // Load the module property flags
|
||||
TST r0, #2 // Check if memory protected
|
||||
BEQ _tx_skip_kernel_stack_enter
|
||||
|
||||
/* Switch to the module thread's kernel stack */
|
||||
LDR r0, [r2, #0xA8] // Load the module kernel stack end
|
||||
#ifndef TXM_MODULE_KERNEL_STACK_MAINTENANCE_DISABLE
|
||||
LDR r1, [r2, #0xA4] // Load the module kernel stack start
|
||||
LDR r3, [r2, #0xAC] // Load the module kernel stack size
|
||||
STR r1, [r2, #12] // Set stack start
|
||||
STR r0, [r2, #16] // Set stack end
|
||||
STR r3, [r2, #20] // Set stack size
|
||||
#endif
|
||||
|
||||
MRS r3, PSP // Pickup thread stack pointer
|
||||
STR r3, [r2, #0xB0] // Save thread stack pointer
|
||||
|
||||
/* Build kernel stack by copying thread stack two registers at a time */
|
||||
ADD r3, r3, #32 // Start at bottom of hardware stack
|
||||
LDMDB r3!,{r1-r2}
|
||||
STMDB r0!,{r1-r2}
|
||||
LDMDB r3!,{r1-r2}
|
||||
STMDB r0!,{r1-r2}
|
||||
LDMDB r3!,{r1-r2}
|
||||
STMDB r0!,{r1-r2}
|
||||
LDMDB r3!,{r1-r2}
|
||||
STMDB r0!,{r1-r2}
|
||||
|
||||
MSR PSP, r0 // Set kernel stack pointer
|
||||
|
||||
_tx_skip_kernel_stack_enter:
|
||||
MRS r0, CONTROL // Pickup current CONTROL register
|
||||
BIC r0, r0, #1 // Clear the UNPRIV bit
|
||||
MSR CONTROL, r0 // Setup new CONTROL register
|
||||
BX lr // Return to thread
|
||||
|
||||
_tx_thread_user_return:
|
||||
LDR r2, =_txm_module_user_mode_exit // Load address of where we should have come from
|
||||
CMP r1, r2 // Did we come from user_mode_exit?
|
||||
IT NE // If no (not equal), then...
|
||||
BXNE lr // return from where we came
|
||||
|
||||
LDR r1, =_tx_thread_current_ptr // Build current thread pointer address
|
||||
LDR r2, [r1] // Pickup current thread pointer
|
||||
LDR r1, [r2, #0x9C] // Pick up user mode
|
||||
STR r1, [r2, #0x98] // Set the current user mode selection for thread
|
||||
|
||||
/* If there is memory protection, use kernel stack */
|
||||
LDR r0, [r2, #0x90] // Load the module instance ptr
|
||||
LDR r0, [r0, #0x0C] // Load the module property flags
|
||||
TST r0, #2 // Check if memory protected
|
||||
BEQ _tx_skip_kernel_stack_exit
|
||||
|
||||
#ifndef TXM_MODULE_KERNEL_STACK_MAINTENANCE_DISABLE
|
||||
LDR r0, [r2, #0xB4] // Load the module thread stack start
|
||||
LDR r1, [r2, #0xB8] // Load the module thread stack end
|
||||
LDR r3, [r2, #0xBC] // Load the module thread stack size
|
||||
STR r0, [r2, #12] // Set stack start
|
||||
STR r1, [r2, #16] // Set stack end
|
||||
STR r3, [r2, #20] // Set stack size
|
||||
#endif
|
||||
LDR r0, [r2, #0xB0] // Load the module thread stack pointer
|
||||
MRS r3, PSP // Pickup kernel stack pointer
|
||||
|
||||
/* Copy kernel hardware stack to module thread stack. */
|
||||
LDM r3!,{r1-r2}
|
||||
STM r0!,{r1-r2}
|
||||
LDM r3!,{r1-r2}
|
||||
STM r0!,{r1-r2}
|
||||
LDM r3!,{r1-r2}
|
||||
STM r0!,{r1-r2}
|
||||
LDM r3!,{r1-r2}
|
||||
STM r0!,{r1-r2}
|
||||
SUB r0, r0, #32 // Subtract 32 to get back to top of stack
|
||||
MSR PSP, r0 // Set thread stack pointer
|
||||
|
||||
LDR r1, =_tx_thread_current_ptr // Build current thread pointer address
|
||||
LDR r2, [r1] // Pickup current thread pointer
|
||||
LDR r1, [r2, #0x9C] // Pick up user mode
|
||||
|
||||
_tx_skip_kernel_stack_exit:
|
||||
MRS r0, CONTROL // Pickup current CONTROL register
|
||||
ORR r0, r0, r1 // OR in the user mode bit
|
||||
MSR CONTROL, r0 // Setup new CONTROL register
|
||||
BX lr // Return to thread
|
||||
|
||||
|
||||
/* Kernel entry function from user mode. */
|
||||
|
||||
.global _txm_module_manager_kernel_dispatch
|
||||
.align 5
|
||||
.syntax unified
|
||||
// VOID _txm_module_manager_user_mode_entry(VOID)
|
||||
// {
|
||||
.global _txm_module_manager_user_mode_entry
|
||||
.thumb_func
|
||||
_txm_module_manager_user_mode_entry:
|
||||
SVC 1 // Enter kernel
|
||||
_txm_module_priv:
|
||||
/* At this point, we are out of user mode. The original LR has been saved in the
|
||||
thread control block. Simply call the kernel dispatch function. */
|
||||
BL _txm_module_manager_kernel_dispatch
|
||||
|
||||
/* Pickup the original LR value while still in privileged mode */
|
||||
LDR r2, =_tx_thread_current_ptr // Build current thread pointer address
|
||||
LDR r3, [r2] // Pickup current thread pointer
|
||||
LDR lr, [r3, #0xA0] // Pickup saved LR from original call
|
||||
|
||||
SVC 2 // Exit kernel and return to user mode
|
||||
_txm_module_user_mode_exit:
|
||||
BX lr // Return to the caller
|
||||
NOP
|
||||
NOP
|
||||
NOP
|
||||
NOP
|
||||
// }
|
||||
@@ -0,0 +1,135 @@
|
||||
@/**************************************************************************/
|
||||
@/* */
|
||||
@/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
@/* */
|
||||
@/* This software is licensed under the Microsoft Software License */
|
||||
@/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
@/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
@/* and in the root directory of this software. */
|
||||
@/* */
|
||||
@/**************************************************************************/
|
||||
@
|
||||
@
|
||||
@/**************************************************************************/
|
||||
@/**************************************************************************/
|
||||
@/** */
|
||||
@/** ThreadX Component */
|
||||
@/** */
|
||||
@/** Thread */
|
||||
@/** */
|
||||
@/**************************************************************************/
|
||||
@/**************************************************************************/
|
||||
@
|
||||
@
|
||||
.text
|
||||
.align 4
|
||||
.syntax unified
|
||||
@/**************************************************************************/
|
||||
@/* */
|
||||
@/* FUNCTION RELEASE */
|
||||
@/* */
|
||||
@/* _tx_thread_stack_build Cortex-M3/GNU */
|
||||
@/* 6.1 */
|
||||
@/* AUTHOR */
|
||||
@/* */
|
||||
@/* William E. Lamie, Microsoft Corporation */
|
||||
@/* */
|
||||
@/* DESCRIPTION */
|
||||
@/* */
|
||||
@/* This function builds a stack frame on the supplied thread's stack. */
|
||||
@/* The stack frame results in a fake interrupt return to the supplied */
|
||||
@/* function pointer. */
|
||||
@/* */
|
||||
@/* INPUT */
|
||||
@/* */
|
||||
@/* thread_ptr Pointer to thread control blk */
|
||||
@/* function_ptr Pointer to return function */
|
||||
@/* */
|
||||
@/* OUTPUT */
|
||||
@/* */
|
||||
@/* None */
|
||||
@/* */
|
||||
@/* CALLS */
|
||||
@/* */
|
||||
@/* None */
|
||||
@/* */
|
||||
@/* CALLED BY */
|
||||
@/* */
|
||||
@/* _tx_thread_create Create thread service */
|
||||
@/* */
|
||||
@/* RELEASE HISTORY */
|
||||
@/* */
|
||||
@/* DATE NAME DESCRIPTION */
|
||||
@/* */
|
||||
@/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
@/* */
|
||||
@/**************************************************************************/
|
||||
@VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID))
|
||||
@{
|
||||
.global _tx_thread_stack_build
|
||||
.thumb_func
|
||||
_tx_thread_stack_build:
|
||||
@
|
||||
@
|
||||
@ /* Build a fake interrupt frame. The form of the fake interrupt stack
|
||||
@ on the Cortex-M3 should look like the following after it is built:
|
||||
@
|
||||
@ Stack Top:
|
||||
@ LR Interrupted LR (LR at time of PENDSV)
|
||||
@ r4 Initial value for r4
|
||||
@ r5 Initial value for r5
|
||||
@ r6 Initial value for r6
|
||||
@ r7 Initial value for r7
|
||||
@ r8 Initial value for r8
|
||||
@ r9 Initial value for r9
|
||||
@ r10 Initial value for r10
|
||||
@ r11 Initial value for r11
|
||||
@ r0 Initial value for r0 (Hardware stack starts here!!)
|
||||
@ r1 Initial value for r1
|
||||
@ r2 Initial value for r2
|
||||
@ r3 Initial value for r3
|
||||
@ r12 Initial value for r12
|
||||
@ lr Initial value for lr
|
||||
@ pc Initial value for pc
|
||||
@ xPSR Initial value for xPSR
|
||||
@
|
||||
@ Stack Bottom: (higher memory address) */
|
||||
@
|
||||
LDR r2, [r0, #16] @ Pickup end of stack area
|
||||
BIC r2, r2, #0x7 @ Align frame
|
||||
SUB r2, r2, #68 @ Subtract frame size
|
||||
LDR r3, =0xFFFFFFFD @ Build initial LR value
|
||||
STR r3, [r2, #0] @ Save on the stack
|
||||
@
|
||||
@ /* Actually build the stack frame. */
|
||||
@
|
||||
MOV r3, #0 @ Build initial register value
|
||||
STR r3, [r2, #4] @ Store initial r4
|
||||
STR r3, [r2, #8] @ Store initial r5
|
||||
STR r3, [r2, #12] @ Store initial r6
|
||||
STR r3, [r2, #16] @ Store initial r7
|
||||
STR r3, [r2, #20] @ Store initial r8
|
||||
STR r3, [r2, #24] @ Store initial r9
|
||||
STR r3, [r2, #28] @ Store initial r10
|
||||
STR r3, [r2, #32] @ Store initial r11
|
||||
@
|
||||
@ /* Hardware stack follows. */
|
||||
@
|
||||
STR r3, [r2, #36] @ Store initial r0
|
||||
STR r3, [r2, #40] @ Store initial r1
|
||||
STR r3, [r2, #44] @ Store initial r2
|
||||
STR r3, [r2, #48] @ Store initial r3
|
||||
STR r3, [r2, #52] @ Store initial r12
|
||||
MOV r3, #0xFFFFFFFF @ Poison EXC_RETURN value
|
||||
STR r3, [r2, #56] @ Store initial lr
|
||||
STR r1, [r2, #60] @ Store initial pc
|
||||
MOV r3, #0x01000000 @ Only T-bit need be set
|
||||
STR r3, [r2, #64] @ Store initial xPSR
|
||||
@
|
||||
@ /* Setup stack pointer. */
|
||||
@ thread_ptr -> tx_thread_stack_ptr = r2;
|
||||
@
|
||||
STR r2, [r0, #8] @ Save stack pointer in thread's
|
||||
@ control block
|
||||
BX lr @ Return to caller
|
||||
@}
|
||||
@@ -0,0 +1,88 @@
|
||||
@/**************************************************************************/
|
||||
@/* */
|
||||
@/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
@/* */
|
||||
@/* This software is licensed under the Microsoft Software License */
|
||||
@/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
@/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
@/* and in the root directory of this software. */
|
||||
@/* */
|
||||
@/**************************************************************************/
|
||||
@
|
||||
@
|
||||
@/**************************************************************************/
|
||||
@/**************************************************************************/
|
||||
@/** */
|
||||
@/** ThreadX Component */
|
||||
@/** */
|
||||
@/** Thread */
|
||||
@/** */
|
||||
@/**************************************************************************/
|
||||
@/**************************************************************************/
|
||||
|
||||
|
||||
.text 32
|
||||
.align 4
|
||||
.syntax unified
|
||||
@/**************************************************************************/
|
||||
@/* */
|
||||
@/* FUNCTION RELEASE */
|
||||
@/* */
|
||||
@/* _tx_thread_system_return Cortex-M3/GNU */
|
||||
@/* 6.1 */
|
||||
@/* AUTHOR */
|
||||
@/* */
|
||||
@/* William E. Lamie, Microsoft Corporation */
|
||||
@/* */
|
||||
@/* DESCRIPTION */
|
||||
@/* */
|
||||
@/* This function is target processor specific. It is used to transfer */
|
||||
@/* control from a thread back to the ThreadX system. Only a */
|
||||
@/* minimal context is saved since the compiler assumes temp registers */
|
||||
@/* are going to get slicked by a function call anyway. */
|
||||
@/* */
|
||||
@/* INPUT */
|
||||
@/* */
|
||||
@/* None */
|
||||
@/* */
|
||||
@/* OUTPUT */
|
||||
@/* */
|
||||
@/* None */
|
||||
@/* */
|
||||
@/* CALLS */
|
||||
@/* */
|
||||
@/* _tx_thread_schedule Thread scheduling loop */
|
||||
@/* */
|
||||
@/* CALLED BY */
|
||||
@/* */
|
||||
@/* ThreadX components */
|
||||
@/* */
|
||||
@/* RELEASE HISTORY */
|
||||
@/* */
|
||||
@/* DATE NAME DESCRIPTION */
|
||||
@/* */
|
||||
@/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
@/* */
|
||||
@/**************************************************************************/
|
||||
@/* VOID _tx_thread_system_return(VOID)
|
||||
@{ */
|
||||
.thumb_func
|
||||
.global _tx_thread_system_return
|
||||
_tx_thread_system_return:
|
||||
@
|
||||
@ /* Return to real scheduler via PendSV. Note that this routine is often
|
||||
@ replaced with in-line assembly in tx_port.h to improved performance. */
|
||||
@
|
||||
MOV r0, #0x10000000 @ Load PENDSVSET bit
|
||||
MOV r1, #0xE000E000 @ Load NVIC base
|
||||
STR r0, [r1, #0xD04] @ Set PENDSVBIT in ICSR
|
||||
MRS r0, IPSR @ Pickup IPSR
|
||||
CMP r0, #0 @ Is it a thread returning?
|
||||
BNE _isr_context @ If ISR, skip interrupt enable
|
||||
MRS r1, PRIMASK @ Thread context returning, pickup PRIMASK
|
||||
CPSIE i @ Enable interrupts
|
||||
MSR PRIMASK, r1 @ Restore original interrupt posture
|
||||
_isr_context:
|
||||
BX lr @ Return to caller
|
||||
|
||||
@/* } */
|
||||
@@ -0,0 +1,257 @@
|
||||
@/**************************************************************************/
|
||||
@/* */
|
||||
@/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
@/* */
|
||||
@/* This software is licensed under the Microsoft Software License */
|
||||
@/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
@/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
@/* and in the root directory of this software. */
|
||||
@/* */
|
||||
@/**************************************************************************/
|
||||
@
|
||||
@
|
||||
@/**************************************************************************/
|
||||
@/**************************************************************************/
|
||||
@/** */
|
||||
@/** ThreadX Component */
|
||||
@/** */
|
||||
@/** Timer */
|
||||
@/** */
|
||||
@/**************************************************************************/
|
||||
@/**************************************************************************/
|
||||
@
|
||||
@
|
||||
.global _tx_timer_time_slice
|
||||
.global _tx_timer_system_clock
|
||||
.global _tx_timer_current_ptr
|
||||
.global _tx_timer_list_start
|
||||
.global _tx_timer_list_end
|
||||
.global _tx_timer_expired_time_slice
|
||||
.global _tx_timer_expired
|
||||
.global _tx_thread_time_slice
|
||||
.global _tx_timer_expiration_process
|
||||
@
|
||||
@
|
||||
.text
|
||||
.align 4
|
||||
.syntax unified
|
||||
@/**************************************************************************/
|
||||
@/* */
|
||||
@/* FUNCTION RELEASE */
|
||||
@/* */
|
||||
@/* _tx_timer_interrupt Cortex-M3/GNU */
|
||||
@/* 6.1 */
|
||||
@/* AUTHOR */
|
||||
@/* */
|
||||
@/* William E. Lamie, Microsoft Corporation */
|
||||
@/* */
|
||||
@/* DESCRIPTION */
|
||||
@/* */
|
||||
@/* This function processes the hardware timer interrupt. This */
|
||||
@/* processing includes incrementing the system clock and checking for */
|
||||
@/* time slice and/or timer expiration. If either is found, the */
|
||||
@/* interrupt context save/restore functions are called along with the */
|
||||
@/* expiration functions. */
|
||||
@/* */
|
||||
@/* INPUT */
|
||||
@/* */
|
||||
@/* None */
|
||||
@/* */
|
||||
@/* OUTPUT */
|
||||
@/* */
|
||||
@/* None */
|
||||
@/* */
|
||||
@/* CALLS */
|
||||
@/* */
|
||||
@/* _tx_timer_expiration_process Timer expiration processing */
|
||||
@/* _tx_thread_time_slice Time slice interrupted thread */
|
||||
@/* */
|
||||
@/* CALLED BY */
|
||||
@/* */
|
||||
@/* interrupt vector */
|
||||
@/* */
|
||||
@/* RELEASE HISTORY */
|
||||
@/* */
|
||||
@/* DATE NAME DESCRIPTION */
|
||||
@/* */
|
||||
@/* 09-30-2020 William E. Lamie Initial Version 6.1 */
|
||||
@/* */
|
||||
@/**************************************************************************/
|
||||
@VOID _tx_timer_interrupt(VOID)
|
||||
@{
|
||||
.global _tx_timer_interrupt
|
||||
.thumb_func
|
||||
_tx_timer_interrupt:
|
||||
@
|
||||
@ /* Upon entry to this routine, it is assumed that context save has already
|
||||
@ been called, and therefore the compiler scratch registers are available
|
||||
@ for use. */
|
||||
@
|
||||
@ /* Increment the system clock. */
|
||||
@ _tx_timer_system_clock++;
|
||||
@
|
||||
LDR r1, =_tx_timer_system_clock @ Pickup address of system clock
|
||||
LDR r0, [r1, #0] @ Pickup system clock
|
||||
ADD r0, r0, #1 @ Increment system clock
|
||||
STR r0, [r1, #0] @ Store new system clock
|
||||
@
|
||||
@ /* Test for time-slice expiration. */
|
||||
@ if (_tx_timer_time_slice)
|
||||
@ {
|
||||
@
|
||||
LDR r3, =_tx_timer_time_slice @ Pickup address of time-slice
|
||||
LDR r2, [r3, #0] @ Pickup time-slice
|
||||
CMP r2, #0 @ Is it non-active?
|
||||
BEQ __tx_timer_no_time_slice @ Yes, skip time-slice processing
|
||||
@
|
||||
@ /* Decrement the time_slice. */
|
||||
@ _tx_timer_time_slice--;
|
||||
@
|
||||
SUB r2, r2, #1 @ Decrement the time-slice
|
||||
STR r2, [r3, #0] @ Store new time-slice value
|
||||
@
|
||||
@ /* Check for expiration. */
|
||||
@ if (__tx_timer_time_slice == 0)
|
||||
@
|
||||
CMP r2, #0 @ Has it expired?
|
||||
BNE __tx_timer_no_time_slice @ No, skip expiration processing
|
||||
@
|
||||
@ /* Set the time-slice expired flag. */
|
||||
@ _tx_timer_expired_time_slice = TX_TRUE;
|
||||
@
|
||||
LDR r3, =_tx_timer_expired_time_slice @ Pickup address of expired flag
|
||||
MOV r0, #1 @ Build expired value
|
||||
STR r0, [r3, #0] @ Set time-slice expiration flag
|
||||
@
|
||||
@ }
|
||||
@
|
||||
__tx_timer_no_time_slice:
|
||||
@
|
||||
@ /* Test for timer expiration. */
|
||||
@ if (*_tx_timer_current_ptr)
|
||||
@ {
|
||||
@
|
||||
LDR r1, =_tx_timer_current_ptr @ Pickup current timer pointer address
|
||||
LDR r0, [r1, #0] @ Pickup current timer
|
||||
LDR r2, [r0, #0] @ Pickup timer list entry
|
||||
CMP r2, #0 @ Is there anything in the list?
|
||||
BEQ __tx_timer_no_timer @ No, just increment the timer
|
||||
@
|
||||
@ /* Set expiration flag. */
|
||||
@ _tx_timer_expired = TX_TRUE;
|
||||
@
|
||||
LDR r3, =_tx_timer_expired @ Pickup expiration flag address
|
||||
MOV r2, #1 @ Build expired value
|
||||
STR r2, [r3, #0] @ Set expired flag
|
||||
B __tx_timer_done @ Finished timer processing
|
||||
@
|
||||
@ }
|
||||
@ else
|
||||
@ {
|
||||
__tx_timer_no_timer:
|
||||
@
|
||||
@ /* No timer expired, increment the timer pointer. */
|
||||
@ _tx_timer_current_ptr++;
|
||||
@
|
||||
ADD r0, r0, #4 @ Move to next timer
|
||||
@
|
||||
@ /* Check for wrap-around. */
|
||||
@ if (_tx_timer_current_ptr == _tx_timer_list_end)
|
||||
@
|
||||
LDR r3, =_tx_timer_list_end @ Pickup addr of timer list end
|
||||
LDR r2, [r3, #0] @ Pickup list end
|
||||
CMP r0, r2 @ Are we at list end?
|
||||
BNE __tx_timer_skip_wrap @ No, skip wrap-around logic
|
||||
@
|
||||
@ /* Wrap to beginning of list. */
|
||||
@ _tx_timer_current_ptr = _tx_timer_list_start;
|
||||
@
|
||||
LDR r3, =_tx_timer_list_start @ Pickup addr of timer list start
|
||||
LDR r0, [r3, #0] @ Set current pointer to list start
|
||||
@
|
||||
__tx_timer_skip_wrap:
|
||||
@
|
||||
STR r0, [r1, #0] @ Store new current timer pointer
|
||||
@ }
|
||||
@
|
||||
__tx_timer_done:
|
||||
@
|
||||
@
|
||||
@ /* See if anything has expired. */
|
||||
@ if ((_tx_timer_expired_time_slice) || (_tx_timer_expired))
|
||||
@ {
|
||||
@
|
||||
LDR r3, =_tx_timer_expired_time_slice @ Pickup addr of expired flag
|
||||
LDR r2, [r3, #0] @ Pickup time-slice expired flag
|
||||
CMP r2, #0 @ Did a time-slice expire?
|
||||
BNE __tx_something_expired @ If non-zero, time-slice expired
|
||||
LDR r1, =_tx_timer_expired @ Pickup addr of other expired flag
|
||||
LDR r0, [r1, #0] @ Pickup timer expired flag
|
||||
CMP r0, #0 @ Did a timer expire?
|
||||
BEQ __tx_timer_nothing_expired @ No, nothing expired
|
||||
@
|
||||
__tx_something_expired:
|
||||
@
|
||||
@
|
||||
STMDB sp!, {r0, lr} @ Save the lr register on the stack
|
||||
@ and save r0 just to keep 8-byte alignment
|
||||
@
|
||||
@ /* Did a timer expire? */
|
||||
@ if (_tx_timer_expired)
|
||||
@ {
|
||||
@
|
||||
LDR r1, =_tx_timer_expired @ Pickup addr of expired flag
|
||||
LDR r0, [r1, #0] @ Pickup timer expired flag
|
||||
CMP r0, #0 @ Check for timer expiration
|
||||
BEQ __tx_timer_dont_activate @ If not set, skip timer activation
|
||||
@
|
||||
@ /* Process timer expiration. */
|
||||
@ _tx_timer_expiration_process();
|
||||
@
|
||||
BL _tx_timer_expiration_process @ Call the timer expiration handling routine
|
||||
@
|
||||
@ }
|
||||
__tx_timer_dont_activate:
|
||||
@
|
||||
@ /* Did time slice expire? */
|
||||
@ if (_tx_timer_expired_time_slice)
|
||||
@ {
|
||||
@
|
||||
LDR r3, =_tx_timer_expired_time_slice @ Pickup addr of time-slice expired
|
||||
LDR r2, [r3, #0] @ Pickup the actual flag
|
||||
CMP r2, #0 @ See if the flag is set
|
||||
BEQ __tx_timer_not_ts_expiration @ No, skip time-slice processing
|
||||
@
|
||||
@ /* Time slice interrupted thread. */
|
||||
@ _tx_thread_time_slice();
|
||||
@
|
||||
BL _tx_thread_time_slice @ Call time-slice processing
|
||||
LDR r0, =_tx_thread_preempt_disable @ Build address of preempt disable flag
|
||||
LDR r1, [r0] @ Is the preempt disable flag set?
|
||||
CBNZ r1, __tx_timer_skip_time_slice @ Yes, skip the PendSV logic
|
||||
LDR r0, =_tx_thread_current_ptr @ Build current thread pointer address
|
||||
LDR r1, [r0] @ Pickup the current thread pointer
|
||||
LDR r2, =_tx_thread_execute_ptr @ Build execute thread pointer address
|
||||
LDR r3, [r2] @ Pickup the execute thread pointer
|
||||
LDR r0, =0xE000ED04 @ Build address of control register
|
||||
LDR r2, =0x10000000 @ Build value for PendSV bit
|
||||
CMP r1, r3 @ Are they the same?
|
||||
BEQ __tx_timer_skip_time_slice @ If the same, there was no time-slice performed
|
||||
STR r2, [r0] @ Not the same, issue the PendSV for preemption
|
||||
__tx_timer_skip_time_slice:
|
||||
@
|
||||
@ }
|
||||
@
|
||||
__tx_timer_not_ts_expiration:
|
||||
@
|
||||
LDMIA sp!, {r0, lr} @ Recover lr register (r0 is just there for
|
||||
@ the 8-byte stack alignment
|
||||
@
|
||||
@ }
|
||||
@
|
||||
__tx_timer_nothing_expired:
|
||||
|
||||
DSB @ Complete all memory access
|
||||
BX lr @ Return to caller
|
||||
@
|
||||
@}
|
||||
@@ -0,0 +1,399 @@
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
/* */
|
||||
/* This software is licensed under the Microsoft Software License */
|
||||
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
/* and in the root directory of this software. */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Module Manager */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
#define TX_SOURCE_CODE
|
||||
|
||||
#include "tx_api.h"
|
||||
#include "txm_module.h"
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_power_of_two_block_size Cortex-M3/MPU/GNU */
|
||||
/* 6.1 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function calculates a power of two size at or immediately above*/
|
||||
/* the input size and returns it to the caller. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* size Block size */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* calculated size Rounded up to power of two */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* _txm_module_manager_alignment_adjust Adjust alignment for Cortex-M */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
ULONG _txm_power_of_two_block_size(ULONG size)
|
||||
{
|
||||
/* Check for 0 size. */
|
||||
if(size == 0)
|
||||
return 0;
|
||||
|
||||
/* Minimum MPU block size is 32. */
|
||||
if(size <= 32)
|
||||
return 32;
|
||||
|
||||
/* Bit twiddling trick to round to next high power of 2
|
||||
(if original size is power of 2, it will return original size. Perfect!) */
|
||||
size--;
|
||||
size |= size >> 1;
|
||||
size |= size >> 2;
|
||||
size |= size >> 4;
|
||||
size |= size >> 8;
|
||||
size |= size >> 16;
|
||||
size++;
|
||||
|
||||
/* Return a power of 2 size at or above the input size. */
|
||||
return(size);
|
||||
}
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_alignment_adjust Cortex-M3/MPU/GNU */
|
||||
/* 6.1 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function adjusts the alignment and size of the code and data */
|
||||
/* section for a given module implementation. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* module_preamble Pointer to module preamble */
|
||||
/* code_size Size of the code area (updated) */
|
||||
/* code_alignment Code area alignment (updated) */
|
||||
/* data_size Size of data area (updated) */
|
||||
/* data_alignment Data area alignment (updated) */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* _txm_power_of_two_block_size Calculate power of two size */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Initial thread stack frame */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
VOID _txm_module_manager_alignment_adjust(TXM_MODULE_PREAMBLE *module_preamble,
|
||||
ULONG *code_size,
|
||||
ULONG *code_alignment,
|
||||
ULONG *data_size,
|
||||
ULONG *data_alignment)
|
||||
{
|
||||
|
||||
ULONG local_code_size;
|
||||
ULONG local_code_alignment;
|
||||
ULONG local_data_size;
|
||||
ULONG local_data_alignment;
|
||||
ULONG code_block_size;
|
||||
ULONG data_block_size;
|
||||
ULONG code_size_accum;
|
||||
ULONG data_size_accum;
|
||||
|
||||
/* Copy the input parameters into local variables for ease of use. */
|
||||
local_code_size = *code_size;
|
||||
local_code_alignment = *code_alignment;
|
||||
local_data_size = *data_size;
|
||||
local_data_alignment = *data_alignment;
|
||||
|
||||
|
||||
/* Test for external memory enabled in preamble. */
|
||||
if(module_preamble -> txm_module_preamble_property_flags & TXM_MODULE_SHARED_EXTERNAL_MEMORY_ACCESS)
|
||||
{
|
||||
/* External/shared memory enabled. TXM_MODULE_MANAGER_CODE_MPU_ENTRIES-1 code entries will be used. */
|
||||
if (local_code_size <= (32*(TXM_MODULE_MANAGER_CODE_MPU_ENTRIES - 1)))
|
||||
{
|
||||
/* Block size of 32 is best. */
|
||||
code_block_size = 32;
|
||||
}
|
||||
else if (local_code_size <= (64*(TXM_MODULE_MANAGER_CODE_MPU_ENTRIES - 1)))
|
||||
{
|
||||
/* Block size of 64 is best. */
|
||||
code_block_size = 64;
|
||||
}
|
||||
else if (local_code_size <= (128*(TXM_MODULE_MANAGER_CODE_MPU_ENTRIES - 1)))
|
||||
{
|
||||
/* Block size of 128 is best. */
|
||||
code_block_size = 128;
|
||||
}
|
||||
else if (local_code_size <= (256*(TXM_MODULE_MANAGER_CODE_MPU_ENTRIES - 1)))
|
||||
{
|
||||
/* Block size of 256 is best. */
|
||||
code_block_size = 256;
|
||||
}
|
||||
else if (local_code_size <= (512*(TXM_MODULE_MANAGER_CODE_MPU_ENTRIES - 1)))
|
||||
{
|
||||
/* Block size of 512 is best. */
|
||||
code_block_size = 512;
|
||||
}
|
||||
else if (local_code_size <= (1024*(TXM_MODULE_MANAGER_CODE_MPU_ENTRIES - 1)))
|
||||
{
|
||||
/* Block size of 1024 is best. */
|
||||
code_block_size = 1024;
|
||||
}
|
||||
else if (local_code_size <= (2048*(TXM_MODULE_MANAGER_CODE_MPU_ENTRIES - 1)))
|
||||
{
|
||||
/* Block size of 2048 is best. */
|
||||
code_block_size = 2048;
|
||||
}
|
||||
else if (local_code_size <= (4096*(TXM_MODULE_MANAGER_CODE_MPU_ENTRIES - 1)))
|
||||
{
|
||||
/* Block size of 4096 is best. */
|
||||
code_block_size = 4096;
|
||||
}
|
||||
else if (local_code_size <= (8192*(TXM_MODULE_MANAGER_CODE_MPU_ENTRIES - 1)))
|
||||
{
|
||||
/* Block size of 8192 is best. */
|
||||
code_block_size = 8192;
|
||||
}
|
||||
else if (local_code_size <= (16384*(TXM_MODULE_MANAGER_CODE_MPU_ENTRIES - 1)))
|
||||
{
|
||||
/* Block size of 16384 is best. */
|
||||
code_block_size = 16384;
|
||||
}
|
||||
else if (local_code_size <= (32768*(TXM_MODULE_MANAGER_CODE_MPU_ENTRIES - 1)))
|
||||
{
|
||||
/* Block size of 32768 is best. */
|
||||
code_block_size = 32768;
|
||||
}
|
||||
else if (local_code_size <= (65536*(TXM_MODULE_MANAGER_CODE_MPU_ENTRIES - 1)))
|
||||
{
|
||||
/* Block size of 65536 is best. */
|
||||
code_block_size = 65536;
|
||||
}
|
||||
else if (local_code_size <= (131072*(TXM_MODULE_MANAGER_CODE_MPU_ENTRIES - 1)))
|
||||
{
|
||||
/* Block size of 131072 is best. */
|
||||
code_block_size = 131072;
|
||||
}
|
||||
else if (local_code_size <= (262144*(TXM_MODULE_MANAGER_CODE_MPU_ENTRIES - 1)))
|
||||
{
|
||||
/* Block size of 262144 is best. */
|
||||
code_block_size = 262144;
|
||||
}
|
||||
else if (local_code_size <= (524288*(TXM_MODULE_MANAGER_CODE_MPU_ENTRIES - 1)))
|
||||
{
|
||||
/* Block size of 524288 is best. */
|
||||
code_block_size = 524288;
|
||||
}
|
||||
else if (local_code_size <= (1048576*(TXM_MODULE_MANAGER_CODE_MPU_ENTRIES - 1)))
|
||||
{
|
||||
/* Block size of 1048576 is best. */
|
||||
code_block_size = 1048576;
|
||||
}
|
||||
else if (local_code_size <= (2097152*(TXM_MODULE_MANAGER_CODE_MPU_ENTRIES - 1)))
|
||||
{
|
||||
/* Block size of 2097152 is best. */
|
||||
code_block_size = 2097152;
|
||||
}
|
||||
else if (local_code_size <= (4194304*(TXM_MODULE_MANAGER_CODE_MPU_ENTRIES - 1)))
|
||||
{
|
||||
/* Block size of 4194304 is best. */
|
||||
code_block_size = 4194304;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Just set block size to 32MB just to create an allocation error! */
|
||||
code_block_size = 33554432;
|
||||
}
|
||||
|
||||
/* Calculate the new code size. */
|
||||
local_code_size = code_block_size*(TXM_MODULE_MANAGER_CODE_MPU_ENTRIES - 1);
|
||||
|
||||
/* Determine if the code block size is greater than the current alignment. If so, use block size
|
||||
as the alignment. */
|
||||
if (code_block_size > local_code_alignment)
|
||||
local_code_alignment = code_block_size;
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Determine code block sizes. Minimize the alignment requirement.
|
||||
There are 4 MPU code entries available. The following is how the code size
|
||||
will be distributed:
|
||||
1. 1/4 of the largest power of two that is greater than or equal to code size.
|
||||
2. 1/4 of the largest power of two that is greater than or equal to code size.
|
||||
3. Largest power of 2 that fits in the remaining space.
|
||||
4. Smallest power of 2 that exceeds the remaining space, minimum 32. */
|
||||
local_code_alignment = _txm_power_of_two_block_size(local_code_size) >> 2;
|
||||
code_size_accum = local_code_alignment + local_code_alignment;
|
||||
code_size_accum = code_size_accum + (_txm_power_of_two_block_size(local_code_size - code_size_accum) >> 1);
|
||||
code_size_accum = code_size_accum + _txm_power_of_two_block_size(local_code_size - code_size_accum);
|
||||
local_code_size = code_size_accum;
|
||||
}
|
||||
|
||||
/* Determine the best data block size, which in our case is the minimal alignment. */
|
||||
if (local_data_size <= (32*TXM_MODULE_MANAGER_DATA_MPU_ENTRIES))
|
||||
{
|
||||
/* Block size of 32 is best. */
|
||||
data_block_size = 32;
|
||||
}
|
||||
else if (local_data_size <= (64*TXM_MODULE_MANAGER_DATA_MPU_ENTRIES))
|
||||
{
|
||||
/* Block size of 64 is best. */
|
||||
data_block_size = 64;
|
||||
}
|
||||
else if (local_data_size <= (128*TXM_MODULE_MANAGER_DATA_MPU_ENTRIES))
|
||||
{
|
||||
/* Block size of 128 is best. */
|
||||
data_block_size = 128;
|
||||
}
|
||||
else if (local_data_size <= (256*TXM_MODULE_MANAGER_DATA_MPU_ENTRIES))
|
||||
{
|
||||
/* Block size of 256 is best. */
|
||||
data_block_size = 256;
|
||||
}
|
||||
else if (local_data_size <= (512*TXM_MODULE_MANAGER_DATA_MPU_ENTRIES))
|
||||
{
|
||||
/* Block size of 512 is best. */
|
||||
data_block_size = 512;
|
||||
}
|
||||
else if (local_data_size <= (1024*TXM_MODULE_MANAGER_DATA_MPU_ENTRIES))
|
||||
{
|
||||
/* Block size of 1024 is best. */
|
||||
data_block_size = 1024;
|
||||
}
|
||||
else if (local_data_size <= (2048*TXM_MODULE_MANAGER_DATA_MPU_ENTRIES))
|
||||
{
|
||||
/* Block size of 2048 is best. */
|
||||
data_block_size = 2048;
|
||||
}
|
||||
else if (local_data_size <= (4096*TXM_MODULE_MANAGER_DATA_MPU_ENTRIES))
|
||||
{
|
||||
/* Block size of 4096 is best. */
|
||||
data_block_size = 4096;
|
||||
}
|
||||
else if (local_data_size <= (8192*TXM_MODULE_MANAGER_DATA_MPU_ENTRIES))
|
||||
{
|
||||
/* Block size of 8192 is best. */
|
||||
data_block_size = 8192;
|
||||
}
|
||||
else if (local_data_size <= (16384*TXM_MODULE_MANAGER_DATA_MPU_ENTRIES))
|
||||
{
|
||||
/* Block size of 16384 is best. */
|
||||
data_block_size = 16384;
|
||||
}
|
||||
else if (local_data_size <= (32768*TXM_MODULE_MANAGER_DATA_MPU_ENTRIES))
|
||||
{
|
||||
/* Block size of 32768 is best. */
|
||||
data_block_size = 32768;
|
||||
}
|
||||
else if (local_data_size <= (65536*TXM_MODULE_MANAGER_DATA_MPU_ENTRIES))
|
||||
{
|
||||
/* Block size of 65536 is best. */
|
||||
data_block_size = 65536;
|
||||
}
|
||||
else if (local_data_size <= (131072*TXM_MODULE_MANAGER_DATA_MPU_ENTRIES))
|
||||
{
|
||||
/* Block size of 131072 is best. */
|
||||
data_block_size = 131072;
|
||||
}
|
||||
else if (local_data_size <= (262144*TXM_MODULE_MANAGER_DATA_MPU_ENTRIES))
|
||||
{
|
||||
/* Block size of 262144 is best. */
|
||||
data_block_size = 262144;
|
||||
}
|
||||
else if (local_data_size <= (524288*TXM_MODULE_MANAGER_DATA_MPU_ENTRIES))
|
||||
{
|
||||
/* Block size of 524288 is best. */
|
||||
data_block_size = 524288;
|
||||
}
|
||||
else if (local_data_size <= (1048576*TXM_MODULE_MANAGER_DATA_MPU_ENTRIES))
|
||||
{
|
||||
/* Block size of 1048576 is best. */
|
||||
data_block_size = 1048576;
|
||||
}
|
||||
else if (local_data_size <= (2097152*TXM_MODULE_MANAGER_DATA_MPU_ENTRIES))
|
||||
{
|
||||
/* Block size of 2097152 is best. */
|
||||
data_block_size = 2097152;
|
||||
}
|
||||
else if (local_data_size <= (4194304*TXM_MODULE_MANAGER_DATA_MPU_ENTRIES))
|
||||
{
|
||||
/* Block size of 4194304 is best. */
|
||||
data_block_size = 4194304;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Just set data block size to 32MB just to create an allocation error! */
|
||||
data_block_size = 33554432;
|
||||
}
|
||||
|
||||
/* Calculate the new data size. */
|
||||
data_size_accum = data_block_size;
|
||||
while(data_size_accum < local_data_size)
|
||||
{
|
||||
data_size_accum += data_block_size;
|
||||
}
|
||||
local_data_size = data_size_accum;
|
||||
|
||||
/* Determine if the data block size is greater than the current alignment. If so, use block size
|
||||
as the alignment. */
|
||||
if (data_block_size > local_data_alignment)
|
||||
{
|
||||
local_data_alignment = data_block_size;
|
||||
}
|
||||
|
||||
/* Return all the information to the caller. */
|
||||
*code_size = local_code_size;
|
||||
*code_alignment = local_code_alignment;
|
||||
*data_size = local_data_size;
|
||||
*data_alignment = local_data_alignment;
|
||||
}
|
||||
@@ -0,0 +1,182 @@
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
/* */
|
||||
/* This software is licensed under the Microsoft Software License */
|
||||
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
/* and in the root directory of this software. */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Module Manager */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
#define TX_SOURCE_CODE
|
||||
|
||||
#include "tx_api.h"
|
||||
#include "tx_mutex.h"
|
||||
#include "tx_queue.h"
|
||||
#include "tx_thread.h"
|
||||
#include "txm_module.h"
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_external_memory_enable Cortex-M3/MPU/GNU */
|
||||
/* 6.1 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function creates an entry in the MPU table for a shared */
|
||||
/* memory space. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* module_instance Module instance pointer */
|
||||
/* start_address Start address of memory */
|
||||
/* length Length of external memory */
|
||||
/* attributes Memory attributes (r/w) */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* status Completion status */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* _tx_mutex_get Get protection mutex */
|
||||
/* _tx_mutex_put Release protection mutex */
|
||||
/* _txm_power_of_two_block_size Round length to power of two */
|
||||
/* _txm_module_manager_mm_register_setup Reconfigure MPU registers */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Application code */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
UINT _txm_module_manager_external_memory_enable(TXM_MODULE_INSTANCE *module_instance,
|
||||
VOID *start_address,
|
||||
ULONG length,
|
||||
UINT attributes)
|
||||
{
|
||||
|
||||
ULONG block_size;
|
||||
ULONG region_size;
|
||||
ULONG subregion_bits;
|
||||
ULONG address;
|
||||
UINT attributes_check = 0;
|
||||
TXM_MODULE_PREAMBLE *module_preamble;
|
||||
|
||||
/* Determine if the module manager has not been initialized yet. */
|
||||
if (_txm_module_manager_ready != TX_TRUE)
|
||||
{
|
||||
/* Module manager has not been initialized. */
|
||||
return(TX_NOT_AVAILABLE);
|
||||
}
|
||||
|
||||
/* Determine if the module is valid. */
|
||||
if (module_instance == TX_NULL)
|
||||
{
|
||||
/* Invalid module pointer. */
|
||||
return(TX_PTR_ERROR);
|
||||
}
|
||||
|
||||
/* Get module manager protection mutex. */
|
||||
_tx_mutex_get(&_txm_module_manager_mutex, TX_WAIT_FOREVER);
|
||||
|
||||
/* Determine if the module instance is valid. */
|
||||
if (module_instance -> txm_module_instance_id != TXM_MODULE_ID)
|
||||
{
|
||||
/* Release the protection mutex. */
|
||||
_tx_mutex_put(&_txm_module_manager_mutex);
|
||||
|
||||
/* Invalid module pointer. */
|
||||
return(TX_PTR_ERROR);
|
||||
}
|
||||
|
||||
/* Determine if the module instance is in the loaded state. */
|
||||
if (module_instance -> txm_module_instance_state != TXM_MODULE_LOADED)
|
||||
{
|
||||
/* Release the protection mutex. */
|
||||
_tx_mutex_put(&_txm_module_manager_mutex);
|
||||
|
||||
/* Return error if the module is not ready. */
|
||||
return(TX_START_ERROR);
|
||||
}
|
||||
|
||||
/* Check if preamble shared mem and mem protection property bits are set. */
|
||||
module_preamble = module_instance -> txm_module_instance_preamble_ptr;
|
||||
if((module_preamble -> txm_module_preamble_property_flags & (TXM_MODULE_MEMORY_PROTECTION | TXM_MODULE_SHARED_EXTERNAL_MEMORY_ACCESS))
|
||||
!= (TXM_MODULE_MEMORY_PROTECTION | TXM_MODULE_SHARED_EXTERNAL_MEMORY_ACCESS))
|
||||
{
|
||||
/* Release the protection mutex. */
|
||||
_tx_mutex_put(&_txm_module_manager_mutex);
|
||||
|
||||
/* Return error if bit not set. */
|
||||
return(TXM_MODULE_INVALID_PROPERTIES);
|
||||
}
|
||||
|
||||
/* Start address and length must adhere to Cortex-M MPU.
|
||||
The address must align with the block size. */
|
||||
|
||||
block_size = _txm_power_of_two_block_size(length);
|
||||
address = (ULONG) start_address;
|
||||
if(address != (address & ~(block_size - 1)))
|
||||
{
|
||||
/* Release the protection mutex. */
|
||||
_tx_mutex_put(&_txm_module_manager_mutex);
|
||||
|
||||
/* Return alignment error. */
|
||||
return(TXM_MODULE_ALIGNMENT_ERROR);
|
||||
}
|
||||
|
||||
/* At this point, we have a valid address and block size.
|
||||
Set up MPU registers. */
|
||||
module_instance -> txm_module_instance_mpu_registers[TXM_MODULE_MANAGER_SHARED_MPU_INDEX] = address | TXM_MODULE_MANAGER_SHARED_MPU_REGION | 0x10;
|
||||
|
||||
/* Calculate the region size. */
|
||||
region_size = (_txm_module_manager_region_size_get(block_size) << 1);
|
||||
/* Calculate the subregion bits. */
|
||||
subregion_bits = _txm_module_manager_calculate_srd_bits(block_size, length);
|
||||
|
||||
/* Check for valid attributes. */
|
||||
if(attributes & TXM_MODULE_MANAGER_SHARED_ATTRIBUTE_WRITE)
|
||||
{
|
||||
attributes_check = TXM_MODULE_MANAGER_ATTRIBUTE_WRITE_MPU_BIT;
|
||||
}
|
||||
|
||||
/* Build register with attributes. */
|
||||
module_instance -> txm_module_instance_mpu_registers[TXM_MODULE_MANAGER_SHARED_MPU_INDEX+1] = region_size | subregion_bits | attributes_check | 0x12070001;
|
||||
|
||||
/* Keep track of shared memory address and length in module instance. */
|
||||
module_instance -> txm_module_instance_shared_memory_address = address;
|
||||
module_instance -> txm_module_instance_shared_memory_length = length;
|
||||
|
||||
/* Recalculate MPU settings. */
|
||||
_txm_module_manager_mm_register_setup(module_instance);
|
||||
|
||||
/* Release the protection mutex. */
|
||||
_tx_mutex_put(&_txm_module_manager_mutex);
|
||||
|
||||
/* Return success. */
|
||||
return(TX_SUCCESS);
|
||||
}
|
||||
@@ -0,0 +1,110 @@
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
/* */
|
||||
/* This software is licensed under the Microsoft Software License */
|
||||
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
/* and in the root directory of this software. */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Module Manager */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
#define TX_SOURCE_CODE
|
||||
|
||||
#include "tx_api.h"
|
||||
#include "tx_thread.h"
|
||||
#include "txm_module.h"
|
||||
|
||||
|
||||
/* Define the user's fault notification callback function pointer. This is
|
||||
setup via the txm_module_manager_memory_fault_notify API. */
|
||||
|
||||
VOID (*_txm_module_manager_fault_notify)(TX_THREAD *, TXM_MODULE_INSTANCE *);
|
||||
|
||||
|
||||
/* Define a macro that can be used to allocate global variables useful to
|
||||
store information about the last fault. This macro is defined in
|
||||
txm_module_port.h and is usually populated in the assembly language
|
||||
fault handling prior to the code calling _txm_module_manager_memory_fault_handler. */
|
||||
|
||||
TXM_MODULE_MANAGER_FAULT_INFO
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_memory_fault_handler Cortex-M3/MPU/GNU */
|
||||
/* 6.1 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function handles a fault associated with a memory protected */
|
||||
/* module. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* _tx_thread_terminate Terminate thread */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Fault handler */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
VOID _txm_module_manager_memory_fault_handler(VOID)
|
||||
{
|
||||
|
||||
TXM_MODULE_INSTANCE *module_instance_ptr;
|
||||
TX_THREAD *thread_ptr;
|
||||
|
||||
/* Pickup the current thread. */
|
||||
thread_ptr = _tx_thread_current_ptr;
|
||||
|
||||
/* Initialize the module instance pointer to NULL. */
|
||||
module_instance_ptr = TX_NULL;
|
||||
|
||||
/* Is there a thread? */
|
||||
if (thread_ptr)
|
||||
{
|
||||
/* Pickup the module instance. */
|
||||
module_instance_ptr = thread_ptr -> tx_thread_module_instance_ptr;
|
||||
|
||||
/* Terminate the current thread. */
|
||||
_tx_thread_terminate(_tx_thread_current_ptr);
|
||||
}
|
||||
|
||||
/* Determine if there is a user memory fault notification callback. */
|
||||
if (_txm_module_manager_fault_notify)
|
||||
{
|
||||
/* Yes, call the user's notification memory fault callback. */
|
||||
(_txm_module_manager_fault_notify)(thread_ptr, module_instance_ptr);
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,84 @@
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
/* */
|
||||
/* This software is licensed under the Microsoft Software License */
|
||||
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
/* and in the root directory of this software. */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Module Manager */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
#define TX_SOURCE_CODE
|
||||
|
||||
#include "tx_api.h"
|
||||
#include "tx_thread.h"
|
||||
#include "txm_module.h"
|
||||
|
||||
|
||||
/* Define the external user's fault notification callback function pointer. This is
|
||||
setup via the txm_module_manager_memory_fault_notify API. */
|
||||
|
||||
extern VOID (*_txm_module_manager_fault_notify)(TX_THREAD *, TXM_MODULE_INSTANCE *);
|
||||
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_memory_fault_notify Cortex-M3/MPU/GNU */
|
||||
/* 6.1 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function registers an application callback when/if a memory */
|
||||
/* fault occurs. The supplied thread is automatically terminated, but */
|
||||
/* any other threads in the same module may still execute. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* notify_function Memory fault notification */
|
||||
/* function, NULL disables. */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* status Completion status */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* Application Code */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
UINT _txm_module_manager_memory_fault_notify(VOID (*notify_function)(TX_THREAD *, TXM_MODULE_INSTANCE *))
|
||||
{
|
||||
/* Setup notification function. */
|
||||
_txm_module_manager_fault_notify = notify_function;
|
||||
|
||||
/* Return success. */
|
||||
return(TX_SUCCESS);
|
||||
}
|
||||
@@ -0,0 +1,512 @@
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
/* */
|
||||
/* This software is licensed under the Microsoft Software License */
|
||||
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
/* and in the root directory of this software. */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Module Manager */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
#define TX_SOURCE_CODE
|
||||
|
||||
#include "tx_api.h"
|
||||
#include "txm_module.h"
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_region_size_get Cortex-M3/MPU/GNU */
|
||||
/* 6.1 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function converts the region size in bytes to the block size */
|
||||
/* for the Cortex-M3 MPU specification. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* block_size Size of the block in bytes */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* MPU size specification */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* _txm_module_manager_mm_register_setup */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
ULONG _txm_module_manager_region_size_get(ULONG block_size)
|
||||
{
|
||||
|
||||
ULONG return_value;
|
||||
|
||||
/* Process relative to the input block size. */
|
||||
if (block_size == 32)
|
||||
{
|
||||
return_value = 0x04;
|
||||
}
|
||||
else if (block_size == 64)
|
||||
{
|
||||
return_value = 0x05;
|
||||
}
|
||||
else if (block_size == 128)
|
||||
{
|
||||
return_value = 0x06;
|
||||
}
|
||||
else if (block_size == 256)
|
||||
{
|
||||
return_value = 0x07;
|
||||
}
|
||||
else if (block_size == 512)
|
||||
{
|
||||
return_value = 0x08;
|
||||
}
|
||||
else if (block_size == 1024)
|
||||
{
|
||||
return_value = 0x09;
|
||||
}
|
||||
else if (block_size == 2048)
|
||||
{
|
||||
return_value = 0x0A;
|
||||
}
|
||||
else if (block_size == 4096)
|
||||
{
|
||||
return_value = 0x0B;
|
||||
}
|
||||
else if (block_size == 8192)
|
||||
{
|
||||
return_value = 0x0C;
|
||||
}
|
||||
else if (block_size == 16384)
|
||||
{
|
||||
return_value = 0x0D;
|
||||
}
|
||||
else if (block_size == 32768)
|
||||
{
|
||||
return_value = 0x0E;
|
||||
}
|
||||
else if (block_size == 65536)
|
||||
{
|
||||
return_value = 0x0F;
|
||||
}
|
||||
else if (block_size == 131072)
|
||||
{
|
||||
return_value = 0x10;
|
||||
}
|
||||
else if (block_size == 262144)
|
||||
{
|
||||
return_value = 0x11;
|
||||
}
|
||||
else if (block_size == 524288)
|
||||
{
|
||||
return_value = 0x12;
|
||||
}
|
||||
else if (block_size == 1048576)
|
||||
{
|
||||
return_value = 0x13;
|
||||
}
|
||||
else if (block_size == 2097152)
|
||||
{
|
||||
return_value = 0x14;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Max 4MB MPU pages for modules. */
|
||||
return_value = 0x15;
|
||||
}
|
||||
|
||||
return(return_value);
|
||||
}
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_calculate_srd_bits Cortex-M3/MPU/GNU */
|
||||
/* 6.1 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function calculates the SRD bits that need to be set to */
|
||||
/* protect "length" bytes in a block. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* block_size Size of the block in bytes */
|
||||
/* length Actual length in bytes */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* SRD bits to be OR'ed with region attribute register. */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* _txm_module_manager_mm_register_setup */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
ULONG _txm_module_manager_calculate_srd_bits(ULONG block_size, ULONG length)
|
||||
{
|
||||
|
||||
ULONG srd_bits = 0;
|
||||
UINT srd_bit_index;
|
||||
|
||||
/* length is smaller than block_size, set SRD bits if block_size is 256 or more. */
|
||||
if((block_size >= 256) && (length < block_size))
|
||||
{
|
||||
/* Divide block_size by 8 by shifting right 3. Result is size of subregion. */
|
||||
block_size = block_size >> 3;
|
||||
|
||||
/* Set SRD index into attribute register. */
|
||||
srd_bit_index = 8;
|
||||
|
||||
/* If subregion overlaps length, move to the next subregion. */
|
||||
while(length > block_size)
|
||||
{
|
||||
length = length - block_size;
|
||||
srd_bit_index++;
|
||||
}
|
||||
/* Check for a portion of code remaining. */
|
||||
if(length)
|
||||
{
|
||||
srd_bit_index++;
|
||||
}
|
||||
|
||||
/* Set unused subregion bits. */
|
||||
while(srd_bit_index < 16)
|
||||
{
|
||||
srd_bits = srd_bits | (0x1 << srd_bit_index);
|
||||
srd_bit_index++;
|
||||
}
|
||||
}
|
||||
|
||||
return(srd_bits);
|
||||
}
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_mm_register_setup Cortex-M3/MPU/GNU */
|
||||
/* 6.1 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function sets up the Cortex-M3 MPU register definitions based */
|
||||
/* on the module's memory characteristics. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* module_instance Pointer to module instance */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* MPU specifications for module in module_instance */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* _txm_module_manager_region_size_get */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* _txm_module_manager_thread_create */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
VOID _txm_module_manager_mm_register_setup(TXM_MODULE_INSTANCE *module_instance)
|
||||
{
|
||||
|
||||
ULONG code_address;
|
||||
ULONG code_size;
|
||||
ULONG data_address;
|
||||
ULONG data_size;
|
||||
ULONG start_stop_stack_size;
|
||||
ULONG callback_stack_size;
|
||||
ULONG block_size;
|
||||
ULONG base_address_register;
|
||||
ULONG base_attribute_register;
|
||||
ULONG region_size;
|
||||
ULONG srd_bits = 0;
|
||||
UINT mpu_register = 0;
|
||||
UINT mpu_table_index;
|
||||
UINT i;
|
||||
|
||||
|
||||
/* Setup the first region for the ThreadX trampoline code. */
|
||||
/* Set base register to user mode entry, which is guaranteed to be at least 32-byte aligned. */
|
||||
base_address_register = (ULONG) _txm_module_manager_user_mode_entry;
|
||||
|
||||
/* Mask address to proper range, region 0, set Valid bit. */
|
||||
base_address_register = (base_address_register & 0xFFFFFFE0) | mpu_register | 0x10;
|
||||
module_instance -> txm_module_instance_mpu_registers[0] = base_address_register;
|
||||
|
||||
/* Attributes: read only, write-back, shareable, size 32 bytes, region enabled. */
|
||||
module_instance -> txm_module_instance_mpu_registers[1] = 0x06070009;
|
||||
|
||||
/* Initialize the MPU register. */
|
||||
mpu_register = 1;
|
||||
|
||||
/* Initialize the MPU table index. */
|
||||
mpu_table_index = 2;
|
||||
|
||||
/* Setup values for code area. */
|
||||
code_address = (ULONG) module_instance -> txm_module_instance_code_start;
|
||||
code_size = module_instance -> txm_module_instance_preamble_ptr -> txm_module_preamble_code_size;
|
||||
|
||||
/* Check if shared memory was set up. If so, only 3 entries are available for
|
||||
code protection. If not set up, 4 code entries are available. */
|
||||
if(module_instance -> txm_module_instance_mpu_registers[TXM_MODULE_MANAGER_SHARED_MPU_INDEX] == 0)
|
||||
{
|
||||
/* Determine code block sizes. Minimize the alignment requirement.
|
||||
There are 4 MPU code entries available. The following is how the code size
|
||||
will be distributed:
|
||||
1. 1/4 of the largest power of two that is greater than or equal to code size.
|
||||
2. 1/4 of the largest power of two that is greater than or equal to code size.
|
||||
3. Largest power of 2 that fits in the remaining space.
|
||||
4. Smallest power of 2 that exceeds the remaining space, minimum 32. */
|
||||
|
||||
/* Now loop through to setup MPU protection for the code area. */
|
||||
for (i = 0; i < TXM_MODULE_MANAGER_CODE_MPU_ENTRIES; i++)
|
||||
{
|
||||
/* First two MPU blocks are 1/4 of the largest power of two
|
||||
that is greater than or equal to code size. */
|
||||
if (i < 2)
|
||||
{
|
||||
block_size = _txm_power_of_two_block_size(code_size) >> 2;
|
||||
}
|
||||
|
||||
/* Third MPU block is the largest power of 2 that fits in the remaining space. */
|
||||
else if (i == 2)
|
||||
{
|
||||
/* Subtract (block_size*2) from code_size to calculate remaining space. */
|
||||
code_size = code_size - (block_size << 1);
|
||||
block_size = _txm_power_of_two_block_size(code_size) >> 1;
|
||||
}
|
||||
|
||||
/* Last MPU block is the smallest power of 2 that exceeds the remaining space, minimum 32. */
|
||||
else
|
||||
{
|
||||
/* Calculate remaining space. */
|
||||
code_size = code_size - block_size;
|
||||
block_size = _txm_power_of_two_block_size(code_size);
|
||||
srd_bits = _txm_module_manager_calculate_srd_bits(block_size, code_size);
|
||||
}
|
||||
|
||||
/* Build the base address register. */
|
||||
base_address_register = (code_address & ~(block_size - 1)) | mpu_register | 0x10;
|
||||
|
||||
/* Calculate the region size information. */
|
||||
region_size = (_txm_module_manager_region_size_get(block_size) << 1);
|
||||
|
||||
/* Build the base attribute register. */
|
||||
base_attribute_register = region_size | srd_bits | 0x06070001;
|
||||
|
||||
/* Setup the MPU Base Address Register. */
|
||||
module_instance -> txm_module_instance_mpu_registers[mpu_table_index] = base_address_register;
|
||||
|
||||
/* Setup the MPU Base Attribute Register. */
|
||||
module_instance -> txm_module_instance_mpu_registers[mpu_table_index+1] = base_attribute_register;
|
||||
|
||||
/* Adjust the code address. */
|
||||
code_address = code_address + block_size;
|
||||
|
||||
/* Move MPU table index. */
|
||||
mpu_table_index = mpu_table_index + 2;
|
||||
|
||||
/* Increment the MPU register index. */
|
||||
mpu_register++;
|
||||
}
|
||||
}
|
||||
|
||||
/* Only 3 code entries available. */
|
||||
else
|
||||
{
|
||||
/* Calculate block size, one code entry taken up by shared memory. */
|
||||
block_size = _txm_power_of_two_block_size(code_size / (TXM_MODULE_MANAGER_CODE_MPU_ENTRIES - 1));
|
||||
|
||||
/* Calculate the region size information. */
|
||||
region_size = (_txm_module_manager_region_size_get(block_size) << 1);
|
||||
|
||||
/* Now loop through to setup MPU protection for the code area. */
|
||||
for (i = 0; i < TXM_MODULE_MANAGER_CODE_MPU_ENTRIES - 1; i++)
|
||||
{
|
||||
/* Build the base address register. */
|
||||
base_address_register = code_address & ~(block_size - 1) | mpu_register | 0x10;
|
||||
|
||||
/* Check if SRD bits need to be set. */
|
||||
if (code_size < block_size)
|
||||
{
|
||||
srd_bits = _txm_module_manager_calculate_srd_bits(block_size, code_size);
|
||||
}
|
||||
|
||||
/* Build the base attribute register. */
|
||||
base_attribute_register = region_size | srd_bits | 0x06070000;
|
||||
|
||||
/* Is there still some code? If so set the region enable bit. */
|
||||
if (code_size)
|
||||
{
|
||||
/* Set the region enable bit. */
|
||||
base_attribute_register = base_attribute_register | 0x1;
|
||||
}
|
||||
/* Setup the MPU Base Address Register. */
|
||||
module_instance -> txm_module_instance_mpu_registers[mpu_table_index] = base_address_register;
|
||||
|
||||
/* Setup the MPU Base Attribute Register. */
|
||||
module_instance -> txm_module_instance_mpu_registers[mpu_table_index+1] = base_attribute_register;
|
||||
|
||||
/* Adjust the code address. */
|
||||
code_address = code_address + block_size;
|
||||
|
||||
/* Decrement the code size. */
|
||||
if (code_size > block_size)
|
||||
{
|
||||
code_size = code_size - block_size;
|
||||
}
|
||||
else
|
||||
{
|
||||
code_size = 0;
|
||||
}
|
||||
|
||||
/* Move MPU table index. */
|
||||
mpu_table_index = mpu_table_index + 2;
|
||||
|
||||
/* Increment the MPU register index. */
|
||||
mpu_register++;
|
||||
}
|
||||
|
||||
/* Adjust indeces to pass over the shared memory entry. */
|
||||
/* Move MPU table index. */
|
||||
mpu_table_index = mpu_table_index + 2;
|
||||
|
||||
/* Increment the MPU register index. */
|
||||
mpu_register++;
|
||||
}
|
||||
|
||||
/* Setup values for data area. */
|
||||
data_address = (ULONG) module_instance -> txm_module_instance_data_start;
|
||||
|
||||
/* Adjust the size of the module elements to be aligned to the default alignment. We do this
|
||||
so that when we partition the allocated memory, we can simply place these regions right beside
|
||||
each other without having to align their pointers. Note this only works when they all have
|
||||
the same alignment. */
|
||||
|
||||
data_size = module_instance -> txm_module_instance_preamble_ptr -> txm_module_preamble_data_size;
|
||||
start_stop_stack_size = module_instance -> txm_module_instance_preamble_ptr -> txm_module_preamble_start_stop_stack_size;
|
||||
callback_stack_size = module_instance -> txm_module_instance_preamble_ptr -> txm_module_preamble_callback_stack_size;
|
||||
|
||||
data_size = ((data_size + TXM_MODULE_DATA_ALIGNMENT - 1)/TXM_MODULE_DATA_ALIGNMENT) * TXM_MODULE_DATA_ALIGNMENT;
|
||||
|
||||
start_stop_stack_size = ((start_stop_stack_size + TXM_MODULE_DATA_ALIGNMENT - 1)/TXM_MODULE_DATA_ALIGNMENT) * TXM_MODULE_DATA_ALIGNMENT;
|
||||
|
||||
callback_stack_size = ((callback_stack_size + TXM_MODULE_DATA_ALIGNMENT - 1)/TXM_MODULE_DATA_ALIGNMENT) * TXM_MODULE_DATA_ALIGNMENT;
|
||||
|
||||
/* Update the data size to include thread stacks. */
|
||||
data_size = data_size + start_stop_stack_size + callback_stack_size;
|
||||
|
||||
block_size = _txm_power_of_two_block_size(data_size / TXM_MODULE_MANAGER_DATA_MPU_ENTRIES);
|
||||
|
||||
/* Reset SRD bitfield. */
|
||||
srd_bits = 0;
|
||||
|
||||
/* Calculate the region size information. */
|
||||
region_size = (_txm_module_manager_region_size_get(block_size) << 1);
|
||||
|
||||
/* Now loop through to setup MPU protection for the data area. */
|
||||
for (i = 0; i < TXM_MODULE_MANAGER_DATA_MPU_ENTRIES; i++)
|
||||
{
|
||||
/* Build the base address register. */
|
||||
base_address_register = (data_address & ~(block_size - 1)) | mpu_register | 0x10;
|
||||
|
||||
/* Check if SRD bits need to be set. */
|
||||
if (data_size < block_size)
|
||||
{
|
||||
srd_bits = _txm_module_manager_calculate_srd_bits(block_size, data_size);
|
||||
}
|
||||
|
||||
/* Build the base attribute register. */
|
||||
base_attribute_register = region_size | srd_bits | 0x13070000;
|
||||
|
||||
/* Is there still some data? If so set the region enable bit. */
|
||||
if (data_size)
|
||||
{
|
||||
/* Set the region enable bit. */
|
||||
base_attribute_register = base_attribute_register | 0x1;
|
||||
}
|
||||
|
||||
/* Setup the MPU Base Address Register. */
|
||||
module_instance -> txm_module_instance_mpu_registers[mpu_table_index] = base_address_register;
|
||||
|
||||
/* Setup the MPU Base Attribute Register. */
|
||||
module_instance -> txm_module_instance_mpu_registers[mpu_table_index+1] = base_attribute_register;
|
||||
|
||||
/* Adjust the data address. */
|
||||
data_address = data_address + block_size;
|
||||
|
||||
/* Decrement the data size. */
|
||||
if (data_size > block_size)
|
||||
{
|
||||
data_size = data_size - block_size;
|
||||
}
|
||||
else
|
||||
{
|
||||
data_size = 0;
|
||||
}
|
||||
|
||||
/* Move MPU table index. */
|
||||
mpu_table_index = mpu_table_index + 2;
|
||||
|
||||
/* Increment the MPU register index. */
|
||||
mpu_register++;
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,139 @@
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* Copyright (c) Microsoft Corporation. All rights reserved. */
|
||||
/* */
|
||||
/* This software is licensed under the Microsoft Software License */
|
||||
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
|
||||
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
|
||||
/* and in the root directory of this software. */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
|
||||
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
/** */
|
||||
/** ThreadX Component */
|
||||
/** */
|
||||
/** Module Manager */
|
||||
/** */
|
||||
/**************************************************************************/
|
||||
/**************************************************************************/
|
||||
|
||||
.text
|
||||
.align 4
|
||||
.syntax unified
|
||||
|
||||
/**************************************************************************/
|
||||
/* */
|
||||
/* FUNCTION RELEASE */
|
||||
/* */
|
||||
/* _txm_module_manager_thread_stack_build Cortex-M3/MPU/GNU */
|
||||
/* 6.1 */
|
||||
/* AUTHOR */
|
||||
/* */
|
||||
/* Scott Larson, Microsoft Corporation */
|
||||
/* */
|
||||
/* DESCRIPTION */
|
||||
/* */
|
||||
/* This function builds a stack frame on the supplied thread's stack. */
|
||||
/* The stack frame results in a fake interrupt return to the supplied */
|
||||
/* function pointer. */
|
||||
/* */
|
||||
/* INPUT */
|
||||
/* */
|
||||
/* thread_ptr Pointer to thread */
|
||||
/* function_ptr Pointer to shell function */
|
||||
/* */
|
||||
/* OUTPUT */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLS */
|
||||
/* */
|
||||
/* None */
|
||||
/* */
|
||||
/* CALLED BY */
|
||||
/* */
|
||||
/* _tx_thread_create Create thread service */
|
||||
/* */
|
||||
/* RELEASE HISTORY */
|
||||
/* */
|
||||
/* DATE NAME DESCRIPTION */
|
||||
/* */
|
||||
/* 09-30-2020 Scott Larson Initial Version 6.1 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
// VOID _txm_module_manager_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(TX_THREAD *, TXM_MODULE_INSTANCE *))
|
||||
// {
|
||||
.global _txm_module_manager_thread_stack_build
|
||||
.thumb_func
|
||||
_txm_module_manager_thread_stack_build:
|
||||
|
||||
/* Build a fake interrupt frame. The form of the fake interrupt stack
|
||||
on the Cortex-M should look like the following after it is built:
|
||||
|
||||
Stack Top:
|
||||
LR Interrupted LR (LR at time of PENDSV)
|
||||
r4 Initial value for r4
|
||||
r5 Initial value for r5
|
||||
r6 Initial value for r6
|
||||
r7 Initial value for r7
|
||||
r8 Initial value for r8
|
||||
r9 Initial value for r9
|
||||
r10 Initial value for r10
|
||||
r11 Initial value for r11
|
||||
r0 Initial value for r0 (Hardware stack starts here!!)
|
||||
r1 Initial value for r1
|
||||
r2 Initial value for r2
|
||||
r3 Initial value for r3
|
||||
r12 Initial value for r12
|
||||
lr Initial value for lr
|
||||
pc Initial value for pc
|
||||
xPSR Initial value for xPSR
|
||||
|
||||
Stack Bottom: (higher memory address) */
|
||||
|
||||
LDR r2, [r0, #16] // Pickup end of stack area
|
||||
BIC r2, r2, #0x7 // Align frame
|
||||
SUB r2, r2, #68 // Subtract frame size
|
||||
LDR r3, =0xFFFFFFFD // Build initial LR value
|
||||
STR r3, [r2, #0] // Save on the stack
|
||||
|
||||
/* Actually build the stack frame. */
|
||||
|
||||
MOV r3, #0 // Build initial register value
|
||||
STR r3, [r2, #4] // Store initial r4
|
||||
STR r3, [r2, #8] // Store initial r5
|
||||
STR r3, [r2, #12] // Store initial r6
|
||||
STR r3, [r2, #16] // Store initial r7
|
||||
STR r3, [r2, #20] // Store initial r8
|
||||
STR r3, [r2, #28] // Store initial r10
|
||||
STR r3, [r2, #32] // Store initial r11
|
||||
|
||||
/* Hardware stack follows. */
|
||||
|
||||
STR r0, [r2, #36] // Store initial r0, which is the thread control block
|
||||
|
||||
LDR r3, [r0, #8] // Pickup thread entry info pointer,which is in the stack pointer position of the thread control block.
|
||||
// It was setup in the txm_module_manager_thread_create function. It will be overwritten later in this
|
||||
// function with the actual, initial stack pointer.
|
||||
STR r3, [r2, #40] // Store initial r1, which is the module entry information.
|
||||
LDR r3, [r3, #8] // Pickup data base register from the module information
|
||||
STR r3, [r2, #24] // Store initial r9 (data base register)
|
||||
MOV r3, #0 // Clear r3 again
|
||||
|
||||
STR r3, [r2, #44] // Store initial r2
|
||||
STR r3, [r2, #48] // Store initial r3
|
||||
STR r3, [r2, #52] // Store initial r12
|
||||
MOV r3, #0xFFFFFFFF // Poison EXC_RETURN value
|
||||
STR r3, [r2, #56] // Store initial lr
|
||||
STR r1, [r2, #60] // Store initial pc
|
||||
MOV r3, #0x01000000 // Only T-bit need be set
|
||||
STR r3, [r2, #64] // Store initial xPSR
|
||||
|
||||
/* Setup stack pointer. */
|
||||
// thread_ptr -> tx_thread_stack_ptr = r2;
|
||||
|
||||
STR r2, [r0, #8] // Save stack pointer in thread's control block
|
||||
BX lr // Return to caller
|
||||
Reference in New Issue
Block a user