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Release 6.1.10

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This commit is contained in:
Yuxin Zhou
2022-01-29 00:24:03 +00:00
parent b216ceb25e
commit f7f0957188
3111 changed files with 495735 additions and 40800 deletions
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ports_module/cortex_m33/iar/inc/tx_port.h
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@@ -25,8 +25,8 @@
/* */
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h ARMv8-M */
/* 6.1.5 */
/* tx_port.h Cortex-M33 */
/* 6.1.10 */
/* */
/* AUTHOR */
/* */
@@ -43,28 +43,45 @@
/* own special types that can be mapped to actual data types by this */
/* file to guarantee consistency in the interface and functionality. */
/* */
/* This file replaces the previous Cortex-M33 files. It unifies */
/* the Cortex-M33 compilers into one common file. */
/* */
/* RELEASE HISTORY */
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 03-02-2021 Scott Larson Initial Version 6.1.5 */
/* 09-30-2020 Scott Larson Initial Version 6.1 */
/* 03-02-2021 Scott Larson Modified comment(s), added */
/* ULONG64_DEFINED, */
/* resulting in version 6.1.5 */
/* 06-02-2021 Scott Larson Modified comment(s), removed */
/* unneeded header file, funcs */
/* set_control and get_control */
/* changed to inline, */
/* added symbol to enable */
/* stack error handler, */
/* resulting in version 6.1.7 */
/* 10-15-2021 Scott Larson Modified comment(s), improved */
/* stack check error handling, */
/* resulting in version 6.1.9 */
/* 01-31-2022 Scott Larson Modified comment(s), unified */
/* this file across compilers, */
/* fixed predefined macro, */
/* resulting in version 6.1.10 */
/* */
/**************************************************************************/
#ifndef TX_PORT_H
#define TX_PORT_H
/* Determine if the optional ThreadX user define file should be used. */
#ifdef TX_INCLUDE_USER_DEFINE_FILE
/* Yes, include the user defines in tx_user.h. The defines in this file may
alternately be defined on the command line. */
#include "tx_user.h"
#endif
#endif /* TX_INCLUDE_USER_DEFINE_FILE */
/* Define compiler library include files. */
@@ -72,13 +89,20 @@
#include <string.h>
#ifdef __ICCARM__
#include <intrinsics.h> /* IAR Intrinsics */
#define __asm__ __asm /* Define to make all inline asm look similar */
#include <intrinsics.h> /* IAR Intrinsics */
#define __asm__ __asm /* Define to make all inline asm from each compiler look similar */
#define _tx_control_get __get_CONTROL
#define _tx_control_set __set_CONTROL
#define _tx_ipsr_get __get_IPSR
#ifdef TX_ENABLE_IAR_LIBRARY_SUPPORT
#include <yvals.h>
#endif
#endif /* TX_ENABLE_IAR_LIBRARY_SUPPORT */
#endif /* __ICCARM__ */
#ifdef __ARMCOMPILER_VERSION
#include <arm_compat.h>
#endif
/* Define ThreadX basic types for this port. */
@@ -101,35 +125,17 @@ UINT _txe_thread_secure_stack_free(struct TX_THREAD_STRUCT *thread_ptr);
UINT _tx_thread_secure_stack_allocate(struct TX_THREAD_STRUCT *tx_thread, ULONG stack_size);
UINT _tx_thread_secure_stack_free(struct TX_THREAD_STRUCT *tx_thread);
/* This port overrides tx_thread_stack_error_notify with an architecture specific version */
#define TX_PORT_THREAD_STACK_ERROR_NOTIFY
/* This port overrides tx_thread_stack_error_handler with an architecture specific version */
#define TX_PORT_THREAD_STACK_ERROR_HANDLER
/* This hardware has stack checking that we take advantage of - do NOT define. */
#ifdef TX_ENABLE_STACK_CHECKING
#error "Do not define TX_ENABLE_STACK_CHECKING"
#endif
/* If user does not want to terminate thread on stack overflow,
#define the TX_THREAD_NO_TERMINATE_STACK_ERROR symbol.
The thread will be rescheduled and continue to cause the exception.
It is suggested user code handle this by registering a notification with the
tx_thread_stack_error_notify function. */
/*#define TX_THREAD_NO_TERMINATE_STACK_ERROR */
/* Define the system API mappings based on the error checking
selected by the user. Note: this section is only applicable to
/* Define the system API mappings based on the error checking
selected by the user. Note: this section is only applicable to
application source code, hence the conditional that turns off this
stuff when the include file is processed by the ThreadX source. */
#ifndef TX_SOURCE_CODE
/* Determine if error checking is desired. If so, map API functions
/* Determine if error checking is desired. If so, map API functions
to the appropriate error checking front-ends. Otherwise, map API
functions to the core functions that actually perform the work.
functions to the core functions that actually perform the work.
Note: error checking is enabled by default. */
#ifdef TX_DISABLE_ERROR_CHECKING
@@ -146,10 +152,11 @@ UINT _tx_thread_secure_stack_free(struct TX_THREAD_STRUCT *tx_thread);
#define tx_thread_secure_stack_allocate _txe_thread_secure_stack_allocate
#define tx_thread_secure_stack_free _txe_thread_secure_stack_free
#endif
#endif
#endif /* TX_DISABLE_ERROR_CHECKING */
#endif /* TX_SOURCE_CODE */
/* This port has a usage fault handler in _tx_initialize_low_level for stack exceptions. */
#define TX_PORT_THREAD_STACK_ERROR_HANDLING
/* Define the priority levels for ThreadX. Legal values range
from 32 to 1024 and MUST be evenly divisible by 32. */
@@ -244,84 +251,82 @@ ULONG _tx_misra_time_stamp_get(VOID);
#define TX_THREAD_EXTENSION_0
#define TX_THREAD_EXTENSION_1
#ifdef TX_ENABLE_IAR_LIBRARY_SUPPORT
/* IAR library support */
#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
/* ThreadX in non-secure zone with calls to secure zone. */
#define TX_THREAD_EXTENSION_2 VOID *tx_thread_module_instance_ptr; \
VOID *tx_thread_module_entry_info_ptr; \
ULONG tx_thread_module_current_user_mode; \
ULONG tx_thread_module_user_mode; \
ULONG tx_thread_module_saved_lr; \
VOID *tx_thread_module_kernel_stack_start; \
VOID *tx_thread_module_kernel_stack_end; \
ULONG tx_thread_module_kernel_stack_size; \
VOID *tx_thread_module_stack_ptr; \
VOID *tx_thread_module_stack_start; \
VOID *tx_thread_module_stack_end; \
ULONG tx_thread_module_stack_size; \
VOID *tx_thread_module_reserved; \
VOID *tx_thread_secure_stack_context; \
VOID *tx_thread_iar_tls_pointer;
#define TX_THREAD_EXTENSION_2 VOID *tx_thread_module_instance_ptr; \
VOID *tx_thread_module_entry_info_ptr; \
ULONG tx_thread_module_current_user_mode; \
ULONG tx_thread_module_user_mode; \
ULONG tx_thread_module_saved_lr; \
VOID *tx_thread_module_kernel_stack_start; \
VOID *tx_thread_module_kernel_stack_end; \
ULONG tx_thread_module_kernel_stack_size; \
VOID *tx_thread_module_stack_ptr; \
VOID *tx_thread_module_stack_start; \
VOID *tx_thread_module_stack_end; \
ULONG tx_thread_module_stack_size; \
VOID *tx_thread_module_reserved; \
VOID *tx_thread_secure_stack_context; \
VOID *tx_thread_iar_tls_pointer;
#else
#define TX_THREAD_EXTENSION_2 VOID *tx_thread_module_instance_ptr; \
VOID *tx_thread_module_entry_info_ptr; \
ULONG tx_thread_module_current_user_mode; \
ULONG tx_thread_module_user_mode; \
ULONG tx_thread_module_saved_lr; \
VOID *tx_thread_module_kernel_stack_start; \
VOID *tx_thread_module_kernel_stack_end; \
ULONG tx_thread_module_kernel_stack_size; \
VOID *tx_thread_module_stack_ptr; \
VOID *tx_thread_module_stack_start; \
VOID *tx_thread_module_stack_end; \
ULONG tx_thread_module_stack_size; \
VOID *tx_thread_module_reserved; \
VOID *tx_thread_iar_tls_pointer;
/* ThreadX in only one zone. */
#define TX_THREAD_EXTENSION_2 VOID *tx_thread_module_instance_ptr; \
VOID *tx_thread_module_entry_info_ptr; \
ULONG tx_thread_module_current_user_mode; \
ULONG tx_thread_module_user_mode; \
ULONG tx_thread_module_saved_lr; \
VOID *tx_thread_module_kernel_stack_start; \
VOID *tx_thread_module_kernel_stack_end; \
ULONG tx_thread_module_kernel_stack_size; \
VOID *tx_thread_module_stack_ptr; \
VOID *tx_thread_module_stack_start; \
VOID *tx_thread_module_stack_end; \
ULONG tx_thread_module_stack_size; \
VOID *tx_thread_module_reserved; \
VOID *tx_thread_iar_tls_pointer;
#endif
#else
/* No IAR library support */
#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
/* ThreadX in non-secure zone with calls to secure zone. */
#define TX_THREAD_EXTENSION_2 VOID *tx_thread_module_instance_ptr; \
VOID *tx_thread_module_entry_info_ptr; \
ULONG tx_thread_module_current_user_mode; \
ULONG tx_thread_module_user_mode; \
ULONG tx_thread_module_saved_lr; \
VOID *tx_thread_module_kernel_stack_start; \
VOID *tx_thread_module_kernel_stack_end; \
ULONG tx_thread_module_kernel_stack_size; \
VOID *tx_thread_module_stack_ptr; \
VOID *tx_thread_module_stack_start; \
VOID *tx_thread_module_stack_end; \
ULONG tx_thread_module_stack_size; \
VOID *tx_thread_module_reserved; \
VOID *tx_thread_secure_stack_context;
#define TX_THREAD_EXTENSION_2 VOID *tx_thread_module_instance_ptr; \
VOID *tx_thread_module_entry_info_ptr; \
ULONG tx_thread_module_current_user_mode; \
ULONG tx_thread_module_user_mode; \
ULONG tx_thread_module_saved_lr; \
VOID *tx_thread_module_kernel_stack_start; \
VOID *tx_thread_module_kernel_stack_end; \
ULONG tx_thread_module_kernel_stack_size; \
VOID *tx_thread_module_stack_ptr; \
VOID *tx_thread_module_stack_start; \
VOID *tx_thread_module_stack_end; \
ULONG tx_thread_module_stack_size; \
VOID *tx_thread_module_reserved; \
VOID *tx_thread_secure_stack_context;
#else
/* ThreadX in only one zone. */
#define TX_THREAD_EXTENSION_2 VOID *tx_thread_module_instance_ptr; \
VOID *tx_thread_module_entry_info_ptr; \
ULONG tx_thread_module_current_user_mode; \
ULONG tx_thread_module_user_mode; \
ULONG tx_thread_module_saved_lr; \
VOID *tx_thread_module_kernel_stack_start; \
VOID *tx_thread_module_kernel_stack_end; \
ULONG tx_thread_module_kernel_stack_size; \
VOID *tx_thread_module_stack_ptr; \
VOID *tx_thread_module_stack_start; \
VOID *tx_thread_module_stack_end; \
ULONG tx_thread_module_stack_size; \
VOID *tx_thread_module_reserved;
#define TX_THREAD_EXTENSION_2 VOID *tx_thread_module_instance_ptr; \
VOID *tx_thread_module_entry_info_ptr; \
ULONG tx_thread_module_current_user_mode; \
ULONG tx_thread_module_user_mode; \
ULONG tx_thread_module_saved_lr; \
VOID *tx_thread_module_kernel_stack_start; \
VOID *tx_thread_module_kernel_stack_end; \
ULONG tx_thread_module_kernel_stack_size; \
VOID *tx_thread_module_stack_ptr; \
VOID *tx_thread_module_stack_start; \
VOID *tx_thread_module_stack_end; \
ULONG tx_thread_module_stack_size; \
VOID *tx_thread_module_reserved;
#endif
#endif
#ifndef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
#endif /* TX_ENABLE_IAR_LIBRARY_SUPPORT */
#define TX_THREAD_EXTENSION_3
#else
#define TX_THREAD_EXTENSION_3 unsigned long long tx_thread_execution_time_total; \
unsigned long long tx_thread_execution_time_last_start;
#endif
/* Define the port extensions of the remaining ThreadX objects. */
@@ -352,24 +357,22 @@ ULONG _tx_misra_time_stamp_get(VOID);
/* Define the macros for processing extensions in tx_thread_create, tx_thread_delete,
tx_thread_shell_entry, and tx_thread_terminate. */
#ifdef TX_ENABLE_IAR_LIBRARY_SUPPORT
void *_tx_iar_create_per_thread_tls_area(void);
void _tx_iar_destroy_per_thread_tls_area(void *tls_ptr);
void __iar_Initlocks(void);
#define TX_THREAD_CREATE_EXTENSION(thread_ptr) thread_ptr -> tx_thread_iar_tls_pointer = _tx_iar_create_per_thread_tls_area();
#define TX_THREAD_CREATE_EXTENSION(thread_ptr) thread_ptr -> tx_thread_iar_tls_pointer = _tx_iar_create_per_thread_tls_area();
#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
#define TX_THREAD_DELETE_EXTENSION(thread_ptr) do {_tx_iar_destroy_per_thread_tls_area(thread_ptr -> tx_thread_iar_tls_pointer); \
thread_ptr -> tx_thread_iar_tls_pointer = TX_NULL; } while(0); \
thread_ptr -> tx_thread_iar_tls_pointer = TX_NULL; } while(0); \
if(thread_ptr -> tx_thread_secure_stack_context){_tx_thread_secure_stack_free(thread_ptr);}
#else
#define TX_THREAD_DELETE_EXTENSION(thread_ptr) do {_tx_iar_destroy_per_thread_tls_area(thread_ptr -> tx_thread_iar_tls_pointer); \
thread_ptr -> tx_thread_iar_tls_pointer = TX_NULL; } while(0);
thread_ptr -> tx_thread_iar_tls_pointer = TX_NULL; } while(0);
#endif
#define TX_PORT_SPECIFIC_PRE_SCHEDULER_INITIALIZATION do {__iar_Initlocks();} while(0);
#else /* No IAR library support. */
#define TX_THREAD_CREATE_EXTENSION(thread_ptr)
#if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
@@ -385,7 +388,8 @@ void __iar_Initlocks(void);
#define TX_TIMER_INITIALIZE_EXTENSION(status) _tx_thread_secure_stack_allocate(&_tx_timer_thread, TX_TIMER_THREAD_SECURE_STACK_SIZE);
#endif
#if defined(__ARMVFP__) || defined(__ARM_PCS_VFP) || defined(__TARGET_FPU_VFP)
#if defined(__ARMVFP__) || defined(__ARM_PCS_VFP) || defined(__ARM_FP) || defined(__TARGET_FPU_VFP) || defined(__VFP__)
#ifdef TX_MISRA_ENABLE
@@ -396,9 +400,9 @@ void _tx_misra_vfp_touch(void);
#else /* TX_MISRA_ENABLE not defined */
/* Define some helper functions (these are intrinsics in some compilers). */
#ifdef __GNUC__
__attribute__( ( always_inline ) ) static inline ULONG __get_CONTROL(void)
#ifdef __GNUC__ /* GCC and ARM Compiler 6 */
__attribute__( ( always_inline ) ) static inline ULONG _tx_control_get(void)
{
ULONG control_value;
@@ -406,22 +410,18 @@ ULONG control_value;
return(control_value);
}
__attribute__( ( always_inline ) ) static inline void __set_CONTROL(ULONG control_value)
__attribute__( ( always_inline ) ) static inline void _tx_control_set(ULONG control_value)
{
__asm__ volatile (" MSR CONTROL,%0": : "r" (control_value): "memory" );
}
#define TX_VFP_TOUCH() __asm__ volatile ("VMOV.F32 s0, s0");
#endif /* __GNUC__ */
#endif /* __GNUC__ */
#ifdef __ICCARM__
/* Touch VFP register in order to flush. Works for AC6/GCC/IAR compilers. */
#define TX_VFP_TOUCH() __asm__ volatile ("VMOV.F32 s0, s0");
#endif /* __ICCARM__ */
#endif /* TX_MISRA_ENABLE */
/* A completed thread falls into _thread_shell_entry and we can simply deactivate the FPU via CONTROL.FPCA
in order to ensure no lazy stacking will occur. */
@@ -429,54 +429,53 @@ __attribute__( ( always_inline ) ) static inline void __set_CONTROL(ULONG contro
#define TX_THREAD_COMPLETED_EXTENSION(thread_ptr) { \
ULONG _tx_vfp_state; \
_tx_vfp_state = __get_CONTROL(); \
_tx_vfp_state = _tx_vfp_state & ~((ULONG) 0x4); \
__set_CONTROL(_tx_vfp_state); \
_tx_vfp_state = _tx_control_get(); \
_tx_vfp_state = _tx_vfp_state & ~((ULONG) 0x4); \
_tx_control_set(_tx_vfp_state); \
}
#else
#define TX_THREAD_COMPLETED_EXTENSION(thread_ptr) { \
ULONG _tx_vfp_state; \
_tx_vfp_state = _tx_misra_control_get(); \
_tx_vfp_state = _tx_vfp_state & ~((ULONG) 0x4); \
_tx_vfp_state = _tx_misra_control_get(); \
_tx_vfp_state = _tx_vfp_state & ~((ULONG) 0x4); \
_tx_misra_control_set(_tx_vfp_state); \
}
#endif
/* A thread can be terminated by another thread, so we first check if it's self-terminating and not in an ISR.
If so, deactivate the FPU via CONTROL.FPCA. Otherwise we are in an interrupt or another thread is terminating
this one, so if the FPCCR.LSPACT bit is set, we need to save the CONTROL.FPCA state, touch the FPU to flush
this one, so if the FPCCR.LSPACT bit is set, we need to save the CONTROL.FPCA state, touch the FPU to flush
the lazy FPU save, then restore the CONTROL.FPCA state. */
#ifndef TX_MISRA_ENABLE
#define TX_THREAD_TERMINATED_EXTENSION(thread_ptr) { \
ULONG _tx_system_state; \
_tx_system_state = TX_THREAD_GET_SYSTEM_STATE(); \
_tx_system_state = TX_THREAD_GET_SYSTEM_STATE(); \
if ((_tx_system_state == ((ULONG) 0)) && ((thread_ptr) == _tx_thread_current_ptr)) \
{ \
ULONG _tx_vfp_state; \
_tx_vfp_state = __get_CONTROL(); \
_tx_vfp_state = _tx_vfp_state & ~((ULONG) 0x4); \
__set_CONTROL(_tx_vfp_state); \
_tx_vfp_state = _tx_control_get(); \
_tx_vfp_state = _tx_vfp_state & ~((ULONG) 0x4); \
_tx_control_set(_tx_vfp_state); \
} \
else \
{ \
ULONG _tx_fpccr; \
_tx_fpccr = *((ULONG *) 0xE000EF34); \
_tx_fpccr = _tx_fpccr & ((ULONG) 0x01); \
_tx_fpccr = *((ULONG *) 0xE000EF34); \
_tx_fpccr = _tx_fpccr & ((ULONG) 0x01); \
if (_tx_fpccr == ((ULONG) 0x01)) \
{ \
ULONG _tx_vfp_state; \
_tx_vfp_state = __get_CONTROL(); \
_tx_vfp_state = _tx_vfp_state & ((ULONG) 0x4); \
_tx_vfp_state = _tx_control_get(); \
_tx_vfp_state = _tx_vfp_state & ((ULONG) 0x4); \
TX_VFP_TOUCH(); \
if (_tx_vfp_state == ((ULONG) 0)) \
{ \
_tx_vfp_state = __get_CONTROL(); \
_tx_vfp_state = _tx_vfp_state & ~((ULONG) 0x4); \
__set_CONTROL(_tx_vfp_state); \
_tx_vfp_state = _tx_control_get(); \
_tx_vfp_state = _tx_vfp_state & ~((ULONG) 0x4); \
_tx_control_set(_tx_vfp_state); \
} \
} \
} \
@@ -485,29 +484,29 @@ __attribute__( ( always_inline ) ) static inline void __set_CONTROL(ULONG contro
#define TX_THREAD_TERMINATED_EXTENSION(thread_ptr) { \
ULONG _tx_system_state; \
_tx_system_state = TX_THREAD_GET_SYSTEM_STATE(); \
_tx_system_state = TX_THREAD_GET_SYSTEM_STATE(); \
if ((_tx_system_state == ((ULONG) 0)) && ((thread_ptr) == _tx_thread_current_ptr)) \
{ \
ULONG _tx_vfp_state; \
_tx_vfp_state = _tx_misra_control_get(); \
_tx_vfp_state = _tx_vfp_state & ~((ULONG) 0x4); \
_tx_vfp_state = _tx_misra_control_get(); \
_tx_vfp_state = _tx_vfp_state & ~((ULONG) 0x4); \
_tx_misra_control_set(_tx_vfp_state); \
} \
else \
{ \
ULONG _tx_fpccr; \
_tx_fpccr = _tx_misra_fpccr_get(); \
_tx_fpccr = _tx_fpccr & ((ULONG) 0x01); \
_tx_fpccr = _tx_misra_fpccr_get(); \
_tx_fpccr = _tx_fpccr & ((ULONG) 0x01); \
if (_tx_fpccr == ((ULONG) 0x01)) \
{ \
ULONG _tx_vfp_state; \
_tx_vfp_state = _tx_misra_control_get(); \
_tx_vfp_state = _tx_vfp_state & ((ULONG) 0x4); \
_tx_vfp_state = _tx_vfp_state & ((ULONG) 0x4); \
_tx_misra_vfp_touch(); \
if (_tx_vfp_state == ((ULONG) 0)) \
{ \
_tx_vfp_state = _tx_misra_control_get(); \
_tx_vfp_state = _tx_vfp_state & ~((ULONG) 0x4); \
_tx_vfp_state = _tx_misra_control_get(); \
_tx_vfp_state = _tx_vfp_state & ~((ULONG) 0x4); \
_tx_misra_control_set(_tx_vfp_state); \
} \
} \
@@ -520,7 +519,7 @@ __attribute__( ( always_inline ) ) static inline void __set_CONTROL(ULONG contro
#define TX_THREAD_COMPLETED_EXTENSION(thread_ptr)
#define TX_THREAD_TERMINATED_EXTENSION(thread_ptr)
#endif /* defined(__ARMVFP__) || defined(__ARM_PCS_VFP) || defined(__TARGET_FPU_VFP) */
#endif /* defined(__ARMVFP__) || defined(__ARM_PCS_VFP) || defined(__ARM_FP) || defined(__TARGET_FPU_VFP) || defined(__VFP__) */
/* Define the ThreadX object creation extensions for the remaining objects. */
@@ -545,27 +544,21 @@ __attribute__( ( always_inline ) ) static inline void __set_CONTROL(ULONG contro
#define TX_TIMER_DELETE_EXTENSION(timer_ptr)
/* Define the get system state macro. */
/* Define the get system state macro. */
#ifndef TX_THREAD_GET_SYSTEM_STATE
#ifndef TX_MISRA_ENABLE
#ifdef __GNUC__ /* GCC and ARM Compiler 6 */
__attribute__( ( always_inline ) ) static inline unsigned int __get_IPSR(void)
#if defined(__GNUC__) /* GCC and AC6 */
__attribute__( ( always_inline ) ) static inline UINT _tx_ipsr_get(void)
{
unsigned int ipsr_value;
UINT ipsr_value;
__asm__ volatile (" MRS %0,IPSR ": "=r" (ipsr_value) );
return(ipsr_value);
}
#endif /* GCC and AC6 IPSR_get function. */
#define TX_THREAD_GET_SYSTEM_STATE() (_tx_thread_system_state | __get_IPSR())
#elif defined(__ICCARM__) /* IAR */
#define TX_THREAD_GET_SYSTEM_STATE() (_tx_thread_system_state | __get_IPSR())
#endif /* TX_THREAD_GET_SYSTEM_STATE for different compilers */
#define TX_THREAD_GET_SYSTEM_STATE() (_tx_thread_system_state | _tx_ipsr_get())
#else /* TX_MISRA_ENABLE is defined, use MISRA function. */
ULONG _tx_misra_ipsr_get(VOID);
@@ -604,87 +597,86 @@ extern void _tx_thread_secure_stack_initialize(void);
#define TX_LOWEST_SET_BIT_CALCULATE(m, b) (b) = (UINT) __CLZ(__RBIT((m)));
#elif defined(__GNUC__) /* GCC and AC6 Compiler */
#define TX_LOWEST_SET_BIT_CALCULATE(m, b) __asm__ volatile (" RBIT %0,%1 ": "=r" (m) : "r" (m) ); \
__asm__ volatile (" CLZ %0,%1 ": "=r" (b) : "r" (m) );
__asm__ volatile (" CLZ %0,%1 ": "=r" (b) : "r" (m) );
#else
#error "Compiler not supported."
#endif
/* Define the interrupt disable/restore macros for each compiler. */
#ifdef __GNUC__ /* GCC and AC6 */
__attribute__( ( always_inline ) ) static inline unsigned int __disable_interrupt(void)
/* Define the interrupt disable/restore macros. */
__attribute__( ( always_inline ) ) static inline UINT __get_interrupt_posture(void)
{
unsigned int primask_value;
__asm__ volatile (" MRS %0,PRIMASK ": "=r" (primask_value) );
__asm__ volatile (" CPSID i" : : : "memory" );
return(primask_value);
UINT posture;
#ifdef TX_PORT_USE_BASEPRI
__asm__ volatile ("MRS %0, BASEPRI ": "=r" (posture));
#else
__asm__ volatile ("MRS %0, PRIMASK ": "=r" (posture));
#endif
return(posture);
}
__attribute__( ( always_inline ) ) static inline void __restore_interrupt(unsigned int primask_value)
#ifdef TX_PORT_USE_BASEPRI
__attribute__( ( always_inline ) ) static inline void __set_basepri_value(UINT basepri_value)
{
__asm__ volatile (" MSR PRIMASK,%0": : "r" (primask_value): "memory" );
__asm__ volatile ("MSR BASEPRI,%0 ": : "r" (basepri_value));
}
#else
__attribute__( ( always_inline ) ) static inline void __enable_interrupts(void)
{
__asm__ volatile ("CPSIE i": : : "memory");
}
#endif
__attribute__( ( always_inline ) ) static inline void __restore_interrupt(UINT int_posture)
{
#ifdef TX_PORT_USE_BASEPRI
__set_basepri_value(int_posture);
#else
__asm__ volatile ("MSR PRIMASK,%0": : "r" (int_posture): "memory");
#endif
}
__attribute__( ( always_inline ) ) static inline unsigned int __get_primask_value(void)
__attribute__( ( always_inline ) ) static inline UINT __disable_interrupts(void)
{
unsigned int primask_value;
UINT int_posture;
__asm__ volatile (" MRS %0,PRIMASK ": "=r" (primask_value) );
return(primask_value);
int_posture = __get_interrupt_posture();
#ifdef TX_PORT_USE_BASEPRI
__set_basepri_value(TX_PORT_BASEPRI);
#else
__asm__ volatile ("CPSID i" : : : "memory");
#endif
return(int_posture);
}
__attribute__( ( always_inline ) ) static inline void __enable_interrupt(void)
{
__asm__ volatile (" CPSIE i": : : "memory" );
}
__attribute__( ( always_inline ) ) static inline void _tx_thread_system_return_inline(void)
{
unsigned int interrupt_save;
UINT interrupt_save;
/* Set PendSV to invoke ThreadX scheduler. */
*((ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
if (__get_IPSR() == 0)
if (_tx_ipsr_get() == 0)
{
interrupt_save = __get_primask_value();
__enable_interrupt();
interrupt_save = __get_interrupt_posture();
#ifdef TX_PORT_USE_BASEPRI
__set_basepri_value(0);
#else
__enable_interrupts();
#endif
__restore_interrupt(interrupt_save);
}
}
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = __disable_interrupt();
#define TX_DISABLE interrupt_save = __disable_interrupts();
#define TX_RESTORE __restore_interrupt(interrupt_save);
#elif defined(__ICCARM__) /* IAR */
static void _tx_thread_system_return_inline(void)
{
__istate_t interrupt_save;
/* Set PendSV to invoke ThreadX scheduler. */
*((ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
if (__get_IPSR() == 0)
{
interrupt_save = __get_interrupt_state();
__enable_interrupt();
__set_interrupt_state(interrupt_save);
}
}
#define TX_INTERRUPT_SAVE_AREA __istate_t interrupt_save;
#define TX_DISABLE {interrupt_save = __get_interrupt_state();__disable_interrupt();};
#define TX_RESTORE {__set_interrupt_state(interrupt_save);};
#endif /* Interrupt disable/restore macros for each compiler. */
/* Redefine _tx_thread_system_return for improved performance. */
#define _tx_thread_system_return _tx_thread_system_return_inline
#else /* TX_DISABLE_INLINE is defined */
UINT _tx_thread_interrupt_disable(VOID);
@@ -696,12 +688,11 @@ VOID _tx_thread_interrupt_restore(UIN
#define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save);
#endif /* TX_DISABLE_INLINE */
/* Define the version ID of ThreadX. This may be utilized by the application. */
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Modules ARMv8-M Version 6.1.9 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33 Version 6.1.10 *";
#else
#ifdef TX_MISRA_ENABLE
extern CHAR _tx_version_id[100];
@@ -710,5 +701,4 @@ extern CHAR _tx_version_id[];
#endif
#endif
#endif

3
ports_module/cortex_m33/iar/inc/tx_secure_interface.h
View File

@@ -51,9 +51,10 @@
/* Define internal secure thread stack function prototypes. */
extern void _tx_thread_secure_stack_initialize(void);
extern UINT _tx_thread_secure_mode_stack_initialize(void);
extern UINT _tx_thread_secure_mode_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size);
extern UINT _tx_thread_secure_mode_stack_free(TX_THREAD *thread_ptr);
extern void _tx_thread_secure_stack_initialize(void);
extern void _tx_thread_secure_stack_context_save(TX_THREAD *thread_ptr);
extern void _tx_thread_secure_stack_context_restore(TX_THREAD *thread_ptr);

8
ports_module/cortex_m33/iar/inc/txm_module_port.h
View File

@@ -25,8 +25,8 @@
/* */
/* APPLICATION INTERFACE DEFINITION RELEASE */
/* */
/* txm_module_port.h Cortex-M33/MPU/IAR */
/* 6.1.5 */
/* txm_module_port.h Cortex-M33/IAR */
/* 6.1.10 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -41,6 +41,8 @@
/* DATE NAME DESCRIPTION */
/* */
/* 03-02-2021 Scott Larson Initial Version 6.1.5 */
/* 01-31-2022 Scott Larson Modified comment(s), */
/* resulting in version 6.1.10 */
/* */
/**************************************************************************/
@@ -350,6 +352,6 @@ ALIGN_TYPE _txm_module_manager_port_dispatch(TXM_MODULE_INSTANCE *module_instanc
#define TXM_MODULE_MANAGER_VERSION_ID \
CHAR _txm_module_manager_version_id[] = \
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Module Cortex-M33/MPU/IAR Version 6.1.9 *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Module Cortex-M33/IAR Version 6.1.10 *";
#endif