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Release 6.1.10

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This commit is contained in:
Yuxin Zhou
2022-01-29 00:24:03 +00:00
parent b216ceb25e
commit f7f0957188
3111 changed files with 495735 additions and 40800 deletions
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8
ports_module/cortex_m7/ac5/example_build/build.bat
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@@ -1,8 +0,0 @@
@ECHO OFF
ECHO Starting build...
CALL build_threadx.bat
CALL build_threadx_demo.bat
CALL build_threadx_module_library.bat
CALL build_threadx_module_demo.bat
CALL build_threadx_module_manager_demo.bat
ECHO Build finished.

2
ports_module/cortex_m7/ac5/example_build/clean.bat
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@@ -1,2 +0,0 @@
@ECHO OFF
DEL *.o *.a *.axf *.map

13
ports_module/cortex_m7/ac5/example_build/setenv.bat
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@@ -1,13 +0,0 @@
@echo off
REM *** ARM DS 2020
REM SET PATH=%ProgramFiles%\Arm\Development Studio 2020.0\sw\ARMCompiler5.06u6\bin;%PATH%
REM SET ARMLMD_LICENSE_FILE=%APPDATA%\arm\ds\licenses
REM SET ARM_CONFIG_PATH=%APPDATA%\arm\ds\2020.0
REM SET ARM_PRODUCT_DEF=%ProgramFiles%\Arm\Development Studio 2020.0\sw\mappings\gold.elmap
REM *** legacy ARM DS 5
SET PATH=%ProgramFiles%\DS-5 v5.29.3\sw\ARMCompiler5.06u6\bin;%PATH%
SET ARMLMD_LICENSE_FILE=%APPDATA%\ARM\DS-5\licenses
SET ARM_CONFIG_PATH=%APPDATA%\ARM\DS-5_v5.29.3
SET ARM_PRODUCT_PATH=%ProgramFiles%\DS-5 v5.29.3\sw\mappings

9
ports_module/cortex_m7/ac5/module_manager/src/tx_timer_interrupt.s
View File

@@ -40,7 +40,7 @@
/* FUNCTION RELEASE */
/* */
/* _tx_timer_interrupt Cortex-M7/AC5 */
/* 6.1.7 */
/* 6.1.10 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -73,11 +73,15 @@
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 06-02-2021 Scott Larson Initial Version 6.1.7 */
/* 06-02-2021 Scott Larson Initial Version 6.1.7 */
/* 01-31-2022 Scott Larson Modified comment(s), added */
/* TX_NO_TIMER support, */
/* resulting in version 6.1.10 */
/* */
/**************************************************************************/
// VOID _tx_timer_interrupt(VOID)
// {
#ifndef TX_NO_TIMER
EXPORT _tx_timer_interrupt
_tx_timer_interrupt
@@ -249,6 +253,7 @@ __tx_timer_nothing_expired
DSB // Complete all memory access
BX lr // Return to caller
// }
#endif
ALIGN
LTORG
END

5
ports_module/cortex_m7/ac6/example_build/all.bat
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@@ -1,5 +0,0 @@
@ECHO OFF
CALL clean.bat
CALL setenv.bat
CALL initws.bat
CALL build.bat

24
ports_module/cortex_m7/ac6/example_build/build.bat
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@@ -1,24 +0,0 @@
@ECHO OFF
ECHO Build starting...
SETLOCAL ENABLEEXTENSIONS
IF DEFINED ARMDSIDEC GOTO IARBUILD_DEFINED
ECHO ERROR: please set ARMDSIDEC to the path of the ARM Developer Studio eclipsec.exe program
EXIT /B 2
:IARBUILD_DEFINED
IF EXIST %ARMDSIDEC% GOTO ARMDSIDEC_FOUND
ECHO ERROR: the command ARMDSIDEC doesn't exist: %ARMDSIDEC%
EXIT /B 2
:ARMDSIDEC_FOUND
%ARMDSIDEC% -nosplash -application org.eclipse.cdt.managedbuilder.core.headlessbuild -data .\workspace -build all
IF %ERRORLEVEL% EQU 0 GOTO BUILD_OK
ECHO ERROR: build failed.
EXIT /B 1
:BUILD_OK
ECHO Build completed without errors.
EXIT /B 0

4
ports_module/cortex_m7/ac6/example_build/clean.bat
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@@ -1,4 +0,0 @@
@ECHO OFF
ECHO Cleaning...
RMDIR /Q /S workspace
ECHO Done.

14
ports_module/cortex_m7/ac6/example_build/initws.bat
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@@ -1,14 +0,0 @@
@ECHO OFF
ECHO Initializing the workspace...
SETLOCAL ENABLEEXTENSIONS
%ARMDSIDEC% -nosplash -application org.eclipse.cdt.managedbuilder.core.headlessbuild -data .\workspace -import .\tx -import .\txm -import .\sample_threadx -import .\sample_threadx_module -import .\sample_threadx_module_manager
IF %ERRORLEVEL% EQU 0 GOTO WS_INITIALIZED
ECHO ERROR: failed to initialize the workspace
EXIT /B 2
:WS_INITIALIZED
echo Workspace initialized.
EXIT /B 0

16
ports_module/cortex_m7/ac6/example_build/setenv.bat
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@@ -1,16 +0,0 @@
@ECHO OFF
SET ARMDSDIR="C:\Program Files\Arm\Development Studio 2020.0"
IF EXIST %ARMDSDIR% GOTO FOUND_ARMDS
ECHO ARM Development Studio not found.
EXIT /B 1
:FOUND_ARMDS
SET ARMDSIDEC=%ARMDSDIR%\bin\armds_idec.exe
IF EXIST %ARMDSIDEC% GOTO FOUND_ARMDS_IDEC
ECHO armds_idec.exe not found.
EXIT /B 1
:FOUND_ARMDS_IDEC
ECHO armds_idec.exe found at %ARMDSIDEC%
EXIT /B 0

10
ports_module/cortex_m7/ac6/inc/txm_module_port.h
View File

@@ -26,7 +26,7 @@
/* APPLICATION INTERFACE DEFINITION RELEASE */
/* */
/* txm_module_port.h Cortex-M7/AC6 */
/* 6.1.9 */
/* 6.1.10 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -41,6 +41,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 10-15-2021 Scott Larson Initial Version 6.1.9 */
/* 01-31-2022 Scott Larson Modified comments and made */
/* heap user-configurable, */
/* resulting in version 6.1.10 */
/* */
/**************************************************************************/
@@ -91,6 +94,11 @@ The following extensions must also be defined in tx_port.h:
VOID (*tx_timer_module_expiration_function)(ULONG id);
*/
/* Users can define the module heap size. */
#ifndef TXM_MODULE_HEAP_SIZE
#define TXM_MODULE_HEAP_SIZE 512
#endif
/* Define the kernel stack size for a module thread. */
#ifndef TXM_MODULE_KERNEL_STACK_SIZE
#define TXM_MODULE_KERNEL_STACK_SIZE 768

38
ports_module/cortex_m7/ac6/module_lib/src/txm_module_initialize.S
View File

@@ -33,7 +33,7 @@
/* FUNCTION RELEASE */
/* */
/* _txm_module_initialize Cortex-M7/AC6 */
/* 6.1.9 */
/* 6.1.10 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -63,14 +63,17 @@
/* DATE NAME DESCRIPTION */
/* */
/* 10-15-2021 Scott Larson Initial Version 6.1.9 */
/* 01-31-2022 Scott Larson Modified comments and made */
/* heap user configurable, */
/* resulting in version 6.1.10 */
/* */
/**************************************************************************/
// VOID _txm_module_initialize(VOID)
.global _txm_module_initialize
.thumb_func
_txm_module_initialize:
PUSH {r4-r12,lr} // Save dregs and LR
//B __scatterload // Call ARM func to initialize variables
PUSH {r0-r12,lr} // Save dregs and LR
B __scatterload // Call ARM func to initialize variables
// Override the __rt_exit function.
.global __rt_exit
@@ -79,25 +82,10 @@ __rt_exit:
POP {r4-r12,lr} // Restore dregs and LR
BX lr // Return to caller
#define TXM_MODULE_HEAP_SIZE 512
// returns heap start address in R0
// returns heap end address in R2
// does not touch SP, it is already set up before the module runs
.global __user_setup_stackheap
.thumb_func
__user_setup_stackheap:
LDR r1, _txm_heap // load heap offset
MOV r2, TXM_MODULE_HEAP_SIZE // load heap size
ADD r2, r2, r0 // calculate heap end address
BX lr
// dummy main function
.global main
.thumb_func
main:
BX lr
.align 8
_txm_heap:
.zero TXM_MODULE_HEAP_SIZE
.global __rt_entry
.type __rt_entry, %function
__rt_entry:
POP {r0-r1}
BL __rt_lib_init
POP {r2-r12,lr} // Restore dregs and LR
BX lr // Return to caller

15
ports_module/cortex_m7/ac6/module_lib/src/txm_module_thread_shell_entry.c
View File

@@ -44,10 +44,12 @@ TXM_MODULE_THREAD_ENTRY_INFO *_txm_module_entry_info;
ULONG (*_txm_module_kernel_call_dispatcher)(ULONG kernel_request, ULONG param_1, ULONG param_2, ULONG param3);
/* Define the startup code that clears the uninitialized global data and sets up the
preset global variables. */
/* Define the module's heap and align it to 8 bytes. */
__attribute__((aligned(8))) UCHAR txm_heap[TXM_MODULE_HEAP_SIZE];
extern VOID _txm_module_initialize(VOID);
/* Use our asm routine that calls the ARM code to initialize data and heap. */
extern VOID _txm_module_initialize(VOID *heap_base, VOID *heap_top);
/**************************************************************************/
@@ -55,7 +57,7 @@ extern VOID _txm_module_initialize(VOID);
/* FUNCTION RELEASE */
/* */
/* _txm_module_thread_shell_entry Cortex-M7/AC6 */
/* 6.1.9 */
/* 6.1.10 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -92,6 +94,9 @@ extern VOID _txm_module_initialize(VOID);
/* DATE NAME DESCRIPTION */
/* */
/* 10-15-2021 Scott Larson Initial Version 6.1.9 */
/* 01-31-2022 Scott Larson Modified comments and made */
/* heap user configurable, */
/* resulting in version 6.1.10 */
/* */
/**************************************************************************/
VOID _txm_module_thread_shell_entry(TX_THREAD *thread_ptr, TXM_MODULE_THREAD_ENTRY_INFO *thread_info)
@@ -107,7 +112,7 @@ VOID _txm_module_thread_shell_entry(TX_THREAD *thread_ptr, TXM_MODULE_THREAD_EN
if (thread_info -> txm_module_thread_entry_info_start_thread)
{
/* Initialize the C environment. */
_txm_module_initialize();
_txm_module_initialize(&txm_heap[0], &txm_heap[TXM_MODULE_HEAP_SIZE-1]);
/* Save the entry info pointer, for later use. */
_txm_module_entry_info = thread_info;

9
ports_module/cortex_m7/ac6/module_manager/src/tx_timer_interrupt.S
View File

@@ -38,7 +38,7 @@
/* FUNCTION RELEASE */
/* */
/* _tx_timer_interrupt Cortex-M7/AC6 */
/* 6.1.7 */
/* 6.1.10 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -71,11 +71,15 @@
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 06-02-2021 Scott Larson Initial Version 6.1.7 */
/* 06-02-2021 Scott Larson Initial Version 6.1.7 */
/* 01-31-2022 Scott Larson Modified comment(s), added */
/* TX_NO_TIMER support, */
/* resulting in version 6.1.10 */
/* */
/**************************************************************************/
// VOID _tx_timer_interrupt(VOID)
// {
#ifndef TX_NO_TIMER
.global _tx_timer_interrupt
.thumb_func
_tx_timer_interrupt:
@@ -248,3 +252,4 @@ __tx_timer_nothing_expired:
DSB // Complete all memory access
BX lr // Return to caller
// }
#endif

5
ports_module/cortex_m7/gnu/example_build/build_all.bat
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@@ -1,5 +0,0 @@
call build_threadx.bat
call build_threadx_module_library.bat
call build_threadx_module_sample.bat
call build_threadx_module_manager_sample.bat

22
ports_module/cortex_m7/gnu/module_manager/src/tx_thread_schedule.S
View File

@@ -40,7 +40,7 @@
/* FUNCTION RELEASE */
/* */
/* _tx_thread_schedule Cortex-M7/GNU */
/* 6.1.9 */
/* 6.1.10 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -74,6 +74,8 @@
/* DATE NAME DESCRIPTION */
/* */
/* 10-15-2021 Scott Larson Initial Version 6.1.9 */
/* 01-31-2022 Scott Larson Fixed predefined macro name, */
/* resulting in version 6.1.10 */
/* */
/**************************************************************************/
// VOID _tx_thread_schedule(VOID)
@@ -92,7 +94,7 @@ _tx_thread_schedule:
LDR r2, =_tx_thread_preempt_disable // Build address of preempt disable flag
STR r0, [r2, #0] // Clear preempt disable flag
#ifdef __ARM_PCS_VFP
#ifdef __ARM_FP
/* Clear CONTROL.FPCA bit so VFP registers aren't unnecessarily stacked. */
MRS r0, CONTROL // Pickup current CONTROL register
BIC r0, r0, #4 // Clear the FPCA bit
@@ -191,7 +193,7 @@ UsageFault_Handler:
// Bit 7 = 1 -> MMFAR is valid
STRB r1, [r0] // Clear the MMFSR
#ifdef __ARM_PCS_VFP
#ifdef __ARM_FP
LDR r0, =0xE000EF34 // Cleanup FPU context: Load FPCCR address
LDR r1, [r0] // Load FPCCR
BIC r1, r1, #1 // Clear the lazy preservation active bit
@@ -258,7 +260,7 @@ __tx_ts_handler:
STR r3, [r0] // Set _tx_thread_current_ptr to NULL
MRS r12, PSP // Pickup PSP pointer (thread's stack pointer)
STMDB r12!, {r4-r11} // Save its remaining registers
#ifdef __ARM_PCS_VFP
#ifdef __ARM_FP
TST LR, #0x10 // Determine if the VFP extended frame is present
BNE _skip_vfp_save
VSTMDB r12!,{s16-s31} // Yes, save additional VFP registers
@@ -383,7 +385,7 @@ __tx_ts_restore:
STR r1, [r0] // Enable MPU
skip_mpu_setup:
LDMIA r12!, {LR} // Pickup LR
#ifdef __ARM_PCS_VFP
#ifdef __ARM_FP
TST LR, #0x10 // Determine if the VFP extended frame is present
BNE _skip_vfp_restore // If not, skip VFP restore
VLDMIA r12!, {s16-s31} // Yes, restore additional VFP registers
@@ -448,14 +450,14 @@ __tx_SVCallHandler:
#endif
MRS r3, PSP // Pickup thread stack pointer
#ifdef __ARM_PCS_VFP
#ifdef __ARM_FP
TST lr, #0x10 // Test for extended module stack
ITT EQ
ORREQ r3, r3, #1 // If so, set LSB in thread stack pointer to indicate extended frame
ORREQ lr, lr, #0x10 // Set bit, return with standard frame
#endif
STR r3, [r2, #0xB0] // Save thread stack pointer
#ifdef __ARM_PCS_VFP
#ifdef __ARM_FP
BIC r3, #1 // Clear possibly OR'd bit
#endif
@@ -504,7 +506,7 @@ _tx_thread_user_return:
STR r3, [r2, #20] // Set stack size
#endif
#ifdef __ARM_PCS_VFP
#ifdef __ARM_FP
/* If lazy stacking is pending, check if it can be cleared.
if(LSPACT && tx_thread_module_stack_start < FPCAR && FPCAR < tx_thread_module_stack_end)
then clear LSPACT. */
@@ -528,7 +530,7 @@ _tx_no_lazy_clear:
LDR r0, [r2, #0xB0] // Load the module thread stack pointer
MRS r3, PSP // Pickup kernel stack pointer
#ifdef __ARM_PCS_VFP
#ifdef __ARM_FP
TST r0, #1 // Is module stack extended?
ITTE NE // If so...
BICNE lr, #0x10 // Clear bit, return with extended frame
@@ -589,7 +591,7 @@ _txm_module_user_mode_exit:
NOP
// }
#ifdef __ARM_PCS_VFP
#ifdef __ARM_FP
.global tx_thread_fpu_enable
.thumb_func

9
ports_module/cortex_m7/gnu/module_manager/src/tx_timer_interrupt.S
View File

@@ -38,7 +38,7 @@
/* FUNCTION RELEASE */
/* */
/* _tx_timer_interrupt Cortex-M7/GNU */
/* 6.1.7 */
/* 6.1.10 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -71,11 +71,15 @@
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 06-02-2021 Scott Larson Initial Version 6.1.7 */
/* 06-02-2021 Scott Larson Initial Version 6.1.7 */
/* 01-31-2022 Scott Larson Modified comment(s), added */
/* TX_NO_TIMER support, */
/* resulting in version 6.1.10 */
/* */
/**************************************************************************/
// VOID _tx_timer_interrupt(VOID)
// {
#ifndef TX_NO_TIMER
.global _tx_timer_interrupt
.thumb_func
_tx_timer_interrupt:
@@ -248,3 +252,4 @@ __tx_timer_nothing_expired:
DSB // Complete all memory access
BX lr // Return to caller
// }
#endif

2
ports_module/cortex_m7/iar/inc/tx_port.h
View File

@@ -509,7 +509,7 @@ void tx_thread_fpu_disable(void);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/IAR Version 6.x *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/IAR Version 6.1.10 *";
#else
#ifdef TX_MISRA_ENABLE
extern CHAR _tx_version_id[100];

2
ports_module/cortex_m7/iar/inc/txm_module_port.h
View File

@@ -377,6 +377,6 @@ UINT _txm_module_manager_inside_data_check(TXM_MODULE_INSTANCE *module_instance
#define TXM_MODULE_MANAGER_VERSION_ID \
CHAR _txm_module_manager_version_id[] = \
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Module Cortex-M7/IAR Version 6.x *";
"Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Module Cortex-M7/IAR Version 6.1.10 *";
#endif

9
ports_module/cortex_m7/iar/module_manager/src/tx_timer_interrupt.s
View File

@@ -40,7 +40,7 @@
/* FUNCTION RELEASE */
/* */
/* _tx_timer_interrupt Cortex-M7/IAR */
/* 6.1.7 */
/* 6.1.10 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -73,11 +73,15 @@
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 06-02-2021 Scott Larson Initial Version 6.1.7 */
/* 06-02-2021 Scott Larson Initial Version 6.1.7 */
/* 01-31-2022 Scott Larson Modified comment(s), added */
/* TX_NO_TIMER support, */
/* resulting in version 6.1.10 */
/* */
/**************************************************************************/
// VOID _tx_timer_interrupt(VOID)
// {
#ifndef TX_NO_TIMER
PUBLIC _tx_timer_interrupt
_tx_timer_interrupt:
@@ -249,4 +253,5 @@ __tx_timer_nothing_expired:
DSB // Complete all memory access
BX lr // Return to caller
// }
#endif
END