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Release 6.1.10

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This commit is contained in:
Yuxin Zhou
2022-01-29 00:24:03 +00:00
parent b216ceb25e
commit f7f0957188
3111 changed files with 495735 additions and 40800 deletions
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4
ports_module/rxv2/iar/module_manager/src/tx_initialize_low_level.s
View File

@@ -29,7 +29,7 @@
/* FUNCTION RELEASE */
/* */
/* _tx_initialize_low_level RXv2/IAR */
/* 6.x */
/* 6.1.10 */
/* AUTHOR */
/* */
/* William E. Lamie, Microsoft Corporation */
@@ -62,7 +62,7 @@
/* */
/* DATE NAME DESCRIPTION */
/* */
/* xx-xx-xxxx William E. Lamie Initial Version 6.x */
/* 01-31-2022 William E. Lamie Initial Version 6.1.10 */
/* */
/**************************************************************************/
public __tx_initialize_low_level

62
ports_module/rxv2/iar/module_manager/src/tx_thread_context_restore.s
View File

@@ -19,7 +19,18 @@
;/** */
;/**************************************************************************/
;/**************************************************************************/
;
;
;#define TX_SOURCE_CODE
;
;
;/* Include necessary system files. */
;
;#include "tx_api.h"
;#include "tx_thread.h"
;#include "tx_timer.h"
;
;
extern __tx_thread_system_state
extern __tx_thread_current_ptr
extern __tx_thread_preempt_disable
@@ -34,7 +45,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_context_restore RXv2/IAR */
;/* 6.x */
;/* 6.1.9 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -66,7 +77,11 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* xx-xx-xxxx William E. Lamie Initial Version 6.x */
;/* 12-30-2020 William E. Lamie Initial Version 6.1.3 */
;/* 10-15-2021 William E. Lamie Modified comment(s), and */
;/* removed unnecessary stack */
;/* type placement, */
;/* resulting in version 6.1.9 */
;/* */
;/**************************************************************************/
public __tx_thread_context_restore
@@ -75,7 +90,7 @@ __tx_thread_context_restore:
;
; /* Lockout interrupts. */
CLRPSW I ; disable interrupts
CLRPSW I ; Disable interrupts
; /* Determine if interrupts are nested. */
; if (--_tx_thread_system_state)
@@ -94,11 +109,11 @@ __tx_thread_context_restore:
; and return to the point of interrupt. */
;
__tx_thread_nested_restore:
POPC FPSW ; restore FPU status
POPM R14-R15 ; restore R14-R15
POPM R3-R5 ; restore R3-R5
POPM R1-R2 ; restore R1-R2
RTE ; return to point of interrupt, restore PSW including IPL
POPC FPSW ; Restore FPU status
POPM R14-R15 ; Restore R14-R15
POPM R3-R5 ; Restore R3-R5
POPM R1-R2 ; Restore R1-R2
RTE ; Return to point of interrupt, restore PSW including IPL
; }
__tx_thread_not_nested_restore:
@@ -113,22 +128,22 @@ __tx_thread_not_nested_restore:
CMP #0, R2
BEQ __tx_thread_idle_system_restore
MOV.L #__tx_thread_preempt_disable, R3 ; pick up preempt disable flag
MOV.L #__tx_thread_preempt_disable, R3 ; Pick up preempt disable flag
MOV.L [R3], R3
CMP #0, R3
BNE __tx_thread_no_preempt_restore ; if pre-empt disable flag set, we simply return to the original point of interrupt regardless
BNE __tx_thread_no_preempt_restore ; If pre-empt disable flag set, we simply return to the original point of interrupt regardless
MOV.L #__tx_thread_execute_ptr, R3 ; (_tx_thread_current_ptr != _tx_thread_execute_ptr)
CMP [R3], R2
BNE __tx_thread_preempt_restore ; jump to pre-empt restoring
BNE __tx_thread_preempt_restore ; Jump to pre-empt restoring
;
__tx_thread_no_preempt_restore:
SETPSW U ; user stack
POPC FPSW ; restore FPU status
POPM R14-R15 ; restore R14-R15
POPM R3-R5 ; restore R3-R5
POPM R1-R2 ; restore R1-R2
RTE ; return to point of interrupt, restore PSW including IPL
SETPSW U ; User stack
POPC FPSW ; Restore FPU status
POPM R14-R15 ; Restore R14-R15
POPM R3-R5 ; Restore R3-R5
POPM R1-R2 ; Restore R1-R2
RTE ; Return to point of interrupt, restore PSW including IPL
; }
; else
@@ -143,7 +158,7 @@ __tx_thread_preempt_restore:
MOV.L #__tx_timer_time_slice, R3 ; Pickup time-slice address
MOV.L [R3],R4 ; Pickup actual time-slice
CMP #0, R4
BEQ __tx_thread_dont_save_ts ; no time slice to save
BEQ __tx_thread_dont_save_ts ; No time slice to save
;
; _tx_thread_current_ptr -> tx_thread_time_slice = _tx_timer_time_slice;
; _tx_timer_time_slice = 0;
@@ -156,7 +171,7 @@ __tx_thread_dont_save_ts:
;
; /* Now store the remaining registers! */
SETPSW U ; user stack
SETPSW U ; User stack
PUSHM R6-R13
MVFACGU #0, A1, R4 ; Save accumulators.
@@ -168,9 +183,6 @@ __tx_thread_dont_save_ts:
MVFACLO #0, A0, R6
PUSHM R4-R6
MOV.L #1, R3 ; indicate interrupt stack frame
PUSH.L R3
;
; /* Clear the current task pointer. */
; _tx_thread_current_ptr = TX_NULL;
@@ -185,8 +197,8 @@ __tx_thread_dont_save_ts:
; _tx_thread_schedule();
__tx_thread_idle_system_restore:
MVTC #0, PSW ; reset interrupt priority level to 0
BRA __tx_thread_schedule ; jump to scheduler
MVTC #0, PSW ; Reset interrupt priority level to 0
BRA __tx_thread_schedule ; Jump to scheduler
; }
;
;}

62
ports_module/rxv2/iar/module_manager/src/tx_thread_context_save.s
View File

@@ -19,7 +19,17 @@
;/** */
;/**************************************************************************/
;/**************************************************************************/
;
;
;#define TX_SOURCE_CODE
;
;
;/* Include necessary system files. */
;
;#include "tx_api.h"
;#include "tx_thread.h"
;#include "tx_timer.h"
;
extern __tx_thread_system_state
extern __tx_thread_current_ptr
@@ -29,7 +39,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_context_save RXv2/IAR */
;/* 6.x */
;/* 6.1.9 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -60,7 +70,9 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* xx-xx-xxxx William E. Lamie Initial Version 6.x */
;/* 12-30-2020 William E. Lamie Initial Version 6.1.3 */
;/* 10-15-2021 William E. Lamie Modified comment(s), */
;/* resulting in version 6.1.9 */
;/* */
;/**************************************************************************/
;VOID _tx_thread_context_save(VOID)
@@ -83,8 +95,8 @@ __tx_thread_context_save:
; {
;
MOV.L #__tx_thread_system_state, R1 ; pick up address of system state
MOV.L [R1], R2 ; pick up system state
MOV.L #__tx_thread_system_state, R1 ; Pick up address of system state
MOV.L [R1], R2 ; Pick up system state
CMP #0, R2 ; 0 -> no nesting
BEQ __tx_thread_not_nested_save
;
@@ -96,11 +108,11 @@ __tx_thread_context_save:
;
; /* Save the rest of the scratch registers on the interrupt stack and return to the
; calling ISR. */
POP R1 ; recuperate return address from stack
POP R1 ; Recuperate return address from stack
PUSHM R3-R5
PUSHM R14-R15
PUSHC FPSW ; (top) FPSW, R14, R15, R3, R4, R5, R1, R2, PC, PSW (bottom)
JMP R1 ; return address was preserved in R1
JMP R1 ; Return address was preserved in R1
;
__tx_thread_not_nested_save:
@@ -121,27 +133,27 @@ __tx_thread_not_nested_save:
; /* Move stack frame over to the current threads stack. */
; /* complete stack frame with registers not saved yet (R3-R5, R14-R15, FPSW) */
;
MVFC USP, R1 ; pick up user stack pointer
MVFC USP, R1 ; Pick up user stack pointer
MOV.L 16[R0], R2
MOV.L R2, [-R1] ; save PSW on thread stack
MOV.L R2, [-R1] ; Save PSW on thread stack
MOV.L 12[R0], R2
MOV.L R2, [-R1] ; save PC on thread stack
MOV.L R2, [-R1] ; Save PC on thread stack
MOV.L 8[R0], R2
MOV.L R2, [-R1] ; save R2 on thread stack
MOV.L R2, [-R1] ; Save R2 on thread stack
MOV.L 4[R0], R2
MOV.L R2, [-R1] ; save R1 on thread stack
MOV.L R5, [-R1] ; save R5 on thread stack
MOV.L R4, [-R1] ; save R4 on thread stack
MOV.L R3, [-R1] ; save R3 on thread stack
MOV.L R15, [-R1] ; save R15 on thread stack
MOV.L R14, [-R1] ; save R14 on thread stack
MOV.L R2, [-R1] ; Save R1 on thread stack
MOV.L R5, [-R1] ; Save R5 on thread stack
MOV.L R4, [-R1] ; Save R4 on thread stack
MOV.L R3, [-R1] ; Save R3 on thread stack
MOV.L R15, [-R1] ; Save R15 on thread stack
MOV.L R14, [-R1] ; Save R14 on thread stack
MVFC FPSW, R3
MOV.L R3, [-R1] ; save FPSW on thread stack
MOV.L R3, [-R1] ; Save FPSW on thread stack
POP R2 ; pick up return address from interrupt stack
ADD #16, R0, R0 ; correct interrupt stack pointer back to the bottom
MVTC R1, USP ; set user/thread stack pointer
JMP R2 ; return to ISR
POP R2 ; Pick up return address from interrupt stack
ADD #16, R0, R0 ; Correct interrupt stack pointer back to the bottom
MVTC R1, USP ; Set user/thread stack pointer
JMP R2 ; Return to ISR
; }
; else
@@ -151,9 +163,9 @@ __tx_thread_idle_system_save:
;
; /* Interrupt occurred in the scheduling loop. */
;
POP R1 ; pick up return address
ADD #16, R0, R0 ; correct interrupt stack pointer back to the bottom (PC), don't care about saved registers
JMP R1 ; return to caller
POP R1 ; Pick up return address
ADD #16, R0, R0 ; Correct interrupt stack pointer back to the bottom (PC), don't care about saved registers
JMP R1 ; Return to caller
;
; }
;}

22
ports_module/rxv2/iar/module_manager/src/tx_thread_interrupt_control.s
View File

@@ -19,14 +19,22 @@
;/** */
;/**************************************************************************/
;/**************************************************************************/
;
;#define TX_SOURCE_CODE
;
;
;/* Include necessary system files. */
;
;#include "tx_api.h"
;#include "tx_thread.h"
;
section .text:CODE:ROOT
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_interrupt_control RXv2/IAR */
;/* 6.x */
;/* 6.1.9 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -56,7 +64,9 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* xx-xx-xxxx William E. Lamie Initial Version 6.x */
;/* 12-30-2020 William E. Lamie Initial Version 6.1.3 */
;/* 10-15-2021 William E. Lamie Modified comment(s), */
;/* resulting in version 6.1.9 */
;/* */
;/**************************************************************************/
;UINT _tx_thread_interrupt_control(UINT new_posture)
@@ -74,10 +84,10 @@ __tx_thread_interrupt_control:
; /* Apply the new interrupt posture. */
;
BTST #16, R1 ; test I bit of PSW of "new posture"
BMNE #16, R2 ; conditionally set I bit of intermediate posture
BTST #16, R1 ; Test I bit of PSW of "new posture"
BMNE #16, R2 ; Conditionally set I bit of intermediate posture
MVTC R2, PSW ; save intermediate posture to PSW
MVTC R2, PSW ; Save intermediate posture to PSW
MOV.L R3,R1 ; Get original SR
RTS ; Return to caller

25
ports_module/rxv2/iar/module_manager/src/tx_thread_schedule.s
View File

@@ -35,7 +35,7 @@
/* FUNCTION RELEASE */
/* */
/* _tx_thread_schedule RXv2/IAR */
/* 6.x */
/* 6.1.10 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -68,7 +68,11 @@
/* */
/* DATE NAME DESCRIPTION */
/* */
/* xx-xx-xxxx Scott Larson Initial Version 6.x */
/* 12-30-2020 William E. Lamie Initial Version 6.1.3 */
/* 10-15-2021 William E. Lamie Modified comment(s), and */
/* removed unnecessary stack */
/* type checking, */
/* resulting in version 6.1.9 */
/* */
/**************************************************************************/
// VOID _tx_thread_schedule(VOID)
@@ -94,7 +98,7 @@ __tx_thread_schedule_loop:
/* Yes! We have a thread to execute. Lockout interrupts and transfer control to it. */
CLRPSW I // disable interrupts
CLRPSW I // Disable interrupts
/* Setup the current thread pointer. */
// _tx_thread_current_ptr = _tx_thread_execute_ptr;
@@ -118,7 +122,7 @@ __tx_thread_schedule_loop:
/* Switch to the thread's stack. */
// SP = _tx_thread_execute_ptr -> tx_thread_stack_ptr;
SETPSW U // user stack mode
SETPSW U // User stack mode
MOV.L 8[R2],SP // Pickup stack pointer
@@ -167,13 +171,6 @@ __tx_thread_schedule_loop:
skip_mpu_setup
/* Determine if an interrupt frame or a synchronous task suspension frame is present. */
POP R1 // Pickup stack type
CMP #1, R1 // Is it an interrupt stack?
BNE __tx_thread_synch_return // No, a synchronous return frame is present.
POPM R1-R3 // Restore accumulators.
MVTACLO R3, A0
MVTACHI R2, A0
@@ -188,12 +185,8 @@ skip_mpu_setup
POPM R14-R15
POPM R3-R5
POPM R1-R2
RTE // return to point of interrupt, this restores PC and PSW
RTE // Return to point of interrupt, this restores PC and PSW
__tx_thread_synch_return
POPC PSW
POPM R6-R13 // Recover solicited stack frame
RTS
// }
extern __tx_thread_context_save

55
ports_module/rxv2/iar/module_manager/src/tx_thread_stack_build.s
View File

@@ -28,7 +28,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_stack_build RXv2/IAR */
;/* 6.x */
;/* 6.1.9 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -60,20 +60,21 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* xx-xx-xxxx William E. Lamie Initial Version 6.x */
;/* 12-30-2020 William E. Lamie Initial Version 6.1.3 */
;/* 10-15-2021 William E. Lamie Modified comment(s), and */
;/* removed unnecessary stack */
;/* type placement, */
;/* resulting in version 6.1.9 */
;/* */
;/**************************************************************************/
public __tx_thread_stack_build
__tx_thread_stack_build:
;
;
; /* Build an interrupt frame. The form of the fake interrupt stack
; on the Renesas RX should look like the following after it is built:
;
; Stack Top: 1 Interrupt stack frame type
; ACC0
; Stack Top: ACC0
; ACC1
; R6
; R7
@@ -98,33 +99,33 @@ __tx_thread_stack_build:
; Stack Bottom: (higher memory address) */
;
MOV.L 16[R1],R3 ; Pickup end of stack area
BCLR #0, R3 ; mask for 4-byte alignment
BCLR #0, R3 ; Mask for 4-byte alignment
BCLR #1, R3
;
; /* Build the stack frame. */
;
MOV.L #30000h, R4
MOV.L R4, [-R3] ; initial PSW (SVC mode, U flag set)
MOV.L R2, [-R3] ; initial PC
MOV.L R4, [-R3] ; Initial PSW (SVC mode, U flag set)
MOV.L R2, [-R3] ; Initial PC
MOV.L #0, R4
MOV.L R4,[-R3] ; initial R2 ...
MOV.L R4,[-R3] ; initial R1 ...
MOV.L R4,[-R3] ; initial R5 ...
MOV.L R4,[-R3] ; initial R4 ...
MOV.L R4,[-R3] ; initial R3 ...
MOV.L R4,[-R3] ; initial R15 ...
MOV.L R4,[-R3] ; initial R14 ...
MOV.L R4,[-R3] ; Initial R2 ...
MOV.L R4,[-R3] ; Initial R1 ...
MOV.L R4,[-R3] ; Initial R5 ...
MOV.L R4,[-R3] ; Initial R4 ...
MOV.L R4,[-R3] ; Initial R3 ...
MOV.L R4,[-R3] ; Initial R15 ...
MOV.L R4,[-R3] ; Initial R14 ...
MVFC FPSW, r4
MOV.L R4, [-R3] ; initial FPSW
MOV.L R4, [-R3] ; Initial FPSW
MOV.L #0, R4
MOV.L R4,[-R3] ; initial R13 ...
MOV.L R4,[-R3] ; initial R12 ...
MOV.L R4,[-R3] ; initial R11 ...
MOV.L R4,[-R3] ; initial R10 ...
MOV.L R4,[-R3] ; initial R9 ...
MOV.L R4,[-R3] ; initial R8 ...
MOV.L R4,[-R3] ; initial R7 ...
MOV.L R4,[-R3] ; initial R6 ...
MOV.L R4,[-R3] ; Initial R13 ...
MOV.L R4,[-R3] ; Initial R12 ...
MOV.L R4,[-R3] ; Initial R11 ...
MOV.L R4,[-R3] ; Initial R10 ...
MOV.L R4,[-R3] ; Initial R9 ...
MOV.L R4,[-R3] ; Initial R8 ...
MOV.L R4,[-R3] ; Initial R7 ...
MOV.L R4,[-R3] ; Initial R6 ...
MOV.L R4,[-R3] ; Accumulator 1
MOV.L R4,[-R3]
@@ -134,12 +135,10 @@ __tx_thread_stack_build:
MOV.L R4,[-R3]
MOV.L R4,[-R3]
MOV.L #1, R4
MOV.L R4,[-R3] ; indicate interrupt stack frame
; /* Setup stack pointer. */
; thread_ptr -> tx_thread_stack_ptr = R1;
MOV.L R3, 8[R1]
; store initial SP in thread control block
; Store initial SP in thread control block
RTS
;}

6
ports_module/rxv2/iar/module_manager/src/tx_thread_system_return.s
View File

@@ -27,7 +27,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_thread_system_return RXv2/IAR */
;/* 6.x */
;/* 6.1.9 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -59,7 +59,9 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* xx-xx-xxxx William E. Lamie Initial Version 6.x */
;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
;/* 10-15-2021 William E. Lamie Modified comment(s), */
;/* resulting in version 6.1.9 */
;/* */
;/**************************************************************************/

14
ports_module/rxv2/iar/module_manager/src/tx_timer_interrupt.s
View File

@@ -37,7 +37,7 @@
;/* FUNCTION RELEASE */
;/* */
;/* _tx_timer_interrupt RXv2/IAR */
;/* 6.x */
;/* 6.1.9 */
;/* AUTHOR */
;/* */
;/* William E. Lamie, Microsoft Corporation */
@@ -73,7 +73,9 @@
;/* */
;/* DATE NAME DESCRIPTION */
;/* */
;/* xx-xx-xxxx William E. Lamie Initial Version 6.x */
;/* 12-30-2020 William E. Lamie Initial Version 6.1.3 */
;/* 10-15-2021 William E. Lamie Modified comment(s), */
;/* resulting in version 6.1.9 */
;/* */
;/**************************************************************************/
@@ -134,7 +136,7 @@ __tx_timer_no_time_slice:
;
MOV.L #__tx_timer_current_ptr, R1 ; Pickup address of current timer ptr
MOV.L [R1], R2 ; Pickup current pointer
MOV.L [R2+], R1 ; pickup timer list entry, _tx_timer_current_ptr++
MOV.L [R2+], R1 ; Pickup timer list entry, _tx_timer_current_ptr++
CMP #0, R1 ; Is timer pointer NULL?
BEQ __tx_timer_no_timer ; Yes, no timer has expired
@@ -175,7 +177,7 @@ __tx_timer_no_timer:
;
__tx_timer_skip_wrap:
MOV.L #__tx_timer_current_ptr,R1
MOV.L R2, [R1] ; store in updated pointer in _tx_timer_current_ptr
MOV.L R2, [R1] ; Store in updated pointer in _tx_timer_current_ptr
__tx_timer_done:
;
@@ -229,7 +231,7 @@ __tx_timer_nothing_expired:
POPM R1-R5
POPM R14-R15
;
RTS ; return to point of interrupt
RTS ; Return to point of interrupt
;
;}
END
END

4
ports_module/rxv2/iar/module_manager/src/txm_module_manager_thread_stack_build.s
View File

@@ -27,7 +27,7 @@
/* FUNCTION RELEASE */
/* */
/* _txm_module_manager_thread_stack_build RXv2/IAR */
/* 6.x */
/* 6.1.10 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -59,7 +59,7 @@
/* */
/* DATE NAME DESCRIPTION */
/* */
/* xx-xx-xxxx Scott Larson Initial Version 6.x */
/* 01-31-2022 Scott Larson Initial Version 6.1.10 */
/* */
/**************************************************************************/
// VOID _txm_module_manager_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(TX_THREAD *, TXM_MODULE_INSTANCE *))