Release 6.2.0

Delete cortexm_crt0.s and tx_simulator_startup.s which were removed from the latest release

CMakeLists.txt

@@ -31,8 +31,17 @@ endif()
 # Pick up the common stuff
 add_subdirectory(${CMAKE_CURRENT_LIST_DIR}/common)
 
-
-
+# Define the FreeRTOS adaptation layer
+add_library(freertos-threadx EXCLUDE_FROM_ALL)
+target_include_directories(freertos-threadx
+    PUBLIC
+    ${CMAKE_CURRENT_LIST_DIR}/utility/rtos_compatibility_layers/FreeRTOS
+)
+target_sources(freertos-threadx
+    PRIVATE
+    ${CMAKE_CURRENT_LIST_DIR}/utility/rtos_compatibility_layers/FreeRTOS/tx_freertos.c
+)
+target_link_libraries(freertos-threadx PUBLIC threadx)
 
 # If the user provided an override, copy it to the custom directory
 if (NOT TX_USER_FILE)

README.md

@@ -1,117 +1,189 @@
-![cortex_m0](https://github.com/azure-rtos/threadx/workflows/cortex_m0/badge.svg)
-![cortex_m3](https://github.com/azure-rtos/threadx/workflows/cortex_m3/badge.svg)
-![cortex_m4](https://github.com/azure-rtos/threadx/workflows/cortex_m4/badge.svg)
-![cortex_m7](https://github.com/azure-rtos/threadx/workflows/cortex_m7/badge.svg)
-
 # Azure RTOS ThreadX
 
 This advanced real-time operating system (RTOS) is designed specifically for deeply embedded applications. Among the multiple benefits it provides are advanced scheduling facilities, message passing, interrupt management, and messaging services. Azure RTOS ThreadX has many advanced features, including picokernel architecture, preemption threshold, event chaining, and a rich set of system services.
 
-## Documentation
+Here are the key features and modules of ThreadX:
 
-Documentation for this library can be found here: http://docs.microsoft.com/azure/rtos/threadx
+![ThreadX Key Features](./docs/threadx-features.png)
+
+## Getting Started
+
+Azure RTOS has been integrated to the semiconductor's SDKs and development environment. You can develop using the tools of choice from [STMicroelectronics](https://www.st.com/content/st_com/en/campaigns/x-cube-azrtos-azure-rtos-stm32.html), [NXP](https://www.nxp.com/design/software/embedded-software/azure-rtos-for-nxp-microcontrollers:AZURE-RTOS), [Renesas](https://github.com/renesas/azure-rtos) and [Microchip](https://mu.microchip.com/get-started-simplifying-your-iot-design-with-azure-rtos).
+
+We also provide [getting started guide](https://github.com/azure-rtos/getting-started) and [samples](https://github.com/azure-rtos/samples) using hero development boards from semiconductors you can build and test with.
+
+See [Overview of Azure RTOS ThreadX](https://learn.microsoft.com/en-us/azure/rtos/threadx/overview-threadx) for the high-level overview, and all documentation and APIs can be found in: [Azure RTOS ThreadX documentation](https://learn.microsoft.com/en-us/azure/rtos/threadx/). 
+
+Also there is dedicated [learning path of Azure RTOS ThreadX](https://learn.microsoft.com/training/paths/azure-rtos-threadx/) for learning systematically.
 
 
-# Understanding inter-component dependencies
+## Repository Structure and Usage
+### Directory layout
 
-The main components of Azure RTOS are each provided in their own repository, but there are dependencies between them--shown in the following graph--that are important to understand when setting up your builds.
+    .
+    ├── cmake                        # CMakelist files for building the project
+    ├── common                       # Core ThreadX files
+    ├── common_modules               # Core ThreadX module files
+    ├── common_smp                   # Core ThreadX SMP files
+    ├── docs                         # Documentation supplements
+    ├── ports                        # Architecture and compiler specific files. See below for directory breakdown     
+    │   ├── cortex_m7     
+    │   │   ├── iar                  # Example IAR compiler sample project
+    │   │   │   ├── example build    # IAR workspace and sample project files
+    │   │   │   ├── inc              # tx_port.h for this architecture
+    │   │   │   └── src              # Source files for this architecture
+    │   │   ├── ac6                  # Example ac6/Keil sample project
+    │   │   ├── gnu                  # Example gnu sample project
+    │   │   └── ...
+    │   └── ...        
+    ├── ports_modules                # Architecture and compiler specific files for threadX modules
+    ├── ports_smp                    # Architecture and compiler specific files for threadX SMP
+    ├── samples                      # demo_threadx.c
+    └── utility                      # Test cases and utilities
 
-![dependency graph](docs/deps.png)
-
-# Building and using the library
-
-## Prerequisites
-
-Install the following tools:
-
-* [CMake](https://cmake.org/download/) version 3.0 or later
-* [GCC compilers for arm-none-eabi](https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-rm/downloads)
-* [Ninja](https://ninja-build.org/)
-
-## Cloning the repo
-
-```bash
-$ git clone https://github.com/azure-rtos/threadx.git
-```
-
-## Building as a static library
-
-Each component of Azure RTOS comes with a composable CMake-based build system that supports many different MCUs and host systems. Integrating any of these components into your device app code is as simple as adding a git submodule and then including it in your build using the CMake command `add_subdirectory()`.
-
-While the typical usage pattern is to include threadx into your device code source tree to be built & linked with your code, you can compile this project as a standalone static library to confirm your build is set up correctly.
-
-```bash
-$ cmake -Bbuild -DCMAKE_TOOLCHAIN_FILE=cmake/cortex_m4.cmake -GNinja .
-
-$ cmake --build ./build
-```
-
-NOTE: You will have to take the dependency graph above into account when building anything other than threadx itself.
-
-# Repository Structure and Usage
 
 ## Branches & Releases
 
-The master branch has the most recent code with all new features and bug fixes. It does not represent the latest General Availability (GA) release of the library.
+The master branch has the most recent code with all new features and bug fixes. It does not represent the latest General Availability (GA) release of the library. Each official release (preview or GA) will be tagged to mark the commit and push it into the Github releases tab, e.g. `v6.2-rel`.
 
-## Releases
-
-Each official release (preview or GA) will be tagged to mark the commit and push it into the Github releases tab, e.g. `v6.0-rel`.
-
-## Directory layout
+## Supported Architecture Ports
 
+### ThreadX
 ```
-- cmake
-- common
-  - inc
-  - src
-- ports
-  - cortex_m0/gnu
-    - inc
-    - src
-  - cortex_m3/gnu
-    - inc
-    - src
-  - cortex_m4/gnu
-    - inc
-    - src
-  - cortex_m7/gnu
-    - inc
-    - src
-- samples
+arc_em      cortex_a12        cortex_m0     cortex_r4
+arc_hs      cortex_a15        cortex_m23    cortex_r5
+arm11       cortex_a17        cortex_m3     cortex_r7
+arm9        cortex_a34        cortex_m33    
+c667x       cortex_a35        cortex_m4    
+linux       cortex_a5         cortex_m55
+risc-v32    cortex_a53        cortex_m7
+rxv1        cortex_a55        cortex_m85
+rxv2        cortex_a57
+rxv3        cortex_a5x
+win32       cortex_a65
+xtensa      cortex_a65ae
+            cortex_a7
+            cortex_a72
+            cortex_a73
+            cortex_a75
+            cortex_a76
+            cortex_a76ae
+            cortex_a77
+            cortex_a8
+            cortex_a9
 ```
 
-# Security
+### ThreadX Modules
+[Azure RTOS ThreadX Modules](https://learn.microsoft.com/azure/rtos/threadx-modules/chapter1) component provides an infrastructure for applications to dynamically load modules that are built separately from the resident portion of the application.
+```
+cortex_a35
+cortex_a35_smp
+cortex_a7
+cortex_m0+
+cortex_m23
+cortex_m3
+cortex_m33
+cortex_m4
+cortex_m7
+cortex_r4
+rxv2
+```
 
-Azure RTOS provides OEMs with components to secure communication and to create code and data isolation using underlying MCU/MPU hardware protection mechanisms. It is ultimately the responsibility of the device builder to ensure the device fully meets the evolving security requirements associated with its specific use case.
+### ThreadX SMP
+[Azure RTOS ThreadX SMP](https://learn.microsoft.com/azure/rtos/threadx/threadx-smp/chapter1) is a high-performance real-time SMP kernel designed specifically for embedded applications.
+```
+arc_hs_smp
+cortex_a34_smp
+cortex_a35_smp
+cortex_a53_smp
+cortex_a55_smp
+cortex_a57_smp
+cortex_a5x_smp
+cortex_a5_smp
+cortex_a65ae_smp
+cortex_a65_smp
+cortex_a72_smp
+cortex_a73_smp
+cortex_a75_smp
+cortex_a76ae_smp
+cortex_a76_smp
+cortex_a77_smp
+cortex_a78_smp
+cortex_a7_smp
+cortex_a9_smp
+linux
+```
 
-# Adaptation layer for ThreadX
+## Adaptation layer for ThreadX
 
-Azure RTOS ThreadX is an advanced real-time operating system (RTOS) designed specifically for deeply embedded applications. To help ease application migration to Auzre RTOS, ThreadX provides [adaption layers](https://github.com/azure-rtos/threadx/tree/master/utility/rtos_compatibility_layers) for various legacy RTOS APIs (FreeRTOS, POSIX, OSEK, etc.).
+Azure RTOS ThreadX is an advanced real-time operating system (RTOS) designed specifically for deeply embedded applications. To help ease application migration to Azure RTOS, ThreadX provides [adaption layers](https://github.com/azure-rtos/threadx/tree/master/utility/rtos_compatibility_layers) for various legacy RTOS APIs (FreeRTOS, POSIX, OSEK, etc.).
 
-# Licensing
+## Component dependencies
+
+The main components of Azure RTOS are each provided in their own repository, but there are dependencies between them, as shown in the following graph. This is important to understand when setting up your builds.
+
+![dependency graph](docs/deps.png)
+
+> You will have to take the dependency graph above into account when building anything other than ThreadX itself.
+
+### Building and using the library
+
+Instruction for building the ThreadX as static library using Arm GNU Toolchain and CMake. If you are using toolchain and IDE from semiconductor, you might follow its own instructions to use Azure RTOS components as explained in the [Getting Started](#getting-started) section.
+
+1. Install the following tools:
+
+    * [CMake](https://cmake.org/download/) version 3.0 or later
+    * [Arm GNU Toolchain for arm-none-eabi](https://developer.arm.com/downloads/-/arm-gnu-toolchain-downloads)
+    * [Ninja](https://ninja-build.org/)
+
+1. Cloning the repo
+
+    ```bash
+    $ git clone https://github.com/azure-rtos/threadx.git
+    ```
+
+1. Define the features and addons you need in `tx_user.h` and build together with the component source code. You can refer to [`tx_user_sample.h`](https://github.com/azure-rtos/threadx/blob/master/common/inc/tx_user_sample.h) as an example.
+
+1. Building as a static library
+
+    Each component of Azure RTOS comes with a composable CMake-based build system that supports many different MCUs and host systems. Integrating any of these components into your device app code is as simple as adding a git submodule and then including it in your build using the CMake `add_subdirectory()`.
+
+    While the typical usage pattern is to include ThreadX into your device code source tree to be built & linked with your code, you can compile this project as a standalone static library to confirm your build is set up correctly.
+
+    An example of building the library for Cortex-M4:
+
+    ```bash
+    $ cmake -Bbuild -GNinja -DCMAKE_TOOLCHAIN_FILE=cmake/cortex_m4.cmake .
+
+    $ cmake --build ./build
+    ```
+
+## Professional support
+
+[Professional support plans](https://azure.microsoft.com/support/options/) are available from Microsoft. For community support and others, see the [Resources](#resources) section below.
+
+## Licensing
 
 License terms for using Azure RTOS are defined in the LICENSE.txt file of this repo. Please refer to this file for all definitive licensing information. No additional license fees are required for deploying Azure RTOS on hardware defined in the LICENSED-HARDWARE.txt file. If you are using hardware not defined in the LICENSED-HARDWARE.txt file or have licensing questions in general, please contact Microsoft directly at https://aka.ms/azrtos-license.
 
-# Contribution, feedback, issues, and professional support
+## Resources
 
-If you encounter any bugs, have suggestions for new features, or if you would like to become an active contributor to this project, please follow the instructions provided in the contribution guideline for the corresponding repo.
+The following are references to additional Azure RTOS resources:
 
-For basic support, click Issues in the command bar or post a question to [Stack Overflow](http://stackoverflow.com/questions/tagged/azure-rtos+threadx) using the `threadx` and `azure-rtos` tags.
+- **Product introduction and white papers**: https://azure.com/rtos
+- **General technical questions**: https://aka.ms/QnA/azure-rtos
+- **Product issues and bugs, or feature requests**: https://github.com/azure-rtos/threadx/issues
+- **Licensing and sales questions**: https://aka.ms/azrtos-license
+- **Product roadmap and support policy**: https://aka.ms/azrtos/lts
+- **Blogs and videos**: http://msiotblog.com and https://aka.ms/iotshow
+- **Azure RTOS TraceX Installer**: https://aka.ms/azrtos-tracex-installer
 
-Professional support plans (https://azure.microsoft.com/en-us/support/options/) are available from Microsoft.
+You can also check [previous questions](https://stackoverflow.com/questions/tagged/azure-rtos+threadx) or ask new ones on StackOverflow using the `azure-rtos` and `threadx` tags.
 
-# Additional Resources
+## Security
 
-The following are references to additional Azure RTOS and Azure IoT in general:
-| Content | Link |
-|---|---|
-| TraceX Installer | https://aka.ms/azrtos-tracex-installer |
-| Azure RTOS Documentation and Guides: | https://docs.microsoft.com/azure/rtos |
-| Azure RTOS Website: | https://azure.microsoft.com/services/rtos/ |
-| Azure RTOS Sales Questions: | https://azure-rtos.ms-iot-contact.com/ |
-| Azure RTOS Product Support Policy | https://aka.ms/azrtos/lts |
-| Azure RTOS Functional Safety Artifacts | https://aka.ms/azrtos/tuv |
-| For technical questions check out Microsoft Q/A for Azure IoT | https://aka.ms/QnA/azure-rtos |
-| Internet of Things Show for latest announcements and online training | https://aka.ms/iotshow |
-| IoT Tech Community | https://aka.ms/community/azure-rtos |
+Azure RTOS provides OEMs with components to secure communication and to create code and data isolation using underlying MCU/MPU hardware protection mechanisms. It is ultimately the responsibility of the device builder to ensure the device fully meets the evolving security requirements associated with its specific use case.
+
+## Contribution
+
+Please follow the instructions provided in the [CONTRIBUTING.md](./CONTRIBUTING.md) for the corresponding repository.

common/CMakeLists.txt

@@ -202,6 +202,7 @@ target_sources(${PROJECT_NAME}
 
 # Add the Common/inc directory to the project include list
 target_include_directories(${PROJECT_NAME} 
+    SYSTEM
     PUBLIC 
     ${CMAKE_CURRENT_LIST_DIR}/inc
 )

common/inc/tx_api.h

@@ -26,7 +26,7 @@
 /*  APPLICATION INTERFACE DEFINITION                       RELEASE        */
 /*                                                                        */
 /*    tx_api.h                                            PORTABLE C      */
-/*                                                           6.1.11       */
+/*                                                           6.2.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -86,6 +86,14 @@
 /*                                            optimized the definition of */
 /*                                            TX_TIMER_TICKS_PER_SECOND,  */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comment(s),          */
+/*                                            update patch number,        */
+/*                                            resulting in version 6.1.12 */
+/*  10-31-2022      Scott Larson            Modified comment(s),          */
+/*                                            add extension macros,       */
+/*                                            update EPK typedef,         */
+/*                                            update version numbers,     */
+/*                                            resulting in version 6.2.0  */
 /*                                                                        */
 /**************************************************************************/
 
@@ -112,6 +120,9 @@ extern   "C" {
 
 #include "tx_port.h"
 
+#if (defined(TX_EXECUTION_PROFILE_ENABLE) && !defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY))
+#include "tx_execution_profile.h"
+#endif
 
 /* Define basic constants for the ThreadX kernel.  */
 
@@ -121,8 +132,8 @@ extern   "C" {
 
 #define AZURE_RTOS_THREADX
 #define THREADX_MAJOR_VERSION           6
-#define THREADX_MINOR_VERSION           1
-#define THREADX_PATCH_VERSION           11
+#define THREADX_MINOR_VERSION           2
+#define THREADX_PATCH_VERSION           0
 
 /* Define the following symbol for backward compatibility */
 #define EL_PRODUCT_THREADX
@@ -220,6 +231,76 @@ extern   "C" {
 #define TX_FEATURE_NOT_ENABLED          ((UINT) 0xFF)
 
 
+#ifdef TX_64_BIT
+
+#ifndef TX_THREAD_EXTENSION_PTR_SET
+#define TX_THREAD_EXTENSION_PTR_SET(a, b)                   { \
+                                                                TX_THREAD *thread_ptr; \
+                                                                thread_ptr = (TX_THREAD *) (a); \
+                                                                (thread_ptr -> tx_thread_extension_ptr) = (VOID *)(b); \
+                                                            }
+#endif /* TX_THREAD_EXTENSION_PTR_SET  */
+
+#ifndef TX_THREAD_EXTENSION_PTR_GET
+#define TX_THREAD_EXTENSION_PTR_GET(a, b, c)                { \
+                                                                TX_PARAMETER_NOT_USED(c); \
+                                                                TX_THREAD *thread_ptr; \
+                                                                thread_ptr = tx_thread_identify(); \
+                                                                while(1)\
+                                                                { \
+                                                                    if (thread_ptr -> tx_thread_extension_ptr) \
+                                                                    { \
+                                                                        (a) = (b *)(thread_ptr -> tx_thread_extension_ptr); \
+                                                                        break; \
+                                                                    } \
+                                                                    tx_thread_sleep(1); \
+                                                                } \
+                                                            }
+#endif /* TX_THREAD_EXTENSION_PTR_GET  */
+
+#ifndef TX_TIMER_EXTENSION_PTR_SET
+#define TX_TIMER_EXTENSION_PTR_SET(a, b)                    { \
+                                                                TX_TIMER *timer_ptr; \
+                                                                timer_ptr = (TX_TIMER *) (a);   \
+                                                                (timer_ptr -> tx_timer_internal.tx_timer_internal_extension_ptr) = (VOID *)(b); \
+                                                            }
+#endif /* TX_TIMER_EXTENSION_PTR_SET  */
+
+#ifndef TX_TIMER_EXTENSION_PTR_GET
+#define TX_TIMER_EXTENSION_PTR_GET(a, b, c)                 { \
+                                                                TX_PARAMETER_NOT_USED(c); \
+                                                                if (!_tx_timer_expired_timer_ptr -> tx_timer_internal_extension_ptr) \
+                                                                    return; \
+                                                                (a) = (b *)(_tx_timer_expired_timer_ptr -> tx_timer_internal_extension_ptr); \
+                                                            }
+#endif /* TX_TIMER_EXTENSION_PTR_GET  */
+
+#else   /* not 64 bit */
+
+#ifndef TX_THREAD_EXTENSION_PTR_SET
+#define TX_THREAD_EXTENSION_PTR_SET(a, b)
+#endif /* TX_THREAD_EXTENSION_PTR_SET  */
+
+#ifndef TX_THREAD_EXTENSION_PTR_GET
+#define TX_THREAD_EXTENSION_PTR_GET(a, b, c)                { \
+                                                                (a) = (b *)(c); \
+                                                            }
+#endif /* TX_THREAD_EXTENSION_PTR_GET  */
+
+#ifndef TX_TIMER_EXTENSION_PTR_SET
+#define TX_TIMER_EXTENSION_PTR_SET(a, b)
+#endif /* TX_TIMER_EXTENSION_PTR_SET  */
+
+#ifndef TX_TIMER_EXTENSION_PTR_GET
+#define TX_TIMER_EXTENSION_PTR_GET(a, b, c)                 { \
+                                                                (a) = (b *)(c); \
+                                                            }
+#endif /* TX_TIMER_EXTENSION_PTR_GET  */
+
+#endif  /* TX_64_BIT */
+
+
+
 /* Define the common timer tick reference for use by other middleware components. The default
    value is 10ms, but may be replaced by a port specific version in tx_port.h or by the user
    as a compilation option.  */
@@ -526,8 +607,8 @@ typedef struct TX_THREAD_STRUCT
        For Azure RTOS 6, user shall use TX_EXECUTION_PROFILE_ENABLE instead of TX_ENABLE_EXECUTION_CHANGE_NOTIFY,
        and SHALL NOT add variables to TX_THREAD_EXTENSION_3. */
 #if (defined(TX_EXECUTION_PROFILE_ENABLE) && !defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY))
-    unsigned long long  tx_thread_execution_time_total;
-    unsigned long long  tx_thread_execution_time_last_start;
+    EXECUTION_TIME              tx_thread_execution_time_total;
+    EXECUTION_TIME_SOURCE_TYPE  tx_thread_execution_time_last_start;
 #endif
 
     /* Define suspension sequence number.  This is used to ensure suspension is still valid when

common/src/tx_event_flags_get.c

@@ -36,7 +36,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_event_flags_get                                 PORTABLE C      */
-/*                                                           6.1.11       */
+/*                                                           6.2.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -79,6 +79,9 @@
 /*  04-25-2022      Scott Larson            Modified comment(s),          */
 /*                                            handle 0 flags case,        */
 /*                                            resulting in version 6.1.11 */
+/*  10-31-2022      Scott Larson            Modified comment(s), always   */
+/*                                            return actual flags,        */
+/*                                            resulting in version 6.2.0  */
 /*                                                                        */
 /**************************************************************************/
 UINT  _tx_event_flags_get(TX_EVENT_FLAGS_GROUP *group_ptr, ULONG requested_flags,
@@ -125,6 +128,9 @@ UINT            interrupted_set_request;
     /* Pickup current flags.  */
     current_flags =  group_ptr -> tx_event_flags_group_current;
 
+    /* Return the actual event flags and apply delayed clearing.  */
+    *actual_flags_ptr =  current_flags & ~group_ptr -> tx_event_flags_group_delayed_clear;
+
     /* Apply the event flag option mask.  */
     and_request =  (get_option & TX_AND);
 
@@ -158,9 +164,6 @@ UINT            interrupted_set_request;
     if (flags_satisfied != ((ULONG) 0))
     {
 
-        /* Return the actual event flags that satisfied the request.  */
-        *actual_flags_ptr =  current_flags;
-
         /* Pickup the clear bit.  */
         clear_request =  (get_option & TX_EVENT_FLAGS_CLEAR_MASK);
 
@@ -221,9 +224,6 @@ UINT            interrupted_set_request;
 
         /* Yes, this request can be handled immediately.  */
 
-        /* Return the actual event flags that satisfied the request.  */
-        *actual_flags_ptr =  current_flags;
-
         /* Pickup the clear bit.  */
         clear_request =  (get_option & TX_EVENT_FLAGS_CLEAR_MASK);
 
@@ -274,7 +274,7 @@ UINT            interrupted_set_request;
 #endif
     else
     {
-
+        /* flags_satisfied is 0.  */
         /* Determine if the request specifies suspension.  */
         if (wait_option != TX_NO_WAIT)
         {

common/src/tx_trace_object_register.c

@@ -34,7 +34,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_trace_object_register                           PORTABLE C      */
-/*                                                           6.1          */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -69,9 +69,12 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  05-19-2020     William E. Lamie         Initial Version 6.0           */
-/*  09-30-2020     Yuxin Zhou               Modified comment(s),          */
+/*  05-19-2020      William E. Lamie        Initial Version 6.0           */
+/*  09-30-2020      Yuxin Zhou              Modified comment(s),          */
 /*                                            resulting in version 6.1    */
+/*  07-29-2022      Scott Larson            Modified comment(s),          */
+/*                                            check for null name,        */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 VOID  _tx_trace_object_register(UCHAR object_type, VOID *object_ptr, CHAR *object_name, ULONG parameter_1, ULONG parameter_2)
@@ -223,6 +226,12 @@ TX_TRACE_OBJECT_ENTRY           *entry_ptr;
                     work_ptr =  TX_CHAR_TO_UCHAR_POINTER_CONVERT(object_name);
                     work_ptr =  TX_UCHAR_POINTER_ADD(work_ptr, i);
 
+                    /* Determine if object_name (work_ptr) is null.  */
+                    if (work_ptr == TX_NULL)
+                    {
+                        break;
+                    }
+
                     /* Copy a character of the name.  */
                     entry_ptr -> tx_trace_object_entry_name[i] =  (UCHAR) *work_ptr;
 

common_modules/module_manager/utilities/module_binary_to_c_array.c

@@ -0,0 +1,139 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+
+/* Define the file handles.  */
+
+FILE	*source_file;
+FILE    *array_file;
+
+
+int main(int argc, char* argv[])
+{
+
+int             alpha;
+int             alpha1;
+int             alpha2;
+int             alpha3;
+unsigned long   address;
+unsigned long   column;
+
+
+    /* Determine if the proper number of files are provided.  */
+    if (argc != 3) 
+    {
+
+        /* Print an error message out and wait for user key hit.  */
+		printf("module_binary_to_c_array.exe - Copyright (c) Microsoft Corporation v5.8\n");
+        printf("**** Error: invalid input parameter for module_binary_to_c_array.exe **** \n");
+        printf("     Command Line Should be:\n\n");
+        printf("     > module_binary_to_c_array source_binary_file c_array_file <cr> \n\n");
+        return(1);
+    }
+
+    /* Attempt to open the source file for reading.  */
+    source_file =  fopen(argv[1], "rb");
+
+    /* Determine if the source file was opened properly.  */
+    if (source_file == NULL)
+    {
+
+        /* Print an error message out and wait for user key hit.  */
+        printf("**** Error: open failed on binary source file **** \n");
+        printf("            File: %s   ", argv[1]);
+        return(2);
+    }
+    
+	/* Determine if the binary file is a valid ThreadX module.  */
+	alpha =   fgetc(source_file);
+	alpha1 =  fgetc(source_file);
+	alpha2 =  fgetc(source_file);
+	alpha3 =  fgetc(source_file);
+
+	if ((alpha != 0x4D && alpha != 0x55) || (alpha1 != 0x4F && alpha1 != 0x44) || (alpha2 != 0x44 && alpha2 != 0x4F) || (alpha3 != 0x55 && alpha3 != 0x4D))
+	{
+
+        /* Print an error message out and wait for user key hit.  */
+        printf("**** Error: invalid format of binary input file **** \n");
+        printf("            File: %s   ", argv[1]);
+        return(3);
+	}
+
+	/* Attempt to open the dump file for writing.  */
+    array_file =  fopen(argv[2], "w");
+
+    /* Determine if the dump file was opened properly.  */
+    if (array_file == NULL)
+    {
+
+        /* Print an error message out and wait for user key hit.  */
+        printf("**** Error: open failed on C array file **** \n");
+        printf("            File: %s   ", argv[2]);
+        return(4);
+    }
+
+    fprintf(array_file, "/**************************** Module-Binary-to-C-array Utility **********************************/\n");
+	fprintf(array_file, "/*                                                                                              */\n");
+	fprintf(array_file, "/* Copyright (c) Microsoft Corporation                      Version 5.4, build date: 03-01-2018 */\n");
+	fprintf(array_file, "/*                                                                                              */\n");
+	fprintf(array_file, "/************************************************************************************************/\n\n");
+    fprintf(array_file, "/* \n");
+	fprintf(array_file, "   Input Binary file:   %30s\n", argv[1]);
+	fprintf(array_file, "   Output C Array file: %30s\n", argv[2]);
+	fprintf(array_file, "*/\n\n");
+
+	/* Now print out the sections in a C array.  */
+	fprintf(array_file, "unsigned char  module_code[] = {\n\n");
+	fprintf(array_file, "/* Address                                            Contents                                        */\n\n");
+
+	/* Seek to the beginning of the source file. */
+    fseek(source_file, 0, SEEK_SET);
+
+	/* Initialize the variables.  */
+	address =  0;
+	column =   0;
+
+	do 
+	{
+
+		/* Get character from the input file.  */
+		alpha =   fgetc(source_file);
+
+		/* Have we reached EOF?  */
+		if (alpha == EOF)
+			break;
+
+		/* Print out character with a leading comma, except on the first character.  */
+		if (column == 0)
+		{
+			if (address != 0)
+				fprintf(array_file, ",\n");
+			fprintf(array_file, "/* 0x%08X */   0x%02X", address, (unsigned int) alpha);
+		}
+		else
+			fprintf(array_file, ", 0x%02X", (unsigned int) alpha);
+
+		/* Move column forward.  */
+		column++;
+
+		/* Are we at the end of the column?  */
+		if (column >= 16)
+		{
+
+			column =  0;
+    	}
+
+		/* Move address forward.  */
+		address++;
+	} while (alpha != EOF);
+
+	/* Finally, finish the C array containing the module code.  */
+	fprintf(array_file, "};\n\n");
+
+	/* Close files.  */
+	fclose(source_file);
+    fclose(array_file);
+
+	return 0;
+}

common_modules/module_manager/utilities/module_to_binary.c

@@ -0,0 +1,332 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+
+/* Define the file handles.  */
+
+FILE	*source_file;
+FILE    *binary_file;
+
+
+#define ELF_ID_STRING_SIZE	    16
+#define ELF_ARM_MACHINE_TYPE    40
+#define ELF_EXECUTABLE          2
+
+
+typedef struct ELF_HEADER_STRUCT 
+{
+    unsigned char   elf_header_id_string[ELF_ID_STRING_SIZE];
+    unsigned short  elf_header_file_type;
+    unsigned short  elf_header_machinge_type;
+    unsigned long   elf_header_version;
+    unsigned long   elf_header_entry_address;
+    unsigned long   elf_header_program_header_offset;
+    unsigned long   elf_header_section_header_offset;
+    unsigned long   elf_header_processor_flags;
+    unsigned short  elf_header_size;
+    unsigned short  elf_header_program_header_size;
+    unsigned short  elf_header_program_header_entries;
+    unsigned short  elf_header_section_header_size;
+    unsigned short  elf_header_section_header_entries;
+    unsigned short  elf_header_section_string_index;
+} ELF_HEADER;
+
+
+typedef struct ELF_PROGRAM_HEADER_STRUCT
+{
+    unsigned long   elf_program_header_type;
+    unsigned long   elf_program_header_offset;
+    unsigned long   elf_program_header_virtual_address;
+    unsigned long   elf_program_header_physical_address;
+    unsigned long   elf_program_header_file_size;
+    unsigned long   elf_program_header_memory_size;
+    unsigned long   elf_program_header_flags;
+    unsigned long   elf_program_header_alignment;
+} ELF_PROGRAM_HEADER;
+
+
+typedef struct ELF_SECTION_HEADER_STRUCT
+{
+    unsigned long   elf_section_header_name;
+    unsigned long   elf_section_header_type;
+    unsigned long   elf_section_header_flags;
+    unsigned long   elf_section_header_address;
+    unsigned long   elf_section_header_offset;
+    unsigned long   elf_section_header_size;
+    unsigned long   elf_section_header_link;
+    unsigned long   elf_section_header_info;
+    unsigned long   elf_section_header_alignment;
+    unsigned long   elf_section_header_entry_size;
+} ELF_SECTION_HEADER;
+
+
+typedef struct ELF_SYMBOL_TABLE_ENTRY_STRUCT
+{
+    unsigned long   elf_symbol_table_entry_name;
+    unsigned long   elf_symbol_table_entry_address;
+    unsigned long   elf_symbol_table_entry_size;
+    unsigned char   elf_symbol_table_entry_info;
+    unsigned char   elf_symbol_table_entry_other;
+    unsigned short  elf_symbol_table_entry_shndx;
+
+} ELF_SYMBOL_TABLE_ENTRY;
+
+
+typedef struct CODE_SECTION_ENTRY_STRUCT
+{
+    unsigned long   code_section_index;
+    unsigned long   code_section_address;
+    unsigned long   code_section_size;
+} CODE_SECTION_ENTRY;
+
+
+/* Define global variables.  */
+
+ELF_HEADER              header;
+ELF_PROGRAM_HEADER      *program_header;
+ELF_SECTION_HEADER      *section_header;
+unsigned char           *section_string_table;
+unsigned char           *main_string_table;
+unsigned long           total_symbols;
+ELF_SYMBOL_TABLE_ENTRY  *symbol_table;
+unsigned long           total_functions;
+ELF_SYMBOL_TABLE_ENTRY  *function_table;
+CODE_SECTION_ENTRY		*code_section_array;
+
+
+/* Define helper functions.  */
+
+int elf_object_read(unsigned long offset, void *object_address, int object_size)
+{
+
+int             i;
+int             alpha;
+unsigned char   *buffer;
+
+    /* Setup the buffer pointer.  */
+    buffer =  (unsigned char *) object_address;
+
+    /* Seek to the proper position in the file.  */
+    fseek(source_file, offset, SEEK_SET);
+
+    /* Read the ELF object.  */
+    for (i = 0; i < object_size; i++)
+    {
+        alpha =  fgetc(source_file);
+        
+        if (alpha == EOF)
+            return(1);
+            
+        buffer[i] =  (unsigned char) alpha;
+    }    
+
+    /* Return success.  */
+    return(0);
+}
+
+
+int main(int argc, char* argv[])
+{
+
+unsigned long           i, j;
+unsigned long           current_total;
+unsigned long           address;
+unsigned long           size;
+unsigned char           *code_buffer;
+unsigned long			code_section_index;
+CODE_SECTION_ENTRY		code_section_temp;
+unsigned char           zero_value;
+
+
+    /* Determine if the proper number of files are provided.  */
+    if (argc != 3) 
+    {
+
+        /* Print an error message out and wait for user key hit.  */
+		printf("module_to_binary.exe - Copyright (c) Microsoft Corporation v5.8\n");
+        printf("**** Error: invalid input parameter for module_to_binary.exe **** \n");
+        printf("     Command Line Should be:\n\n");
+        printf("     > module_to_binary source_elf_file c_binary_file <cr> \n\n");
+        return(1);
+    }
+
+    /* Attempt to open the source file for reading.  */
+    source_file =  fopen(argv[1], "rb");
+
+    /* Determine if the source file was opened properly.  */
+    if (source_file == NULL)
+    {
+
+        /* Print an error message out.  */
+        printf("**** Error: open failed on source elf file **** \n");
+        printf("            File: %s   ", argv[1]);
+        return(2);
+    }
+    
+    /* Attempt to open the binary file for writing.  */
+    binary_file =  fopen(argv[2], "wb");
+
+    /* Determine if the binary file was opened properly.  */
+    if (binary_file == NULL)
+    {
+
+        /* Print an error message out and wait for user key hit.  */
+        printf("**** Error: open failed on binary output file **** \n");
+        printf("            File: %s   ", argv[2]);
+        return(3);
+    }
+
+    /* Read the ELF header.  */
+    elf_object_read(0, &header, sizeof(header));
+
+    /* Allocate memory for the program header(s).  */
+    program_header =  malloc(sizeof(ELF_PROGRAM_HEADER)*header.elf_header_program_header_entries);
+    
+    /* Read the program header(s).  */
+    elf_object_read(header.elf_header_program_header_offset, program_header, (sizeof(ELF_PROGRAM_HEADER)*header.elf_header_program_header_entries));
+
+    /* Allocate memory for the section header(s).  */
+    section_header =  malloc(sizeof(ELF_SECTION_HEADER)*header.elf_header_section_header_entries);
+
+    /* Read the section header(s).  */
+    elf_object_read(header.elf_header_section_header_offset, section_header, (sizeof(ELF_SECTION_HEADER)*header.elf_header_section_header_entries));
+
+
+    /* Alocate memory for the section string table.  */
+    section_string_table =  malloc(section_header[header.elf_header_section_string_index].elf_section_header_size);   
+
+    /* Read the section string table.  */
+    elf_object_read(section_header[header.elf_header_section_string_index].elf_section_header_offset, section_string_table, section_header[header.elf_header_section_string_index].elf_section_header_size);
+
+    /* Allocate memory for the code section array.  */
+    code_section_array =  malloc(sizeof(CODE_SECTION_ENTRY)*header.elf_header_section_header_entries);
+	code_section_index =  0;
+
+     /* Print out the section header(s).  */
+    for (i = 0; i < header.elf_header_section_header_entries; i++)
+    {
+
+		/* Determine if this section is a code section and there is a size.  */
+		if ((section_header[i].elf_section_header_type == 1) && (section_header[i].elf_section_header_size))
+		{
+
+        /* Check for an-instruction area.  */
+        if ((section_header[i].elf_section_header_flags & 0x4) || (section_header[i].elf_section_header_flags & 0x2))
+			{
+
+                /* Determine if this new section overlaps with an existing section.  */
+				for (j = 0; j < code_section_index; j++)
+				{
+					/* Is there an overlap?  */
+					if ((section_header[i].elf_section_header_address >= code_section_array[j].code_section_address) &&
+						((section_header[i].elf_section_header_address+section_header[i].elf_section_header_size + section_header[i].elf_section_header_offset) < (code_section_array[j].code_section_address+code_section_array[j].code_section_size)))
+					{
+						/* New section is within a current section, just disregard it.  */
+						break;
+					}
+				}
+
+				/* Determine if we have an overlap.  */
+				if (j == code_section_index)
+				{
+
+				    /* Yes, we have a code section... save it!  */
+				    code_section_array[code_section_index].code_section_index =  i;
+				    code_section_array[code_section_index].code_section_address =  section_header[i].elf_section_header_address;
+				    code_section_array[code_section_index].code_section_size =     section_header[i].elf_section_header_size;
+
+				    /* Move to next code section.  */
+				    code_section_index++;
+				}
+			}
+		}
+	}
+
+	/* Check for no code sections.  */
+	if (code_section_index == 0)
+	{
+
+		/* Close files.  */
+		fclose(source_file);
+		fclose(binary_file);
+
+		return(4);
+ 	}
+
+	/* One or more code sections have been found... let's put them in the correct order by address.  */
+	i = 0;
+	while (i+1 < code_section_index)
+	{
+
+		/* Make the "ith" entry the lowest address.  */
+		j = i + 1;
+		do
+		{
+			/* Is there a new lowest address?  */
+			if (code_section_array[j].code_section_address < code_section_array[i].code_section_address)
+			{
+				/* Yes, swap them!  */
+				code_section_temp =  code_section_array[i];
+				code_section_array[i] =  code_section_array[j];
+				code_section_array[j] = code_section_temp;
+			}
+
+			/* Move the inner index.  */
+			j++;
+		} while (j < code_section_index);
+
+		/* Move top index.  */
+		i++;
+	}
+
+	address =  code_section_array[0].code_section_address;
+	zero_value = 0;
+	for (i = 0; i < code_section_index; i++)
+	{
+
+		/* Determine if there is any fill characters between sections.  */
+		while (address < code_section_array[i].code_section_address)
+		{
+
+			/* Write a zero value.  */
+			fwrite(&zero_value, 1, 1, binary_file);
+
+			/* Move address forward.  */
+			address++;
+		}
+
+		/* Now allocate memory for the code section.  */
+		code_buffer =  malloc(code_section_array[i].code_section_size);
+
+		/* Read in the code area.  */
+		j =  code_section_array[i].code_section_index;
+		elf_object_read(section_header[j].elf_section_header_offset, code_buffer, code_section_array[i].code_section_size);
+
+		/* Write out the contents of this program area.  */
+		size =  code_section_array[i].code_section_size;
+
+		j =  0;
+		while (size)
+		{
+
+			/* Print out a byte.  */
+			fwrite(&code_buffer[j], 1, 1, binary_file);
+
+			/* Move address forward.  */
+			address++;
+			
+			/* Decrement size.  */
+			size--;
+
+			/* Move index into buffer.  */
+			j++;
+		}
+	}
+
+	/* Close files.  */
+	fclose(source_file);
+    fclose(binary_file);
+
+	return 0;
+}

common_modules/module_manager/utilities/module_to_c_array.c

@@ -0,0 +1,392 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+
+/* Define the file handles.  */
+
+FILE	*source_file;
+FILE    *array_file;
+
+
+#define ELF_ID_STRING_SIZE	    16
+#define ELF_ARM_MACHINE_TYPE    40
+#define ELF_EXECUTABLE          2
+
+
+typedef struct ELF_HEADER_STRUCT 
+{
+    unsigned char   elf_header_id_string[ELF_ID_STRING_SIZE];
+    unsigned short  elf_header_file_type;
+    unsigned short  elf_header_machinge_type;
+    unsigned long   elf_header_version;
+    unsigned long   elf_header_entry_address;
+    unsigned long   elf_header_program_header_offset;
+    unsigned long   elf_header_section_header_offset;
+    unsigned long   elf_header_processor_flags;
+    unsigned short  elf_header_size;
+    unsigned short  elf_header_program_header_size;
+    unsigned short  elf_header_program_header_entries;
+    unsigned short  elf_header_section_header_size;
+    unsigned short  elf_header_section_header_entries;
+    unsigned short  elf_header_section_string_index;
+} ELF_HEADER;
+
+
+typedef struct ELF_PROGRAM_HEADER_STRUCT
+{
+    unsigned long   elf_program_header_type;
+    unsigned long   elf_program_header_offset;
+    unsigned long   elf_program_header_virtual_address;
+    unsigned long   elf_program_header_physical_address;
+    unsigned long   elf_program_header_file_size;
+    unsigned long   elf_program_header_memory_size;
+    unsigned long   elf_program_header_flags;
+    unsigned long   elf_program_header_alignment;
+} ELF_PROGRAM_HEADER;
+
+
+typedef struct ELF_SECTION_HEADER_STRUCT
+{
+    unsigned long   elf_section_header_name;
+    unsigned long   elf_section_header_type;
+    unsigned long   elf_section_header_flags;
+    unsigned long   elf_section_header_address;
+    unsigned long   elf_section_header_offset;
+    unsigned long   elf_section_header_size;
+    unsigned long   elf_section_header_link;
+    unsigned long   elf_section_header_info;
+    unsigned long   elf_section_header_alignment;
+    unsigned long   elf_section_header_entry_size;
+} ELF_SECTION_HEADER;
+
+
+typedef struct ELF_SYMBOL_TABLE_ENTRY_STRUCT
+{
+    unsigned long   elf_symbol_table_entry_name;
+    unsigned long   elf_symbol_table_entry_address;
+    unsigned long   elf_symbol_table_entry_size;
+    unsigned char   elf_symbol_table_entry_info;
+    unsigned char   elf_symbol_table_entry_other;
+    unsigned short  elf_symbol_table_entry_shndx;
+
+} ELF_SYMBOL_TABLE_ENTRY;
+
+
+typedef struct CODE_SECTION_ENTRY_STRUCT
+{
+    unsigned long   code_section_index;
+    unsigned long   code_section_address;
+    unsigned long   code_section_size;
+} CODE_SECTION_ENTRY;
+
+
+/* Define global variables.  */
+
+ELF_HEADER              header;
+ELF_PROGRAM_HEADER      *program_header;
+ELF_SECTION_HEADER      *section_header;
+unsigned char           *section_string_table;
+unsigned char           *main_string_table;
+unsigned long           total_symbols;
+ELF_SYMBOL_TABLE_ENTRY  *symbol_table;
+unsigned long           total_functions;
+ELF_SYMBOL_TABLE_ENTRY  *function_table;
+CODE_SECTION_ENTRY		*code_section_array;
+
+
+/* Define helper functions.  */
+
+int elf_object_read(unsigned long offset, void *object_address, int object_size)
+{
+
+int             i;
+int             alpha;
+unsigned char   *buffer;
+
+    /* Setup the buffer pointer.  */
+    buffer =  (unsigned char *) object_address;
+
+    /* Seek to the proper position in the file.  */
+    fseek(source_file, offset, SEEK_SET);
+
+    /* Read the ELF object.  */
+    for (i = 0; i < object_size; i++)
+    {
+        alpha =  fgetc(source_file);
+        
+        if (alpha == EOF)
+            return(1);
+            
+        buffer[i] =  (unsigned char) alpha;
+    }    
+
+    /* Return success.  */
+    return(0);
+}
+
+
+int main(int argc, char* argv[])
+{
+
+unsigned long           i, j, k;
+unsigned long           current_total;
+unsigned long           address;
+unsigned long           size;
+unsigned long           column;
+unsigned char           *code_buffer;
+unsigned long			code_section_index;
+CODE_SECTION_ENTRY		code_section_temp;
+
+
+    /* Determine if the proper number of files are provided.  */
+    if (argc != 3) 
+    {
+
+        /* Print an error message out and wait for user key hit.  */
+		printf("module_to_c_array.exe - Copyright (c) Microsoft Corporation v5.8\n");
+        printf("**** Error: invalid input parameter for module_to_c_array.exe **** \n");
+        printf("     Command Line Should be:\n\n");
+        printf("     > module_to_c_array source_elf_file c_array_file <cr> \n\n");
+        return(1);
+    }
+
+    /* Attempt to open the source file for reading.  */
+    source_file =  fopen(argv[1], "rb");
+
+    /* Determine if the source file was opened properly.  */
+    if (source_file == NULL)
+    {
+
+        /* Print an error message out and wait for user key hit.  */
+        printf("**** Error: open failed on source elf file **** \n");
+        printf("            File: %s   ", argv[1]);
+        return(2);
+    }
+    
+    /* Attempt to open the dump file for writing.  */
+    array_file =  fopen(argv[2], "w");
+
+    /* Determine if the dump file was opened properly.  */
+    if (array_file == NULL)
+    {
+
+        /* Print an error message out and wait for user key hit.  */
+        printf("**** Error: open failed on C array file **** \n");
+        printf("            File: %s   ", argv[2]);
+        return(3);
+    }
+
+    /* Read the ELF header.  */
+    elf_object_read(0, &header, sizeof(header));
+
+    fprintf(array_file, "/**************************** Module-to-C-array Utility *****************************************/\n");
+	fprintf(array_file, "/*                                                                                              */\n");
+	fprintf(array_file, "/* Copyright (c) Microsoft Corporation                      Version 5.8, build date: 03-01-2018 */\n");
+	fprintf(array_file, "/*                                                                                              */\n");
+	fprintf(array_file, "/************************************************************************************************/\n\n");
+    fprintf(array_file, "/* \n");
+	fprintf(array_file, "   Input ELF file:      %30s\n", argv[1]);
+	fprintf(array_file, "   Output C Array file: %30s\n", argv[2]);
+	fprintf(array_file, "*/\n\n");
+
+    /* Allocate memory for the program header(s).  */
+    program_header =  malloc(sizeof(ELF_PROGRAM_HEADER)*header.elf_header_program_header_entries);
+	
+    /* Read the program header(s).  */
+    elf_object_read(header.elf_header_program_header_offset, program_header, (sizeof(ELF_PROGRAM_HEADER)*header.elf_header_program_header_entries));
+
+    /* Allocate memory for the section header(s).  */
+    section_header =  malloc(sizeof(ELF_SECTION_HEADER)*header.elf_header_section_header_entries);
+
+    /* Read the section header(s).  */
+    elf_object_read(header.elf_header_section_header_offset, section_header, (sizeof(ELF_SECTION_HEADER)*header.elf_header_section_header_entries));
+
+
+    /* Alocate memory for the section string table.  */
+    section_string_table =  malloc(section_header[header.elf_header_section_string_index].elf_section_header_size);   
+
+    /* Read the section string table.  */
+    elf_object_read(section_header[header.elf_header_section_string_index].elf_section_header_offset, section_string_table, section_header[header.elf_header_section_string_index].elf_section_header_size);
+
+    /* Allocate memory for the code section array.  */
+    code_section_array =  malloc(sizeof(CODE_SECTION_ENTRY)*header.elf_header_section_header_entries);
+	code_section_index =  0;
+
+    /* Print out the section header(s).  */
+    for (i = 0; i < header.elf_header_section_header_entries; i++)
+    {
+
+		/* Determine if this section is a code section and there is a size.  */
+		if ((section_header[i].elf_section_header_type == 1) && (section_header[i].elf_section_header_size))
+		{
+
+            /* Check for an-instruction area.  */
+            if ((section_header[i].elf_section_header_flags & 0x4) || (section_header[i].elf_section_header_flags & 0x2))
+			{
+                /* Determine if this new section overlaps with an existing section.  */
+				for (j = 0; j < code_section_index; j++)
+				{
+					/* Is there an overlap?  */
+					if ((section_header[i].elf_section_header_address >= code_section_array[j].code_section_address) &&
+						((section_header[i].elf_section_header_address+section_header[i].elf_section_header_size + section_header[i].elf_section_header_offset) < (code_section_array[j].code_section_address+code_section_array[j].code_section_size)))
+					{
+						/* New section is within a current section, just disregard it.  */
+						break;
+					}
+				}
+
+				/* Determine if we have an overlap.  */
+				if (j == code_section_index)
+				{
+
+				    /* Yes, we have a code section... save it!  */
+				    code_section_array[code_section_index].code_section_index =  i;
+				    code_section_array[code_section_index].code_section_address =  section_header[i].elf_section_header_address;
+				    code_section_array[code_section_index].code_section_size =     section_header[i].elf_section_header_size;
+
+				    /* Move to next code section.  */
+				    code_section_index++;
+				}
+			}
+		}
+	}
+
+	/* Check for no code sections.  */
+	if (code_section_index == 0)
+	{
+
+        /* Print an error message out.  */
+        printf("**** Error: No code sections found! **** \n");
+
+		fprintf(array_file, "unsigned char  module_code[] = {0x00};\n\n");
+		
+		/* Close files.  */
+		fclose(source_file);
+		fclose(array_file);
+
+		return(4);
+ 	}
+
+	/* One or more code sections have been found... let's put them in the correct order by address.  */
+	i = 0;
+	while (i+1 < code_section_index)
+	{
+
+		/* Make the "ith" entry the lowest address.  */
+		j = i + 1;
+		do
+		{
+			/* Is there a new lowest address?  */
+			if (code_section_array[j].code_section_address < code_section_array[i].code_section_address)
+			{
+				/* Yes, swap them!  */
+				code_section_temp =  code_section_array[i];
+				code_section_array[i] =  code_section_array[j];
+				code_section_array[j] = code_section_temp;
+			}
+
+			/* Move the inner index.  */
+			j++;
+		} while (j < code_section_index);
+
+		/* Move top index.  */
+		i++;
+	}
+
+	/* Now print out the sections in a C array.  */
+	fprintf(array_file, "unsigned char  module_code[] = {\n\n");
+	fprintf(array_file, "/* Address                                            Contents                                        */\n\n");
+
+	address =  code_section_array[0].code_section_address;
+	column =   0;
+
+	for (i = 0; i < code_section_index; i++)
+	{
+
+		/* Determine if there is any fill characters between sections.  */
+		while (address < code_section_array[i].code_section_address)
+		{
+
+			/* Print out a character with a leading comma, except on the first character.  */
+			if (column == 0)
+				fprintf(array_file, "/* 0x%08X */   0x00", address);
+			else
+  				fprintf(array_file, ", 0x00");
+
+			/* Move column forward.  */
+			column++;
+
+			/* Are we at the end of the column?  */
+			if (column >= 16)
+			{
+				fprintf(array_file, ",\n");
+				column =  0;
+			}
+
+			/* Move address forward.  */
+			address++;
+		}
+
+		/* Now allocate memory for the code section.  */
+		code_buffer =  malloc(code_section_array[i].code_section_size);
+
+		/* Read in the code area.  */
+		j =  code_section_array[i].code_section_index;
+		elf_object_read(section_header[j].elf_section_header_offset, code_buffer, code_section_array[i].code_section_size);
+
+		/* Write out the contents of this program area.  */
+		size =  code_section_array[i].code_section_size;
+		
+		j =  0;
+		k =  0;
+		while (size)
+		{
+
+			/* Print out a character with a leading comma, except on the first character.  */
+			if (column == 0)
+				fprintf(array_file, "/* 0x%08X */   0x%02X", address, (unsigned int) code_buffer[j]);
+			else
+  				fprintf(array_file, ", 0x%02X", (unsigned int) code_buffer[j]);
+
+			/* Move column forward.  */
+			column++;
+
+			/* Are we at the end of the column?  */
+			if (column >= 16)
+			{
+
+				/* Is this the last byte of the image?  */
+				if ((size != 1) || (i+1 != code_section_index))
+				{
+					if (k == 0)
+					{
+						k = code_section_array[i].code_section_index;
+					    fprintf(array_file, ",      /* SECTION: %s  */\n", &section_string_table[section_header[k].elf_section_header_name]);
+					}
+					else
+  					    fprintf(array_file, ",\n");
+				}
+				column =  0;
+			}
+
+			/* Move address forward.  */
+			address++;
+			
+			/* Decrement size.  */
+			size--;
+
+			/* Move index into buffer.  */
+			j++;
+		}
+	}
+
+	/* Finally, finish the C array containing the module code.  */
+	fprintf(array_file, "};\n\n");
+
+	/* Close files.  */
+	fclose(source_file);
+    fclose(array_file);
+
+	return 0;
+}

common_smp/inc/tx_api.h

@@ -26,7 +26,7 @@
 /*  APPLICATION INTERFACE DEFINITION                       RELEASE        */
 /*                                                                        */
 /*    tx_api.h                                            PORTABLE SMP    */
-/*                                                           6.1.11       */
+/*                                                           6.2.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -75,6 +75,13 @@
 /*                                            optimized the definition of */
 /*                                            TX_TIMER_TICKS_PER_SECOND,  */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comment(s),          */
+/*                                            update patch number,        */
+/*                                            resulting in version 6.1.12 */
+/*  10-31-2022      Scott Larson            Modified comment(s),          */
+/*                                            add extension macros,       */
+/*                                            update version numbers,     */
+/*                                            resulting in version 6.2.0  */
 /*                                                                        */
 /**************************************************************************/
 
@@ -126,8 +133,8 @@ extern   "C" {
 
 #define AZURE_RTOS_THREADX
 #define THREADX_MAJOR_VERSION           6
-#define THREADX_MINOR_VERSION           1
-#define THREADX_PATCH_VERSION           11
+#define THREADX_MINOR_VERSION           2
+#define THREADX_PATCH_VERSION           0
 
 /* Define the following symbol for backward compatibility */
 #define EL_PRODUCT_THREADX
@@ -225,6 +232,76 @@ extern   "C" {
 #define TX_FEATURE_NOT_ENABLED          ((UINT) 0xFF)
 
 
+#ifdef TX_64_BIT
+
+#ifndef TX_THREAD_EXTENSION_PTR_SET
+#define TX_THREAD_EXTENSION_PTR_SET(a, b)                   { \
+                                                                TX_THREAD *thread_ptr; \
+                                                                thread_ptr = (TX_THREAD *) (a); \
+                                                                (thread_ptr -> tx_thread_extension_ptr) = (VOID *)(b); \
+                                                            }
+#endif /* TX_THREAD_EXTENSION_PTR_SET  */
+
+#ifndef TX_THREAD_EXTENSION_PTR_GET
+#define TX_THREAD_EXTENSION_PTR_GET(a, b, c)                { \
+                                                                TX_PARAMETER_NOT_USED(c); \
+                                                                TX_THREAD *thread_ptr; \
+                                                                thread_ptr = tx_thread_identify(); \
+                                                                while(1)\
+                                                                { \
+                                                                    if (thread_ptr -> tx_thread_extension_ptr) \
+                                                                    { \
+                                                                        (a) = (b *)(thread_ptr -> tx_thread_extension_ptr); \
+                                                                        break; \
+                                                                    } \
+                                                                    tx_thread_sleep(1); \
+                                                                } \
+                                                            }
+#endif /* TX_THREAD_EXTENSION_PTR_GET  */
+
+#ifndef TX_TIMER_EXTENSION_PTR_SET
+#define TX_TIMER_EXTENSION_PTR_SET(a, b)                    { \
+                                                                TX_TIMER *timer_ptr; \
+                                                                timer_ptr = (TX_TIMER *) (a);   \
+                                                                (timer_ptr -> tx_timer_internal.tx_timer_internal_extension_ptr) = (VOID *)(b); \
+                                                            }
+#endif /* TX_TIMER_EXTENSION_PTR_SET  */
+
+#ifndef TX_TIMER_EXTENSION_PTR_GET
+#define TX_TIMER_EXTENSION_PTR_GET(a, b, c)                 { \
+                                                                TX_PARAMETER_NOT_USED(c); \
+                                                                if (!_tx_timer_expired_timer_ptr -> tx_timer_internal_extension_ptr) \
+                                                                    return; \
+                                                                (a) = (b *)(_tx_timer_expired_timer_ptr -> tx_timer_internal_extension_ptr); \
+                                                            }
+#endif /* TX_TIMER_EXTENSION_PTR_GET  */
+
+#else   /* not 64 bit */
+
+#ifndef TX_THREAD_EXTENSION_PTR_SET
+#define TX_THREAD_EXTENSION_PTR_SET(a, b)
+#endif /* TX_THREAD_EXTENSION_PTR_SET  */
+
+#ifndef TX_THREAD_EXTENSION_PTR_GET
+#define TX_THREAD_EXTENSION_PTR_GET(a, b, c)                { \
+                                                                (a) = (b *)(c); \
+                                                            }
+#endif /* TX_THREAD_EXTENSION_PTR_GET  */
+
+#ifndef TX_TIMER_EXTENSION_PTR_SET
+#define TX_TIMER_EXTENSION_PTR_SET(a, b)
+#endif /* TX_TIMER_EXTENSION_PTR_SET  */
+
+#ifndef TX_TIMER_EXTENSION_PTR_GET
+#define TX_TIMER_EXTENSION_PTR_GET(a, b, c)                 { \
+                                                                (a) = (b *)(c); \
+                                                            }
+#endif /* TX_TIMER_EXTENSION_PTR_GET  */
+
+#endif  /* TX_64_BIT */
+
+
+
 /* Define the common timer tick reference for use by other middleware components. The default
    value is 10ms, but may be replaced by a port specific version in tx_port.h or by the user
    as a compilation option.  */

common_smp/src/tx_event_flags_get.c

@@ -36,7 +36,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_event_flags_get                                 PORTABLE C      */
-/*                                                           6.1.11       */
+/*                                                           6.2.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -79,6 +79,9 @@
 /*  04-25-2022      Scott Larson            Modified comment(s),          */
 /*                                            handle 0 flags case,        */
 /*                                            resulting in version 6.1.11 */
+/*  10-31-2022      Scott Larson            Modified comment(s), always   */
+/*                                            return actual flags,        */
+/*                                            resulting in version 6.2.0  */
 /*                                                                        */
 /**************************************************************************/
 UINT  _tx_event_flags_get(TX_EVENT_FLAGS_GROUP *group_ptr, ULONG requested_flags,
@@ -125,6 +128,9 @@ UINT            interrupted_set_request;
     /* Pickup current flags.  */
     current_flags =  group_ptr -> tx_event_flags_group_current;
 
+    /* Return the actual event flags and apply delayed clearing.  */
+    *actual_flags_ptr =  current_flags & ~group_ptr -> tx_event_flags_group_delayed_clear;
+
     /* Apply the event flag option mask.  */
     and_request =  (get_option & TX_AND);
 
@@ -158,9 +164,6 @@ UINT            interrupted_set_request;
     if (flags_satisfied != ((ULONG) 0))
     {
 
-        /* Return the actual event flags that satisfied the request.  */
-        *actual_flags_ptr =  current_flags;
-
         /* Pickup the clear bit.  */
         clear_request =  (get_option & TX_EVENT_FLAGS_CLEAR_MASK);
 
@@ -221,9 +224,6 @@ UINT            interrupted_set_request;
 
         /* Yes, this request can be handled immediately.  */
 
-        /* Return the actual event flags that satisfied the request.  */
-        *actual_flags_ptr =  current_flags;
-
         /* Pickup the clear bit.  */
         clear_request =  (get_option & TX_EVENT_FLAGS_CLEAR_MASK);
 
@@ -274,7 +274,7 @@ UINT            interrupted_set_request;
 #endif
     else
     {
-
+        /* flags_satisfied is 0.  */
         /* Determine if the request specifies suspension.  */
         if (wait_option != TX_NO_WAIT)
         {

common_smp/src/tx_thread_create.c

@@ -37,7 +37,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_create                                  PORTABLE SMP     */
-/*                                                           6.1.8        */
+/*                                                           6.2.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -85,6 +85,10 @@
 /*                                            resulting in version 6.1.3  */
 /*  08-02-2021      Scott Larson            Removed unneeded cast,        */
 /*                                            resulting in version 6.1.8  */
+/*  10-31-2022      Scott Larson            Removed ifdef block to always */
+/*                                            restore interrupts at end   */
+/*                                            of if block,                */
+/*                                            resulting in version 6.2.0  */
 /*                                                                        */
 /**************************************************************************/
 UINT  _tx_thread_create(TX_THREAD *thread_ptr, CHAR *name_ptr,
@@ -344,11 +348,8 @@ ALIGN_TYPE              updated_stack_start;
 #endif
         }
 
-#ifndef TX_NOT_INTERRUPTABLE
-
         /* Restore interrupts.  */
         TX_RESTORE
-#endif
     }
     else
     {

common_smp/src/tx_trace_object_register.c

@@ -34,7 +34,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_trace_object_register                           PORTABLE C      */
-/*                                                           6.1          */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -69,9 +69,12 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  05-19-2020     William E. Lamie         Initial Version 6.0           */
-/*  09-30-2020     Yuxin Zhou               Modified comment(s),          */
+/*  05-19-2020      William E. Lamie        Initial Version 6.0           */
+/*  09-30-2020      Yuxin Zhou              Modified comment(s),          */
 /*                                            resulting in version 6.1    */
+/*  07-29-2022      Scott Larson            Modified comment(s),          */
+/*                                            check for null name,        */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 VOID  _tx_trace_object_register(UCHAR object_type, VOID *object_ptr, CHAR *object_name, ULONG parameter_1, ULONG parameter_2)
@@ -223,6 +226,12 @@ TX_TRACE_OBJECT_ENTRY           *entry_ptr;
                     work_ptr =  TX_CHAR_TO_UCHAR_POINTER_CONVERT(object_name);
                     work_ptr =  TX_UCHAR_POINTER_ADD(work_ptr, i);
 
+                    /* Determine if object_name (work_ptr) is null.  */
+                    if (work_ptr == TX_NULL)
+                    {
+                        break;
+                    }
+
                     /* Copy a character of the name.  */
                     entry_ptr -> tx_trace_object_entry_name[i] =  (UCHAR) *work_ptr;
 

ports/cortex_a12/ac6/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_a12/gnu/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_a15/ac6/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_a15/gnu/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_a17/ac6/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_a17/gnu/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_a5/ac6/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_a5/gnu/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_a7/ac6/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_a7/gnu/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_a8/ac6/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_a8/gnu/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_a9/ac6/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_a9/gnu/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                            ARMv7-A        */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -47,12 +47,15 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
-/*  04-02-2021     Bhupendra Naphade        Modified comment(s),updated   */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
+/*  04-02-2021      Bhupendra Naphade       Modified comment(s),updated   */
 /*                                            macro definition,           */
 /*                                            resulting in version 6.1.6  */
-/*  04-25-2022     Zhen Kong                Updated comments,             */
+/*  04-25-2022      Zhen Kong               Updated comments,             */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Updated comments, removed     */
+/*                                            unneeded temp variable,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -284,7 +287,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #else
 
-#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save, tx_temp;
+#define TX_INTERRUPT_SAVE_AREA                  UINT interrupt_save;
 
 #ifdef TX_ENABLE_FIQ_SUPPORT
 #define TX_DISABLE                              asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );

ports/cortex_m0/gnu/example_build/build_threadx.bat

@@ -1,5 +1,4 @@
 del tx.a
-arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb tx_initialize_low_level.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_stack_build.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_schedule.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_system_return.S
@@ -7,7 +6,7 @@ arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_context_save.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_context_restore.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_interrupt_control.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_timer_interrupt.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_interrupt_control.S
+
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_allocate.c
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_cleanup.c
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_create.c
@@ -192,8 +191,8 @@ arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../in
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_deactivate.c
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_delete.c
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_info_get.c
+
 arm-none-eabi-ar -r tx.a tx_thread_stack_build.o tx_thread_schedule.o tx_thread_system_return.o tx_thread_context_save.o tx_thread_context_restore.o tx_timer_interrupt.o tx_thread_interrupt_control.o
-arm-none-eabi-ar -r tx.a tx_thread_interrupt_control.o
 arm-none-eabi-ar -r tx.a tx_block_allocate.o tx_block_pool_cleanup.o tx_block_pool_create.o tx_block_pool_delete.o tx_block_pool_info_get.o
 arm-none-eabi-ar -r tx.a tx_block_pool_initialize.o tx_block_pool_performance_info_get.o tx_block_pool_performance_system_info_get.o tx_block_pool_prioritize.o
 arm-none-eabi-ar -r tx.a tx_block_release.o tx_byte_allocate.o tx_byte_pool_cleanup.o tx_byte_pool_create.o tx_byte_pool_delete.o tx_byte_pool_info_get.o

ports/cortex_m0/gnu/example_build/build_threadx_sample.bat

@@ -1,7 +1,5 @@
-arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb tx_vectors.S
+arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb cortexm0_vectors.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb cortexm0_crt0.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb tx_initialize_low_level.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc sample_threadx.c
-arm-none-eabi-ld -A cortex-m0 -ereset_handler -T sample_threadx.ld tx_vectors.o cortexm0_crt0.o tx_initialize_low_level.o sample_threadx.o tx.a  libgcc.a -o sample_threadx.out -M > sample_threadx.map
-
-
+arm-none-eabi-gcc -g -mcpu=cortex-m0 -mthumb -T sample_threadx.ld -ereset_handler -nostartfiles -o sample_threadx.out -Wl,-Map=sample_threadx.map cortexm0_vectors.o cortexm0_crt0.o tx_initialize_low_level.o sample_threadx.o tx.a

ports/cortex_m0/gnu/example_build/cortexm0_crt0.S

@@ -13,7 +13,6 @@ _start:
   ldr r1, =__stack_end__
   mov sp, r1
 
-
   /* Copy initialised sections into RAM if required. */
   ldr r0, =__data_load_start__
   ldr r1, =__data_start__
@@ -47,7 +46,6 @@ _start:
   mov r2, #0
   bl crt0_memory_set
 
-
   /* Setup heap - not recommended for Threadx but here for compatibility reasons */
   ldr r0, = __heap_start__
   ldr r1, = __heap_end__
@@ -57,7 +55,6 @@ _start:
   add r0, r0, #4
   str r1, [r0]
 
-
   /* constructors in case of using C++ */
   ldr r0, =__ctors_start__
   ldr r1, =__ctors_end__
@@ -72,13 +69,11 @@ crt0_ctor_loop:
   b crt0_ctor_loop
 crt0_ctor_end:
 
-
   /* Setup call frame for main() */
   mov r0, #0
   mov lr, r0
   mov r12, sp
 
-
 start:
   /* Jump to main() */
   mov r0, #0
@@ -93,7 +88,6 @@ crt0_exit_loop:
 
   /* Startup helper functions. */
 
-
 crt0_memory_copy:
   cmp r0, r1
   beq memory_copy_done
@@ -109,7 +103,6 @@ memory_copy_loop:
 memory_copy_done:
   bx lr
 
-
 crt0_memory_set:
   cmp r0, r1
   beq memory_set_done
@@ -119,7 +112,6 @@ crt0_memory_set:
 memory_set_done:
   bx lr
 
-
   /* Setup attibutes of stack and heap sections so they don't take up room in the elf file */
   .section .stack, "wa", %nobits
   .section .stack_process, "wa", %nobits

ports/cortex_m0/gnu/example_build/cortexm0_vectors.S

@@ -1,5 +1,3 @@
-
-
   .global reset_handler
 
   .global __tx_NMIHandler
@@ -10,7 +8,6 @@
   .global __tx_SysTickHandler 
   .global __tx_BadHandler
 
-
   .syntax unified
   .section .vectors, "ax"
   .code 16
@@ -29,7 +26,7 @@ _vectors:
   .word 0 // Reserved
   .word 0 // Reserved
   .word 0 // Reserved
-  .word __tx_SVCallHandler //_SVC_Handler - used by Threadx scheduler //
+  .word __tx_SVCallHandler    //_SVC_Handler - used by Threadx scheduler //
   .word __tx_DBGHandler
   .word 0 // Reserved
   .word __tx_PendSVHandler 
@@ -70,14 +67,10 @@ _vectors:
   .word __tx_BadHandler
   .word __tx_BadHandler
 
-
-
-    .section .init, "ax"
-    .thumb_func
+  .section .init, "ax"
+  .thumb_func
 reset_handler:
-
-// low level hardware config, such as PLL setup goes here
-
+  // low level hardware config, such as PLL setup goes here
   b _start
 
 

ports/cortex_m0/gnu/example_build/sample_threadx.ld

@@ -1,206 +1,125 @@
 MEMORY
 {
-  UNPLACED_SECTIONS (wx) : ORIGIN = 0x100000000, LENGTH = 0
-  CM3_System_Control_Space (wx) : ORIGIN = 0xe000e000, LENGTH = 0x00001000
-  AHB_Peripherals (wx) : ORIGIN = 0x50000000, LENGTH = 0x00200000
-  APB1_Peripherals (wx) : ORIGIN = 0x40080000, LENGTH = 0x00080000
-  APB0_Peripherals (wx) : ORIGIN = 0x40000000, LENGTH = 0x00080000
-  GPIO (wx) : ORIGIN = 0x2009c000, LENGTH = 0x00004000
-  AHBSRAM1 (wx) : ORIGIN = 0x20080000, LENGTH = 0x00004000
-  AHBSRAM0 (wx) : ORIGIN = 0x2007c000, LENGTH = 0x00004000
-  RAM (wx) : ORIGIN = 0x10000000, LENGTH = 0x00008000
-  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000
+  RAM (wx) : ORIGIN = 0x20000000, LENGTH = 0x00800000
+  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00400000
 }
 
+__STACKSIZE__ = 1024;
+__STACKSIZE_PROCESS__ = 0;
+__HEAPSIZE__ = 128;
 
 SECTIONS
 {
-  __CM3_System_Control_Space_segment_start__ = 0xe000e000;
-  __CM3_System_Control_Space_segment_end__ = 0xe000f000;
-  __AHB_Peripherals_segment_start__ = 0x50000000;
-  __AHB_Peripherals_segment_end__ = 0x50200000;
-  __APB1_Peripherals_segment_start__ = 0x40080000;
-  __APB1_Peripherals_segment_end__ = 0x40100000;
-  __APB0_Peripherals_segment_start__ = 0x40000000;
-  __APB0_Peripherals_segment_end__ = 0x40080000;
-  __GPIO_segment_start__ = 0x2009c000;
-  __GPIO_segment_end__ = 0x200a0000;
-  __AHBSRAM1_segment_start__ = 0x20080000;
-  __AHBSRAM1_segment_end__ = 0x20084000;
-  __AHBSRAM0_segment_start__ = 0x2007c000;
-  __AHBSRAM0_segment_end__ = 0x20080000;
-  __RAM_segment_start__ = 0x10000000;
-  __RAM_segment_end__ = 0x10008000;
-  __FLASH_segment_start__ = 0x00000000;
-  __FLASH_segment_end__ = 0x00080000;
-
-  __STACKSIZE__ = 1024;
-  __STACKSIZE_PROCESS__ = 0;
-  __STACKSIZE_IRQ__ = 0;
-  __STACKSIZE_FIQ__ = 0;
-  __STACKSIZE_SVC__ = 0;
-  __STACKSIZE_ABT__ = 0;
-  __STACKSIZE_UND__ = 0;
-  __HEAPSIZE__ = 128;
-
-  __vectors_load_start__ = __FLASH_segment_start__;
-  .vectors __FLASH_segment_start__ : AT(__FLASH_segment_start__)
+  .vectors : 
   {
-    __vectors_start__ = .;
-    *(.vectors .vectors.*)
-  }
-  __vectors_end__ = __vectors_start__ + SIZEOF(.vectors);
+    KEEP(*(.vectors .vectors.*))
+  } > FLASH
 
-  . = ASSERT(__vectors_end__ >= __FLASH_segment_start__ && __vectors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .vectors is too large to fit in FLASH memory segment");
+	.text :
+	{
+		*(.text*)
 
-  __init_load_start__ = ALIGN(__vectors_end__ , 4);
-  .init ALIGN(__vectors_end__ , 4) : AT(ALIGN(__vectors_end__ , 4))
-  {
-    __init_start__ = .;
-    *(.init .init.*)
-  }
-  __init_end__ = __init_start__ + SIZEOF(.init);
+		KEEP(*(.init))
+		KEEP(*(.fini))
 
-  . = ASSERT(__init_end__ >= __FLASH_segment_start__ && __init_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .init is too large to fit in FLASH memory segment");
+		/* .ctors */
+		*crtbegin.o(.ctors)
+		*crtbegin?.o(.ctors)
+		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+    __ctors_start__ = ALIGN(4);
+		*(SORT(.ctors.*))
+		*(.ctors)
+    __ctors_end__ = ALIGN(4);
 
-  __text_load_start__ = ALIGN(__init_end__ , 4);
-  .text ALIGN(__init_end__ , 4) : AT(ALIGN(__init_end__ , 4))
-  {
-    __text_start__ = .;
-    *(.text .text.* .glue_7t .glue_7 .gnu.linkonce.t.* .gcc_except_table)
-  }
-  __text_end__ = __text_start__ + SIZEOF(.text);
+		/* .dtors */
+ 		*crtbegin.o(.dtors)
+ 		*crtbegin?.o(.dtors)
+ 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+    __dtors_start__ = ALIGN(4);
+ 		*(SORT(.dtors.*))
+ 		*(.dtors)
+    __dtors_end__ = ALIGN(4);
 
-  . = ASSERT(__text_end__ >= __FLASH_segment_start__ && __text_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .text is too large to fit in FLASH memory segment");
+		*(.rodata*)
 
-  __dtors_load_start__ = ALIGN(__text_end__ , 4);
-  .dtors ALIGN(__text_end__ , 4) : AT(ALIGN(__text_end__ , 4))
-  {
-    __dtors_start__ = .;
-    KEEP (*(SORT(.dtors.*))) KEEP (*(.dtors))
-  }
-  __dtors_end__ = __dtors_start__ + SIZEOF(.dtors);
+		KEEP(*(.eh_frame*))
+	} > FLASH
 
-  . = ASSERT(__dtors_end__ >= __FLASH_segment_start__ && __dtors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .dtors is too large to fit in FLASH memory segment");
+	.ARM.extab : 
+	{
+		*(.ARM.extab* .gnu.linkonce.armextab.*)
+	} > FLASH
 
-  __ctors_load_start__ = ALIGN(__dtors_end__ , 4);
-  .ctors ALIGN(__dtors_end__ , 4) : AT(ALIGN(__dtors_end__ , 4))
-  {
-    __ctors_start__ = .;
-    KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors))
-  }
-  __ctors_end__ = __ctors_start__ + SIZEOF(.ctors);
+	__exidx_start = .;
+	.ARM.exidx :
+	{
+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
+	} > FLASH
+	__exidx_end = .;
 
-  . = ASSERT(__ctors_end__ >= __FLASH_segment_start__ && __ctors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .ctors is too large to fit in FLASH memory segment");
+	__data_load_start__ = ALIGN (4);
 
-  __rodata_load_start__ = ALIGN(__ctors_end__ , 4);
-  .rodata ALIGN(__ctors_end__ , 4) : AT(ALIGN(__ctors_end__ , 4))
-  {
-    __rodata_start__ = .;
-    *(.rodata .rodata.* .gnu.linkonce.r.*)
-  }
-  __rodata_end__ = __rodata_start__ + SIZEOF(.rodata);
+	.data : AT (__data_load_start__) 
+	{
+		__data_start__ = .;
 
-  . = ASSERT(__rodata_end__ >= __FLASH_segment_start__ && __rodata_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .rodata is too large to fit in FLASH memory segment");
+		*(vtable)
+		*(.data*)
 
-  __fast_load_start__ = ALIGN(__rodata_end__ , 4);
-  .fast ALIGN(__RAM_segment_start__ , 4) : AT(ALIGN(__rodata_end__ , 4))
-  {
-    __fast_start__ = .;
-    *(.fast .fast.*)
-  }
-  __fast_end__ = __fast_start__ + SIZEOF(.fast);
+		. = ALIGN(4);
+		/* preinit data */
+		PROVIDE_HIDDEN (__preinit_array_start = .);
+		KEEP(*(.preinit_array))
+		PROVIDE_HIDDEN (__preinit_array_end = .);
 
-  __fast_load_end__ = __fast_load_start__ + SIZEOF(.fast);
+		. = ALIGN(4);
+		/* init data */
+		PROVIDE_HIDDEN (__init_array_start = .);
+		KEEP(*(SORT(.init_array.*)))
+		KEEP(*(.init_array))
+		PROVIDE_HIDDEN (__init_array_end = .);
 
-  . = ASSERT((__fast_load_start__ + SIZEOF(.fast)) >= __FLASH_segment_start__ && (__fast_load_start__ + SIZEOF(.fast)) <= (__FLASH_segment_start__ + 0x00080000) , "error: .fast is too large to fit in FLASH memory segment");
+		. = ALIGN(4);
+		/* finit data */
+		PROVIDE_HIDDEN (__fini_array_start = .);
+		KEEP(*(SORT(.fini_array.*)))
+		KEEP(*(.fini_array))
+		PROVIDE_HIDDEN (__fini_array_end = .);
 
-  .fast_run ALIGN(__RAM_segment_start__ , 4) (NOLOAD) :
-  {
-    __fast_run_start__ = .;
-    . = MAX(__fast_run_start__ + SIZEOF(.fast), .);
-  }
-  __fast_run_end__ = __fast_run_start__ + SIZEOF(.fast_run);
+		KEEP(*(.jcr*))
+		. = ALIGN(4);
+		/* All data end */
+		
+    __data_end__ = .;
 
-  . = ASSERT(__fast_run_end__ >= __RAM_segment_start__ && __fast_run_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .fast_run is too large to fit in RAM memory segment");
+	} > RAM
 
-  __data_load_start__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4);
-  .data ALIGN(__fast_run_end__ , 4) : AT(ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4))
-  {
-    __data_start__ = .;
-    *(.data .data.* .gnu.linkonce.d.*)
-  }
-  __data_end__ = __data_start__ + SIZEOF(.data);
+	.bss :
+	{
+		. = ALIGN(4);
+		__bss_start__ = .;
+		*(.bss*)
+		*(COMMON)
+		. = ALIGN(4);
+		__bss_end__ = .;
 
-  __data_load_end__ = __data_load_start__ + SIZEOF(.data);
-
-  __FLASH_segment_used_end__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4) + SIZEOF(.data);
-
-  . = ASSERT((__data_load_start__ + SIZEOF(.data)) >= __FLASH_segment_start__ && (__data_load_start__ + SIZEOF(.data)) <= (__FLASH_segment_start__ + 0x00080000) , "error: .data is too large to fit in FLASH memory segment");
-
-  .data_run ALIGN(__fast_run_end__ , 4) (NOLOAD) :
-  {
-    __data_run_start__ = .;
-    . = MAX(__data_run_start__ + SIZEOF(.data), .);
-  }
-  __data_run_end__ = __data_run_start__ + SIZEOF(.data_run);
-
-  . = ASSERT(__data_run_end__ >= __RAM_segment_start__ && __data_run_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .data_run is too large to fit in RAM memory segment");
-
-  __bss_load_start__ = ALIGN(__data_run_end__ , 4);
-  .bss ALIGN(__data_run_end__ , 4) (NOLOAD) : AT(ALIGN(__data_run_end__ , 4))
-  {
-    __bss_start__ = .;
-    *(.bss .bss.* .gnu.linkonce.b.*) *(COMMON)
-  }
-  __bss_end__ = __bss_start__ + SIZEOF(.bss);
-
-  . = ASSERT(__bss_end__ >= __RAM_segment_start__ && __bss_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .bss is too large to fit in RAM memory segment");
-
-  __non_init_load_start__ = ALIGN(__bss_end__ , 4);
-  .non_init ALIGN(__bss_end__ , 4) (NOLOAD) : AT(ALIGN(__bss_end__ , 4))
-  {
-    __non_init_start__ = .;
-    *(.non_init .non_init.*)
-  }
-  __non_init_end__ = __non_init_start__ + SIZEOF(.non_init);
-
-  . = ASSERT(__non_init_end__ >= __RAM_segment_start__ && __non_init_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .non_init is too large to fit in RAM memory segment");
-
-  __heap_load_start__ = ALIGN(__non_init_end__ , 4);
-  .heap ALIGN(__non_init_end__ , 4) (NOLOAD) : AT(ALIGN(__non_init_end__ , 4))
-  {
-    __heap_start__ = .;
+	} > RAM
+	
+	.heap (COPY):
+	{
+    __heap_start__ = ALIGN(4);
     *(.heap)
-    . = ALIGN(MAX(__heap_start__ + __HEAPSIZE__ , .), 4);
-  }
-  __heap_end__ = __heap_start__ + SIZEOF(.heap);
+    . = ALIGN(. + __HEAPSIZE__, 4);
+    __heap_end__ = ALIGN(4);
+	} > RAM
 
-  . = ASSERT(__heap_end__ >= __RAM_segment_start__ && __heap_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .heap is too large to fit in RAM memory segment");
-
-  __stack_load_start__ = ALIGN(__heap_end__ , 4);
-  .stack ALIGN(__heap_end__ , 4) (NOLOAD) : AT(ALIGN(__heap_end__ , 4))
+  .stack ALIGN(4) (NOLOAD) :
   {
-    __stack_start__ = .;
+    __stack_start__ = ALIGN(4);
     *(.stack)
-    . = ALIGN(MAX(__stack_start__ + __STACKSIZE__ , .), 4);
-  }
-  __stack_end__ = __stack_start__ + SIZEOF(.stack);
-
-  . = ASSERT(__stack_end__ >= __RAM_segment_start__ && __stack_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .stack is too large to fit in RAM memory segment");
-
-  __stack_process_load_start__ = ALIGN(__stack_end__ , 4);
-  .stack_process ALIGN(__stack_end__ , 4) (NOLOAD) : AT(ALIGN(__stack_end__ , 4))
-  {
-    __stack_process_start__ = .;
-    *(.stack_process)
-    . = ALIGN(MAX(__stack_process_start__ + __STACKSIZE_PROCESS__ , .), 4);
-  }
-  __stack_process_end__ = __stack_process_start__ + SIZEOF(.stack_process);
-
-  __RAM_segment_used_end__ = ALIGN(__stack_end__ , 4) + SIZEOF(.stack_process);
-
-  . = ASSERT(__stack_process_end__ >= __RAM_segment_start__ && __stack_process_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .stack_process is too large to fit in RAM memory segment");
+    . = ALIGN(. + __STACKSIZE__, 4);
+    __stack_end__ = ALIGN(4);
+  } > RAM
 
+  __RAM_segment_used_end__ = .;
 }
-

ports/cortex_m0/iar/CMakeLists.txt

@@ -0,0 +1,21 @@
+
+target_sources(${PROJECT_NAME}
+    PRIVATE
+    # {{BEGIN_TARGET_SOURCES}}
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_iar.c
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_restore.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_save.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_control.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_disable.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_restore.S    
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_schedule.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_stack_build.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_system_return.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_timer_interrupt.S
+    # {{END_TARGET_SOURCES}}
+)
+
+target_include_directories(${PROJECT_NAME}
+    PUBLIC
+    ${CMAKE_CURRENT_LIST_DIR}/inc
+)

ports/cortex_m23/ac6/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                         Cortex-M23/AC6    */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -62,6 +62,10 @@
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and changed */
+/*                                            secure stack initialization */
+/*                                            macro to port-specific,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -342,7 +346,7 @@ ULONG   _tx_misra_ipsr_get(VOID);
 #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
 /* Initialize secure stacks for threads calling secure functions. */
 extern void    _tx_thread_secure_stack_initialize(void);
-#define TX_INITIALIZE_KERNEL_ENTER_EXTENSION            _tx_thread_secure_stack_initialize();
+#define TX_PORT_SPECIFIC_PRE_INITIALIZATION             _tx_thread_secure_stack_initialize();
 #endif
 
 /* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to 
@@ -411,7 +415,7 @@ unsigned int          was_masked;
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] = 
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M23/AC6 Version 6.1.11 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M23/AC6 Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m23/ac6/src/tx_misra.S

@@ -0,0 +1,724 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   ThreadX MISRA Compliance                                            */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        #define SHT_PROGBITS 0x1
+
+        .global __aeabi_memset
+        .global _tx_thread_current_ptr
+        .global _tx_thread_interrupt_disable
+        .global _tx_thread_interrupt_restore
+        .global _tx_thread_stack_analyze
+        .global _tx_thread_stack_error_handler
+        .global _tx_thread_system_state
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_trace_buffer_current_ptr
+        .global _tx_trace_buffer_end_ptr
+        .global _tx_trace_buffer_start_ptr
+        .global _tx_trace_event_enable_bits
+        .global _tx_trace_full_notify_function
+        .global _tx_trace_header_ptr
+#endif
+
+        .global _tx_misra_always_true
+        .global _tx_misra_block_pool_to_uchar_pointer_convert
+        .global _tx_misra_byte_pool_to_uchar_pointer_convert
+        .global _tx_misra_char_to_uchar_pointer_convert
+        .global _tx_misra_const_char_to_char_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_entry_to_uchar_pointer_convert
+#endif
+        .global _tx_misra_indirect_void_to_uchar_pointer_convert
+        .global _tx_misra_memset
+        .global _tx_misra_message_copy
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_object_to_uchar_pointer_convert
+#endif
+        .global _tx_misra_pointer_to_ulong_convert
+        .global _tx_misra_status_get
+        .global _tx_misra_thread_stack_check
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_time_stamp_get
+#endif
+        .global _tx_misra_timer_indirect_to_void_pointer_convert
+        .global _tx_misra_timer_pointer_add
+        .global _tx_misra_timer_pointer_dif
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_trace_event_insert
+#endif
+        .global _tx_misra_uchar_pointer_add
+        .global _tx_misra_uchar_pointer_dif
+        .global _tx_misra_uchar_pointer_sub
+        .global _tx_misra_uchar_to_align_type_pointer_convert
+        .global _tx_misra_uchar_to_block_pool_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_uchar_to_entry_pointer_convert
+        .global _tx_misra_uchar_to_header_pointer_convert
+#endif
+        .global _tx_misra_uchar_to_indirect_byte_pool_pointer_convert
+        .global _tx_misra_uchar_to_indirect_uchar_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_uchar_to_object_pointer_convert
+#endif
+        .global _tx_misra_uchar_to_void_pointer_convert
+        .global _tx_misra_ulong_pointer_add
+        .global _tx_misra_ulong_pointer_dif
+        .global _tx_misra_ulong_pointer_sub
+        .global _tx_misra_ulong_to_pointer_convert
+        .global _tx_misra_ulong_to_thread_pointer_convert
+        .global _tx_misra_user_timer_pointer_get
+        .global _tx_misra_void_to_block_pool_pointer_convert
+        .global _tx_misra_void_to_byte_pool_pointer_convert
+        .global _tx_misra_void_to_event_flags_pointer_convert
+        .global _tx_misra_void_to_indirect_uchar_pointer_convert
+        .global _tx_misra_void_to_mutex_pointer_convert
+        .global _tx_misra_void_to_queue_pointer_convert
+        .global _tx_misra_void_to_semaphore_pointer_convert
+        .global _tx_misra_void_to_thread_pointer_convert
+        .global _tx_misra_void_to_uchar_pointer_convert
+        .global _tx_misra_void_to_ulong_pointer_convert
+        .global _tx_misra_ipsr_get
+        .global _tx_misra_control_get
+        .global _tx_misra_control_set
+#ifdef __ARM_FP
+        .global _tx_misra_fpccr_get
+        .global _tx_misra_vfp_touch
+#endif
+
+        .global _tx_misra_event_flags_group_not_used
+        .global _tx_misra_event_flags_set_notify_not_used
+        .global _tx_misra_queue_not_used
+        .global _tx_misra_queue_send_notify_not_used
+        .global _tx_misra_semaphore_not_used
+        .global _tx_misra_semaphore_put_notify_not_used
+        .global _tx_misra_thread_entry_exit_notify_not_used
+        .global _tx_misra_thread_not_used
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_memset(VOID *ptr, UINT value, UINT size);            */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .align 4
+        .syntax unified
+        .thumb_func
+_tx_misra_memset:
+        PUSH     {R4,LR}
+        MOVS     R4,R0
+        MOVS     R0,R2
+        MOVS     R2,R1
+        MOVS     R1,R0
+        MOVS     R0,R4
+        BL       __aeabi_memset
+        POP      {R4,PC}          // return
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UCHAR  *_tx_misra_uchar_pointer_add(UCHAR *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_add:
+        ADD      R0,R0,R1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UCHAR  *_tx_misra_uchar_pointer_sub(UCHAR *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_sub:
+        RSBS     R1,R1,#+0
+        ADD      R0,R0,R1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_uchar_pointer_dif(UCHAR *ptr1, UCHAR *ptr2);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_dif:
+        SUBS     R0,R0,R1
+        BX       LR               // return
+
+
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
+/**                                                                                                                                 */
+/**  This single function serves all of the below prototypes.                                                                       */
+/**                                                                                                                                 */
+/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                                                                          */
+/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);                                                                        */
+/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);                                                  */
+/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);                                                    */
+/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);                                                    */
+/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);                                                   */
+/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);                                                                */
+/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);                                                  */
+/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);                                                      */
+/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);                                                     */
+/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);                                                      */
+/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);                                                    */
+/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);                                         */
+/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);                                           */
+/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);                                                                */
+/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);                                                             */
+/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);                                                             */
+/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);                                                     */
+/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);                                                                */
+/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);                                                            */
+/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);                                          */
+/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);                                                      */
+/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);                                                           */
+/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);                                             */
+/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);                                             */
+/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);                                                   */
+/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);                                              */
+/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);                                              */
+/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                                                                */
+/**  VOID    _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr);                                                 */
+/**  VOID    _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr));          */
+/**  VOID    _tx_misra_queue_not_used(TX_QUEUE *queue_ptr);                                                                         */
+/**  VOID    _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr));                           */
+/**  VOID    _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr);                                                             */
+/**  VOID    _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr));             */
+/**  VOID    _tx_misra_thread_not_used(TX_THREAD *thread_ptr);                                                                      */
+/**  VOID    _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id));  */
+/**                                                                                                                                 */
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
+        .text
+        .thumb_func
+_tx_misra_pointer_to_ulong_convert:
+_tx_misra_ulong_to_pointer_convert:
+_tx_misra_indirect_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_indirect_uchar_pointer_convert:
+_tx_misra_block_pool_to_uchar_pointer_convert:
+_tx_misra_void_to_block_pool_pointer_convert:
+_tx_misra_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_block_pool_pointer_convert:
+_tx_misra_void_to_indirect_uchar_pointer_convert:
+_tx_misra_void_to_byte_pool_pointer_convert:
+_tx_misra_byte_pool_to_uchar_pointer_convert:
+_tx_misra_uchar_to_align_type_pointer_convert:
+_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
+_tx_misra_void_to_event_flags_pointer_convert:
+_tx_misra_void_to_ulong_pointer_convert:
+_tx_misra_void_to_mutex_pointer_convert:
+_tx_misra_void_to_queue_pointer_convert:
+_tx_misra_void_to_semaphore_pointer_convert:
+_tx_misra_uchar_to_void_pointer_convert:
+_tx_misra_ulong_to_thread_pointer_convert:
+_tx_misra_timer_indirect_to_void_pointer_convert:
+_tx_misra_const_char_to_char_pointer_convert:
+_tx_misra_void_to_thread_pointer_convert:
+#ifdef TX_ENABLE_EVENT_TRACE
+_tx_misra_object_to_uchar_pointer_convert:
+_tx_misra_uchar_to_object_pointer_convert:
+_tx_misra_uchar_to_header_pointer_convert:
+_tx_misra_uchar_to_entry_pointer_convert:
+_tx_misra_entry_to_uchar_pointer_convert:
+#endif
+_tx_misra_char_to_uchar_pointer_convert:
+_tx_misra_event_flags_group_not_used:
+_tx_misra_event_flags_set_notify_not_used:
+_tx_misra_queue_not_used:
+_tx_misra_queue_send_notify_not_used:
+_tx_misra_semaphore_not_used:
+_tx_misra_semaphore_put_notify_not_used:
+_tx_misra_thread_entry_exit_notify_not_used:
+_tx_misra_thread_not_used:
+
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  *_tx_misra_ulong_pointer_add(ULONG *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_add:
+        LSLS    R1,#2
+        ADD     R0,R0,R1
+        BX      LR              // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  *_tx_misra_ulong_pointer_sub(ULONG *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_sub:
+        MOVS    R3,#3
+        MVNS    R2,R3
+        MULS    R1,R2,R1
+        ADD     R0,R0,R1
+        BX      LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_ulong_pointer_dif(ULONG *ptr1, ULONG *ptr2);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_dif:
+        SUBS     R0,R0,R1
+        ASRS     R0,R0,#+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_message_copy(ULONG **source, ULONG **destination,    */
+/**                                                           UINT size); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_message_copy:
+        PUSH     {R4,R5}
+        LDR      R3,[R0, #+0]
+        LDR      R4,[R1, #+0]
+        LDR      R5,[R3, #+0]
+        STR      R5,[R4, #+0]
+        ADDS     R4,R4,#+4
+        ADDS     R3,R3,#+4
+        CMP      R2,#+2
+        BCC.N    _tx_misra_message_copy_0
+        SUBS     R2,R2,#+1
+        B.N      _tx_misra_message_copy_1
+_tx_misra_message_copy_2:
+        LDR      R5,[R3, #+0]
+        STR      R5,[R4, #+0]
+        ADDS     R4,R4,#+4
+        ADDS     R3,R3,#+4
+        SUBS     R2,R2,#+1
+_tx_misra_message_copy_1:
+        CMP      R2,#+0
+        BNE.N    _tx_misra_message_copy_2
+_tx_misra_message_copy_0:
+        STR      R3,[R0, #+0]
+        STR      R4,[R1, #+0]
+        POP      {R4,R5}
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_timer_pointer_dif(TX_TIMER_INTERNAL **ptr1,         */
+/**                                           TX_TIMER_INTERNAL **ptr2);  */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_timer_pointer_dif:
+        SUBS     R0,R0,R1
+        ASRS     R0,R0,#+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  TX_TIMER_INTERNAL **_tx_misra_timer_pointer_add(TX_TIMER_INTERNAL    */
+/**                                                  **ptr1, ULONG size); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_timer_pointer_add:
+        LSLS    R1,#2
+        ADD     R0,R0,R1
+        BX      LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_user_timer_pointer_get(TX_TIMER_INTERNAL             */
+/**                              *internal_timer, TX_TIMER **user_timer); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_user_timer_pointer_get:
+        SUBS    R0,#8
+        STR     R0,[R1, #+0]
+        BX      LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_thread_stack_check(TX_THREAD *thread_ptr,            */
+/**                                              VOID **highest_stack);   */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_thread_stack_check:
+        PUSH    {R3-R7,LR}
+        MOVS    R4,R0
+        MOVS    R5,R1
+        BL      _tx_thread_interrupt_disable
+        CMP     R4,#0
+        BEQ.N   _tx_misra_thread_stack_check_0
+        LDR     R1,[R4]
+        LDR     R2,=0x54485244
+        CMP     R1,R2
+        BNE.N   _tx_misra_thread_stack_check_0
+        LDR     R1,[R4, #8]
+        LDR     R2,[R5]
+        CMP     R1,R2
+        BCS.N   _tx_misra_thread_stack_check_1
+        STR     R1,[R5]
+_tx_misra_thread_stack_check_1:
+        LDR     R1,[R4, #12]
+        LDR     R1,[R1]
+        LDR     R6,=0xEFEFEFEF
+        CMP     R1,R6
+        BNE.N   _tx_misra_thread_stack_check_2
+        LDR     R1,[R4, #16]
+        MOVS    R7,#1
+        LDR     R1,[R1, R7]
+        CMP     R1,R6
+        BNE.N   _tx_misra_thread_stack_check_2
+        LDR     R1,[R5]
+        LDR     R2,[R4, #12]
+        CMP     R1,R2
+        BCS.N   _tx_misra_thread_stack_check_3
+_tx_misra_thread_stack_check_2:
+        BL      _tx_thread_interrupt_restore
+        MOVS    R0,R4
+        BL      _tx_thread_stack_error_handler
+        BL      _tx_thread_interrupt_disable
+_tx_misra_thread_stack_check_3:
+        LDR     R1,[R5]
+        LDR     R7,=-4
+        LDR     R1,[R1, R7]
+        CMP     R1,R6
+        BEQ.N   _tx_misra_thread_stack_check_0
+        BL      _tx_thread_interrupt_restore
+        MOVS    R0,R4
+        BL      _tx_thread_stack_analyze
+        BL      _tx_thread_interrupt_disable
+_tx_misra_thread_stack_check_0:
+        BL      _tx_thread_interrupt_restore
+        POP     {R0,R4,R5,R6,R7,PC}    // return
+
+#ifdef TX_ENABLE_EVENT_TRACE
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_trace_event_insert(ULONG event_id,                   */
+/**           VOID *info_field_1, ULONG info_field_2, ULONG info_field_3, */
+/**           ULONG info_field_4, ULONG filter, ULONG time_stamp);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_trace_event_insert:
+        PUSH     {R3-R7,LR}
+        LDR.N    R4,DataTable2_1
+        LDR      R4,[R4, #+0]
+        CMP      R4,#+0
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R5,DataTable2_2
+        LDR      R5,[R5, #+0]
+        LDR      R6,[SP, #+28]
+        TST      R5,R6
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R5,DataTable2_3
+        LDR      R5,[R5, #+0]
+        LDR.N    R6,DataTable2_4
+        LDR      R6,[R6, #+0]
+        CMP      R5,#+0
+        BNE.N    _tx_misra_trace_event_insert_1
+        LDR      R5,[R6, #+44]
+        LDR      R7,[R6, #+60]
+        LSLS     R7,R7,#+16
+        ORRS     R7,R7,#0x80000000
+        ORRS     R5,R7,R5
+        B.N      _tx_misra_trace_event_insert_2
+_tx_misra_trace_event_insert_1:
+        CMP      R5,#-252645136
+        BCS.N    _tx_misra_trace_event_insert_3
+        MOVS     R5,R6
+        MOVS     R6,#-1
+        B.N      _tx_misra_trace_event_insert_2
+_tx_misra_trace_event_insert_3:
+        MOVS     R6,#-252645136
+        MOVS     R5,#+0
+_tx_misra_trace_event_insert_2:
+        STR      R6,[R4, #+0]
+        STR      R5,[R4, #+4]
+        STR      R0,[R4, #+8]
+        LDR      R0,[SP, #+32]
+        STR      R0,[R4, #+12]
+        STR      R1,[R4, #+16]
+        STR      R2,[R4, #+20]
+        STR      R3,[R4, #+24]
+        LDR      R0,[SP, #+24]
+        STR      R0,[R4, #+28]
+        ADDS     R4,R4,#+32
+        LDR.N    R0,DataTable2_5
+        LDR      R0,[R0, #+0]
+        CMP      R4,R0
+        BCC.N    _tx_misra_trace_event_insert_4
+        LDR.N    R0,DataTable2_6
+        LDR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_1
+        STR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        STR      R4,[R0, #+32]
+        LDR.N    R0,DataTable2_8
+        LDR      R0,[R0, #+0]
+        CMP      R0,#+0
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        LDR.N    R1,DataTable2_8
+        LDR      R1,[R1, #+0]
+        BLX      R1
+        B.N      _tx_misra_trace_event_insert_0
+_tx_misra_trace_event_insert_4:
+        LDR.N    R0,DataTable2_1
+        STR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        STR      R4,[R0, #+32]
+_tx_misra_trace_event_insert_0:
+        POP      {R0,R4-R7,PC}    // return
+
+
+        .data
+DataTable2_1:
+        .word     _tx_trace_buffer_current_ptr
+
+        .data
+DataTable2_2:
+        .word     _tx_trace_event_enable_bits
+
+        .data
+DataTable2_5:
+        .word     _tx_trace_buffer_end_ptr
+
+        .data
+DataTable2_6:
+        .word     _tx_trace_buffer_start_ptr
+
+        .data
+DataTable2_7:
+        .word     _tx_trace_header_ptr
+
+        .data
+DataTable2_8:
+        .word     _tx_trace_full_notify_function
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_time_stamp_get(VOID);                               */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_time_stamp_get:
+        MOVS     R0,#+0
+        BX       LR               // return
+
+#endif
+
+        .data
+DataTable2_3:
+        .word     _tx_thread_system_state
+
+        .data
+DataTable2_4:
+        .word     _tx_thread_current_ptr
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UINT  _tx_misra_always_true(void);                                   */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_always_true:
+        MOVS     R0,#+1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UINT  _tx_misra_status_get(UINT status);                             */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_status_get:
+        MOVS     R0,#+0
+        BX       LR               // return
+
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_ipsr_get(void);                                                          */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ipsr_get:
+        MRS      R0, IPSR
+        BX       LR               // return
+
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_control_get(void);                                                       */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_control_get:
+        MRS      R0, CONTROL
+        BX       LR               // return
+
+        
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  void   _tx_misra_control_set(ULONG value);                                                */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_control_set:
+        MSR      CONTROL, R0
+        BX       LR               // return
+
+        
+#ifdef __ARM_FP
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_fpccr_get(void);                                                         */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_fpccr_get:
+        LDR      r0, =0xE000EF34  // Build FPCCR address
+        LDR      r0, [r0]         // Load FPCCR value
+        BX       LR               // return
+        
+        
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  void   _tx_misra_vfp_touch(void);                                                         */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_vfp_touch:
+        vmov.f32 s0, s0
+        BX       LR               // return
+        
+#endif
+        
+
+        .data
+        .word 0

ports/cortex_m23/ac6/src/tx_thread_secure_stack.c

@@ -23,7 +23,7 @@
 
 #include "tx_api.h"
 
-/* If TX_SINGLE_MODE_SECURE or TX_SINGLE_MODE_NON_SECURE is defined, 
+/* If TX_SINGLE_MODE_SECURE or TX_SINGLE_MODE_NON_SECURE is defined,
    no secure stack functionality is needed. */
 #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
 
@@ -45,8 +45,14 @@
 #define TX_THREAD_STACK_SEAL_SIZE           8
 #define TX_THREAD_STACK_SEAL_VALUE          0xFEF5EDA5
 
-/* Secure stack info struct to hold stack start, stack limit, 
-   current stack pointer, and pointer to owning thread. 
+/* max number of Secure context */
+#ifndef TX_MAX_SECURE_CONTEXTS
+#define TX_MAX_SECURE_CONTEXTS              32
+#endif
+#define TX_INVALID_SECURE_CONTEXT_IDX       (-1)
+
+/* Secure stack info struct to hold stack start, stack limit,
+   current stack pointer, and pointer to owning thread.
    This will be allocated for each thread with a secure stack. */
 typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
 {
@@ -54,8 +60,14 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
     VOID        *tx_thread_secure_stack_start;      /* Thread's secure stack start address */
     VOID        *tx_thread_secure_stack_limit;      /* Thread's secure stack limit */
     TX_THREAD   *tx_thread_ptr;                     /* Keep track of thread for error handling */
+    INT          tx_next_free_index;                /* Next free index of free secure context */
 } TX_THREAD_SECURE_STACK_INFO;
 
+/* Static secure contexts */
+static TX_THREAD_SECURE_STACK_INFO tx_thread_secure_context[TX_MAX_SECURE_CONTEXTS];
+/* Head of free secure context */
+static INT tx_head_free_index = 0U;
+
 
 
 /**************************************************************************/
@@ -63,7 +75,7 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_mode_stack_initialize           Cortex-M23/AC6    */
-/*                                                           6.1.7        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -102,12 +114,16 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
 /*                                            changed name, execute in    */
 /*                                            handler mode,               */
 /*                                            resulting in version 6.1.7  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
 UINT    _tx_thread_secure_mode_stack_initialize(void)
 {
 UINT    status;
+INT     index;
 
     /* Make sure function is called from interrupt (threads should not call). */
     if (__get_IPSR() == 0)
@@ -118,12 +134,26 @@ UINT    status;
     {
         /* Set secure mode to use PSP. */
         __set_CONTROL(__get_CONTROL() | 2);
-        
+
         /* Set process stack pointer and stack limit to 0 to throw exception when a thread
            without a secure stack calls a secure function that tries to use secure stack. */
         __set_PSPLIM(0);
         __set_PSP(0);
-        
+
+        for (index = 0; index < TX_MAX_SECURE_CONTEXTS; index++)
+        {
+
+            /* Check last index and mark next free to invalid index */
+            if(index == (TX_MAX_SECURE_CONTEXTS - 1))
+            {
+                tx_thread_secure_context[index].tx_next_free_index = TX_INVALID_SECURE_CONTEXT_IDX;
+            }
+            else
+            {
+                tx_thread_secure_context[index].tx_next_free_index = index + 1;
+            }
+        }
+
         status = TX_SUCCESS;
     }
     return status;
@@ -136,7 +166,7 @@ UINT    status;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_mode_stack_allocate             Cortex-M23/AC6    */
-/*                                                           6.1.1        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -160,9 +190,7 @@ UINT    status;
 /*  CALLS                                                                 */
 /*                                                                        */
 /*    __get_IPSR                            Intrinsic to get IPSR         */
-/*    calloc                                Compiler's calloc function    */
 /*    malloc                                Compiler's malloc function    */
-/*    free                                  Compiler's free() function    */
 /*    __set_PSPLIM                          Intrinsic to set PSP limit    */
 /*    __set_PSP                             Intrinsic to set PSP          */
 /*    __TZ_get_PSPLIM_NS                    Intrinsic to get NS PSP       */
@@ -179,18 +207,22 @@ UINT    status;
 /*  10-16-2020      Scott Larson            Modified comment(s),          */
 /*                                            added stack sealing,        */
 /*                                            resulting in version 6.1.1  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
 UINT    _tx_thread_secure_mode_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size)
 {
+TX_INTERRUPT_SAVE_AREA
 UINT    status;
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
 UCHAR   *stack_mem;
-ULONG   sp;
+INT     secure_context_index;
 
     status = TX_SUCCESS;
-    
+
     /* Make sure function is called from interrupt (threads should not call). */
     if (__get_IPSR() == 0)
     {
@@ -200,23 +232,38 @@ ULONG   sp;
     {
         status = TX_SIZE_ERROR;
     }
-    
+
     /* Check if thread already has secure stack allocated. */
     else if (thread_ptr -> tx_thread_secure_stack_context != 0)
     {
         status = TX_THREAD_ERROR;
     }
-    
+
     else
     {
-        /* Allocate space for secure stack info. */
-        info_ptr = calloc(1, sizeof(TX_THREAD_SECURE_STACK_INFO));
-        
-        if(info_ptr != TX_NULL)
+        TX_DISABLE
+
+        /* Allocate free index for secure stack info. */
+        if(tx_head_free_index != TX_INVALID_SECURE_CONTEXT_IDX)
         {
+            secure_context_index = tx_head_free_index;
+            tx_head_free_index = tx_thread_secure_context[tx_head_free_index].tx_next_free_index;
+            tx_thread_secure_context[secure_context_index].tx_next_free_index = TX_INVALID_SECURE_CONTEXT_IDX;
+        }
+        else
+        {
+            secure_context_index = TX_INVALID_SECURE_CONTEXT_IDX;
+        }
+
+        TX_RESTORE
+
+        if(secure_context_index != TX_INVALID_SECURE_CONTEXT_IDX)
+        {
+            info_ptr = &tx_thread_secure_context[secure_context_index];
+
             /* If stack info allocated, allocate a stack & seal. */
             stack_mem = malloc(stack_size + TX_THREAD_STACK_SEAL_SIZE);
-            
+
             if(stack_mem != TX_NULL)
             {
                 /* Secure stack has been allocated, save in the stack info struct. */
@@ -224,38 +271,41 @@ ULONG   sp;
                 info_ptr -> tx_thread_secure_stack_start = stack_mem + stack_size;
                 info_ptr -> tx_thread_secure_stack_ptr = info_ptr -> tx_thread_secure_stack_start;
                 info_ptr -> tx_thread_ptr = thread_ptr;
-                
+
                 /* Seal bottom of stack. */
                 *(ULONG*)info_ptr -> tx_thread_secure_stack_start = TX_THREAD_STACK_SEAL_VALUE;
-                
-                /* Save info pointer in thread. */
-                thread_ptr -> tx_thread_secure_stack_context = info_ptr;
-                
-                /* Check if this thread is running by looking at PSP_NS and seeing if it is within
-                   the stack_start and stack_end range. */
-                sp = __TZ_get_PSP_NS();
-                if(sp > ((ULONG) thread_ptr -> tx_thread_stack_start) && sp < ((ULONG) thread_ptr -> tx_thread_stack_end))
+
+                /* Save secure context id (i.e non-zero base index) in thread. */
+                thread_ptr -> tx_thread_secure_stack_context = (VOID *)(secure_context_index + 1);
+
+                /* Check if this thread is running by looking at its stack start and PSPLIM_NS */
+                if(((ULONG) thread_ptr -> tx_thread_stack_start & 0xFFFFFFF8) == __TZ_get_PSPLIM_NS())
                 {
                     /* If this thread is running, set Secure PSP and PSPLIM. */
                     __set_PSPLIM((ULONG)(info_ptr -> tx_thread_secure_stack_limit));
                     __set_PSP((ULONG)(info_ptr -> tx_thread_secure_stack_ptr));
                 }
             }
-            
+
             else
             {
+                TX_DISABLE
+
                 /* Stack not allocated, free the info struct. */
-                free(info_ptr);
+                tx_thread_secure_context[secure_context_index].tx_next_free_index = tx_head_free_index;
+                tx_head_free_index = secure_context_index;
+                TX_RESTORE
+
                 status = TX_NO_MEMORY;
             }
         }
-        
+
         else
         {
             status = TX_NO_MEMORY;
         }
     }
-    
+
     return(status);
 }
 
@@ -266,7 +316,7 @@ ULONG   sp;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_mode_stack_free                 Cortex-M23/AC6    */
-/*                                                           6.1.1        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -301,44 +351,65 @@ ULONG   sp;
 /*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*  10-16-2020      Scott Larson            Modified comment(s),          */
 /*                                            resulting in version 6.1.1  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
 UINT    _tx_thread_secure_mode_stack_free(TX_THREAD *thread_ptr)
 {
+TX_INTERRUPT_SAVE_AREA
 UINT    status;
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
+INT     secure_context_index;
 
     status = TX_SUCCESS;
-    
-    /* Pickup stack info from thread. */
-    info_ptr = thread_ptr -> tx_thread_secure_stack_context;
-    
+
+    /* Pickup stack info id from thread. */
+    secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1;
+
     /* Make sure function is called from interrupt (threads should not call). */
     if (__get_IPSR() == 0)
     {
         status = TX_CALLER_ERROR;
     }
-    
-    /* Check that this secure context is for this thread. */
-    else if (info_ptr -> tx_thread_ptr != thread_ptr)
+
+    /* Check if secure context index is in valid range. */
+    else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS)
     {
         status = TX_THREAD_ERROR;
     }
-    
     else
     {
-        
-        /* Free secure stack. */
-        free(info_ptr -> tx_thread_secure_stack_limit);
-        
-        /* Free info struct. */
-        free(info_ptr);
-        
-        /* Clear secure context from thread. */
-        thread_ptr -> tx_thread_secure_stack_context = 0;
+
+        /* Pickup stack info from static array of secure contexts. */
+        info_ptr = &tx_thread_secure_context[secure_context_index];
+
+        /* Check that this secure context is for this thread. */
+        if (info_ptr -> tx_thread_ptr != thread_ptr)
+        {
+            status = TX_THREAD_ERROR;
+        }
+
+        else
+        {
+
+            /* Free secure stack. */
+            free(info_ptr -> tx_thread_secure_stack_limit);
+
+            TX_DISABLE
+
+            /* Free info struct. */
+            tx_thread_secure_context[secure_context_index].tx_next_free_index = tx_head_free_index;
+            tx_head_free_index = secure_context_index;
+            TX_RESTORE
+
+            /* Clear secure context from thread. */
+            thread_ptr -> tx_thread_secure_stack_context = 0;
+        }
     }
-    
+
     return(status);
 }
 
@@ -349,7 +420,7 @@ TX_THREAD_SECURE_STACK_INFO *info_ptr;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_stack_context_save              Cortex-M23/AC6    */
-/*                                                           6.1.7        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -386,6 +457,9 @@ TX_THREAD_SECURE_STACK_INFO *info_ptr;
 /*                                            resulting in version 6.1.1  */
 /*  06-02-2021      Scott Larson            Fix stack pointer save,       */
 /*                                            resulting in version 6.1.7  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
@@ -393,38 +467,45 @@ void _tx_thread_secure_stack_context_save(TX_THREAD *thread_ptr)
 {
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
 ULONG   sp;
+INT secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1;
 
     /* This function should be called from scheduler only. */
     if (__get_IPSR() == 0)
     {
         return;
     }
-    
+
+    /* Check if secure context index is in valid range. */
+    else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS)
+    {
+        return;
+    }
+
     /* Pickup the secure context pointer. */
-    info_ptr = (TX_THREAD_SECURE_STACK_INFO *)(thread_ptr -> tx_thread_secure_stack_context);
-    
+    info_ptr = &tx_thread_secure_context[secure_context_index];
+
     /* Check that this secure context is for this thread. */
     if (info_ptr -> tx_thread_ptr != thread_ptr)
     {
         return;
     }
-    
+
     /* Check that stack pointer is in range */
     sp = __get_PSP();
-    if ((sp < (ULONG)info_ptr -> tx_thread_secure_stack_limit) || 
+    if ((sp < (ULONG)info_ptr -> tx_thread_secure_stack_limit) ||
         (sp > (ULONG)info_ptr -> tx_thread_secure_stack_start))
     {
         return;
     }
-    
+
     /* Save stack pointer. */
     info_ptr -> tx_thread_secure_stack_ptr = (VOID *) sp;
-    
+
     /* Set process stack pointer and stack limit to 0 to throw exception when a thread
        without a secure stack calls a secure function that tries to use secure stack. */
     __set_PSPLIM(0);
     __set_PSP(0);
-    
+
     return;
 }
 
@@ -435,7 +516,7 @@ ULONG   sp;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_stack_context_restore           Cortex-M23/AC6    */
-/*                                                           6.1.1        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -469,32 +550,42 @@ ULONG   sp;
 /*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*  10-16-2020      Scott Larson            Modified comment(s),          */
 /*                                            resulting in version 6.1.1  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
 void _tx_thread_secure_stack_context_restore(TX_THREAD *thread_ptr)
 {
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
+INT secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1;
 
     /* This function should be called from scheduler only. */
     if (__get_IPSR() == 0)
     {
         return;
     }
-    
+
+    /* Check if secure context index is in valid range. */
+    else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS)
+    {
+        return;
+    }
+
     /* Pickup the secure context pointer. */
-    info_ptr = (TX_THREAD_SECURE_STACK_INFO *)(thread_ptr -> tx_thread_secure_stack_context);
-    
+    info_ptr = &tx_thread_secure_context[secure_context_index];
+
     /* Check that this secure context is for this thread. */
     if (info_ptr -> tx_thread_ptr != thread_ptr)
     {
         return;
     }
-    
+
     /* Set stack pointer and limit. */
     __set_PSPLIM((ULONG)info_ptr -> tx_thread_secure_stack_limit);
     __set_PSP   ((ULONG)info_ptr -> tx_thread_secure_stack_ptr);
-    
+
     return;
 }
 

ports/cortex_m23/ac6/src/tx_thread_secure_stack_initialize.S

@@ -26,7 +26,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_stack_initialize                Cortex-M23/AC6    */
-/*                                                           6.1.7        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -49,13 +49,17 @@
 /*                                                                        */
 /*  CALLED BY                                                             */
 /*                                                                        */
-/*    TX_INITIALIZE_KERNEL_ENTER_EXTENSION                                */
+/*    TX_PORT_SPECIFIC_PRE_INITIALIZATION                                 */
 /*                                                                        */
 /*  RELEASE HISTORY                                                       */
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
 /*  06-02-2021      Scott Larson            Initial Version 6.1.7         */
+/*  07-29-2022      Scott Larson            Modified comments and changed */
+/*                                            secure stack initialization */
+/*                                            macro to port-specific,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 // VOID   _tx_thread_secure_stack_initialize(VOID)

ports/cortex_m23/gnu/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                         Cortex-M23/GNU    */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -63,6 +63,10 @@
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and changed */
+/*                                            secure stack initialization */
+/*                                            macro to port-specific,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -341,7 +345,7 @@ ULONG   _tx_misra_ipsr_get(VOID);
 #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
 /* Initialize secure stacks for threads calling secure functions. */
 extern void    _tx_thread_secure_stack_initialize(void);
-#define TX_INITIALIZE_KERNEL_ENTER_EXTENSION            _tx_thread_secure_stack_initialize();
+#define TX_PORT_SPECIFIC_PRE_INITIALIZATION             _tx_thread_secure_stack_initialize();
 #endif
 
 /* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to 
@@ -443,7 +447,7 @@ unsigned int interrupt_save;
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] = 
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M23/GNU Version 6.1.11 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M23/GNU Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m23/gnu/src/tx_misra.S

@@ -0,0 +1,724 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   ThreadX MISRA Compliance                                            */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        #define SHT_PROGBITS 0x1
+
+        .global __aeabi_memset
+        .global _tx_thread_current_ptr
+        .global _tx_thread_interrupt_disable
+        .global _tx_thread_interrupt_restore
+        .global _tx_thread_stack_analyze
+        .global _tx_thread_stack_error_handler
+        .global _tx_thread_system_state
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_trace_buffer_current_ptr
+        .global _tx_trace_buffer_end_ptr
+        .global _tx_trace_buffer_start_ptr
+        .global _tx_trace_event_enable_bits
+        .global _tx_trace_full_notify_function
+        .global _tx_trace_header_ptr
+#endif
+
+        .global _tx_misra_always_true
+        .global _tx_misra_block_pool_to_uchar_pointer_convert
+        .global _tx_misra_byte_pool_to_uchar_pointer_convert
+        .global _tx_misra_char_to_uchar_pointer_convert
+        .global _tx_misra_const_char_to_char_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_entry_to_uchar_pointer_convert
+#endif
+        .global _tx_misra_indirect_void_to_uchar_pointer_convert
+        .global _tx_misra_memset
+        .global _tx_misra_message_copy
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_object_to_uchar_pointer_convert
+#endif
+        .global _tx_misra_pointer_to_ulong_convert
+        .global _tx_misra_status_get
+        .global _tx_misra_thread_stack_check
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_time_stamp_get
+#endif
+        .global _tx_misra_timer_indirect_to_void_pointer_convert
+        .global _tx_misra_timer_pointer_add
+        .global _tx_misra_timer_pointer_dif
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_trace_event_insert
+#endif
+        .global _tx_misra_uchar_pointer_add
+        .global _tx_misra_uchar_pointer_dif
+        .global _tx_misra_uchar_pointer_sub
+        .global _tx_misra_uchar_to_align_type_pointer_convert
+        .global _tx_misra_uchar_to_block_pool_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_uchar_to_entry_pointer_convert
+        .global _tx_misra_uchar_to_header_pointer_convert
+#endif
+        .global _tx_misra_uchar_to_indirect_byte_pool_pointer_convert
+        .global _tx_misra_uchar_to_indirect_uchar_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_uchar_to_object_pointer_convert
+#endif
+        .global _tx_misra_uchar_to_void_pointer_convert
+        .global _tx_misra_ulong_pointer_add
+        .global _tx_misra_ulong_pointer_dif
+        .global _tx_misra_ulong_pointer_sub
+        .global _tx_misra_ulong_to_pointer_convert
+        .global _tx_misra_ulong_to_thread_pointer_convert
+        .global _tx_misra_user_timer_pointer_get
+        .global _tx_misra_void_to_block_pool_pointer_convert
+        .global _tx_misra_void_to_byte_pool_pointer_convert
+        .global _tx_misra_void_to_event_flags_pointer_convert
+        .global _tx_misra_void_to_indirect_uchar_pointer_convert
+        .global _tx_misra_void_to_mutex_pointer_convert
+        .global _tx_misra_void_to_queue_pointer_convert
+        .global _tx_misra_void_to_semaphore_pointer_convert
+        .global _tx_misra_void_to_thread_pointer_convert
+        .global _tx_misra_void_to_uchar_pointer_convert
+        .global _tx_misra_void_to_ulong_pointer_convert
+        .global _tx_misra_ipsr_get
+        .global _tx_misra_control_get
+        .global _tx_misra_control_set
+#ifdef __ARM_FP
+        .global _tx_misra_fpccr_get
+        .global _tx_misra_vfp_touch
+#endif
+
+        .global _tx_misra_event_flags_group_not_used
+        .global _tx_misra_event_flags_set_notify_not_used
+        .global _tx_misra_queue_not_used
+        .global _tx_misra_queue_send_notify_not_used
+        .global _tx_misra_semaphore_not_used
+        .global _tx_misra_semaphore_put_notify_not_used
+        .global _tx_misra_thread_entry_exit_notify_not_used
+        .global _tx_misra_thread_not_used
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_memset(VOID *ptr, UINT value, UINT size);            */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .align 4
+        .syntax unified
+        .thumb_func
+_tx_misra_memset:
+        PUSH     {R4,LR}
+        MOVS     R4,R0
+        MOVS     R0,R2
+        MOVS     R2,R1
+        MOVS     R1,R0
+        MOVS     R0,R4
+        BL       __aeabi_memset
+        POP      {R4,PC}          // return
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UCHAR  *_tx_misra_uchar_pointer_add(UCHAR *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_add:
+        ADD      R0,R0,R1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UCHAR  *_tx_misra_uchar_pointer_sub(UCHAR *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_sub:
+        RSBS     R1,R1,#+0
+        ADD      R0,R0,R1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_uchar_pointer_dif(UCHAR *ptr1, UCHAR *ptr2);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_dif:
+        SUBS     R0,R0,R1
+        BX       LR               // return
+
+
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
+/**                                                                                                                                 */
+/**  This single function serves all of the below prototypes.                                                                       */
+/**                                                                                                                                 */
+/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                                                                          */
+/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);                                                                        */
+/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);                                                  */
+/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);                                                    */
+/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);                                                    */
+/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);                                                   */
+/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);                                                                */
+/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);                                                  */
+/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);                                                      */
+/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);                                                     */
+/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);                                                      */
+/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);                                                    */
+/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);                                         */
+/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);                                           */
+/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);                                                                */
+/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);                                                             */
+/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);                                                             */
+/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);                                                     */
+/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);                                                                */
+/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);                                                            */
+/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);                                          */
+/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);                                                      */
+/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);                                                           */
+/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);                                             */
+/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);                                             */
+/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);                                                   */
+/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);                                              */
+/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);                                              */
+/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                                                                */
+/**  VOID    _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr);                                                 */
+/**  VOID    _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr));          */
+/**  VOID    _tx_misra_queue_not_used(TX_QUEUE *queue_ptr);                                                                         */
+/**  VOID    _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr));                           */
+/**  VOID    _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr);                                                             */
+/**  VOID    _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr));             */
+/**  VOID    _tx_misra_thread_not_used(TX_THREAD *thread_ptr);                                                                      */
+/**  VOID    _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id));  */
+/**                                                                                                                                 */
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
+        .text
+        .thumb_func
+_tx_misra_pointer_to_ulong_convert:
+_tx_misra_ulong_to_pointer_convert:
+_tx_misra_indirect_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_indirect_uchar_pointer_convert:
+_tx_misra_block_pool_to_uchar_pointer_convert:
+_tx_misra_void_to_block_pool_pointer_convert:
+_tx_misra_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_block_pool_pointer_convert:
+_tx_misra_void_to_indirect_uchar_pointer_convert:
+_tx_misra_void_to_byte_pool_pointer_convert:
+_tx_misra_byte_pool_to_uchar_pointer_convert:
+_tx_misra_uchar_to_align_type_pointer_convert:
+_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
+_tx_misra_void_to_event_flags_pointer_convert:
+_tx_misra_void_to_ulong_pointer_convert:
+_tx_misra_void_to_mutex_pointer_convert:
+_tx_misra_void_to_queue_pointer_convert:
+_tx_misra_void_to_semaphore_pointer_convert:
+_tx_misra_uchar_to_void_pointer_convert:
+_tx_misra_ulong_to_thread_pointer_convert:
+_tx_misra_timer_indirect_to_void_pointer_convert:
+_tx_misra_const_char_to_char_pointer_convert:
+_tx_misra_void_to_thread_pointer_convert:
+#ifdef TX_ENABLE_EVENT_TRACE
+_tx_misra_object_to_uchar_pointer_convert:
+_tx_misra_uchar_to_object_pointer_convert:
+_tx_misra_uchar_to_header_pointer_convert:
+_tx_misra_uchar_to_entry_pointer_convert:
+_tx_misra_entry_to_uchar_pointer_convert:
+#endif
+_tx_misra_char_to_uchar_pointer_convert:
+_tx_misra_event_flags_group_not_used:
+_tx_misra_event_flags_set_notify_not_used:
+_tx_misra_queue_not_used:
+_tx_misra_queue_send_notify_not_used:
+_tx_misra_semaphore_not_used:
+_tx_misra_semaphore_put_notify_not_used:
+_tx_misra_thread_entry_exit_notify_not_used:
+_tx_misra_thread_not_used:
+
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  *_tx_misra_ulong_pointer_add(ULONG *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_add:
+        LSLS    R1,#2
+        ADD     R0,R0,R1
+        BX      LR              // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  *_tx_misra_ulong_pointer_sub(ULONG *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_sub:
+        MOVS    R3,#3
+        MVNS    R2,R3
+        MULS    R1,R2,R1
+        ADD     R0,R0,R1
+        BX      LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_ulong_pointer_dif(ULONG *ptr1, ULONG *ptr2);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_dif:
+        SUBS     R0,R0,R1
+        ASRS     R0,R0,#+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_message_copy(ULONG **source, ULONG **destination,    */
+/**                                                           UINT size); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_message_copy:
+        PUSH     {R4,R5}
+        LDR      R3,[R0, #+0]
+        LDR      R4,[R1, #+0]
+        LDR      R5,[R3, #+0]
+        STR      R5,[R4, #+0]
+        ADDS     R4,R4,#+4
+        ADDS     R3,R3,#+4
+        CMP      R2,#+2
+        BCC.N    _tx_misra_message_copy_0
+        SUBS     R2,R2,#+1
+        B.N      _tx_misra_message_copy_1
+_tx_misra_message_copy_2:
+        LDR      R5,[R3, #+0]
+        STR      R5,[R4, #+0]
+        ADDS     R4,R4,#+4
+        ADDS     R3,R3,#+4
+        SUBS     R2,R2,#+1
+_tx_misra_message_copy_1:
+        CMP      R2,#+0
+        BNE.N    _tx_misra_message_copy_2
+_tx_misra_message_copy_0:
+        STR      R3,[R0, #+0]
+        STR      R4,[R1, #+0]
+        POP      {R4,R5}
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_timer_pointer_dif(TX_TIMER_INTERNAL **ptr1,         */
+/**                                           TX_TIMER_INTERNAL **ptr2);  */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_timer_pointer_dif:
+        SUBS     R0,R0,R1
+        ASRS     R0,R0,#+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  TX_TIMER_INTERNAL **_tx_misra_timer_pointer_add(TX_TIMER_INTERNAL    */
+/**                                                  **ptr1, ULONG size); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_timer_pointer_add:
+        LSLS    R1,#2
+        ADD     R0,R0,R1
+        BX      LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_user_timer_pointer_get(TX_TIMER_INTERNAL             */
+/**                              *internal_timer, TX_TIMER **user_timer); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_user_timer_pointer_get:
+        SUBS    R0,#8
+        STR     R0,[R1, #+0]
+        BX      LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_thread_stack_check(TX_THREAD *thread_ptr,            */
+/**                                              VOID **highest_stack);   */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_thread_stack_check:
+        PUSH    {R3-R7,LR}
+        MOVS    R4,R0
+        MOVS    R5,R1
+        BL      _tx_thread_interrupt_disable
+        CMP     R4,#0
+        BEQ.N   _tx_misra_thread_stack_check_0
+        LDR     R1,[R4]
+        LDR     R2,=0x54485244
+        CMP     R1,R2
+        BNE.N   _tx_misra_thread_stack_check_0
+        LDR     R1,[R4, #8]
+        LDR     R2,[R5]
+        CMP     R1,R2
+        BCS.N   _tx_misra_thread_stack_check_1
+        STR     R1,[R5]
+_tx_misra_thread_stack_check_1:
+        LDR     R1,[R4, #12]
+        LDR     R1,[R1]
+        LDR     R6,=0xEFEFEFEF
+        CMP     R1,R6
+        BNE.N   _tx_misra_thread_stack_check_2
+        LDR     R1,[R4, #16]
+        MOVS    R7,#1
+        LDR     R1,[R1, R7]
+        CMP     R1,R6
+        BNE.N   _tx_misra_thread_stack_check_2
+        LDR     R1,[R5]
+        LDR     R2,[R4, #12]
+        CMP     R1,R2
+        BCS.N   _tx_misra_thread_stack_check_3
+_tx_misra_thread_stack_check_2:
+        BL      _tx_thread_interrupt_restore
+        MOVS    R0,R4
+        BL      _tx_thread_stack_error_handler
+        BL      _tx_thread_interrupt_disable
+_tx_misra_thread_stack_check_3:
+        LDR     R1,[R5]
+        LDR     R7,=-4
+        LDR     R1,[R1, R7]
+        CMP     R1,R6
+        BEQ.N   _tx_misra_thread_stack_check_0
+        BL      _tx_thread_interrupt_restore
+        MOVS    R0,R4
+        BL      _tx_thread_stack_analyze
+        BL      _tx_thread_interrupt_disable
+_tx_misra_thread_stack_check_0:
+        BL      _tx_thread_interrupt_restore
+        POP     {R0,R4,R5,R6,R7,PC}    // return
+
+#ifdef TX_ENABLE_EVENT_TRACE
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_trace_event_insert(ULONG event_id,                   */
+/**           VOID *info_field_1, ULONG info_field_2, ULONG info_field_3, */
+/**           ULONG info_field_4, ULONG filter, ULONG time_stamp);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_trace_event_insert:
+        PUSH     {R3-R7,LR}
+        LDR.N    R4,DataTable2_1
+        LDR      R4,[R4, #+0]
+        CMP      R4,#+0
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R5,DataTable2_2
+        LDR      R5,[R5, #+0]
+        LDR      R6,[SP, #+28]
+        TST      R5,R6
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R5,DataTable2_3
+        LDR      R5,[R5, #+0]
+        LDR.N    R6,DataTable2_4
+        LDR      R6,[R6, #+0]
+        CMP      R5,#+0
+        BNE.N    _tx_misra_trace_event_insert_1
+        LDR      R5,[R6, #+44]
+        LDR      R7,[R6, #+60]
+        LSLS     R7,R7,#+16
+        ORRS     R7,R7,#0x80000000
+        ORRS     R5,R7,R5
+        B.N      _tx_misra_trace_event_insert_2
+_tx_misra_trace_event_insert_1:
+        CMP      R5,#-252645136
+        BCS.N    _tx_misra_trace_event_insert_3
+        MOVS     R5,R6
+        MOVS     R6,#-1
+        B.N      _tx_misra_trace_event_insert_2
+_tx_misra_trace_event_insert_3:
+        MOVS     R6,#-252645136
+        MOVS     R5,#+0
+_tx_misra_trace_event_insert_2:
+        STR      R6,[R4, #+0]
+        STR      R5,[R4, #+4]
+        STR      R0,[R4, #+8]
+        LDR      R0,[SP, #+32]
+        STR      R0,[R4, #+12]
+        STR      R1,[R4, #+16]
+        STR      R2,[R4, #+20]
+        STR      R3,[R4, #+24]
+        LDR      R0,[SP, #+24]
+        STR      R0,[R4, #+28]
+        ADDS     R4,R4,#+32
+        LDR.N    R0,DataTable2_5
+        LDR      R0,[R0, #+0]
+        CMP      R4,R0
+        BCC.N    _tx_misra_trace_event_insert_4
+        LDR.N    R0,DataTable2_6
+        LDR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_1
+        STR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        STR      R4,[R0, #+32]
+        LDR.N    R0,DataTable2_8
+        LDR      R0,[R0, #+0]
+        CMP      R0,#+0
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        LDR.N    R1,DataTable2_8
+        LDR      R1,[R1, #+0]
+        BLX      R1
+        B.N      _tx_misra_trace_event_insert_0
+_tx_misra_trace_event_insert_4:
+        LDR.N    R0,DataTable2_1
+        STR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        STR      R4,[R0, #+32]
+_tx_misra_trace_event_insert_0:
+        POP      {R0,R4-R7,PC}    // return
+
+
+        .data
+DataTable2_1:
+        .word     _tx_trace_buffer_current_ptr
+
+        .data
+DataTable2_2:
+        .word     _tx_trace_event_enable_bits
+
+        .data
+DataTable2_5:
+        .word     _tx_trace_buffer_end_ptr
+
+        .data
+DataTable2_6:
+        .word     _tx_trace_buffer_start_ptr
+
+        .data
+DataTable2_7:
+        .word     _tx_trace_header_ptr
+
+        .data
+DataTable2_8:
+        .word     _tx_trace_full_notify_function
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_time_stamp_get(VOID);                               */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_time_stamp_get:
+        MOVS     R0,#+0
+        BX       LR               // return
+
+#endif
+
+        .data
+DataTable2_3:
+        .word     _tx_thread_system_state
+
+        .data
+DataTable2_4:
+        .word     _tx_thread_current_ptr
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UINT  _tx_misra_always_true(void);                                   */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_always_true:
+        MOVS     R0,#+1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UINT  _tx_misra_status_get(UINT status);                             */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_status_get:
+        MOVS     R0,#+0
+        BX       LR               // return
+
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_ipsr_get(void);                                                          */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ipsr_get:
+        MRS      R0, IPSR
+        BX       LR               // return
+
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_control_get(void);                                                       */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_control_get:
+        MRS      R0, CONTROL
+        BX       LR               // return
+
+        
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  void   _tx_misra_control_set(ULONG value);                                                */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_control_set:
+        MSR      CONTROL, R0
+        BX       LR               // return
+
+        
+#ifdef __ARM_FP
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_fpccr_get(void);                                                         */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_fpccr_get:
+        LDR      r0, =0xE000EF34  // Build FPCCR address
+        LDR      r0, [r0]         // Load FPCCR value
+        BX       LR               // return
+        
+        
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  void   _tx_misra_vfp_touch(void);                                                         */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_vfp_touch:
+        vmov.f32 s0, s0
+        BX       LR               // return
+        
+#endif
+        
+
+        .data
+        .word 0

ports/cortex_m23/gnu/src/tx_thread_secure_stack.c

@@ -23,7 +23,7 @@
 
 #include "tx_api.h"
 
-/* If TX_SINGLE_MODE_SECURE or TX_SINGLE_MODE_NON_SECURE is defined, 
+/* If TX_SINGLE_MODE_SECURE or TX_SINGLE_MODE_NON_SECURE is defined,
    no secure stack functionality is needed. */
 #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
 
@@ -44,8 +44,14 @@
 #define TX_THREAD_STACK_SEAL_SIZE           8
 #define TX_THREAD_STACK_SEAL_VALUE          0xFEF5EDA5
 
-/* Secure stack info struct to hold stack start, stack limit, 
-   current stack pointer, and pointer to owning thread. 
+/* max number of Secure context */
+#ifndef TX_MAX_SECURE_CONTEXTS
+#define TX_MAX_SECURE_CONTEXTS              32
+#endif
+#define TX_INVALID_SECURE_CONTEXT_IDX       (-1)
+
+/* Secure stack info struct to hold stack start, stack limit,
+   current stack pointer, and pointer to owning thread.
    This will be allocated for each thread with a secure stack. */
 typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
 {
@@ -53,8 +59,14 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
     VOID        *tx_thread_secure_stack_start;      /* Thread's secure stack start address */
     VOID        *tx_thread_secure_stack_limit;      /* Thread's secure stack limit */
     TX_THREAD   *tx_thread_ptr;                     /* Keep track of thread for error handling */
+    INT          tx_next_free_index;                /* Next free index of free secure context */
 } TX_THREAD_SECURE_STACK_INFO;
 
+/* Static secure contexts */
+static TX_THREAD_SECURE_STACK_INFO tx_thread_secure_context[TX_MAX_SECURE_CONTEXTS];
+/* Head of free secure context */
+static INT tx_head_free_index = 0U;
+
 
 
 /**************************************************************************/
@@ -62,7 +74,7 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_mode_stack_initialize           Cortex-M23/GNU    */
-/*                                                           6.1.7        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -98,6 +110,9 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
 /*                                            name, execute in handler    */
 /*                                            mode, disable optimization, */
 /*                                            resulting in version 6.1.7  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry, optimize(0)))
@@ -106,6 +121,7 @@ UINT    _tx_thread_secure_mode_stack_initialize(void)
 UINT    status;
 ULONG   control;
 ULONG   ipsr;
+INT     index;
 
     /* Make sure function is called from interrupt (threads should not call). */
     asm volatile("MRS     %0, IPSR" : "=r" (ipsr));   /* Get IPSR register. */
@@ -119,12 +135,26 @@ ULONG   ipsr;
         asm volatile("MRS     %0, CONTROL" : "=r" (control));   /* Get CONTROL register. */
         control |= 2;                                           /* Use PSP. */
         asm volatile("MSR     CONTROL, %0" :: "r" (control));   /* Set CONTROL register. */
-        
+
         /* Set process stack pointer and stack limit to 0 to throw exception when a thread
            without a secure stack calls a secure function that tries to use secure stack. */
         asm volatile("MSR     PSPLIM, %0" :: "r" (0));
         asm volatile("MSR     PSP, %0" :: "r" (0));
-        
+
+        for (index = 0; index < TX_MAX_SECURE_CONTEXTS; index++)
+        {
+
+            /* Check last index and mark next free to invalid index */
+            if(index == (TX_MAX_SECURE_CONTEXTS - 1))
+            {
+                tx_thread_secure_context[index].tx_next_free_index = TX_INVALID_SECURE_CONTEXT_IDX;
+            }
+            else
+            {
+                tx_thread_secure_context[index].tx_next_free_index = index + 1;
+            }
+        }
+
         status = TX_SUCCESS;
     }
     return status;
@@ -137,7 +167,7 @@ ULONG   ipsr;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_mode_stack_allocate             Cortex-M23/GNU    */
-/*                                                           6.1.3        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -160,9 +190,7 @@ ULONG   ipsr;
 /*                                                                        */
 /*  CALLS                                                                 */
 /*                                                                        */
-/*    calloc                                Compiler's calloc function    */
 /*    malloc                                Compiler's malloc function    */
-/*    free                                  Compiler's free() function    */
 /*                                                                        */
 /*  CALLED BY                                                             */
 /*                                                                        */
@@ -179,20 +207,26 @@ ULONG   ipsr;
 /*  12-31-2020      Scott Larson            Modified comment(s), and      */
 /*                                            fixed M23 GCC build,        */
 /*                                            resulting in version 6.1.3  */
-
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            added                       */
+/*                                            TX_INTERRUPT_SAVE_AREA,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
 UINT    _tx_thread_secure_mode_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size)
 {
+TX_INTERRUPT_SAVE_AREA
 UINT    status;
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
 UCHAR   *stack_mem;
 ULONG   ipsr;
 ULONG   psplim_ns;
+INT     secure_context_index;
 
     status = TX_SUCCESS;
-    
+
     /* Make sure function is called from interrupt (threads should not call). */
     asm volatile("MRS     %0, IPSR" : "=r" (ipsr));   /* Get IPSR register. */
     if (ipsr == 0)
@@ -203,23 +237,38 @@ ULONG   psplim_ns;
     {
         status = TX_SIZE_ERROR;
     }
-    
+
     /* Check if thread already has secure stack allocated. */
     else if (thread_ptr -> tx_thread_secure_stack_context != 0)
     {
         status = TX_THREAD_ERROR;
     }
-    
+
     else
     {
-        /* Allocate space for secure stack info. */
-        info_ptr = calloc(1, sizeof(TX_THREAD_SECURE_STACK_INFO));
-        
-        if(info_ptr != TX_NULL)
+        TX_DISABLE
+
+        /* Allocate free index for secure stack info. */
+        if(tx_head_free_index != TX_INVALID_SECURE_CONTEXT_IDX)
         {
+            secure_context_index = tx_head_free_index;
+            tx_head_free_index = tx_thread_secure_context[tx_head_free_index].tx_next_free_index;
+            tx_thread_secure_context[secure_context_index].tx_next_free_index = TX_INVALID_SECURE_CONTEXT_IDX;
+        }
+        else
+        {
+            secure_context_index = TX_INVALID_SECURE_CONTEXT_IDX;
+        }
+
+        TX_RESTORE
+
+        if(secure_context_index != TX_INVALID_SECURE_CONTEXT_IDX)
+        {
+            info_ptr = &tx_thread_secure_context[secure_context_index];
+
             /* If stack info allocated, allocate a stack & seal. */
             stack_mem = malloc(stack_size + TX_THREAD_STACK_SEAL_SIZE);
-            
+
             if(stack_mem != TX_NULL)
             {
                 /* Secure stack has been allocated, save in the stack info struct. */
@@ -227,13 +276,13 @@ ULONG   psplim_ns;
                 info_ptr -> tx_thread_secure_stack_start = stack_mem + stack_size;
                 info_ptr -> tx_thread_secure_stack_ptr = info_ptr -> tx_thread_secure_stack_start;
                 info_ptr -> tx_thread_ptr = thread_ptr;
-                
+
                 /* Seal bottom of stack. */
                 *(ULONG*)info_ptr -> tx_thread_secure_stack_start = TX_THREAD_STACK_SEAL_VALUE;
-                
-                /* Save info pointer in thread. */
-                thread_ptr -> tx_thread_secure_stack_context = info_ptr;
-                
+
+                /* Save secure context id (i.e non-zero base index) in thread. */
+                thread_ptr -> tx_thread_secure_stack_context = (VOID *)(secure_context_index + 1);
+
                 /* Check if this thread is running by looking at its stack start and PSPLIM_NS */
                 asm volatile("MRS     %0, PSPLIM_NS" : "=r" (psplim_ns));   /* Get PSPLIM_NS register. */
                 if(((ULONG) thread_ptr -> tx_thread_stack_start & 0xFFFFFFF8) == psplim_ns)
@@ -243,21 +292,26 @@ ULONG   psplim_ns;
                     asm volatile("MSR     PSP, %0" :: "r" ((ULONG)(info_ptr -> tx_thread_secure_stack_ptr)));
                 }
             }
-            
+
             else
             {
+                TX_DISABLE
+
                 /* Stack not allocated, free the info struct. */
-                free(info_ptr);
+                tx_thread_secure_context[secure_context_index].tx_next_free_index = tx_head_free_index;
+                tx_head_free_index = secure_context_index;
+                TX_RESTORE
+
                 status = TX_NO_MEMORY;
             }
         }
-        
+
         else
         {
             status = TX_NO_MEMORY;
         }
     }
-    
+
     return(status);
 }
 
@@ -268,7 +322,7 @@ ULONG   psplim_ns;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_mode_stack_free                 Cortex-M23/GNU    */
-/*                                                           6.1.3        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -305,46 +359,67 @@ ULONG   psplim_ns;
 /*  12-31-2020      Scott Larson            Modified comment(s), and      */
 /*                                            fixed M23 GCC build,        */
 /*                                            resulting in version 6.1.3  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
 UINT    _tx_thread_secure_mode_stack_free(TX_THREAD *thread_ptr)
 {
+TX_INTERRUPT_SAVE_AREA
 UINT    status;
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
 ULONG   ipsr;
+INT     secure_context_index;
 
     status = TX_SUCCESS;
-    
-    /* Pickup stack info from thread. */
-    info_ptr = thread_ptr -> tx_thread_secure_stack_context;
-    
+
+    /* Pickup stack info id from thread. */
+    secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1;
+
     /* Make sure function is called from interrupt (threads should not call). */
     asm volatile("MRS     %0, IPSR" : "=r" (ipsr));   /* Get IPSR register. */
     if (ipsr == 0)
     {
         status = TX_CALLER_ERROR;
     }
-    
-    /* Check that this secure context is for this thread. */
-    else if (info_ptr -> tx_thread_ptr != thread_ptr)
+
+    /* Check if secure context index is in valid range. */
+    else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS)
     {
         status = TX_THREAD_ERROR;
     }
-    
     else
     {
-        
-        /* Free secure stack. */
-        free(info_ptr -> tx_thread_secure_stack_limit);
-        
-        /* Free info struct. */
-        free(info_ptr);
-        
-        /* Clear secure context from thread. */
-        thread_ptr -> tx_thread_secure_stack_context = 0;
+
+        /* Pickup stack info from static array of secure contexts. */
+        info_ptr = &tx_thread_secure_context[secure_context_index];
+
+        /* Check that this secure context is for this thread. */
+        if (info_ptr -> tx_thread_ptr != thread_ptr)
+        {
+            status = TX_THREAD_ERROR;
+        }
+
+        else
+        {
+
+            /* Free secure stack. */
+            free(info_ptr -> tx_thread_secure_stack_limit);
+
+            TX_DISABLE
+
+            /* Free info struct. */
+            tx_thread_secure_context[secure_context_index].tx_next_free_index = tx_head_free_index;
+            tx_head_free_index = secure_context_index;
+            TX_RESTORE
+
+            /* Clear secure context from thread. */
+            thread_ptr -> tx_thread_secure_stack_context = 0;
+        }
     }
-    
+
     return(status);
 }
 
@@ -355,7 +430,7 @@ ULONG   ipsr;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_stack_context_save              Cortex-M23/GNU    */
-/*                                                           6.1.7        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -392,6 +467,9 @@ ULONG   ipsr;
 /*                                            resulting in version 6.1.3  */
 /*  06-02-2021      Scott Larson            Fix stack pointer save,       */
 /*                                            resulting in version 6.1.7  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
@@ -400,6 +478,7 @@ void _tx_thread_secure_stack_context_save(TX_THREAD *thread_ptr)
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
 ULONG   sp;
 ULONG   ipsr;
+INT secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1;
 
     /* This function should be called from scheduler only. */
     asm volatile("MRS     %0, IPSR" : "=r" (ipsr));   /* Get IPSR register. */
@@ -407,32 +486,38 @@ ULONG   ipsr;
     {
         return;
     }
-    
+
+    /* Check if secure context index is in valid range. */
+    else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS)
+    {
+        return;
+    }
+
     /* Pickup the secure context pointer. */
-    info_ptr = (TX_THREAD_SECURE_STACK_INFO *)(thread_ptr -> tx_thread_secure_stack_context);
-    
+    info_ptr = &tx_thread_secure_context[secure_context_index];
+
     /* Check that this secure context is for this thread. */
     if (info_ptr -> tx_thread_ptr != thread_ptr)
     {
         return;
     }
-    
+
     /* Check that stack pointer is in range */
     asm volatile("MRS     %0, PSP" : "=r" (sp));   /* Get PSP register. */
-    if ((sp < (ULONG)info_ptr -> tx_thread_secure_stack_limit) || 
+    if ((sp < (ULONG)info_ptr -> tx_thread_secure_stack_limit) ||
         (sp > (ULONG)info_ptr -> tx_thread_secure_stack_start))
     {
         return;
     }
-    
+
     /* Save stack pointer. */
     info_ptr -> tx_thread_secure_stack_ptr = (VOID *) sp;
-    
+
     /* Set process stack pointer and stack limit to 0 to throw exception when a thread
        without a secure stack calls a secure function that tries to use secure stack. */
     asm volatile("MSR     PSPLIM, %0" :: "r" (0));
     asm volatile("MSR     PSP, %0" :: "r" (0));
-    
+
     return;
 }
 
@@ -443,7 +528,7 @@ ULONG   ipsr;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_stack_context_restore           Cortex-M23/GNU    */
-/*                                                           6.1.3        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -478,6 +563,9 @@ ULONG   ipsr;
 /*  12-31-2020      Scott Larson            Modified comment(s), and      */
 /*                                            fixed M23 GCC build,        */
 /*                                            resulting in version 6.1.3  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
@@ -485,6 +573,7 @@ void _tx_thread_secure_stack_context_restore(TX_THREAD *thread_ptr)
 {
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
 ULONG   ipsr;
+INT secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1;
 
     /* This function should be called from scheduler only. */
     asm volatile("MRS     %0, IPSR" : "=r" (ipsr));   /* Get IPSR register. */
@@ -492,20 +581,26 @@ ULONG   ipsr;
     {
         return;
     }
-    
+
+    /* Check if secure context index is in valid range. */
+    else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS)
+    {
+        return;
+    }
+
     /* Pickup the secure context pointer. */
-    info_ptr = (TX_THREAD_SECURE_STACK_INFO *)(thread_ptr -> tx_thread_secure_stack_context);
-    
+    info_ptr = &tx_thread_secure_context[secure_context_index];
+
     /* Check that this secure context is for this thread. */
     if (info_ptr -> tx_thread_ptr != thread_ptr)
     {
         return;
     }
-    
+
     /* Set stack pointer and limit. */
     asm volatile("MSR     PSPLIM, %0" :: "r" ((ULONG)info_ptr -> tx_thread_secure_stack_limit));
     asm volatile("MSR     PSP, %0" :: "r" ((ULONG)info_ptr -> tx_thread_secure_stack_ptr));
-    
+
     return;
 }
 

ports/cortex_m23/gnu/src/tx_thread_secure_stack_initialize.S

@@ -26,7 +26,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_stack_initialize                Cortex-M23/GNU    */
-/*                                                           6.1.7        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -49,13 +49,17 @@
 /*                                                                        */
 /*  CALLED BY                                                             */
 /*                                                                        */
-/*    TX_INITIALIZE_KERNEL_ENTER_EXTENSION                                */
+/*    TX_PORT_SPECIFIC_PRE_INITIALIZATION                                 */
 /*                                                                        */
 /*  RELEASE HISTORY                                                       */
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
 /*  06-02-2021      Scott Larson            Initial Version 6.1.7         */
+/*  07-29-2022      Scott Larson            Modified comments and changed */
+/*                                            secure stack initialization */
+/*                                            macro to port-specific,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 // VOID   _tx_thread_secure_stack_initialize(VOID)

ports/cortex_m23/iar/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                         Cortex-M23/IAR    */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -61,6 +61,10 @@
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and changed */
+/*                                            secure stack initialization */
+/*                                            macro to port-specific,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -366,7 +370,7 @@ ULONG   _tx_misra_ipsr_get(VOID);
 #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
 /* Initialize secure stacks for threads calling secure functions. */
 extern void    _tx_thread_secure_stack_initialize(void);
-#define TX_INITIALIZE_KERNEL_ENTER_EXTENSION            _tx_thread_secure_stack_initialize();
+#define TX_PORT_SPECIFIC_PRE_INITIALIZATION             _tx_thread_secure_stack_initialize();
 #endif
 
 /* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to 
@@ -433,7 +437,7 @@ __istate_t interrupt_save;
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] = 
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M23/IAR Version 6.1.11 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M23/IAR Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m23/iar/src/tx_misra.s

@@ -96,8 +96,24 @@
         PUBLIC _tx_misra_void_to_uchar_pointer_convert
         PUBLIC _tx_misra_void_to_ulong_pointer_convert
         PUBLIC _tx_misra_ipsr_get
-        PUBLIC _tx_version_id
+        PUBLIC _tx_misra_control_get
+        PUBLIC _tx_misra_control_set
+#ifdef __ARMVFP__
+        PUBLIC _tx_misra_fpccr_get
+        PUBLIC _tx_misra_vfp_touch
+#endif
 
+        PUBLIC _tx_misra_event_flags_group_not_used
+        PUBLIC _tx_misra_event_flags_set_notify_not_used
+        PUBLIC _tx_misra_queue_not_used
+        PUBLIC _tx_misra_queue_send_notify_not_used
+        PUBLIC _tx_misra_semaphore_not_used
+        PUBLIC _tx_misra_semaphore_put_notify_not_used
+        PUBLIC _tx_misra_thread_entry_exit_notify_not_used
+        PUBLIC _tx_misra_thread_not_used
+
+#ifdef TX_MISRA_ENABLE
+        PUBLIC _tx_version_id
 
         SECTION `.data`:DATA:REORDER:NOROOT(2)
         DATA
@@ -109,11 +125,12 @@ _tx_version_id:
         DC8 45H, 78H, 70H, 72H, 65H, 73H, 73H, 20H
         DC8 4CH, 6FH, 67H, 69H, 63H, 20H, 49H, 6EH
         DC8 63H, 2EH, 20H, 2AH, 20H, 54H, 68H, 72H
-        DC8 65H, 61H, 64H, 58H, 20H, 36H, 2EH, 30H
+        DC8 65H, 61H, 64H, 58H, 20H, 36H, 2EH, 31H
         DC8 20H, 4DH, 49H, 53H, 52H, 41H, 20H, 43H
         DC8 20H, 43H, 6FH, 6DH, 70H, 6CH, 69H, 61H
         DC8 6EH, 74H, 20H, 2AH, 0
         DC8 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+#endif //TX_MISRA_ENABLE
 
 /**************************************************************************/
 /**************************************************************************/
@@ -133,7 +150,7 @@ _tx_misra_memset:
         MOVS     R1,R0
         MOVS     R0,R4
         BL       __aeabi_memset
-        POP      {R4,PC}          ;; return
+        POP      {R4,PC}          // return
 
 /**************************************************************************/
 /**************************************************************************/
@@ -147,7 +164,7 @@ _tx_misra_memset:
         THUMB
 _tx_misra_uchar_pointer_add:
         ADD      R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -163,7 +180,7 @@ _tx_misra_uchar_pointer_add:
 _tx_misra_uchar_pointer_sub:
         RSBS     R1,R1,#+0
         ADD      R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -178,21 +195,97 @@ _tx_misra_uchar_pointer_sub:
         THUMB
 _tx_misra_uchar_pointer_dif:
         SUBS     R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
+/**                                                                                                                                 */
+/**  This single function serves all of the below prototypes.                                                                       */
+/**                                                                                                                                 */
+/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                                                                          */
+/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);                                                                        */
+/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);                                                  */
+/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);                                                    */
+/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);                                                    */
+/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);                                                   */
+/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);                                                                */
+/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);                                                  */
+/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);                                                      */
+/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);                                                     */
+/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);                                                      */
+/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);                                                    */
+/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);                                         */
+/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);                                           */
+/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);                                                                */
+/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);                                                             */
+/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);                                                             */
+/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);                                                     */
+/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);                                                                */
+/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);                                                            */
+/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);                                          */
+/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);                                                      */
+/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);                                                           */
+/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);                                             */
+/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);                                             */
+/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);                                                   */
+/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);                                              */
+/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);                                              */
+/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                                                                */
+/**  VOID    _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr);                                                 */
+/**  VOID    _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr));          */
+/**  VOID    _tx_misra_queue_not_used(TX_QUEUE *queue_ptr);                                                                         */
+/**  VOID    _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr));                           */
+/**  VOID    _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr);                                                             */
+/**  VOID    _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr));             */
+/**  VOID    _tx_misra_thread_not_used(TX_THREAD *thread_ptr);                                                                      */
+/**  VOID    _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id));  */
+/**                                                                                                                                 */
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
         SECTION `.text`:CODE:NOROOT(1)
         THUMB
 _tx_misra_pointer_to_ulong_convert:
-        BX       LR               ;; return
+_tx_misra_ulong_to_pointer_convert:
+_tx_misra_indirect_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_indirect_uchar_pointer_convert:
+_tx_misra_block_pool_to_uchar_pointer_convert:
+_tx_misra_void_to_block_pool_pointer_convert:
+_tx_misra_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_block_pool_pointer_convert:
+_tx_misra_void_to_indirect_uchar_pointer_convert:
+_tx_misra_void_to_byte_pool_pointer_convert:
+_tx_misra_byte_pool_to_uchar_pointer_convert:
+_tx_misra_uchar_to_align_type_pointer_convert:
+_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
+_tx_misra_void_to_event_flags_pointer_convert:
+_tx_misra_void_to_ulong_pointer_convert:
+_tx_misra_void_to_mutex_pointer_convert:
+_tx_misra_void_to_queue_pointer_convert:
+_tx_misra_void_to_semaphore_pointer_convert:
+_tx_misra_uchar_to_void_pointer_convert:
+_tx_misra_ulong_to_thread_pointer_convert:
+_tx_misra_timer_indirect_to_void_pointer_convert:
+_tx_misra_const_char_to_char_pointer_convert:
+_tx_misra_void_to_thread_pointer_convert:
+#ifdef TX_ENABLE_EVENT_TRACE
+_tx_misra_object_to_uchar_pointer_convert:
+_tx_misra_uchar_to_object_pointer_convert:
+_tx_misra_uchar_to_header_pointer_convert:
+_tx_misra_uchar_to_entry_pointer_convert:
+_tx_misra_entry_to_uchar_pointer_convert:
+#endif
+_tx_misra_char_to_uchar_pointer_convert:
+_tx_misra_event_flags_group_not_used:
+_tx_misra_event_flags_set_notify_not_used:
+_tx_misra_queue_not_used:
+_tx_misra_queue_send_notify_not_used:
+_tx_misra_semaphore_not_used:
+_tx_misra_semaphore_put_notify_not_used:
+_tx_misra_thread_entry_exit_notify_not_used:
+_tx_misra_thread_not_used:
+
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -206,8 +299,9 @@ _tx_misra_pointer_to_ulong_convert:
         SECTION `.text`:CODE:NOROOT(1)
         THUMB
 _tx_misra_ulong_pointer_add:
-        ADD      R0,R0,R1, LSL #+2
-        BX       LR               ;; return
+        LSLS    R1,#2
+        ADD     R0,R0,R1
+        BX      LR              // return
 
 
 /**************************************************************************/
@@ -221,10 +315,11 @@ _tx_misra_ulong_pointer_add:
         SECTION `.text`:CODE:NOROOT(1)
         THUMB
 _tx_misra_ulong_pointer_sub:
-        MVNS     R2,#+3
-        MULS     R1,R2,R1
-        ADD      R0,R0,R1
-        BX       LR               ;; return
+        MOVS    R3,#3
+        MVNS    R2,R3
+        MULS    R1,R2,R1
+        ADD     R0,R0,R1
+        BX      LR               // return
 
 
 /**************************************************************************/
@@ -240,21 +335,7 @@ _tx_misra_ulong_pointer_sub:
 _tx_misra_ulong_pointer_dif:
         SUBS     R0,R0,R1
         ASRS     R0,R0,#+2
-        BX       LR               ;; return
-
-
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);              */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_ulong_to_pointer_convert:
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -293,7 +374,7 @@ _tx_misra_message_copy:
         STR      R3,[R0, #+0]
         STR      R4,[R1, #+0]
         POP      {R4,R5}
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -310,7 +391,7 @@ _tx_misra_message_copy:
 _tx_misra_timer_pointer_dif:
         SUBS     R0,R0,R1
         ASRS     R0,R0,#+2
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -325,8 +406,9 @@ _tx_misra_timer_pointer_dif:
         SECTION `.text`:CODE:NOROOT(1)
         THUMB
 _tx_misra_timer_pointer_add:
-        ADD      R0,R0,R1, LSL #+2
-        BX       LR               ;; return
+        LSLS    R1,#2
+        ADD     R0,R0,R1
+        BX      LR               // return
 
 
 /**************************************************************************/
@@ -341,12 +423,9 @@ _tx_misra_timer_pointer_add:
         SECTION `.text`:CODE:NOROOT(1)
         THUMB
 _tx_misra_user_timer_pointer_get:
-        ADDS     R2,R0,#+8
-        SUBS     R2,R2,R0
-        RSBS     R2,R2,#+0
-        ADD      R0,R0,R2
-        STR      R0,[R1, #+0]
-        BX       LR               ;; return
+        SUBS    R0,#8
+        STR     R0,[R1, #+0]
+        BX      LR               // return
 
 
 /**************************************************************************/
@@ -361,52 +440,54 @@ _tx_misra_user_timer_pointer_get:
         SECTION `.text`:CODE:NOROOT(1)
         THUMB
 _tx_misra_thread_stack_check:
-        PUSH     {R3-R5,LR}
-        MOVS     R4,R0
-        MOVS     R5,R1
-        BL       _tx_thread_interrupt_disable
-        CMP      R4,#+0
-        BEQ.N    ??_tx_misra_thread_stack_check_0
-        LDR      R1,[R4, #+0]
-        LDR.N    R2,??DataTable2  ;; 0x54485244
-        CMP      R1,R2
-        BNE.N    ??_tx_misra_thread_stack_check_0
-        LDR      R1,[R4, #+8]
-        LDR      R2,[R5, #+0]
-        CMP      R1,R2
-        BCS.N    ??_tx_misra_thread_stack_check_1
-        LDR      R1,[R4, #+8]
-        STR      R1,[R5, #+0]
+        PUSH    {R3-R5,LR}
+        MOVS    R4,R0
+        MOVS    R5,R1
+        BL      _tx_thread_interrupt_disable
+        CMP     R4,#0
+        BEQ.N   ??_tx_misra_thread_stack_check_0
+        LDR     R1,[R4]
+        LDR.N   R2,??DataTable2  // 0x54485244
+        CMP     R1,R2
+        BNE.N   ??_tx_misra_thread_stack_check_0
+        LDR     R1,[R4, #8]
+        LDR     R2,[R5]
+        CMP     R1,R2
+        BCS.N   ??_tx_misra_thread_stack_check_1
+        STR     R1,[R5]
 ??_tx_misra_thread_stack_check_1:
-        LDR      R1,[R4, #+12]
-        LDR      R1,[R1, #+0]
-        CMP      R1,#-269488145
-        BNE.N    ??_tx_misra_thread_stack_check_2
-        LDR      R1,[R4, #+16]
-        LDR      R1,[R1, #+1]
-        CMP      R1,#-269488145
-        BNE.N    ??_tx_misra_thread_stack_check_2
-        LDR      R1,[R5, #+0]
-        LDR      R2,[R4, #+12]
-        CMP      R1,R2
-        BCS.N    ??_tx_misra_thread_stack_check_3
+        LDR     R1,[R4, #12]
+        LDR     R1,[R1]
+        LDR     R6,=0xEFEFEFEF
+        CMP     R1,R6
+        BNE.N   ??_tx_misra_thread_stack_check_2
+        LDR     R1,[R4, #16]
+        MOVS    R7,#1
+        LDR     R1,[R1, R7]
+        CMP     R1,R6
+        BNE.N   ??_tx_misra_thread_stack_check_2
+        LDR     R1,[R5]
+        LDR     R2,[R4, #12]
+        CMP     R1,R2
+        BCS.N   ??_tx_misra_thread_stack_check_3
 ??_tx_misra_thread_stack_check_2:
-        BL       _tx_thread_interrupt_restore
-        MOVS     R0,R4
-        BL       _tx_thread_stack_error_handler
-        BL       _tx_thread_interrupt_disable
+        BL      _tx_thread_interrupt_restore
+        MOVS    R0,R4
+        BL      _tx_thread_stack_error_handler
+        BL      _tx_thread_interrupt_disable
 ??_tx_misra_thread_stack_check_3:
-        LDR      R1,[R5, #+0]
-        LDR      R1,[R1, #-4]
-        CMP      R1,#-269488145
-        BEQ.N    ??_tx_misra_thread_stack_check_0
-        BL       _tx_thread_interrupt_restore
-        MOVS     R0,R4
-        BL       _tx_thread_stack_analyze
-        BL       _tx_thread_interrupt_disable
+        LDR     R1,[R5]
+        LDR     R7,=-4
+        LDR     R1,[R1, R7]
+        CMP     R1,R6
+        BEQ.N   ??_tx_misra_thread_stack_check_0
+        BL      _tx_thread_interrupt_restore
+        MOVS    R0,R4
+        BL      _tx_thread_stack_analyze
+        BL      _tx_thread_interrupt_disable
 ??_tx_misra_thread_stack_check_0:
-        BL       _tx_thread_interrupt_restore
-        POP      {R0,R4,R5,PC}    ;; return
+        BL      _tx_thread_interrupt_restore
+        POP     {R0,R4,R5,R6,R7,PC}    // return
 
 #ifdef TX_ENABLE_EVENT_TRACE
 
@@ -494,7 +575,7 @@ _tx_misra_trace_event_insert:
         LDR      R0,[R0, #+0]
         STR      R4,[R0, #+32]
 ??_tx_misra_trace_event_insert_0:
-        POP      {R0,R4-R7,PC}    ;; return
+        POP      {R0,R4-R7,PC}    // return
 
 
         SECTION `.text`:CODE:NOROOT(2)
@@ -546,7 +627,7 @@ _tx_misra_trace_event_insert:
         THUMB
 _tx_misra_time_stamp_get:
         MOVS     R0,#+0
-        BX       LR               ;; return
+        BX       LR               // return
 
 #endif
 
@@ -581,203 +662,7 @@ _tx_misra_time_stamp_get:
         THUMB
 _tx_misra_always_true:
         MOVS     R0,#+1
-        BX       LR               ;; return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);        */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_indirect_void_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);       */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_indirect_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/***********************************************************************************/
-/***********************************************************************************/
-/**                                                                                */
-/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);   */
-/**                                                                                */
-/***********************************************************************************/
-/***********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_block_pool_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_block_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/************************************************************************************/
-/************************************************************************************/
-/**                                                                                 */
-/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);  */
-/**                                                                                 */
-/************************************************************************************/
-/************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_block_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/**************************************************************************************/
-/**************************************************************************************/
-/**                                                                                   */
-/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);        */
-/**                                                                                   */
-/**************************************************************************************/
-/**************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_indirect_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);          */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_byte_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_byte_pool_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);         */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_align_type_pointer_convert:
-        BX       LR               ;; return
-
-
-/****************************************************************************************************/
-/****************************************************************************************************/
-/**                                                                                                 */
-/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);         */
-/**                                                                                                 */
-/****************************************************************************************************/
-/****************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/**************************************************************************************************/
-/**************************************************************************************************/
-/**                                                                                               */
-/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);         */
-/**                                                                                               */
-/**************************************************************************************************/
-/**************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_event_flags_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_ulong_pointer_convert:
-        BX       LR               ;; return
-
-
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_mutex_pointer_convert:
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -792,197 +677,12 @@ _tx_misra_void_to_mutex_pointer_convert:
         THUMB
 _tx_misra_status_get:
         MOVS     R0,#+0
-        BX       LR               ;; return
-
-
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_queue_pointer_convert:
-        BX       LR               ;; return
-
-
-/****************************************************************************************/
-/****************************************************************************************/
-/**                                                                                     */
-/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);         */
-/**                                                                                     */
-/****************************************************************************************/
-/****************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_semaphore_pointer_convert:
-        BX       LR               ;; return
-
-
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);      */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_void_pointer_convert:
-        BX       LR               ;; return
-
-
-/*********************************************************************************/
-/*********************************************************************************/
-/**                                                                              */
-/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);         */
-/**                                                                              */
-/*********************************************************************************/
-/*********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_ulong_to_thread_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************************/
-/***************************************************************************************************/
-/**                                                                                                */
-/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);         */
-/**                                                                                                */
-/***************************************************************************************************/
-/***************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_timer_indirect_to_void_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_const_char_to_char_pointer_convert:
-        BX       LR               ;; return
-
-
-/**********************************************************************************/
-/**********************************************************************************/
-/**                                                                               */
-/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);         */
-/**                                                                               */
-/**********************************************************************************/
-/**********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_thread_pointer_convert:
-        BX       LR               ;; return
-
-
-#ifdef TX_ENABLE_EVENT_TRACE
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_object_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_object_pointer_convert:
-        BX       LR               ;; return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_header_pointer_convert:
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /***********************************************************************************************/
 /***********************************************************************************************/
 /**                                                                                            */
-/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_entry_pointer_convert:
-        BX       LR               ;; return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_entry_to_uchar_pointer_convert:
-        BX       LR               ;; return
-#endif
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                           */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_char_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
 /**  ULONG  _tx_misra_ipsr_get(void);                                                          */
 /**                                                                                            */
 /***********************************************************************************************/
@@ -992,9 +692,74 @@ _tx_misra_char_to_uchar_pointer_convert:
         THUMB
 _tx_misra_ipsr_get:
         MRS      R0, IPSR
-        BX       LR               ;; return
+        BX       LR               // return
 
 
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_control_get(void);                                                       */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        SECTION `.text`:CODE:NOROOT(1)
+        THUMB
+_tx_misra_control_get:
+        MRS      R0, CONTROL
+        BX       LR               // return
+
+        
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  void   _tx_misra_control_set(ULONG value);                                                */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        SECTION `.text`:CODE:NOROOT(1)
+        THUMB
+_tx_misra_control_set:
+        MSR      CONTROL, R0
+        BX       LR               // return
+
+        
+#ifdef __ARMVFP__
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_fpccr_get(void);                                                         */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        SECTION `.text`:CODE:NOROOT(2)
+        THUMB
+_tx_misra_fpccr_get:
+        LDR      r0, =0xE000EF34  // Build FPCCR address
+        LDR      r0, [r0]         // Load FPCCR value
+        BX       LR               // return
+        
+        
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  void   _tx_misra_vfp_touch(void);                                                         */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        SECTION `.text`:CODE:NOROOT(1)
+        THUMB
+_tx_misra_vfp_touch:
+        vmov.f32 s0, s0
+        BX       LR               // return
+        
+#endif
+        
+        
         SECTION `.iar_vfe_header`:DATA:NOALLOC:NOROOT(2)
         SECTION_TYPE SHT_PROGBITS, 0
         DATA

ports/cortex_m23/iar/src/tx_thread_secure_stack.c

@@ -23,7 +23,7 @@
 
 #include "tx_api.h"
 
-/* If TX_SINGLE_MODE_SECURE or TX_SINGLE_MODE_NON_SECURE is defined, 
+/* If TX_SINGLE_MODE_SECURE or TX_SINGLE_MODE_NON_SECURE is defined,
    no secure stack functionality is needed. */
 #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
 
@@ -45,8 +45,14 @@
 #define TX_THREAD_STACK_SEAL_SIZE           8
 #define TX_THREAD_STACK_SEAL_VALUE          0xFEF5EDA5
 
-/* Secure stack info struct to hold stack start, stack limit, 
-   current stack pointer, and pointer to owning thread. 
+/* max number of Secure context */
+#ifndef TX_MAX_SECURE_CONTEXTS
+#define TX_MAX_SECURE_CONTEXTS              32
+#endif
+#define TX_INVALID_SECURE_CONTEXT_IDX       (-1)
+
+/* Secure stack info struct to hold stack start, stack limit,
+   current stack pointer, and pointer to owning thread.
    This will be allocated for each thread with a secure stack. */
 typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
 {
@@ -54,8 +60,14 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
     VOID        *tx_thread_secure_stack_start;      /* Thread's secure stack start address */
     VOID        *tx_thread_secure_stack_limit;      /* Thread's secure stack limit */
     TX_THREAD   *tx_thread_ptr;                     /* Keep track of thread for error handling */
+    INT          tx_next_free_index;                /* Next free index of free secure context */
 } TX_THREAD_SECURE_STACK_INFO;
 
+/* Static secure contexts */
+static TX_THREAD_SECURE_STACK_INFO tx_thread_secure_context[TX_MAX_SECURE_CONTEXTS];
+/* Head of free secure context */
+static INT tx_head_free_index = 0U;
+
 
 
 /**************************************************************************/
@@ -63,7 +75,7 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_mode_stack_initialize           Cortex-M23/IAR    */
-/*                                                           6.1.7        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -102,12 +114,16 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT
 /*                                            name, execute in handler    */
 /*                                            mode, disable optimization, */
 /*                                            resulting in version 6.1.7  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
 UINT    _tx_thread_secure_mode_stack_initialize(void)
 {
 UINT    status;
+INT     index;
 
     /* Make sure function is called from interrupt (threads should not call). */
     if (__get_IPSR() == 0)
@@ -118,12 +134,26 @@ UINT    status;
     {
         /* Set secure mode to use PSP. */
         __set_CONTROL(__get_CONTROL() | 2);
-        
+
         /* Set process stack pointer and stack limit to 0 to throw exception when a thread
            without a secure stack calls a secure function that tries to use secure stack. */
         __set_PSPLIM(0);
         __set_PSP(0);
-        
+
+        for (index = 0; index < TX_MAX_SECURE_CONTEXTS; index++)
+        {
+
+            /* Check last index and mark next free to invalid index */
+            if(index == (TX_MAX_SECURE_CONTEXTS - 1))
+            {
+                tx_thread_secure_context[index].tx_next_free_index = TX_INVALID_SECURE_CONTEXT_IDX;
+            }
+            else
+            {
+                tx_thread_secure_context[index].tx_next_free_index = index + 1;
+            }
+        }
+
         status = TX_SUCCESS;
     }
     return status;
@@ -136,7 +166,7 @@ UINT    status;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_mode_stack_allocate             Cortex-M23/IAR    */
-/*                                                           6.1.1        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -160,9 +190,7 @@ UINT    status;
 /*  CALLS                                                                 */
 /*                                                                        */
 /*    __get_IPSR                            Intrinsic to get IPSR         */
-/*    calloc                                Compiler's calloc function    */
 /*    malloc                                Compiler's malloc function    */
-/*    free                                  Compiler's free() function    */
 /*    __set_PSPLIM                          Intrinsic to set PSP limit    */
 /*    __set_PSP                             Intrinsic to set PSP          */
 /*    __TZ_get_PSPLIM_NS                    Intrinsic to get NS PSP       */
@@ -179,18 +207,24 @@ UINT    status;
 /*  10-16-2020      Scott Larson            Modified comment(s),          */
 /*                                            added stack sealing,        */
 /*                                            resulting in version 6.1.1  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            added                       */
+/*                                            TX_INTERRUPT_SAVE_AREA,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
 UINT    _tx_thread_secure_mode_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size)
 {
+TX_INTERRUPT_SAVE_AREA
 UINT    status;
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
 UCHAR   *stack_mem;
-ULONG   sp;
+INT     secure_context_index;
 
     status = TX_SUCCESS;
-    
+
     /* Make sure function is called from interrupt (threads should not call). */
     if (__get_IPSR() == 0)
     {
@@ -200,23 +234,38 @@ ULONG   sp;
     {
         status = TX_SIZE_ERROR;
     }
-    
+
     /* Check if thread already has secure stack allocated. */
     else if (thread_ptr -> tx_thread_secure_stack_context != 0)
     {
         status = TX_THREAD_ERROR;
     }
-    
+
     else
     {
-        /* Allocate space for secure stack info. */
-        info_ptr = calloc(1, sizeof(TX_THREAD_SECURE_STACK_INFO));
-        
-        if(info_ptr != TX_NULL)
+        TX_DISABLE
+
+        /* Allocate free index for secure stack info. */
+        if(tx_head_free_index != TX_INVALID_SECURE_CONTEXT_IDX)
         {
+            secure_context_index = tx_head_free_index;
+            tx_head_free_index = tx_thread_secure_context[tx_head_free_index].tx_next_free_index;
+            tx_thread_secure_context[secure_context_index].tx_next_free_index = TX_INVALID_SECURE_CONTEXT_IDX;
+        }
+        else
+        {
+            secure_context_index = TX_INVALID_SECURE_CONTEXT_IDX;
+        }
+
+        TX_RESTORE
+
+        if(secure_context_index != TX_INVALID_SECURE_CONTEXT_IDX)
+        {
+            info_ptr = &tx_thread_secure_context[secure_context_index];
+
             /* If stack info allocated, allocate a stack & seal. */
             stack_mem = malloc(stack_size + TX_THREAD_STACK_SEAL_SIZE);
-            
+
             if(stack_mem != TX_NULL)
             {
                 /* Secure stack has been allocated, save in the stack info struct. */
@@ -224,38 +273,41 @@ ULONG   sp;
                 info_ptr -> tx_thread_secure_stack_start = stack_mem + stack_size;
                 info_ptr -> tx_thread_secure_stack_ptr = info_ptr -> tx_thread_secure_stack_start;
                 info_ptr -> tx_thread_ptr = thread_ptr;
-                
+
                 /* Seal bottom of stack. */
                 *(ULONG*)info_ptr -> tx_thread_secure_stack_start = TX_THREAD_STACK_SEAL_VALUE;
-                
-                /* Save info pointer in thread. */
-                thread_ptr -> tx_thread_secure_stack_context = info_ptr;
-                
-                /* Check if this thread is running by looking at PSP_NS and seeing if it is within
-                   the stack_start and stack_end range. */
-                sp = __TZ_get_PSP_NS();
-                if(sp > ((ULONG) thread_ptr -> tx_thread_stack_start) && sp < ((ULONG) thread_ptr -> tx_thread_stack_end))
+
+                /* Save secure context id (i.e non-zero base index) in thread. */
+                thread_ptr -> tx_thread_secure_stack_context = (VOID *)(secure_context_index + 1);
+
+                /* Check if this thread is running by looking at its stack start and PSPLIM_NS */
+                if(((ULONG) thread_ptr -> tx_thread_stack_start & 0xFFFFFFF8) == __TZ_get_PSPLIM_NS())
                 {
                     /* If this thread is running, set Secure PSP and PSPLIM. */
                     __set_PSPLIM((ULONG)(info_ptr -> tx_thread_secure_stack_limit));
                     __set_PSP((ULONG)(info_ptr -> tx_thread_secure_stack_ptr));
                 }
             }
-            
+
             else
             {
+                TX_DISABLE
+
                 /* Stack not allocated, free the info struct. */
-                free(info_ptr);
+                tx_thread_secure_context[secure_context_index].tx_next_free_index = tx_head_free_index;
+                tx_head_free_index = secure_context_index;
+                TX_RESTORE
+
                 status = TX_NO_MEMORY;
             }
         }
-        
+
         else
         {
             status = TX_NO_MEMORY;
         }
     }
-    
+
     return(status);
 }
 
@@ -266,7 +318,7 @@ ULONG   sp;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_mode_stack_free                 Cortex-M23/IAR    */
-/*                                                           6.1.1        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -301,44 +353,67 @@ ULONG   sp;
 /*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*  10-16-2020      Scott Larson            Modified comment(s),          */
 /*                                            resulting in version 6.1.1  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            added                       */
+/*                                            TX_INTERRUPT_SAVE_AREA,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
 UINT    _tx_thread_secure_mode_stack_free(TX_THREAD *thread_ptr)
 {
+TX_INTERRUPT_SAVE_AREA
 UINT    status;
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
+INT     secure_context_index;
 
     status = TX_SUCCESS;
-    
-    /* Pickup stack info from thread. */
-    info_ptr = thread_ptr -> tx_thread_secure_stack_context;
-    
+
+    /* Pickup stack info id from thread. */
+    secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1;
+
     /* Make sure function is called from interrupt (threads should not call). */
     if (__get_IPSR() == 0)
     {
         status = TX_CALLER_ERROR;
     }
-    
-    /* Check that this secure context is for this thread. */
-    else if (info_ptr -> tx_thread_ptr != thread_ptr)
+
+    /* Check if secure context index is in valid range. */
+    else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS)
     {
         status = TX_THREAD_ERROR;
     }
-    
     else
     {
-        
-        /* Free secure stack. */
-        free(info_ptr -> tx_thread_secure_stack_limit);
-        
-        /* Free info struct. */
-        free(info_ptr);
-        
-        /* Clear secure context from thread. */
-        thread_ptr -> tx_thread_secure_stack_context = 0;
+
+        /* Pickup stack info from static array of secure contexts. */
+        info_ptr = &tx_thread_secure_context[secure_context_index];
+
+        /* Check that this secure context is for this thread. */
+        if (info_ptr -> tx_thread_ptr != thread_ptr)
+        {
+            status = TX_THREAD_ERROR;
+        }
+
+        else
+        {
+
+            /* Free secure stack. */
+            free(info_ptr -> tx_thread_secure_stack_limit);
+
+            TX_DISABLE
+
+            /* Free info struct. */
+            tx_thread_secure_context[secure_context_index].tx_next_free_index = tx_head_free_index;
+            tx_head_free_index = secure_context_index;
+            TX_RESTORE
+
+            /* Clear secure context from thread. */
+            thread_ptr -> tx_thread_secure_stack_context = 0;
+        }
     }
-    
+
     return(status);
 }
 
@@ -349,7 +424,7 @@ TX_THREAD_SECURE_STACK_INFO *info_ptr;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_stack_context_save              Cortex-M23/IAR    */
-/*                                                           6.1.7        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -386,6 +461,9 @@ TX_THREAD_SECURE_STACK_INFO *info_ptr;
 /*                                            resulting in version 6.1.1  */
 /*  06-02-2021      Scott Larson            Fix stack pointer save,       */
 /*                                            resulting in version 6.1.7  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
@@ -393,38 +471,45 @@ void _tx_thread_secure_stack_context_save(TX_THREAD *thread_ptr)
 {
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
 ULONG   sp;
+INT secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1;
 
     /* This function should be called from scheduler only. */
     if (__get_IPSR() == 0)
     {
         return;
     }
-    
+
+    /* Check if secure context index is in valid range. */
+    else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS)
+    {
+        return;
+    }
+
     /* Pickup the secure context pointer. */
-    info_ptr = (TX_THREAD_SECURE_STACK_INFO *)(thread_ptr -> tx_thread_secure_stack_context);
-    
+    info_ptr = &tx_thread_secure_context[secure_context_index];
+
     /* Check that this secure context is for this thread. */
     if (info_ptr -> tx_thread_ptr != thread_ptr)
     {
         return;
     }
-    
+
     /* Check that stack pointer is in range */
     sp = __get_PSP();
-    if ((sp < (ULONG)info_ptr -> tx_thread_secure_stack_limit) || 
+    if ((sp < (ULONG)info_ptr -> tx_thread_secure_stack_limit) ||
         (sp > (ULONG)info_ptr -> tx_thread_secure_stack_start))
     {
         return;
     }
-    
+
     /* Save stack pointer. */
     info_ptr -> tx_thread_secure_stack_ptr = (VOID *) sp;
-    
+
     /* Set process stack pointer and stack limit to 0 to throw exception when a thread
        without a secure stack calls a secure function that tries to use secure stack. */
     __set_PSPLIM(0);
     __set_PSP(0);
-    
+
     return;
 }
 
@@ -435,7 +520,7 @@ ULONG   sp;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_stack_context_restore           Cortex-M23/IAR    */
-/*                                                           6.1.1        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -469,32 +554,42 @@ ULONG   sp;
 /*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*  10-16-2020      Scott Larson            Modified comment(s),          */
 /*                                            resulting in version 6.1.1  */
+/*  07-29-2022      Scott Larson            Modified comments, updated    */
+/*                                            secure stack allocation,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
 void _tx_thread_secure_stack_context_restore(TX_THREAD *thread_ptr)
 {
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
+INT secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1;
 
     /* This function should be called from scheduler only. */
     if (__get_IPSR() == 0)
     {
         return;
     }
-    
+
+    /* Check if secure context index is in valid range. */
+    else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS)
+    {
+        return;
+    }
+
     /* Pickup the secure context pointer. */
-    info_ptr = (TX_THREAD_SECURE_STACK_INFO *)(thread_ptr -> tx_thread_secure_stack_context);
-    
+    info_ptr = &tx_thread_secure_context[secure_context_index];
+
     /* Check that this secure context is for this thread. */
     if (info_ptr -> tx_thread_ptr != thread_ptr)
     {
         return;
     }
-    
+
     /* Set stack pointer and limit. */
     __set_PSPLIM((ULONG)info_ptr -> tx_thread_secure_stack_limit);
     __set_PSP   ((ULONG)info_ptr -> tx_thread_secure_stack_ptr);
-    
+
     return;
 }
 

ports/cortex_m23/iar/src/tx_thread_secure_stack_initialize.s

@@ -27,7 +27,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_stack_initialize                Cortex-M23/IAR    */
-/*                                                           6.1.7        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -50,13 +50,17 @@
 /*                                                                        */
 /*  CALLED BY                                                             */
 /*                                                                        */
-/*    TX_INITIALIZE_KERNEL_ENTER_EXTENSION                                */
+/*    TX_PORT_SPECIFIC_PRE_INITIALIZATION                                 */
 /*                                                                        */
 /*  RELEASE HISTORY                                                       */
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
 /*  06-02-2021      Scott Larson            Initial Version 6.1.7         */
+/*  07-29-2022      Scott Larson            Modified comments and changed */
+/*                                            secure stack initialization */
+/*                                            macro to port-specific,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 // VOID   _tx_thread_secure_stack_initialize(VOID)

ports/cortex_m3/ac5/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                         Cortex-M3/AC5     */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -59,6 +59,9 @@
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and         */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -146,6 +149,12 @@ typedef unsigned short                          USHORT;
 #define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
 
 /* Define various constants for the ThreadX Cortex-M port.  */
 
@@ -707,7 +716,7 @@ void    tx_thread_fpu_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M3/AC5 Version 6.1.11 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M3/AC5 Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m3/ac6/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                         Cortex-M3/AC6     */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -59,6 +59,9 @@
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and         */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -146,6 +149,12 @@ typedef unsigned short                          USHORT;
 #define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
 
 /* Define various constants for the ThreadX Cortex-M port.  */
 
@@ -707,7 +716,7 @@ void    tx_thread_fpu_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M3/AC6 Version 6.1.11 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M3/AC6 Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m3/ac6/src/tx_misra.S

@@ -103,6 +103,14 @@
         .global _tx_misra_vfp_touch
 #endif
 
+        .global _tx_misra_event_flags_group_not_used
+        .global _tx_misra_event_flags_set_notify_not_used
+        .global _tx_misra_queue_not_used
+        .global _tx_misra_queue_send_notify_not_used
+        .global _tx_misra_semaphore_not_used
+        .global _tx_misra_semaphore_put_notify_not_used
+        .global _tx_misra_thread_entry_exit_notify_not_used
+        .global _tx_misra_thread_not_used
 
 /**************************************************************************/
 /**************************************************************************/
@@ -172,17 +180,93 @@ _tx_misra_uchar_pointer_dif:
         BX       LR               // return
 
 
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
+/**                                                                                                                                 */
+/**  This single function serves all of the below prototypes.                                                                       */
+/**                                                                                                                                 */
+/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                                                                          */
+/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);                                                                        */
+/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);                                                  */
+/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);                                                    */
+/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);                                                    */
+/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);                                                   */
+/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);                                                                */
+/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);                                                  */
+/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);                                                      */
+/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);                                                     */
+/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);                                                      */
+/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);                                                    */
+/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);                                         */
+/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);                                           */
+/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);                                                                */
+/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);                                                             */
+/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);                                                             */
+/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);                                                     */
+/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);                                                                */
+/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);                                                            */
+/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);                                          */
+/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);                                                      */
+/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);                                                           */
+/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);                                             */
+/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);                                             */
+/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);                                                   */
+/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);                                              */
+/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);                                              */
+/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                                                                */
+/**  VOID    _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr);                                                 */
+/**  VOID    _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr));          */
+/**  VOID    _tx_misra_queue_not_used(TX_QUEUE *queue_ptr);                                                                         */
+/**  VOID    _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr));                           */
+/**  VOID    _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr);                                                             */
+/**  VOID    _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr));             */
+/**  VOID    _tx_misra_thread_not_used(TX_THREAD *thread_ptr);                                                                      */
+/**  VOID    _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id));  */
+/**                                                                                                                                 */
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
         .text
         .thumb_func
 _tx_misra_pointer_to_ulong_convert:
+_tx_misra_ulong_to_pointer_convert:
+_tx_misra_indirect_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_indirect_uchar_pointer_convert:
+_tx_misra_block_pool_to_uchar_pointer_convert:
+_tx_misra_void_to_block_pool_pointer_convert:
+_tx_misra_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_block_pool_pointer_convert:
+_tx_misra_void_to_indirect_uchar_pointer_convert:
+_tx_misra_void_to_byte_pool_pointer_convert:
+_tx_misra_byte_pool_to_uchar_pointer_convert:
+_tx_misra_uchar_to_align_type_pointer_convert:
+_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
+_tx_misra_void_to_event_flags_pointer_convert:
+_tx_misra_void_to_ulong_pointer_convert:
+_tx_misra_void_to_mutex_pointer_convert:
+_tx_misra_void_to_queue_pointer_convert:
+_tx_misra_void_to_semaphore_pointer_convert:
+_tx_misra_uchar_to_void_pointer_convert:
+_tx_misra_ulong_to_thread_pointer_convert:
+_tx_misra_timer_indirect_to_void_pointer_convert:
+_tx_misra_const_char_to_char_pointer_convert:
+_tx_misra_void_to_thread_pointer_convert:
+#ifdef TX_ENABLE_EVENT_TRACE
+_tx_misra_object_to_uchar_pointer_convert:
+_tx_misra_uchar_to_object_pointer_convert:
+_tx_misra_uchar_to_header_pointer_convert:
+_tx_misra_uchar_to_entry_pointer_convert:
+_tx_misra_entry_to_uchar_pointer_convert:
+#endif
+_tx_misra_char_to_uchar_pointer_convert:
+_tx_misra_event_flags_group_not_used:
+_tx_misra_event_flags_set_notify_not_used:
+_tx_misra_queue_not_used:
+_tx_misra_queue_send_notify_not_used:
+_tx_misra_semaphore_not_used:
+_tx_misra_semaphore_put_notify_not_used:
+_tx_misra_thread_entry_exit_notify_not_used:
+_tx_misra_thread_not_used:
+
         BX       LR               // return
 
 
@@ -234,20 +318,6 @@ _tx_misra_ulong_pointer_dif:
         BX       LR               // return
 
 
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);              */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_ulong_to_pointer_convert:
-        BX       LR               // return
-
-
 /**************************************************************************/
 /**************************************************************************/
 /**                                                                       */
@@ -332,12 +402,9 @@ _tx_misra_timer_pointer_add:
         .text
         .thumb_func
 _tx_misra_user_timer_pointer_get:
-        ADDS     R2,R0,#+8
-        SUBS     R2,R2,R0
-        RSBS     R2,R2,#+0
-        ADD      R0,R0,R2
-        STR      R0,[R1, #+0]
-        BX       LR               // return
+        SUBS    R0,#8
+        STR     R0,[R1, #+0]
+        BX      LR               // return
 
 
 /**************************************************************************/
@@ -553,202 +620,6 @@ _tx_misra_always_true:
         BX       LR               // return
 
 
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);        */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_indirect_void_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);       */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_indirect_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/***********************************************************************************/
-/***********************************************************************************/
-/**                                                                                */
-/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);   */
-/**                                                                                */
-/***********************************************************************************/
-/***********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_block_pool_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_block_pool_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/************************************************************************************/
-/************************************************************************************/
-/**                                                                                 */
-/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);  */
-/**                                                                                 */
-/************************************************************************************/
-/************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_block_pool_pointer_convert:
-        BX       LR               // return
-
-
-/**************************************************************************************/
-/**************************************************************************************/
-/**                                                                                   */
-/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);        */
-/**                                                                                   */
-/**************************************************************************************/
-/**************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_indirect_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);          */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_byte_pool_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_byte_pool_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);         */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_align_type_pointer_convert:
-        BX       LR               // return
-
-
-/****************************************************************************************************/
-/****************************************************************************************************/
-/**                                                                                                 */
-/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);         */
-/**                                                                                                 */
-/****************************************************************************************************/
-/****************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
-        BX       LR               // return
-
-
-/**************************************************************************************************/
-/**************************************************************************************************/
-/**                                                                                               */
-/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);         */
-/**                                                                                               */
-/**************************************************************************************************/
-/**************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_event_flags_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_ulong_pointer_convert:
-        BX       LR               // return
-
-
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_mutex_pointer_convert:
-        BX       LR               // return
-
-
 /**************************************************************************/
 /**************************************************************************/
 /**                                                                       */
@@ -764,191 +635,6 @@ _tx_misra_status_get:
         BX       LR               // return
 
 
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_queue_pointer_convert:
-        BX       LR               // return
-
-
-/****************************************************************************************/
-/****************************************************************************************/
-/**                                                                                     */
-/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);         */
-/**                                                                                     */
-/****************************************************************************************/
-/****************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_semaphore_pointer_convert:
-        BX       LR               // return
-
-
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);      */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_void_pointer_convert:
-        BX       LR               // return
-
-
-/*********************************************************************************/
-/*********************************************************************************/
-/**                                                                              */
-/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);         */
-/**                                                                              */
-/*********************************************************************************/
-/*********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_ulong_to_thread_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************************/
-/***************************************************************************************************/
-/**                                                                                                */
-/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);         */
-/**                                                                                                */
-/***************************************************************************************************/
-/***************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_timer_indirect_to_void_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_const_char_to_char_pointer_convert:
-        BX       LR               // return
-
-
-/**********************************************************************************/
-/**********************************************************************************/
-/**                                                                               */
-/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);         */
-/**                                                                               */
-/**********************************************************************************/
-/**********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_thread_pointer_convert:
-        BX       LR               // return
-
-
-#ifdef TX_ENABLE_EVENT_TRACE
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_object_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_object_pointer_convert:
-        BX       LR               // return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_header_pointer_convert:
-        BX       LR               // return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_entry_pointer_convert:
-        BX       LR               // return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_entry_to_uchar_pointer_convert:
-        BX       LR               // return
-#endif
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                           */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_char_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
 /***********************************************************************************************/
 /***********************************************************************************************/
 /**                                                                                            */

ports/cortex_m3/gnu/example_build/build_threadx.bat

@@ -1,5 +1,4 @@
 del tx.a
-arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb tx_initialize_low_level.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ../src/tx_thread_stack_build.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ../src/tx_thread_schedule.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ../src/tx_thread_system_return.S
@@ -7,7 +6,7 @@ arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ../src/tx_thread_context_save.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ../src/tx_thread_context_restore.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ../src/tx_thread_interrupt_control.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ../src/tx_timer_interrupt.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ../src/tx_thread_interrupt_control.S
+
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_allocate.c
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_cleanup.c
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_create.c
@@ -192,8 +191,8 @@ arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I../../../../common/inc -I../in
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_deactivate.c
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_delete.c
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_info_get.c
+
 arm-none-eabi-ar -r tx.a tx_thread_stack_build.o tx_thread_schedule.o tx_thread_system_return.o tx_thread_context_save.o tx_thread_context_restore.o tx_timer_interrupt.o tx_thread_interrupt_control.o
-arm-none-eabi-ar -r tx.a tx_thread_interrupt_control.o tx_initialize_low_level.o
 arm-none-eabi-ar -r tx.a tx_block_allocate.o tx_block_pool_cleanup.o tx_block_pool_create.o tx_block_pool_delete.o tx_block_pool_info_get.o
 arm-none-eabi-ar -r tx.a tx_block_pool_initialize.o tx_block_pool_performance_info_get.o tx_block_pool_performance_system_info_get.o tx_block_pool_prioritize.o
 arm-none-eabi-ar -r tx.a tx_block_release.o tx_byte_allocate.o tx_byte_pool_cleanup.o tx_byte_pool_create.o tx_byte_pool_delete.o tx_byte_pool_info_get.o

ports/cortex_m3/gnu/example_build/build_threadx_sample.bat

@@ -1,7 +1,5 @@
-arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb tx_simulator_startup.S
+arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb cortexm3_vectors.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb cortexm3_crt0.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb tx_initialize_low_level.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I../../../../common/inc -I../inc sample_threadx.c
-arm-none-eabi-ld -A cortex-m3 -ereset_handler -T sample_threadx.ld tx_simulator_startup.o cortexm3_crt0.o tx_initialize_low_level.o sample_threadx.o tx.a  libc.a -o sample_threadx.out -M > sample_threadx.map
-
-
+arm-none-eabi-gcc -g -mcpu=cortex-m3 -mthumb -T sample_threadx.ld -ereset_handler -nostartfiles -o sample_threadx.out -Wl,-Map=sample_threadx.map cortexm3_vectors.o cortexm3_crt0.o tx_initialize_low_level.o sample_threadx.o tx.a

ports/cortex_m3/gnu/example_build/cortexm3_crt0.S

@@ -1,45 +1,20 @@
- .global _start
-  .extern main
-
-
+  .syntax	unified
   .section .init, "ax"
   .code 16
   .align 2
   .thumb_func
 
-
+ .global _start
 _start:
   CPSID   i
   ldr r1, =__stack_end__
   mov sp, r1
 
-
   /* Copy initialised sections into RAM if required. */
   ldr r0, =__data_load_start__
   ldr r1, =__data_start__
   ldr r2, =__data_end__
   bl crt0_memory_copy
-  ldr r0, =__text_load_start__
-  ldr r1, =__text_start__
-  ldr r2, =__text_end__
-  bl crt0_memory_copy
-  ldr r0, =__fast_load_start__
-  ldr r1, =__fast_start__
-  ldr r2, =__fast_end__
-  bl crt0_memory_copy
-  ldr r0, =__ctors_load_start__
-  ldr r1, =__ctors_start__
-  ldr r2, =__ctors_end__
-  bl crt0_memory_copy
-  ldr r0, =__dtors_load_start__
-  ldr r1, =__dtors_start__
-  ldr r2, =__dtors_end__
-  bl crt0_memory_copy
-  ldr r0, =__rodata_load_start__
-  ldr r1, =__rodata_start__
-  ldr r2, =__rodata_end__
-  bl crt0_memory_copy
-
 
   /* Zero bss. */
   ldr r0, =__bss_start__
@@ -47,7 +22,6 @@ _start:
   mov r2, #0
   bl crt0_memory_set
 
-
   /* Setup heap - not recommended for Threadx but here for compatibility reasons */
   ldr r0, = __heap_start__
   ldr r1, = __heap_end__
@@ -57,7 +31,6 @@ _start:
   add r0, r0, #4
   str r1, [r0]
 
-
   /* constructors in case of using C++ */
   ldr r0, =__ctors_start__
   ldr r1, =__ctors_end__
@@ -72,13 +45,11 @@ crt0_ctor_loop:
   b crt0_ctor_loop
 crt0_ctor_end:
 
-
   /* Setup call frame for main() */
   mov r0, #0
   mov lr, r0
   mov r12, sp
 
-
 start:
   /* Jump to main() */
   mov r0, #0
@@ -88,28 +59,22 @@ start:
   /*  when main returns, loop forever. */
 crt0_exit_loop:
   b crt0_exit_loop
-  
-
 
   /* Startup helper functions. */
 
-
 crt0_memory_copy:
   cmp r0, r1
   beq memory_copy_done
-  sub r2, r2, r1
-  beq memory_copy_done
 memory_copy_loop:
   ldrb r3, [r0]
   add r0, r0, #1
   strb r3, [r1]
   add r1, r1, #1
-  sub r2, r2, #1
+  cmp r1, r2
   bne memory_copy_loop
 memory_copy_done:
   bx lr
 
-
 crt0_memory_set:
   cmp r0, r1
   beq memory_set_done
@@ -119,7 +84,6 @@ crt0_memory_set:
 memory_set_done:
   bx lr
 
-
   /* Setup attibutes of stack and heap sections so they don't take up room in the elf file */
   .section .stack, "wa", %nobits
   .section .stack_process, "wa", %nobits

ports/cortex_m3/gnu/example_build/cortexm3_vectors.S

@@ -1,5 +1,3 @@
-
-
   .global reset_handler
 
   .global __tx_NMIHandler
@@ -10,7 +8,6 @@
   .global __tx_SysTickHandler 
   .global __tx_BadHandler
 
-
   .syntax unified
   .section .vectors, "ax"
   .code 16
@@ -29,7 +26,7 @@ _vectors:
   .word 0 // Reserved
   .word 0 // Reserved
   .word 0 // Reserved
-  .word __tx_SVCallHandler //_SVC_Handler - used by Threadx scheduler //
+  .word __tx_SVCallHandler    //_SVC_Handler - used by Threadx scheduler //
   .word __tx_DBGHandler
   .word 0 // Reserved
   .word __tx_PendSVHandler 
@@ -70,14 +67,10 @@ _vectors:
   .word __tx_BadHandler
   .word __tx_BadHandler
 
-
-
-    .section .init, "ax"
-    .thumb_func
+  .section .init, "ax"
+  .thumb_func
 reset_handler:
-
-// low level hardware config, such as PLL setup goes here
-
+  // low level hardware config, such as PLL setup goes here
   b _start
 
 

ports/cortex_m3/gnu/example_build/sample_threadx.ld

@@ -1,206 +1,125 @@
 MEMORY
 {
-  UNPLACED_SECTIONS (wx) : ORIGIN = 0x100000000, LENGTH = 0
-  CM3_System_Control_Space (wx) : ORIGIN = 0xe000e000, LENGTH = 0x00001000
-  AHB_Peripherals (wx) : ORIGIN = 0x50000000, LENGTH = 0x00200000
-  APB1_Peripherals (wx) : ORIGIN = 0x40080000, LENGTH = 0x00080000
-  APB0_Peripherals (wx) : ORIGIN = 0x40000000, LENGTH = 0x00080000
-  GPIO (wx) : ORIGIN = 0x2009c000, LENGTH = 0x00004000
-  AHBSRAM1 (wx) : ORIGIN = 0x20080000, LENGTH = 0x00004000
-  AHBSRAM0 (wx) : ORIGIN = 0x2007c000, LENGTH = 0x00004000
-  RAM (wx) : ORIGIN = 0x10000000, LENGTH = 0x00008000
-  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000
+  RAM (wx) : ORIGIN = 0x20000000, LENGTH = 0x00800000
+  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00400000
 }
 
+__STACKSIZE__ = 1024;
+__STACKSIZE_PROCESS__ = 0;
+__HEAPSIZE__ = 128;
 
 SECTIONS
 {
-  __CM3_System_Control_Space_segment_start__ = 0xe000e000;
-  __CM3_System_Control_Space_segment_end__ = 0xe000f000;
-  __AHB_Peripherals_segment_start__ = 0x50000000;
-  __AHB_Peripherals_segment_end__ = 0x50200000;
-  __APB1_Peripherals_segment_start__ = 0x40080000;
-  __APB1_Peripherals_segment_end__ = 0x40100000;
-  __APB0_Peripherals_segment_start__ = 0x40000000;
-  __APB0_Peripherals_segment_end__ = 0x40080000;
-  __GPIO_segment_start__ = 0x2009c000;
-  __GPIO_segment_end__ = 0x200a0000;
-  __AHBSRAM1_segment_start__ = 0x20080000;
-  __AHBSRAM1_segment_end__ = 0x20084000;
-  __AHBSRAM0_segment_start__ = 0x2007c000;
-  __AHBSRAM0_segment_end__ = 0x20080000;
-  __RAM_segment_start__ = 0x10000000;
-  __RAM_segment_end__ = 0x10008000;
-  __FLASH_segment_start__ = 0x00000000;
-  __FLASH_segment_end__ = 0x00080000;
-
-  __STACKSIZE__ = 1024;
-  __STACKSIZE_PROCESS__ = 0;
-  __STACKSIZE_IRQ__ = 0;
-  __STACKSIZE_FIQ__ = 0;
-  __STACKSIZE_SVC__ = 0;
-  __STACKSIZE_ABT__ = 0;
-  __STACKSIZE_UND__ = 0;
-  __HEAPSIZE__ = 128;
-
-  __vectors_load_start__ = __FLASH_segment_start__;
-  .vectors __FLASH_segment_start__ : AT(__FLASH_segment_start__)
+  .vectors : 
   {
-    __vectors_start__ = .;
-    *(.vectors .vectors.*)
-  }
-  __vectors_end__ = __vectors_start__ + SIZEOF(.vectors);
+    KEEP(*(.vectors .vectors.*))
+  } > FLASH
 
-  . = ASSERT(__vectors_end__ >= __FLASH_segment_start__ && __vectors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .vectors is too large to fit in FLASH memory segment");
+	.text :
+	{
+		*(.text*)
 
-  __init_load_start__ = ALIGN(__vectors_end__ , 4);
-  .init ALIGN(__vectors_end__ , 4) : AT(ALIGN(__vectors_end__ , 4))
-  {
-    __init_start__ = .;
-    *(.init .init.*)
-  }
-  __init_end__ = __init_start__ + SIZEOF(.init);
+		KEEP(*(.init))
+		KEEP(*(.fini))
 
-  . = ASSERT(__init_end__ >= __FLASH_segment_start__ && __init_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .init is too large to fit in FLASH memory segment");
+		/* .ctors */
+		*crtbegin.o(.ctors)
+		*crtbegin?.o(.ctors)
+		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+    __ctors_start__ = ALIGN(4);
+		*(SORT(.ctors.*))
+		*(.ctors)
+    __ctors_end__ = ALIGN(4);
 
-  __text_load_start__ = ALIGN(__init_end__ , 4);
-  .text ALIGN(__init_end__ , 4) : AT(ALIGN(__init_end__ , 4))
-  {
-    __text_start__ = .;
-    *(.text .text.* .glue_7t .glue_7 .gnu.linkonce.t.* .gcc_except_table)
-  }
-  __text_end__ = __text_start__ + SIZEOF(.text);
+		/* .dtors */
+ 		*crtbegin.o(.dtors)
+ 		*crtbegin?.o(.dtors)
+ 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+    __dtors_start__ = ALIGN(4);
+ 		*(SORT(.dtors.*))
+ 		*(.dtors)
+    __dtors_end__ = ALIGN(4);
 
-  . = ASSERT(__text_end__ >= __FLASH_segment_start__ && __text_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .text is too large to fit in FLASH memory segment");
+		*(.rodata*)
 
-  __dtors_load_start__ = ALIGN(__text_end__ , 4);
-  .dtors ALIGN(__text_end__ , 4) : AT(ALIGN(__text_end__ , 4))
-  {
-    __dtors_start__ = .;
-    KEEP (*(SORT(.dtors.*))) KEEP (*(.dtors))
-  }
-  __dtors_end__ = __dtors_start__ + SIZEOF(.dtors);
+		KEEP(*(.eh_frame*))
+	} > FLASH
 
-  . = ASSERT(__dtors_end__ >= __FLASH_segment_start__ && __dtors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .dtors is too large to fit in FLASH memory segment");
+	.ARM.extab : 
+	{
+		*(.ARM.extab* .gnu.linkonce.armextab.*)
+	} > FLASH
 
-  __ctors_load_start__ = ALIGN(__dtors_end__ , 4);
-  .ctors ALIGN(__dtors_end__ , 4) : AT(ALIGN(__dtors_end__ , 4))
-  {
-    __ctors_start__ = .;
-    KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors))
-  }
-  __ctors_end__ = __ctors_start__ + SIZEOF(.ctors);
+	__exidx_start = .;
+	.ARM.exidx :
+	{
+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
+	} > FLASH
+	__exidx_end = .;
 
-  . = ASSERT(__ctors_end__ >= __FLASH_segment_start__ && __ctors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .ctors is too large to fit in FLASH memory segment");
+	__data_load_start__ = ALIGN (4);
 
-  __rodata_load_start__ = ALIGN(__ctors_end__ , 4);
-  .rodata ALIGN(__ctors_end__ , 4) : AT(ALIGN(__ctors_end__ , 4))
-  {
-    __rodata_start__ = .;
-    *(.rodata .rodata.* .gnu.linkonce.r.*)
-  }
-  __rodata_end__ = __rodata_start__ + SIZEOF(.rodata);
+	.data : AT (__data_load_start__) 
+	{
+		__data_start__ = .;
 
-  . = ASSERT(__rodata_end__ >= __FLASH_segment_start__ && __rodata_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .rodata is too large to fit in FLASH memory segment");
+		*(vtable)
+		*(.data*)
 
-  __fast_load_start__ = ALIGN(__rodata_end__ , 4);
-  .fast ALIGN(__RAM_segment_start__ , 4) : AT(ALIGN(__rodata_end__ , 4))
-  {
-    __fast_start__ = .;
-    *(.fast .fast.*)
-  }
-  __fast_end__ = __fast_start__ + SIZEOF(.fast);
+		. = ALIGN(4);
+		/* preinit data */
+		PROVIDE_HIDDEN (__preinit_array_start = .);
+		KEEP(*(.preinit_array))
+		PROVIDE_HIDDEN (__preinit_array_end = .);
 
-  __fast_load_end__ = __fast_load_start__ + SIZEOF(.fast);
+		. = ALIGN(4);
+		/* init data */
+		PROVIDE_HIDDEN (__init_array_start = .);
+		KEEP(*(SORT(.init_array.*)))
+		KEEP(*(.init_array))
+		PROVIDE_HIDDEN (__init_array_end = .);
 
-  . = ASSERT((__fast_load_start__ + SIZEOF(.fast)) >= __FLASH_segment_start__ && (__fast_load_start__ + SIZEOF(.fast)) <= (__FLASH_segment_start__ + 0x00080000) , "error: .fast is too large to fit in FLASH memory segment");
+		. = ALIGN(4);
+		/* finit data */
+		PROVIDE_HIDDEN (__fini_array_start = .);
+		KEEP(*(SORT(.fini_array.*)))
+		KEEP(*(.fini_array))
+		PROVIDE_HIDDEN (__fini_array_end = .);
 
-  .fast_run ALIGN(__RAM_segment_start__ , 4) (NOLOAD) :
-  {
-    __fast_run_start__ = .;
-    . = MAX(__fast_run_start__ + SIZEOF(.fast), .);
-  }
-  __fast_run_end__ = __fast_run_start__ + SIZEOF(.fast_run);
+		KEEP(*(.jcr*))
+		. = ALIGN(4);
+		/* All data end */
+		
+    __data_end__ = .;
 
-  . = ASSERT(__fast_run_end__ >= __RAM_segment_start__ && __fast_run_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .fast_run is too large to fit in RAM memory segment");
+	} > RAM
 
-  __data_load_start__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4);
-  .data ALIGN(__fast_run_end__ , 4) : AT(ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4))
-  {
-    __data_start__ = .;
-    *(.data .data.* .gnu.linkonce.d.*)
-  }
-  __data_end__ = __data_start__ + SIZEOF(.data);
+	.bss :
+	{
+		. = ALIGN(4);
+		__bss_start__ = .;
+		*(.bss*)
+		*(COMMON)
+		. = ALIGN(4);
+		__bss_end__ = .;
 
-  __data_load_end__ = __data_load_start__ + SIZEOF(.data);
-
-  __FLASH_segment_used_end__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4) + SIZEOF(.data);
-
-  . = ASSERT((__data_load_start__ + SIZEOF(.data)) >= __FLASH_segment_start__ && (__data_load_start__ + SIZEOF(.data)) <= (__FLASH_segment_start__ + 0x00080000) , "error: .data is too large to fit in FLASH memory segment");
-
-  .data_run ALIGN(__fast_run_end__ , 4) (NOLOAD) :
-  {
-    __data_run_start__ = .;
-    . = MAX(__data_run_start__ + SIZEOF(.data), .);
-  }
-  __data_run_end__ = __data_run_start__ + SIZEOF(.data_run);
-
-  . = ASSERT(__data_run_end__ >= __RAM_segment_start__ && __data_run_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .data_run is too large to fit in RAM memory segment");
-
-  __bss_load_start__ = ALIGN(__data_run_end__ , 4);
-  .bss ALIGN(__data_run_end__ , 4) (NOLOAD) : AT(ALIGN(__data_run_end__ , 4))
-  {
-    __bss_start__ = .;
-    *(.bss .bss.* .gnu.linkonce.b.*) *(COMMON)
-  }
-  __bss_end__ = __bss_start__ + SIZEOF(.bss);
-
-  . = ASSERT(__bss_end__ >= __RAM_segment_start__ && __bss_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .bss is too large to fit in RAM memory segment");
-
-  __non_init_load_start__ = ALIGN(__bss_end__ , 4);
-  .non_init ALIGN(__bss_end__ , 4) (NOLOAD) : AT(ALIGN(__bss_end__ , 4))
-  {
-    __non_init_start__ = .;
-    *(.non_init .non_init.*)
-  }
-  __non_init_end__ = __non_init_start__ + SIZEOF(.non_init);
-
-  . = ASSERT(__non_init_end__ >= __RAM_segment_start__ && __non_init_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .non_init is too large to fit in RAM memory segment");
-
-  __heap_load_start__ = ALIGN(__non_init_end__ , 4);
-  .heap ALIGN(__non_init_end__ , 4) (NOLOAD) : AT(ALIGN(__non_init_end__ , 4))
-  {
-    __heap_start__ = .;
+	} > RAM
+	
+	.heap (COPY):
+	{
+    __heap_start__ = ALIGN(4);
     *(.heap)
-    . = ALIGN(MAX(__heap_start__ + __HEAPSIZE__ , .), 4);
-  }
-  __heap_end__ = __heap_start__ + SIZEOF(.heap);
+    . = ALIGN(. + __HEAPSIZE__, 4);
+    __heap_end__ = ALIGN(4);
+	} > RAM
 
-  . = ASSERT(__heap_end__ >= __RAM_segment_start__ && __heap_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .heap is too large to fit in RAM memory segment");
-
-  __stack_load_start__ = ALIGN(__heap_end__ , 4);
-  .stack ALIGN(__heap_end__ , 4) (NOLOAD) : AT(ALIGN(__heap_end__ , 4))
+  .stack ALIGN(4) (NOLOAD) :
   {
-    __stack_start__ = .;
+    __stack_start__ = ALIGN(4);
     *(.stack)
-    . = ALIGN(MAX(__stack_start__ + __STACKSIZE__ , .), 4);
-  }
-  __stack_end__ = __stack_start__ + SIZEOF(.stack);
-
-  . = ASSERT(__stack_end__ >= __RAM_segment_start__ && __stack_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .stack is too large to fit in RAM memory segment");
-
-  __stack_process_load_start__ = ALIGN(__stack_end__ , 4);
-  .stack_process ALIGN(__stack_end__ , 4) (NOLOAD) : AT(ALIGN(__stack_end__ , 4))
-  {
-    __stack_process_start__ = .;
-    *(.stack_process)
-    . = ALIGN(MAX(__stack_process_start__ + __STACKSIZE_PROCESS__ , .), 4);
-  }
-  __stack_process_end__ = __stack_process_start__ + SIZEOF(.stack_process);
-
-  __RAM_segment_used_end__ = ALIGN(__stack_end__ , 4) + SIZEOF(.stack_process);
-
-  . = ASSERT(__stack_process_end__ >= __RAM_segment_start__ && __stack_process_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .stack_process is too large to fit in RAM memory segment");
+    . = ALIGN(. + __STACKSIZE__, 4);
+    __stack_end__ = ALIGN(4);
+  } > RAM
 
+  __RAM_segment_used_end__ = .;
 }
-

ports/cortex_m3/gnu/example_build/tx_initialize_low_level.S

@@ -1,226 +1,201 @@
-@/**************************************************************************/
-@/*                                                                        */
-@/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
-@/*                                                                        */
-@/*       This software is licensed under the Microsoft Software License   */
-@/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
-@/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
-@/*       and in the root directory of this software.                      */
-@/*                                                                        */
-@/**************************************************************************/
-@
-@
-@/**************************************************************************/
-@/**************************************************************************/
-@/**                                                                       */
-@/** ThreadX Component                                                     */
-@/**                                                                       */
-@/**   Initialize                                                          */
-@/**                                                                       */
-@/**************************************************************************/
-@/**************************************************************************/
-@
-@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Initialize                                                          */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
     .global     _tx_thread_system_stack_ptr
     .global     _tx_initialize_unused_memory
     .global     __RAM_segment_used_end__
     .global     _tx_timer_interrupt
     .global     __main
-    .global     __tx_SVCallHandler
-    .global     __tx_PendSVHandler
     .global     _vectors
-    .global     __tx_NMIHandler                     @ NMI
-    .global     __tx_BadHandler                     @ HardFault
-    .global     __tx_SVCallHandler                  @ SVCall
-    .global     __tx_DBGHandler                     @ Monitor
-    .global     __tx_PendSVHandler                  @ PendSV
-    .global     __tx_SysTickHandler                 @ SysTick
-    .global     __tx_IntHandler                     @ Int 0
-@
-@
+    .global     __tx_NMIHandler                     // NMI
+    .global     __tx_BadHandler                     // HardFault
+    .global     __tx_SVCallHandler                  // SVCall
+    .global     __tx_DBGHandler                     // Monitor
+    .global     __tx_PendSVHandler                  // PendSV
+    .global     __tx_SysTickHandler                 // SysTick
+    .global     __tx_IntHandler                     // Int 0
+
 SYSTEM_CLOCK      =   6000000
 SYSTICK_CYCLES    =   ((SYSTEM_CLOCK / 100) -1)
 
     .text 32
     .align 4
     .syntax unified
-@/**************************************************************************/
-@/*                                                                        */
-@/*  FUNCTION                                               RELEASE        */
-@/*                                                                        */
-@/*    _tx_initialize_low_level                          Cortex-M3/GNU     */
-@/*                                                           6.1          */
-@/*  AUTHOR                                                                */
-@/*                                                                        */
-@/*    William E. Lamie, Microsoft Corporation                             */
-@/*                                                                        */
-@/*  DESCRIPTION                                                           */
-@/*                                                                        */
-@/*    This function is responsible for any low-level processor            */
-@/*    initialization, including setting up interrupt vectors, setting     */
-@/*    up a periodic timer interrupt source, saving the system stack       */
-@/*    pointer for use in ISR processing later, and finding the first      */
-@/*    available RAM memory address for tx_application_define.             */
-@/*                                                                        */
-@/*  INPUT                                                                 */
-@/*                                                                        */
-@/*    None                                                                */
-@/*                                                                        */
-@/*  OUTPUT                                                                */
-@/*                                                                        */
-@/*    None                                                                */
-@/*                                                                        */
-@/*  CALLS                                                                 */
-@/*                                                                        */
-@/*    None                                                                */
-@/*                                                                        */
-@/*  CALLED BY                                                             */
-@/*                                                                        */
-@/*    _tx_initialize_kernel_enter           ThreadX entry function        */
-@/*                                                                        */
-@/*  RELEASE HISTORY                                                       */
-@/*                                                                        */
-@/*    DATE              NAME                      DESCRIPTION             */
-@/*                                                                        */
-@/*  05-19-2020     William E. Lamie         Initial Version 6.0           */
-@/*  09-30-2020     William E. Lamie         Modified Comment(s), fixed    */
-@/*                                            GNU assembly comment, clean */
-@/*                                            up whitespace, resulting    */
-@/*                                            in version 6.1              */
-@/*                                                                        */
-@/**************************************************************************/
-@VOID   _tx_initialize_low_level(VOID)
-@{
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_initialize_low_level                          Cortex-M3/GNU     */
+/*                                                           6.1          */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    William E. Lamie, Microsoft Corporation                             */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function is responsible for any low-level processor            */
+/*    initialization, including setting up interrupt vectors, setting     */
+/*    up a periodic timer interrupt source, saving the system stack       */
+/*    pointer for use in ISR processing later, and finding the first      */
+/*    available RAM memory address for tx_application_define.             */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    _tx_initialize_kernel_enter           ThreadX entry function        */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  05-19-2020     William E. Lamie         Initial Version 6.0           */
+/*  09-30-2020     William E. Lamie         Modified Comment(s), fixed    */
+/*                                            GNU assembly comment, clean */
+/*                                            up whitespace, resulting    */
+/*                                            in version 6.1              */
+/*                                                                        */
+/**************************************************************************/
+// VOID   _tx_initialize_low_level(VOID)
+// {
     .global  _tx_initialize_low_level
     .thumb_func
 _tx_initialize_low_level:
-@
-@    /* Disable interrupts during ThreadX initialization.  */
-@
+
+    /* Disable interrupts during ThreadX initialization.  */
     CPSID   i
-@
-@    /* Set base of available memory to end of non-initialised RAM area.  */
-@
-    LDR     r0, =_tx_initialize_unused_memory       @ Build address of unused memory pointer
-    LDR     r1, =__RAM_segment_used_end__           @ Build first free address
-    ADD     r1, r1, #4                              @
-    STR     r1, [r0]                                @ Setup first unused memory pointer
-@
-@    /* Setup Vector Table Offset Register.  */
-@
-    MOV     r0, #0xE000E000                         @ Build address of NVIC registers
-    LDR     r1, =_vectors                           @ Pickup address of vector table
-    STR     r1, [r0, #0xD08]                        @ Set vector table address
-@
-@    /* Set system stack pointer from vector value.  */
-@
-    LDR     r0, =_tx_thread_system_stack_ptr        @ Build address of system stack pointer
-    LDR     r1, =_vectors                           @ Pickup address of vector table
-    LDR     r1, [r1]                                @ Pickup reset stack pointer
-    STR     r1, [r0]                                @ Save system stack pointer
-@
-@    /* Enable the cycle count register.  */
-@
-    LDR     r0, =0xE0001000                         @ Build address of DWT register
-    LDR     r1, [r0]                                @ Pickup the current value
-    ORR     r1, r1, #1                              @ Set the CYCCNTENA bit
-    STR     r1, [r0]                                @ Enable the cycle count register
-@
-@    /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference.  */
-@
-    MOV     r0, #0xE000E000                         @ Build address of NVIC registers
+
+    /* Set base of available memory to end of non-initialised RAM area.  */
+    LDR     r0, =_tx_initialize_unused_memory       // Build address of unused memory pointer
+    LDR     r1, =__RAM_segment_used_end__           // Build first free address
+    ADD     r1, r1, #4                              //
+    STR     r1, [r0]                                // Setup first unused memory pointer
+
+    /* Setup Vector Table Offset Register.  */
+    MOV     r0, #0xE000E000                         // Build address of NVIC registers
+    LDR     r1, =_vectors                           // Pickup address of vector table
+    STR     r1, [r0, #0xD08]                        // Set vector table address
+
+    /* Set system stack pointer from vector value.  */
+    LDR     r0, =_tx_thread_system_stack_ptr        // Build address of system stack pointer
+    LDR     r1, =_vectors                           // Pickup address of vector table
+    LDR     r1, [r1]                                // Pickup reset stack pointer
+    STR     r1, [r0]                                // Save system stack pointer
+
+    /* Enable the cycle count register.  */
+    LDR     r0, =0xE0001000                         // Build address of DWT register
+    LDR     r1, [r0]                                // Pickup the current value
+    ORR     r1, r1, #1                              // Set the CYCCNTENA bit
+    STR     r1, [r0]                                // Enable the cycle count register
+
+    /* Configure SysTick.  */
+    MOV     r0, #0xE000E000                         // Build address of NVIC registers
     LDR     r1, =SYSTICK_CYCLES
-    STR     r1, [r0, #0x14]                         @ Setup SysTick Reload Value
-    MOV     r1, #0x7                                @ Build SysTick Control Enable Value
-    STR     r1, [r0, #0x10]                         @ Setup SysTick Control
-@
-@    /* Configure handler priorities.  */
-@
-    LDR     r1, =0x00000000                         @ Rsrv, UsgF, BusF, MemM
-    STR     r1, [r0, #0xD18]                        @ Setup System Handlers 4-7 Priority Registers
+    STR     r1, [r0, #0x14]                         // Setup SysTick Reload Value
+    MOV     r1, #0x7                                // Build SysTick Control Enable Value
+    STR     r1, [r0, #0x10]                         // Setup SysTick Control
 
-    LDR     r1, =0xFF000000                         @ SVCl, Rsrv, Rsrv, Rsrv
-    STR     r1, [r0, #0xD1C]                        @ Setup System Handlers 8-11 Priority Registers
-                                                    @ Note: SVC must be lowest priority, which is 0xFF
+    /* Configure handler priorities.  */
+    LDR     r1, =0x00000000                         // Rsrv, UsgF, BusF, MemM
+    STR     r1, [r0, #0xD18]                        // Setup System Handlers 4-7 Priority Registers
+    LDR     r1, =0xFF000000                         // SVCl, Rsrv, Rsrv, Rsrv
+    STR     r1, [r0, #0xD1C]                        // Setup System Handlers 8-11 Priority Registers
+                                                    // Note: SVC must be lowest priority, which is 0xFF
+    LDR     r1, =0x40FF0000                         // SysT, PnSV, Rsrv, DbgM
+    STR     r1, [r0, #0xD20]                        // Setup System Handlers 12-15 Priority Registers
+                                                    // Note: PnSV must be lowest priority, which is 0xFF
 
-    LDR     r1, =0x40FF0000                         @ SysT, PnSV, Rsrv, DbgM
-    STR     r1, [r0, #0xD20]                        @ Setup System Handlers 12-15 Priority Registers
-                                                    @ Note: PnSV must be lowest priority, which is 0xFF
-@
-@    /* Return to caller.  */
-@
+    /* Return to caller.  */
     BX      lr
-@}
-@
+// }
 
-@/* Define shells for each of the unused vectors.  */
-@
+/* Define shells for each of the unused vectors.  */
     .global  __tx_BadHandler
     .thumb_func
 __tx_BadHandler:
     B       __tx_BadHandler
 
-@ /* added to catch the hardfault */
-
+/* added to catch the hardfault */
     .global  __tx_HardfaultHandler
     .thumb_func
 __tx_HardfaultHandler:
     B       __tx_HardfaultHandler
 
-
-@ /* added to catch the SVC */
-
+/* added to catch the SVC */
     .global  __tx_SVCallHandler
     .thumb_func
 __tx_SVCallHandler:
     B       __tx_SVCallHandler
 
-
-@ /* Generic interrupt handler template */
+/* Generic interrupt handler template */
     .global  __tx_IntHandler
     .thumb_func
 __tx_IntHandler:
-@ VOID InterruptHandler (VOID)
-@ {
+// VOID InterruptHandler (VOID)
+// {
     PUSH    {r0, lr}
 #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
-    BL      _tx_execution_isr_enter             @ Call the ISR enter function
+    BL      _tx_execution_isr_enter             // Call the ISR enter function
 #endif
-
-@    /* Do interrupt handler work here */
-@    /* BL <your C Function>.... */
-
+    /* Do interrupt handler work here */
+    /* BL <your C Function>.... */
 #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
-    BL      _tx_execution_isr_exit              @ Call the ISR exit function
+    BL      _tx_execution_isr_exit              // Call the ISR exit function
 #endif
     POP     {r0, lr}
     BX      LR
-@ }
+// }
 
-@ /* System Tick timer interrupt handler */
+/* System Tick timer interrupt handler */
     .global  __tx_SysTickHandler
     .global  SysTick_Handler
     .thumb_func
 __tx_SysTickHandler:
     .thumb_func
 SysTick_Handler:
-@ VOID TimerInterruptHandler (VOID)
-@ {
-@
+// VOID SysTick_Handler (VOID)
+// {
     PUSH    {r0, lr}
 #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
-    BL      _tx_execution_isr_enter             @ Call the ISR enter function
+    BL      _tx_execution_isr_enter             // Call the ISR enter function
 #endif
     BL      _tx_timer_interrupt
 #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
-    BL      _tx_execution_isr_exit              @ Call the ISR exit function
+    BL      _tx_execution_isr_exit              // Call the ISR exit function
 #endif
     POP     {r0, lr}
-    BX      LR
-@ }
+    BX      lr
+// }
 
-
-@ /* NMI, DBG handlers */
+/* NMI, DBG handlers */
     .global  __tx_NMIHandler
     .thumb_func
 __tx_NMIHandler:

ports/cortex_m3/gnu/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                         Cortex-M3/GNU     */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -59,6 +59,9 @@
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and         */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -146,6 +149,12 @@ typedef unsigned short                          USHORT;
 #define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
 
 /* Define various constants for the ThreadX Cortex-M port.  */
 
@@ -707,7 +716,7 @@ void    tx_thread_fpu_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M3/GNU Version 6.1.11 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M3/GNU Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m3/gnu/src/tx_misra.S

@@ -103,6 +103,14 @@
         .global _tx_misra_vfp_touch
 #endif
 
+        .global _tx_misra_event_flags_group_not_used
+        .global _tx_misra_event_flags_set_notify_not_used
+        .global _tx_misra_queue_not_used
+        .global _tx_misra_queue_send_notify_not_used
+        .global _tx_misra_semaphore_not_used
+        .global _tx_misra_semaphore_put_notify_not_used
+        .global _tx_misra_thread_entry_exit_notify_not_used
+        .global _tx_misra_thread_not_used
 
 /**************************************************************************/
 /**************************************************************************/
@@ -172,17 +180,93 @@ _tx_misra_uchar_pointer_dif:
         BX       LR               // return
 
 
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
+/**                                                                                                                                 */
+/**  This single function serves all of the below prototypes.                                                                       */
+/**                                                                                                                                 */
+/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                                                                          */
+/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);                                                                        */
+/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);                                                  */
+/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);                                                    */
+/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);                                                    */
+/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);                                                   */
+/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);                                                                */
+/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);                                                  */
+/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);                                                      */
+/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);                                                     */
+/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);                                                      */
+/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);                                                    */
+/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);                                         */
+/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);                                           */
+/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);                                                                */
+/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);                                                             */
+/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);                                                             */
+/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);                                                     */
+/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);                                                                */
+/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);                                                            */
+/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);                                          */
+/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);                                                      */
+/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);                                                           */
+/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);                                             */
+/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);                                             */
+/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);                                                   */
+/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);                                              */
+/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);                                              */
+/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                                                                */
+/**  VOID    _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr);                                                 */
+/**  VOID    _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr));          */
+/**  VOID    _tx_misra_queue_not_used(TX_QUEUE *queue_ptr);                                                                         */
+/**  VOID    _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr));                           */
+/**  VOID    _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr);                                                             */
+/**  VOID    _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr));             */
+/**  VOID    _tx_misra_thread_not_used(TX_THREAD *thread_ptr);                                                                      */
+/**  VOID    _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id));  */
+/**                                                                                                                                 */
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
         .text
         .thumb_func
 _tx_misra_pointer_to_ulong_convert:
+_tx_misra_ulong_to_pointer_convert:
+_tx_misra_indirect_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_indirect_uchar_pointer_convert:
+_tx_misra_block_pool_to_uchar_pointer_convert:
+_tx_misra_void_to_block_pool_pointer_convert:
+_tx_misra_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_block_pool_pointer_convert:
+_tx_misra_void_to_indirect_uchar_pointer_convert:
+_tx_misra_void_to_byte_pool_pointer_convert:
+_tx_misra_byte_pool_to_uchar_pointer_convert:
+_tx_misra_uchar_to_align_type_pointer_convert:
+_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
+_tx_misra_void_to_event_flags_pointer_convert:
+_tx_misra_void_to_ulong_pointer_convert:
+_tx_misra_void_to_mutex_pointer_convert:
+_tx_misra_void_to_queue_pointer_convert:
+_tx_misra_void_to_semaphore_pointer_convert:
+_tx_misra_uchar_to_void_pointer_convert:
+_tx_misra_ulong_to_thread_pointer_convert:
+_tx_misra_timer_indirect_to_void_pointer_convert:
+_tx_misra_const_char_to_char_pointer_convert:
+_tx_misra_void_to_thread_pointer_convert:
+#ifdef TX_ENABLE_EVENT_TRACE
+_tx_misra_object_to_uchar_pointer_convert:
+_tx_misra_uchar_to_object_pointer_convert:
+_tx_misra_uchar_to_header_pointer_convert:
+_tx_misra_uchar_to_entry_pointer_convert:
+_tx_misra_entry_to_uchar_pointer_convert:
+#endif
+_tx_misra_char_to_uchar_pointer_convert:
+_tx_misra_event_flags_group_not_used:
+_tx_misra_event_flags_set_notify_not_used:
+_tx_misra_queue_not_used:
+_tx_misra_queue_send_notify_not_used:
+_tx_misra_semaphore_not_used:
+_tx_misra_semaphore_put_notify_not_used:
+_tx_misra_thread_entry_exit_notify_not_used:
+_tx_misra_thread_not_used:
+
         BX       LR               // return
 
 
@@ -234,20 +318,6 @@ _tx_misra_ulong_pointer_dif:
         BX       LR               // return
 
 
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);              */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_ulong_to_pointer_convert:
-        BX       LR               // return
-
-
 /**************************************************************************/
 /**************************************************************************/
 /**                                                                       */
@@ -332,12 +402,9 @@ _tx_misra_timer_pointer_add:
         .text
         .thumb_func
 _tx_misra_user_timer_pointer_get:
-        ADDS     R2,R0,#+8
-        SUBS     R2,R2,R0
-        RSBS     R2,R2,#+0
-        ADD      R0,R0,R2
-        STR      R0,[R1, #+0]
-        BX       LR               // return
+        SUBS    R0,#8
+        STR     R0,[R1, #+0]
+        BX      LR               // return
 
 
 /**************************************************************************/
@@ -553,202 +620,6 @@ _tx_misra_always_true:
         BX       LR               // return
 
 
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);        */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_indirect_void_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);       */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_indirect_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/***********************************************************************************/
-/***********************************************************************************/
-/**                                                                                */
-/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);   */
-/**                                                                                */
-/***********************************************************************************/
-/***********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_block_pool_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_block_pool_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/************************************************************************************/
-/************************************************************************************/
-/**                                                                                 */
-/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);  */
-/**                                                                                 */
-/************************************************************************************/
-/************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_block_pool_pointer_convert:
-        BX       LR               // return
-
-
-/**************************************************************************************/
-/**************************************************************************************/
-/**                                                                                   */
-/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);        */
-/**                                                                                   */
-/**************************************************************************************/
-/**************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_indirect_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);          */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_byte_pool_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_byte_pool_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);         */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_align_type_pointer_convert:
-        BX       LR               // return
-
-
-/****************************************************************************************************/
-/****************************************************************************************************/
-/**                                                                                                 */
-/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);         */
-/**                                                                                                 */
-/****************************************************************************************************/
-/****************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
-        BX       LR               // return
-
-
-/**************************************************************************************************/
-/**************************************************************************************************/
-/**                                                                                               */
-/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);         */
-/**                                                                                               */
-/**************************************************************************************************/
-/**************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_event_flags_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_ulong_pointer_convert:
-        BX       LR               // return
-
-
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_mutex_pointer_convert:
-        BX       LR               // return
-
-
 /**************************************************************************/
 /**************************************************************************/
 /**                                                                       */
@@ -764,191 +635,6 @@ _tx_misra_status_get:
         BX       LR               // return
 
 
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_queue_pointer_convert:
-        BX       LR               // return
-
-
-/****************************************************************************************/
-/****************************************************************************************/
-/**                                                                                     */
-/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);         */
-/**                                                                                     */
-/****************************************************************************************/
-/****************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_semaphore_pointer_convert:
-        BX       LR               // return
-
-
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);      */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_void_pointer_convert:
-        BX       LR               // return
-
-
-/*********************************************************************************/
-/*********************************************************************************/
-/**                                                                              */
-/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);         */
-/**                                                                              */
-/*********************************************************************************/
-/*********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_ulong_to_thread_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************************/
-/***************************************************************************************************/
-/**                                                                                                */
-/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);         */
-/**                                                                                                */
-/***************************************************************************************************/
-/***************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_timer_indirect_to_void_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_const_char_to_char_pointer_convert:
-        BX       LR               // return
-
-
-/**********************************************************************************/
-/**********************************************************************************/
-/**                                                                               */
-/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);         */
-/**                                                                               */
-/**********************************************************************************/
-/**********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_thread_pointer_convert:
-        BX       LR               // return
-
-
-#ifdef TX_ENABLE_EVENT_TRACE
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_object_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_object_pointer_convert:
-        BX       LR               // return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_header_pointer_convert:
-        BX       LR               // return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_entry_pointer_convert:
-        BX       LR               // return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_entry_to_uchar_pointer_convert:
-        BX       LR               // return
-#endif
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                           */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_char_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
 /***********************************************************************************************/
 /***********************************************************************************************/
 /**                                                                                            */

ports/cortex_m3/iar/CMakeLists.txt

@@ -0,0 +1,21 @@
+
+target_sources(${PROJECT_NAME}
+    PRIVATE
+    # {{BEGIN_TARGET_SOURCES}}
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_iar.c
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_restore.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_save.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_control.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_disable.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_restore.S    
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_schedule.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_stack_build.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_system_return.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_timer_interrupt.S
+    # {{END_TARGET_SOURCES}}
+)
+
+target_include_directories(${PROJECT_NAME}
+    PUBLIC
+    ${CMAKE_CURRENT_LIST_DIR}/inc
+)

ports/cortex_m3/iar/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                         Cortex-M3/IAR     */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -59,6 +59,9 @@
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and         */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -146,6 +149,12 @@ typedef unsigned short                          USHORT;
 #define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
 
 /* Define various constants for the ThreadX Cortex-M port.  */
 
@@ -707,7 +716,7 @@ void    tx_thread_fpu_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M3/IAR Version 6.1.11 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M3/IAR Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m3/iar/src/tx_misra.s

@@ -102,8 +102,18 @@
         PUBLIC _tx_misra_fpccr_get
         PUBLIC _tx_misra_vfp_touch
 #endif
-        PUBLIC _tx_version_id
 
+        PUBLIC _tx_misra_event_flags_group_not_used
+        PUBLIC _tx_misra_event_flags_set_notify_not_used
+        PUBLIC _tx_misra_queue_not_used
+        PUBLIC _tx_misra_queue_send_notify_not_used
+        PUBLIC _tx_misra_semaphore_not_used
+        PUBLIC _tx_misra_semaphore_put_notify_not_used
+        PUBLIC _tx_misra_thread_entry_exit_notify_not_used
+        PUBLIC _tx_misra_thread_not_used
+
+#ifdef TX_MISRA_ENABLE
+        PUBLIC _tx_version_id
 
         SECTION `.data`:DATA:REORDER:NOROOT(2)
         DATA
@@ -115,11 +125,12 @@ _tx_version_id:
         DC8 45H, 78H, 70H, 72H, 65H, 73H, 73H, 20H
         DC8 4CH, 6FH, 67H, 69H, 63H, 20H, 49H, 6EH
         DC8 63H, 2EH, 20H, 2AH, 20H, 54H, 68H, 72H
-        DC8 65H, 61H, 64H, 58H, 20H, 35H, 2EH, 38H
+        DC8 65H, 61H, 64H, 58H, 20H, 36H, 2EH, 31H
         DC8 20H, 4DH, 49H, 53H, 52H, 41H, 20H, 43H
         DC8 20H, 43H, 6FH, 6DH, 70H, 6CH, 69H, 61H
         DC8 6EH, 74H, 20H, 2AH, 0
         DC8 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+#endif //TX_MISRA_ENABLE
 
 /**************************************************************************/
 /**************************************************************************/
@@ -139,7 +150,7 @@ _tx_misra_memset:
         MOVS     R1,R0
         MOVS     R0,R4
         BL       __aeabi_memset
-        POP      {R4,PC}          ;; return
+        POP      {R4,PC}          // return
 
 /**************************************************************************/
 /**************************************************************************/
@@ -153,7 +164,7 @@ _tx_misra_memset:
         THUMB
 _tx_misra_uchar_pointer_add:
         ADD      R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -169,7 +180,7 @@ _tx_misra_uchar_pointer_add:
 _tx_misra_uchar_pointer_sub:
         RSBS     R1,R1,#+0
         ADD      R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -184,21 +195,97 @@ _tx_misra_uchar_pointer_sub:
         THUMB
 _tx_misra_uchar_pointer_dif:
         SUBS     R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
+/**                                                                                                                                 */
+/**  This single function serves all of the below prototypes.                                                                       */
+/**                                                                                                                                 */
+/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                                                                          */
+/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);                                                                        */
+/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);                                                  */
+/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);                                                    */
+/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);                                                    */
+/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);                                                   */
+/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);                                                                */
+/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);                                                  */
+/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);                                                      */
+/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);                                                     */
+/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);                                                      */
+/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);                                                    */
+/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);                                         */
+/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);                                           */
+/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);                                                                */
+/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);                                                             */
+/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);                                                             */
+/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);                                                     */
+/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);                                                                */
+/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);                                                            */
+/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);                                          */
+/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);                                                      */
+/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);                                                           */
+/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);                                             */
+/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);                                             */
+/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);                                                   */
+/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);                                              */
+/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);                                              */
+/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                                                                */
+/**  VOID    _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr);                                                 */
+/**  VOID    _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr));          */
+/**  VOID    _tx_misra_queue_not_used(TX_QUEUE *queue_ptr);                                                                         */
+/**  VOID    _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr));                           */
+/**  VOID    _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr);                                                             */
+/**  VOID    _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr));             */
+/**  VOID    _tx_misra_thread_not_used(TX_THREAD *thread_ptr);                                                                      */
+/**  VOID    _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id));  */
+/**                                                                                                                                 */
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
         SECTION `.text`:CODE:NOROOT(1)
         THUMB
 _tx_misra_pointer_to_ulong_convert:
-        BX       LR               ;; return
+_tx_misra_ulong_to_pointer_convert:
+_tx_misra_indirect_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_indirect_uchar_pointer_convert:
+_tx_misra_block_pool_to_uchar_pointer_convert:
+_tx_misra_void_to_block_pool_pointer_convert:
+_tx_misra_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_block_pool_pointer_convert:
+_tx_misra_void_to_indirect_uchar_pointer_convert:
+_tx_misra_void_to_byte_pool_pointer_convert:
+_tx_misra_byte_pool_to_uchar_pointer_convert:
+_tx_misra_uchar_to_align_type_pointer_convert:
+_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
+_tx_misra_void_to_event_flags_pointer_convert:
+_tx_misra_void_to_ulong_pointer_convert:
+_tx_misra_void_to_mutex_pointer_convert:
+_tx_misra_void_to_queue_pointer_convert:
+_tx_misra_void_to_semaphore_pointer_convert:
+_tx_misra_uchar_to_void_pointer_convert:
+_tx_misra_ulong_to_thread_pointer_convert:
+_tx_misra_timer_indirect_to_void_pointer_convert:
+_tx_misra_const_char_to_char_pointer_convert:
+_tx_misra_void_to_thread_pointer_convert:
+#ifdef TX_ENABLE_EVENT_TRACE
+_tx_misra_object_to_uchar_pointer_convert:
+_tx_misra_uchar_to_object_pointer_convert:
+_tx_misra_uchar_to_header_pointer_convert:
+_tx_misra_uchar_to_entry_pointer_convert:
+_tx_misra_entry_to_uchar_pointer_convert:
+#endif
+_tx_misra_char_to_uchar_pointer_convert:
+_tx_misra_event_flags_group_not_used:
+_tx_misra_event_flags_set_notify_not_used:
+_tx_misra_queue_not_used:
+_tx_misra_queue_send_notify_not_used:
+_tx_misra_semaphore_not_used:
+_tx_misra_semaphore_put_notify_not_used:
+_tx_misra_thread_entry_exit_notify_not_used:
+_tx_misra_thread_not_used:
+
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -213,7 +300,7 @@ _tx_misra_pointer_to_ulong_convert:
         THUMB
 _tx_misra_ulong_pointer_add:
         ADD      R0,R0,R1, LSL #+2
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -230,7 +317,7 @@ _tx_misra_ulong_pointer_sub:
         MVNS     R2,#+3
         MULS     R1,R2,R1
         ADD      R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -246,21 +333,7 @@ _tx_misra_ulong_pointer_sub:
 _tx_misra_ulong_pointer_dif:
         SUBS     R0,R0,R1
         ASRS     R0,R0,#+2
-        BX       LR               ;; return
-
-
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);              */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_ulong_to_pointer_convert:
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -299,7 +372,7 @@ _tx_misra_message_copy:
         STR      R3,[R0, #+0]
         STR      R4,[R1, #+0]
         POP      {R4,R5}
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -316,7 +389,7 @@ _tx_misra_message_copy:
 _tx_misra_timer_pointer_dif:
         SUBS     R0,R0,R1
         ASRS     R0,R0,#+2
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -332,7 +405,7 @@ _tx_misra_timer_pointer_dif:
         THUMB
 _tx_misra_timer_pointer_add:
         ADD      R0,R0,R1, LSL #+2
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -347,12 +420,9 @@ _tx_misra_timer_pointer_add:
         SECTION `.text`:CODE:NOROOT(1)
         THUMB
 _tx_misra_user_timer_pointer_get:
-        ADDS     R2,R0,#+8
-        SUBS     R2,R2,R0
-        RSBS     R2,R2,#+0
-        ADD      R0,R0,R2
-        STR      R0,[R1, #+0]
-        BX       LR               ;; return
+        SUBS    R0,#8
+        STR     R0,[R1, #+0]
+        BX      LR               // return
 
 
 /**************************************************************************/
@@ -374,7 +444,7 @@ _tx_misra_thread_stack_check:
         CMP      R4,#+0
         BEQ.N    ??_tx_misra_thread_stack_check_0
         LDR      R1,[R4, #+0]
-        LDR.N    R2,??DataTable2  ;; 0x54485244
+        LDR.N    R2,??DataTable2  // 0x54485244
         CMP      R1,R2
         BNE.N    ??_tx_misra_thread_stack_check_0
         LDR      R1,[R4, #+8]
@@ -412,7 +482,7 @@ _tx_misra_thread_stack_check:
         BL       _tx_thread_interrupt_disable
 ??_tx_misra_thread_stack_check_0:
         BL       _tx_thread_interrupt_restore
-        POP      {R0,R4,R5,PC}    ;; return
+        POP      {R0,R4,R5,PC}    // return
 
 #ifdef TX_ENABLE_EVENT_TRACE
 
@@ -500,7 +570,7 @@ _tx_misra_trace_event_insert:
         LDR      R0,[R0, #+0]
         STR      R4,[R0, #+32]
 ??_tx_misra_trace_event_insert_0:
-        POP      {R0,R4-R7,PC}    ;; return
+        POP      {R0,R4-R7,PC}    // return
 
 
         SECTION `.text`:CODE:NOROOT(2)
@@ -552,7 +622,7 @@ _tx_misra_trace_event_insert:
         THUMB
 _tx_misra_time_stamp_get:
         MOVS     R0,#+0
-        BX       LR               ;; return
+        BX       LR               // return
 
 #endif
 
@@ -587,203 +657,7 @@ _tx_misra_time_stamp_get:
         THUMB
 _tx_misra_always_true:
         MOVS     R0,#+1
-        BX       LR               ;; return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);        */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_indirect_void_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);       */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_indirect_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/***********************************************************************************/
-/***********************************************************************************/
-/**                                                                                */
-/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);   */
-/**                                                                                */
-/***********************************************************************************/
-/***********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_block_pool_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_block_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/************************************************************************************/
-/************************************************************************************/
-/**                                                                                 */
-/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);  */
-/**                                                                                 */
-/************************************************************************************/
-/************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_block_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/**************************************************************************************/
-/**************************************************************************************/
-/**                                                                                   */
-/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);        */
-/**                                                                                   */
-/**************************************************************************************/
-/**************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_indirect_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);          */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_byte_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_byte_pool_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);         */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_align_type_pointer_convert:
-        BX       LR               ;; return
-
-
-/****************************************************************************************************/
-/****************************************************************************************************/
-/**                                                                                                 */
-/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);         */
-/**                                                                                                 */
-/****************************************************************************************************/
-/****************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/**************************************************************************************************/
-/**************************************************************************************************/
-/**                                                                                               */
-/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);         */
-/**                                                                                               */
-/**************************************************************************************************/
-/**************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_event_flags_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_ulong_pointer_convert:
-        BX       LR               ;; return
-
-
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_mutex_pointer_convert:
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -798,192 +672,7 @@ _tx_misra_void_to_mutex_pointer_convert:
         THUMB
 _tx_misra_status_get:
         MOVS     R0,#+0
-        BX       LR               ;; return
-
-
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_queue_pointer_convert:
-        BX       LR               ;; return
-
-
-/****************************************************************************************/
-/****************************************************************************************/
-/**                                                                                     */
-/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);         */
-/**                                                                                     */
-/****************************************************************************************/
-/****************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_semaphore_pointer_convert:
-        BX       LR               ;; return
-
-
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);      */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_void_pointer_convert:
-        BX       LR               ;; return
-
-
-/*********************************************************************************/
-/*********************************************************************************/
-/**                                                                              */
-/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);         */
-/**                                                                              */
-/*********************************************************************************/
-/*********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_ulong_to_thread_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************************/
-/***************************************************************************************************/
-/**                                                                                                */
-/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);         */
-/**                                                                                                */
-/***************************************************************************************************/
-/***************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_timer_indirect_to_void_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_const_char_to_char_pointer_convert:
-        BX       LR               ;; return
-
-
-/**********************************************************************************/
-/**********************************************************************************/
-/**                                                                               */
-/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);         */
-/**                                                                               */
-/**********************************************************************************/
-/**********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_thread_pointer_convert:
-        BX       LR               ;; return
-
-
-#ifdef TX_ENABLE_EVENT_TRACE
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_object_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_object_pointer_convert:
-        BX       LR               ;; return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_header_pointer_convert:
-        BX       LR               ;; return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_entry_pointer_convert:
-        BX       LR               ;; return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_entry_to_uchar_pointer_convert:
-        BX       LR               ;; return
-#endif
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                           */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_char_to_uchar_pointer_convert:
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /***********************************************************************************************/
@@ -998,7 +687,7 @@ _tx_misra_char_to_uchar_pointer_convert:
         THUMB
 _tx_misra_ipsr_get:
         MRS      R0, IPSR
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /***********************************************************************************************/
@@ -1013,7 +702,7 @@ _tx_misra_ipsr_get:
         THUMB
 _tx_misra_control_get:
         MRS      R0, CONTROL
-        BX       LR               ;; return
+        BX       LR               // return
 
         
 /***********************************************************************************************/
@@ -1028,7 +717,7 @@ _tx_misra_control_get:
         THUMB
 _tx_misra_control_set:
         MSR      CONTROL, R0
-        BX       LR               ;; return
+        BX       LR               // return
 
         
 #ifdef __ARMVFP__
@@ -1044,9 +733,9 @@ _tx_misra_control_set:
         SECTION `.text`:CODE:NOROOT(2)
         THUMB
 _tx_misra_fpccr_get:
-        LDR      r0, =0xE000EF34  ; Build FPCCR address
-        LDR      r0, [r0]         ; Load FPCCR value
-        BX       LR               ;; return
+        LDR      r0, =0xE000EF34  // Build FPCCR address
+        LDR      r0, [r0]         // Load FPCCR value
+        BX       LR               // return
         
         
 /***********************************************************************************************/
@@ -1061,7 +750,7 @@ _tx_misra_fpccr_get:
         THUMB
 _tx_misra_vfp_touch:
         vmov.f32 s0, s0
-        BX       LR               ;; return
+        BX       LR               // return
         
 #endif
         

ports/cortex_m3/keil/example_build/ThreadX_Demo.uvopt

@@ -10,7 +10,7 @@
     <aExt>*.s*; *.src; *.a*</aExt>
     <oExt>*.obj</oExt>
     <lExt>*.lib</lExt>
-    <tExt>*.txt; *.h; *.inc</tExt>
+    <tExt>*.txt; *.h; *.inc; *.md</tExt>
     <pExt>*.plm</pExt>
     <CppX>*.cpp</CppX>
     <nMigrate>0</nMigrate>

ports/cortex_m3/keil/example_build/ThreadX_Demo.uvproj

@@ -555,19 +555,4 @@
     </Target>
   </Targets>
 
-  <LayerInfo>
-    <Layers>
-      <Layer>
-        <LayName>&lt;Project Info&gt;</LayName>
-        <LayDesc></LayDesc>
-        <LayUrl></LayUrl>
-        <LayKeys></LayKeys>
-        <LayCat></LayCat>
-        <LayLic></LayLic>
-        <LayTarg>0</LayTarg>
-        <LayPrjMark>1</LayPrjMark>
-      </Layer>
-    </Layers>
-  </LayerInfo>
-
 </Project>

ports/cortex_m3/keil/example_build/ThreadX_Library.uvopt

@@ -10,7 +10,7 @@
     <aExt>*.s*; *.src; *.a*</aExt>
     <oExt>*.obj; *.o</oExt>
     <lExt>*.lib</lExt>
-    <tExt>*.txt; *.h; *.inc</tExt>
+    <tExt>*.txt; *.h; *.inc; *.md</tExt>
     <pExt>*.plm</pExt>
     <CppX>*.cpp</CppX>
     <nMigrate>0</nMigrate>

ports/cortex_m3/keil/example_build/ThreadX_Library.uvproj

@@ -1532,19 +1532,4 @@
     </Target>
   </Targets>
 
-  <LayerInfo>
-    <Layers>
-      <Layer>
-        <LayName>&lt;Project Info&gt;</LayName>
-        <LayDesc></LayDesc>
-        <LayUrl></LayUrl>
-        <LayKeys></LayKeys>
-        <LayCat></LayCat>
-        <LayLic></LayLic>
-        <LayTarg>0</LayTarg>
-        <LayPrjMark>1</LayPrjMark>
-      </Layer>
-    </Layers>
-  </LayerInfo>
-
 </Project>

ports/cortex_m3/keil/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                         Cortex-M3/Keil    */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -59,6 +59,9 @@
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and         */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -146,6 +149,12 @@ typedef unsigned short                          USHORT;
 #define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
 
 /* Define various constants for the ThreadX Cortex-M port.  */
 
@@ -707,7 +716,7 @@ void    tx_thread_fpu_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M3/Keil Version 6.1.11 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M3/Keil Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m33/ac6/CMakeLists.txt

@@ -0,0 +1,21 @@
+target_sources(${PROJECT_NAME} PRIVATE
+    ${CMAKE_CURRENT_LIST_DIR}/src/txe_thread_secure_stack_allocate.c
+    ${CMAKE_CURRENT_LIST_DIR}/src/txe_thread_secure_stack_free.c
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_initialize_low_level.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_restore.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_save.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_control.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_disable.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_restore.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_schedule.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack.c
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack_allocate.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack_free.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_stack_build.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_system_return.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_timer_interrupt.S
+)
+
+target_include_directories(${PROJECT_NAME} PUBLIC
+    inc
+)

ports/cortex_m33/ac6/inc/tx_port.h

@@ -25,8 +25,8 @@
 /*                                                                        */
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
-/*    tx_port.h                                          Cortex-M33       */
-/*                                                           6.1.11       */
+/*    tx_port.h                                         Cortex-M33/AC6    */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -61,16 +61,21 @@
 /*                                            added symbol to enable      */
 /*                                            stack error handler,        */
 /*                                            resulting in version 6.1.7  */
-/*  10-15-2021     Scott Larson             Modified comment(s), improved */
+/*  10-15-2021      Scott Larson            Modified comment(s), improved */
 /*                                            stack check error handling, */
 /*                                            resulting in version 6.1.9  */
-/*  01-31-2022     Scott Larson             Modified comment(s), unified  */
+/*  01-31-2022      Scott Larson            Modified comment(s), unified  */
 /*                                            this file across compilers, */
 /*                                            fixed predefined macro,     */
 /*                                            resulting in version 6.1.10 */
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and changed */
+/*                                            secure stack initialization */
+/*                                            macro to port-specific,     */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -188,6 +193,12 @@ UINT    _tx_thread_secure_stack_free(struct TX_THREAD_STRUCT *tx_thread);
 #define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
 
 /* Define various constants for the ThreadX Cortex-M port.  */
 
@@ -524,7 +535,7 @@ ULONG   _tx_misra_ipsr_get(VOID);
 #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
 /* Initialize secure stacks for threads calling secure functions. */
 extern void    _tx_thread_secure_stack_initialize(void);
-#define TX_INITIALIZE_KERNEL_ENTER_EXTENSION            _tx_thread_secure_stack_initialize();
+#define TX_PORT_SPECIFIC_PRE_INITIALIZATION             _tx_thread_secure_stack_initialize();
 #endif
 
 /* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to
@@ -637,7 +648,7 @@ VOID                                            _tx_thread_interrupt_restore(UIN
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33 Version 6.1.10 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33/AC6 Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m33/ac6/src/tx_initialize_low_level.S

@@ -0,0 +1,278 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Initialize                                                          */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+SYSTEM_CLOCK        =     6000000
+SYSTICK_CYCLES      =     ((SYSTEM_CLOCK / 100) -1)
+
+/* Setup the stack and heap areas.  */
+
+STACK_SIZE          =     0x00000400
+HEAP_SIZE           =     0x00000000
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_initialize_low_level                          Cortex-M33/AC6    */
+/*                                                           6.1          */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function is responsible for any low-level processor            */
+/*    initialization, including setting up interrupt vectors, setting     */
+/*    up a periodic timer interrupt source, saving the system stack       */
+/*    pointer for use in ISR processing later, and finding the first      */
+/*    available RAM memory address for tx_application_define.             */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    _tx_initialize_kernel_enter           ThreadX entry function        */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+// VOID   _tx_initialize_low_level(VOID)
+// {
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  _tx_initialize_low_level
+    .thumb_func
+.type _tx_initialize_low_level, function
+_tx_initialize_low_level:
+
+    /* Disable interrupts during ThreadX initialization.  */
+    CPSID   i
+
+    /* Set base of available memory to end of non-initialised RAM area.  */
+    LDR     r0, =_tx_initialize_unused_memory       // Build address of unused memory pointer
+    LDR     r1, =Image$$ARM_LIB_STACK$$ZI$$Limit    // Build first free address
+    ADD     r1, r1, #4                              //
+    STR     r1, [r0]                                // Setup first unused memory pointer
+
+    /* Setup Vector Table Offset Register.  */
+    MOV     r0, #0xE000E000                         // Build address of NVIC registers
+    LDR     r1, =__Vectors                          // Pickup address of vector table
+    STR     r1, [r0, #0xD08]                        // Set vector table address
+
+    /* Enable the cycle count register.  */
+    LDR     r0, =0xE0001000                         // Build address of DWT register
+    LDR     r1, [r0]                                // Pickup the current value
+    ORR     r1, r1, #1                              // Set the CYCCNTENA bit
+    STR     r1, [r0]                                // Enable the cycle count register
+
+    /* Set system stack pointer from vector value.  */
+    LDR     r0, =_tx_thread_system_stack_ptr        // Build address of system stack pointer
+    LDR     r1, =__Vectors                          // Pickup address of vector table
+    LDR     r1, [r1]                                // Pickup reset stack pointer
+    STR     r1, [r0]                                // Save system stack pointer
+
+    /* Configure SysTick.  */
+    MOV     r0, #0xE000E000                         // Build address of NVIC registers
+    LDR     r1, =SYSTICK_CYCLES
+    STR     r1, [r0, #0x14]                         // Setup SysTick Reload Value
+    MOV     r1, #0x7                                // Build SysTick Control Enable Value
+    STR     r1, [r0, #0x10]                         // Setup SysTick Control
+
+    /* Configure handler priorities.  */
+    LDR     r1, =0x00000000                         // Rsrv, UsgF, BusF, MemM
+    STR     r1, [r0, #0xD18]                        // Setup System Handlers 4-7 Priority Registers
+
+    LDR     r1, =0xFF000000                         // SVCl, Rsrv, Rsrv, Rsrv
+    STR     r1, [r0, #0xD1C]                        // Setup System Handlers 8-11 Priority Registers
+                                                    // Note: SVC must be lowest priority, which is 0xFF
+
+    LDR     r1, =0x40FF0000                         // SysT, PnSV, Rsrv, DbgM
+    STR     r1, [r0, #0xD20]                        // Setup System Handlers 12-15 Priority Registers
+                                                    // Note: PnSV must be lowest priority, which is 0xFF
+
+    /* Return to caller.  */
+    BX      lr
+// }
+
+
+/* Define shells for each of the unused vectors.  */
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  __tx_BadHandler
+    .thumb_func
+.type __tx_BadHandler, function
+__tx_BadHandler:
+    B       __tx_BadHandler
+
+
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  __tx_IntHandler
+    .thumb_func
+.type __tx_IntHandler, function
+__tx_IntHandler:
+// VOID InterruptHandler (VOID)
+// {
+    PUSH    {r0,lr}     // Save LR (and dummy r0 to maintain stack alignment)
+#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
+    BL      _tx_execution_isr_enter             // Call the ISR enter function
+#endif
+    /* Do interrupt handler work here */
+    /* .... */
+#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
+    BL      _tx_execution_isr_exit              // Call the ISR exit function
+#endif
+    POP     {r0,lr}
+    BX      LR
+// }
+
+
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  SysTick_Handler
+    .thumb_func
+.type SysTick_Handler, function
+SysTick_Handler:
+// VOID TimerInterruptHandler (VOID)
+// {
+    PUSH    {r0,lr}     // Save LR (and dummy r0 to maintain stack alignment)
+#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
+    BL      _tx_execution_isr_enter             // Call the ISR enter function
+#endif
+    BL      _tx_timer_interrupt
+#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
+    BL      _tx_execution_isr_exit              // Call the ISR exit function
+#endif
+    POP     {r0,lr}
+    BX      LR
+// }
+
+
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  HardFault_Handler
+    .thumb_func
+.type HardFault_Handler, function
+HardFault_Handler:
+    B       HardFault_Handler
+
+
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  UsageFault_Handler
+    .thumb_func
+.type UsageFault_Handler, function
+UsageFault_Handler:
+    CPSID   i                                       // Disable interrupts
+    // Check for stack limit fault
+    LDR     r0, =0xE000ED28                         // CFSR address
+    LDR     r1,[r0]                                 // Pick up CFSR
+    TST     r1, #0x00100000                         // Check for Stack Overflow
+_unhandled_usage_loop:
+    BEQ     _unhandled_usage_loop                   // If not stack overflow then loop
+
+    // Handle stack overflow
+    STR     r1, [r0]                                // Clear CFSR flag(s)
+
+#ifdef __ARM_PCS_VFP
+    LDR     r0, =0xE000EF34                         // Cleanup FPU context: Load FPCCR address
+    LDR     r1, [r0]                                // Load FPCCR
+    BIC     r1, r1, #1                              // Clear the lazy preservation active bit
+    STR     r1, [r0]                                // Store the value
+#endif
+
+    LDR     r0, =_tx_thread_current_ptr             // Build current thread pointer address
+    LDR     r0,[r0]                                 // Pick up current thread pointer
+    PUSH    {r0,lr}                                 // Save LR (and r0 to maintain stack alignment)
+    BL      _tx_thread_stack_error_handler          // Call ThreadX/user handler
+    POP     {r0,lr}                                 // Restore LR and dummy reg
+
+#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
+    // Call the thread exit function to indicate the thread is no longer executing.
+    PUSH    {r0, lr}                                // Save LR (and r0 just for alignment)
+    BL      _tx_execution_thread_exit               // Call the thread exit function
+    POP     {r0, lr}                                // Recover LR
+#endif
+
+    MOV     r1, #0                                  // Build NULL value
+    LDR     r0, =_tx_thread_current_ptr             // Pickup address of current thread pointer
+    STR     r1, [r0]                                // Clear current thread pointer
+
+    // Return from UsageFault_Handler exception
+    LDR     r0, =0xE000ED04                         // Load ICSR
+    LDR     r1, =0x10000000                         // Set PENDSVSET bit
+    STR     r1, [r0]                                // Store ICSR
+    DSB                                             // Wait for memory access to complete
+    CPSIE   i                                       // Enable interrupts
+    BX      lr                                      // Return from exception
+
+
+
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  __tx_NMIHandler
+    .thumb_func
+.type __tx_NMIHandler, function
+__tx_NMIHandler:
+    B       __tx_NMIHandler
+
+
+    .section .text
+    .balign 4
+    .syntax unified
+    .eabi_attribute Tag_ABI_align_preserved, 1
+    .global  __tx_DBGHandler
+    .thumb_func
+.type __tx_DBGHandler, function
+__tx_DBGHandler:
+    B       __tx_DBGHandler
+
+    .end

ports/cortex_m33/ac6/src/tx_misra.S

@@ -0,0 +1,719 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   ThreadX MISRA Compliance                                            */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        #define SHT_PROGBITS 0x1
+
+        .global __aeabi_memset
+        .global _tx_thread_current_ptr
+        .global _tx_thread_interrupt_disable
+        .global _tx_thread_interrupt_restore
+        .global _tx_thread_stack_analyze
+        .global _tx_thread_stack_error_handler
+        .global _tx_thread_system_state
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_trace_buffer_current_ptr
+        .global _tx_trace_buffer_end_ptr
+        .global _tx_trace_buffer_start_ptr
+        .global _tx_trace_event_enable_bits
+        .global _tx_trace_full_notify_function
+        .global _tx_trace_header_ptr
+#endif
+
+        .global _tx_misra_always_true
+        .global _tx_misra_block_pool_to_uchar_pointer_convert
+        .global _tx_misra_byte_pool_to_uchar_pointer_convert
+        .global _tx_misra_char_to_uchar_pointer_convert
+        .global _tx_misra_const_char_to_char_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_entry_to_uchar_pointer_convert
+#endif
+        .global _tx_misra_indirect_void_to_uchar_pointer_convert
+        .global _tx_misra_memset
+        .global _tx_misra_message_copy
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_object_to_uchar_pointer_convert
+#endif
+        .global _tx_misra_pointer_to_ulong_convert
+        .global _tx_misra_status_get
+        .global _tx_misra_thread_stack_check
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_time_stamp_get
+#endif
+        .global _tx_misra_timer_indirect_to_void_pointer_convert
+        .global _tx_misra_timer_pointer_add
+        .global _tx_misra_timer_pointer_dif
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_trace_event_insert
+#endif
+        .global _tx_misra_uchar_pointer_add
+        .global _tx_misra_uchar_pointer_dif
+        .global _tx_misra_uchar_pointer_sub
+        .global _tx_misra_uchar_to_align_type_pointer_convert
+        .global _tx_misra_uchar_to_block_pool_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_uchar_to_entry_pointer_convert
+        .global _tx_misra_uchar_to_header_pointer_convert
+#endif
+        .global _tx_misra_uchar_to_indirect_byte_pool_pointer_convert
+        .global _tx_misra_uchar_to_indirect_uchar_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_uchar_to_object_pointer_convert
+#endif
+        .global _tx_misra_uchar_to_void_pointer_convert
+        .global _tx_misra_ulong_pointer_add
+        .global _tx_misra_ulong_pointer_dif
+        .global _tx_misra_ulong_pointer_sub
+        .global _tx_misra_ulong_to_pointer_convert
+        .global _tx_misra_ulong_to_thread_pointer_convert
+        .global _tx_misra_user_timer_pointer_get
+        .global _tx_misra_void_to_block_pool_pointer_convert
+        .global _tx_misra_void_to_byte_pool_pointer_convert
+        .global _tx_misra_void_to_event_flags_pointer_convert
+        .global _tx_misra_void_to_indirect_uchar_pointer_convert
+        .global _tx_misra_void_to_mutex_pointer_convert
+        .global _tx_misra_void_to_queue_pointer_convert
+        .global _tx_misra_void_to_semaphore_pointer_convert
+        .global _tx_misra_void_to_thread_pointer_convert
+        .global _tx_misra_void_to_uchar_pointer_convert
+        .global _tx_misra_void_to_ulong_pointer_convert
+        .global _tx_misra_ipsr_get
+        .global _tx_misra_control_get
+        .global _tx_misra_control_set
+#ifdef __ARM_FP
+        .global _tx_misra_fpccr_get
+        .global _tx_misra_vfp_touch
+#endif
+
+        .global _tx_misra_event_flags_group_not_used
+        .global _tx_misra_event_flags_set_notify_not_used
+        .global _tx_misra_queue_not_used
+        .global _tx_misra_queue_send_notify_not_used
+        .global _tx_misra_semaphore_not_used
+        .global _tx_misra_semaphore_put_notify_not_used
+        .global _tx_misra_thread_entry_exit_notify_not_used
+        .global _tx_misra_thread_not_used
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_memset(VOID *ptr, UINT value, UINT size);            */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .align 4
+        .syntax unified
+        .thumb_func
+_tx_misra_memset:
+        PUSH     {R4,LR}
+        MOVS     R4,R0
+        MOVS     R0,R2
+        MOVS     R2,R1
+        MOVS     R1,R0
+        MOVS     R0,R4
+        BL       __aeabi_memset
+        POP      {R4,PC}          // return
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UCHAR  *_tx_misra_uchar_pointer_add(UCHAR *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_add:
+        ADD      R0,R0,R1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UCHAR  *_tx_misra_uchar_pointer_sub(UCHAR *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_sub:
+        RSBS     R1,R1,#+0
+        ADD      R0,R0,R1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_uchar_pointer_dif(UCHAR *ptr1, UCHAR *ptr2);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_dif:
+        SUBS     R0,R0,R1
+        BX       LR               // return
+
+
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
+/**                                                                                                                                 */
+/**  This single function serves all of the below prototypes.                                                                       */
+/**                                                                                                                                 */
+/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                                                                          */
+/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);                                                                        */
+/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);                                                  */
+/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);                                                    */
+/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);                                                    */
+/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);                                                   */
+/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);                                                                */
+/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);                                                  */
+/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);                                                      */
+/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);                                                     */
+/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);                                                      */
+/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);                                                    */
+/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);                                         */
+/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);                                           */
+/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);                                                                */
+/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);                                                             */
+/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);                                                             */
+/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);                                                     */
+/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);                                                                */
+/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);                                                            */
+/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);                                          */
+/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);                                                      */
+/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);                                                           */
+/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);                                             */
+/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);                                             */
+/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);                                                   */
+/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);                                              */
+/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);                                              */
+/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                                                                */
+/**  VOID    _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr);                                                 */
+/**  VOID    _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr));          */
+/**  VOID    _tx_misra_queue_not_used(TX_QUEUE *queue_ptr);                                                                         */
+/**  VOID    _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr));                           */
+/**  VOID    _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr);                                                             */
+/**  VOID    _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr));             */
+/**  VOID    _tx_misra_thread_not_used(TX_THREAD *thread_ptr);                                                                      */
+/**  VOID    _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id));  */
+/**                                                                                                                                 */
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
+        .text
+        .thumb_func
+_tx_misra_pointer_to_ulong_convert:
+_tx_misra_ulong_to_pointer_convert:
+_tx_misra_indirect_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_indirect_uchar_pointer_convert:
+_tx_misra_block_pool_to_uchar_pointer_convert:
+_tx_misra_void_to_block_pool_pointer_convert:
+_tx_misra_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_block_pool_pointer_convert:
+_tx_misra_void_to_indirect_uchar_pointer_convert:
+_tx_misra_void_to_byte_pool_pointer_convert:
+_tx_misra_byte_pool_to_uchar_pointer_convert:
+_tx_misra_uchar_to_align_type_pointer_convert:
+_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
+_tx_misra_void_to_event_flags_pointer_convert:
+_tx_misra_void_to_ulong_pointer_convert:
+_tx_misra_void_to_mutex_pointer_convert:
+_tx_misra_void_to_queue_pointer_convert:
+_tx_misra_void_to_semaphore_pointer_convert:
+_tx_misra_uchar_to_void_pointer_convert:
+_tx_misra_ulong_to_thread_pointer_convert:
+_tx_misra_timer_indirect_to_void_pointer_convert:
+_tx_misra_const_char_to_char_pointer_convert:
+_tx_misra_void_to_thread_pointer_convert:
+#ifdef TX_ENABLE_EVENT_TRACE
+_tx_misra_object_to_uchar_pointer_convert:
+_tx_misra_uchar_to_object_pointer_convert:
+_tx_misra_uchar_to_header_pointer_convert:
+_tx_misra_uchar_to_entry_pointer_convert:
+_tx_misra_entry_to_uchar_pointer_convert:
+#endif
+_tx_misra_char_to_uchar_pointer_convert:
+_tx_misra_event_flags_group_not_used:
+_tx_misra_event_flags_set_notify_not_used:
+_tx_misra_queue_not_used:
+_tx_misra_queue_send_notify_not_used:
+_tx_misra_semaphore_not_used:
+_tx_misra_semaphore_put_notify_not_used:
+_tx_misra_thread_entry_exit_notify_not_used:
+_tx_misra_thread_not_used:
+
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  *_tx_misra_ulong_pointer_add(ULONG *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_add:
+        ADD      R0,R0,R1, LSL #+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  *_tx_misra_ulong_pointer_sub(ULONG *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_sub:
+        MVNS     R2,#+3
+        MULS     R1,R2,R1
+        ADD      R0,R0,R1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_ulong_pointer_dif(ULONG *ptr1, ULONG *ptr2);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_dif:
+        SUBS     R0,R0,R1
+        ASRS     R0,R0,#+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_message_copy(ULONG **source, ULONG **destination,    */
+/**                                                           UINT size); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_message_copy:
+        PUSH     {R4,R5}
+        LDR      R3,[R0, #+0]
+        LDR      R4,[R1, #+0]
+        LDR      R5,[R3, #+0]
+        STR      R5,[R4, #+0]
+        ADDS     R4,R4,#+4
+        ADDS     R3,R3,#+4
+        CMP      R2,#+2
+        BCC.N    _tx_misra_message_copy_0
+        SUBS     R2,R2,#+1
+        B.N      _tx_misra_message_copy_1
+_tx_misra_message_copy_2:
+        LDR      R5,[R3, #+0]
+        STR      R5,[R4, #+0]
+        ADDS     R4,R4,#+4
+        ADDS     R3,R3,#+4
+        SUBS     R2,R2,#+1
+_tx_misra_message_copy_1:
+        CMP      R2,#+0
+        BNE.N    _tx_misra_message_copy_2
+_tx_misra_message_copy_0:
+        STR      R3,[R0, #+0]
+        STR      R4,[R1, #+0]
+        POP      {R4,R5}
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_timer_pointer_dif(TX_TIMER_INTERNAL **ptr1,         */
+/**                                           TX_TIMER_INTERNAL **ptr2);  */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_timer_pointer_dif:
+        SUBS     R0,R0,R1
+        ASRS     R0,R0,#+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  TX_TIMER_INTERNAL **_tx_misra_timer_pointer_add(TX_TIMER_INTERNAL    */
+/**                                                  **ptr1, ULONG size); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_timer_pointer_add:
+        ADD      R0,R0,R1, LSL #+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_user_timer_pointer_get(TX_TIMER_INTERNAL             */
+/**                              *internal_timer, TX_TIMER **user_timer); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_user_timer_pointer_get:
+        SUBS    R0,#8
+        STR     R0,[R1, #+0]
+        BX      LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_thread_stack_check(TX_THREAD *thread_ptr,            */
+/**                                              VOID **highest_stack);   */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_thread_stack_check:
+        PUSH     {R3-R5,LR}
+        MOVS     R4,R0
+        MOVS     R5,R1
+        BL       _tx_thread_interrupt_disable
+        CMP      R4,#+0
+        BEQ.N    _tx_misra_thread_stack_check_0
+        LDR      R1,[R4, #+0]
+        LDR      R2,=0x54485244
+        CMP      R1,R2
+        BNE.N    _tx_misra_thread_stack_check_0
+        LDR      R1,[R4, #+8]
+        LDR      R2,[R5, #+0]
+        CMP      R1,R2
+        BCS.N    _tx_misra_thread_stack_check_1
+        LDR      R1,[R4, #+8]
+        STR      R1,[R5, #+0]
+_tx_misra_thread_stack_check_1:
+        LDR      R1,[R4, #+12]
+        LDR      R1,[R1, #+0]
+        CMP      R1,#-269488145
+        BNE.N    _tx_misra_thread_stack_check_2
+        LDR      R1,[R4, #+16]
+        LDR      R1,[R1, #+1]
+        CMP      R1,#-269488145
+        BNE.N    _tx_misra_thread_stack_check_2
+        LDR      R1,[R5, #+0]
+        LDR      R2,[R4, #+12]
+        CMP      R1,R2
+        BCS.N    _tx_misra_thread_stack_check_3
+_tx_misra_thread_stack_check_2:
+        BL       _tx_thread_interrupt_restore
+        MOVS     R0,R4
+        BL       _tx_thread_stack_error_handler
+        BL       _tx_thread_interrupt_disable
+_tx_misra_thread_stack_check_3:
+        LDR      R1,[R5, #+0]
+        LDR      R1,[R1, #-4]
+        CMP      R1,#-269488145
+        BEQ.N    _tx_misra_thread_stack_check_0
+        BL       _tx_thread_interrupt_restore
+        MOVS     R0,R4
+        BL       _tx_thread_stack_analyze
+        BL       _tx_thread_interrupt_disable
+_tx_misra_thread_stack_check_0:
+        BL       _tx_thread_interrupt_restore
+        POP      {R0,R4,R5,PC}    // return
+
+#ifdef TX_ENABLE_EVENT_TRACE
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_trace_event_insert(ULONG event_id,                   */
+/**           VOID *info_field_1, ULONG info_field_2, ULONG info_field_3, */
+/**           ULONG info_field_4, ULONG filter, ULONG time_stamp);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_trace_event_insert:
+        PUSH     {R3-R7,LR}
+        LDR.N    R4,DataTable2_1
+        LDR      R4,[R4, #+0]
+        CMP      R4,#+0
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R5,DataTable2_2
+        LDR      R5,[R5, #+0]
+        LDR      R6,[SP, #+28]
+        TST      R5,R6
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R5,DataTable2_3
+        LDR      R5,[R5, #+0]
+        LDR.N    R6,DataTable2_4
+        LDR      R6,[R6, #+0]
+        CMP      R5,#+0
+        BNE.N    _tx_misra_trace_event_insert_1
+        LDR      R5,[R6, #+44]
+        LDR      R7,[R6, #+60]
+        LSLS     R7,R7,#+16
+        ORRS     R7,R7,#0x80000000
+        ORRS     R5,R7,R5
+        B.N      _tx_misra_trace_event_insert_2
+_tx_misra_trace_event_insert_1:
+        CMP      R5,#-252645136
+        BCS.N    _tx_misra_trace_event_insert_3
+        MOVS     R5,R6
+        MOVS     R6,#-1
+        B.N      _tx_misra_trace_event_insert_2
+_tx_misra_trace_event_insert_3:
+        MOVS     R6,#-252645136
+        MOVS     R5,#+0
+_tx_misra_trace_event_insert_2:
+        STR      R6,[R4, #+0]
+        STR      R5,[R4, #+4]
+        STR      R0,[R4, #+8]
+        LDR      R0,[SP, #+32]
+        STR      R0,[R4, #+12]
+        STR      R1,[R4, #+16]
+        STR      R2,[R4, #+20]
+        STR      R3,[R4, #+24]
+        LDR      R0,[SP, #+24]
+        STR      R0,[R4, #+28]
+        ADDS     R4,R4,#+32
+        LDR.N    R0,DataTable2_5
+        LDR      R0,[R0, #+0]
+        CMP      R4,R0
+        BCC.N    _tx_misra_trace_event_insert_4
+        LDR.N    R0,DataTable2_6
+        LDR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_1
+        STR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        STR      R4,[R0, #+32]
+        LDR.N    R0,DataTable2_8
+        LDR      R0,[R0, #+0]
+        CMP      R0,#+0
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        LDR.N    R1,DataTable2_8
+        LDR      R1,[R1, #+0]
+        BLX      R1
+        B.N      _tx_misra_trace_event_insert_0
+_tx_misra_trace_event_insert_4:
+        LDR.N    R0,DataTable2_1
+        STR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        STR      R4,[R0, #+32]
+_tx_misra_trace_event_insert_0:
+        POP      {R0,R4-R7,PC}    // return
+
+
+        .data
+DataTable2_1:
+        .word     _tx_trace_buffer_current_ptr
+
+        .data
+DataTable2_2:
+        .word     _tx_trace_event_enable_bits
+
+        .data
+DataTable2_5:
+        .word     _tx_trace_buffer_end_ptr
+
+        .data
+DataTable2_6:
+        .word     _tx_trace_buffer_start_ptr
+
+        .data
+DataTable2_7:
+        .word     _tx_trace_header_ptr
+
+        .data
+DataTable2_8:
+        .word     _tx_trace_full_notify_function
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_time_stamp_get(VOID);                               */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_time_stamp_get:
+        MOVS     R0,#+0
+        BX       LR               // return
+
+#endif
+
+        .data
+DataTable2_3:
+        .word     _tx_thread_system_state
+
+        .data
+DataTable2_4:
+        .word     _tx_thread_current_ptr
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UINT  _tx_misra_always_true(void);                                   */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_always_true:
+        MOVS     R0,#+1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UINT  _tx_misra_status_get(UINT status);                             */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_status_get:
+        MOVS     R0,#+0
+        BX       LR               // return
+
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_ipsr_get(void);                                                          */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ipsr_get:
+        MRS      R0, IPSR
+        BX       LR               // return
+
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_control_get(void);                                                       */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_control_get:
+        MRS      R0, CONTROL
+        BX       LR               // return
+
+        
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  void   _tx_misra_control_set(ULONG value);                                                */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_control_set:
+        MSR      CONTROL, R0
+        BX       LR               // return
+
+        
+#ifdef __ARM_FP
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_fpccr_get(void);                                                         */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_fpccr_get:
+        LDR      r0, =0xE000EF34  // Build FPCCR address
+        LDR      r0, [r0]         // Load FPCCR value
+        BX       LR               // return
+        
+        
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  void   _tx_misra_vfp_touch(void);                                                         */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_vfp_touch:
+        vmov.f32 s0, s0
+        BX       LR               // return
+        
+#endif
+        
+
+        .data
+        .word 0

ports/cortex_m33/ac6/src/tx_thread_secure_stack.c

@@ -219,7 +219,7 @@ TX_INTERRUPT_SAVE_AREA
 UINT    status;
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
 UCHAR   *stack_mem;
-INT      secure_context_index;
+INT     secure_context_index;
 
     status = TX_SUCCESS;
 
@@ -241,7 +241,6 @@ INT      secure_context_index;
 
     else
     {
-
         TX_DISABLE
 
         /* Allocate free index for secure stack info. */

ports/cortex_m33/ac6/src/tx_thread_secure_stack_initialize.S

@@ -26,7 +26,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_stack_initialize                Cortex-M33/AC6    */
-/*                                                           6.1.7        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -49,13 +49,17 @@
 /*                                                                        */
 /*  CALLED BY                                                             */
 /*                                                                        */
-/*    TX_INITIALIZE_KERNEL_ENTER_EXTENSION                                */
+/*    TX_PORT_SPECIFIC_PRE_INITIALIZATION                                 */
 /*                                                                        */
 /*  RELEASE HISTORY                                                       */
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
 /*  06-02-2021      Scott Larson            Initial Version 6.1.7         */
+/*  07-29-2022      Scott Larson            Modified comments and changed */
+/*                                            secure stack initialization */
+/*                                            macro to port-specific,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 // VOID   _tx_thread_secure_stack_initialize(VOID)

ports/cortex_m33/gnu/CMakeLists.txt

@@ -0,0 +1,21 @@
+target_sources(${PROJECT_NAME} PRIVATE
+    ${CMAKE_CURRENT_LIST_DIR}/src/txe_thread_secure_stack_allocate.c
+    ${CMAKE_CURRENT_LIST_DIR}/src/txe_thread_secure_stack_free.c
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_initialize_low_level.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_restore.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_save.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_control.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_disable.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_restore.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_schedule.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack.c
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack_allocate.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack_free.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_stack_build.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_system_return.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_timer_interrupt.S
+)
+
+target_include_directories(${PROJECT_NAME} PUBLIC
+    inc
+)

ports/cortex_m33/gnu/inc/tx_port.h

@@ -25,8 +25,8 @@
 /*                                                                        */
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
-/*    tx_port.h                                          Cortex-M33       */
-/*                                                           6.1.11       */
+/*    tx_port.h                                         Cortex-M33/GNU    */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -61,16 +61,21 @@
 /*                                            added symbol to enable      */
 /*                                            stack error handler,        */
 /*                                            resulting in version 6.1.7  */
-/*  10-15-2021     Scott Larson             Modified comment(s), improved */
+/*  10-15-2021      Scott Larson            Modified comment(s), improved */
 /*                                            stack check error handling, */
 /*                                            resulting in version 6.1.9  */
-/*  01-31-2022     Scott Larson             Modified comment(s), unified  */
+/*  01-31-2022      Scott Larson            Modified comment(s), unified  */
 /*                                            this file across compilers, */
 /*                                            fixed predefined macro,     */
 /*                                            resulting in version 6.1.10 */
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and changed */
+/*                                            secure stack initialization */
+/*                                            macro to port-specific,     */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -188,6 +193,12 @@ UINT    _tx_thread_secure_stack_free(struct TX_THREAD_STRUCT *tx_thread);
 #define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
 
 /* Define various constants for the ThreadX Cortex-M port.  */
 
@@ -524,7 +535,7 @@ ULONG   _tx_misra_ipsr_get(VOID);
 #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
 /* Initialize secure stacks for threads calling secure functions. */
 extern void    _tx_thread_secure_stack_initialize(void);
-#define TX_INITIALIZE_KERNEL_ENTER_EXTENSION            _tx_thread_secure_stack_initialize();
+#define TX_PORT_SPECIFIC_PRE_INITIALIZATION             _tx_thread_secure_stack_initialize();
 #endif
 
 /* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to
@@ -637,7 +648,7 @@ VOID                                            _tx_thread_interrupt_restore(UIN
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33 Version 6.1.10 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33/GNU Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m33/gnu/src/tx_misra.S

@@ -0,0 +1,719 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   ThreadX MISRA Compliance                                            */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        #define SHT_PROGBITS 0x1
+
+        .global __aeabi_memset
+        .global _tx_thread_current_ptr
+        .global _tx_thread_interrupt_disable
+        .global _tx_thread_interrupt_restore
+        .global _tx_thread_stack_analyze
+        .global _tx_thread_stack_error_handler
+        .global _tx_thread_system_state
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_trace_buffer_current_ptr
+        .global _tx_trace_buffer_end_ptr
+        .global _tx_trace_buffer_start_ptr
+        .global _tx_trace_event_enable_bits
+        .global _tx_trace_full_notify_function
+        .global _tx_trace_header_ptr
+#endif
+
+        .global _tx_misra_always_true
+        .global _tx_misra_block_pool_to_uchar_pointer_convert
+        .global _tx_misra_byte_pool_to_uchar_pointer_convert
+        .global _tx_misra_char_to_uchar_pointer_convert
+        .global _tx_misra_const_char_to_char_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_entry_to_uchar_pointer_convert
+#endif
+        .global _tx_misra_indirect_void_to_uchar_pointer_convert
+        .global _tx_misra_memset
+        .global _tx_misra_message_copy
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_object_to_uchar_pointer_convert
+#endif
+        .global _tx_misra_pointer_to_ulong_convert
+        .global _tx_misra_status_get
+        .global _tx_misra_thread_stack_check
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_time_stamp_get
+#endif
+        .global _tx_misra_timer_indirect_to_void_pointer_convert
+        .global _tx_misra_timer_pointer_add
+        .global _tx_misra_timer_pointer_dif
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_trace_event_insert
+#endif
+        .global _tx_misra_uchar_pointer_add
+        .global _tx_misra_uchar_pointer_dif
+        .global _tx_misra_uchar_pointer_sub
+        .global _tx_misra_uchar_to_align_type_pointer_convert
+        .global _tx_misra_uchar_to_block_pool_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_uchar_to_entry_pointer_convert
+        .global _tx_misra_uchar_to_header_pointer_convert
+#endif
+        .global _tx_misra_uchar_to_indirect_byte_pool_pointer_convert
+        .global _tx_misra_uchar_to_indirect_uchar_pointer_convert
+#ifdef TX_ENABLE_EVENT_TRACE
+        .global _tx_misra_uchar_to_object_pointer_convert
+#endif
+        .global _tx_misra_uchar_to_void_pointer_convert
+        .global _tx_misra_ulong_pointer_add
+        .global _tx_misra_ulong_pointer_dif
+        .global _tx_misra_ulong_pointer_sub
+        .global _tx_misra_ulong_to_pointer_convert
+        .global _tx_misra_ulong_to_thread_pointer_convert
+        .global _tx_misra_user_timer_pointer_get
+        .global _tx_misra_void_to_block_pool_pointer_convert
+        .global _tx_misra_void_to_byte_pool_pointer_convert
+        .global _tx_misra_void_to_event_flags_pointer_convert
+        .global _tx_misra_void_to_indirect_uchar_pointer_convert
+        .global _tx_misra_void_to_mutex_pointer_convert
+        .global _tx_misra_void_to_queue_pointer_convert
+        .global _tx_misra_void_to_semaphore_pointer_convert
+        .global _tx_misra_void_to_thread_pointer_convert
+        .global _tx_misra_void_to_uchar_pointer_convert
+        .global _tx_misra_void_to_ulong_pointer_convert
+        .global _tx_misra_ipsr_get
+        .global _tx_misra_control_get
+        .global _tx_misra_control_set
+#ifdef __ARM_FP
+        .global _tx_misra_fpccr_get
+        .global _tx_misra_vfp_touch
+#endif
+
+        .global _tx_misra_event_flags_group_not_used
+        .global _tx_misra_event_flags_set_notify_not_used
+        .global _tx_misra_queue_not_used
+        .global _tx_misra_queue_send_notify_not_used
+        .global _tx_misra_semaphore_not_used
+        .global _tx_misra_semaphore_put_notify_not_used
+        .global _tx_misra_thread_entry_exit_notify_not_used
+        .global _tx_misra_thread_not_used
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_memset(VOID *ptr, UINT value, UINT size);            */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .align 4
+        .syntax unified
+        .thumb_func
+_tx_misra_memset:
+        PUSH     {R4,LR}
+        MOVS     R4,R0
+        MOVS     R0,R2
+        MOVS     R2,R1
+        MOVS     R1,R0
+        MOVS     R0,R4
+        BL       __aeabi_memset
+        POP      {R4,PC}          // return
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UCHAR  *_tx_misra_uchar_pointer_add(UCHAR *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_add:
+        ADD      R0,R0,R1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UCHAR  *_tx_misra_uchar_pointer_sub(UCHAR *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_sub:
+        RSBS     R1,R1,#+0
+        ADD      R0,R0,R1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_uchar_pointer_dif(UCHAR *ptr1, UCHAR *ptr2);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_uchar_pointer_dif:
+        SUBS     R0,R0,R1
+        BX       LR               // return
+
+
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
+/**                                                                                                                                 */
+/**  This single function serves all of the below prototypes.                                                                       */
+/**                                                                                                                                 */
+/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                                                                          */
+/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);                                                                        */
+/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);                                                  */
+/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);                                                    */
+/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);                                                    */
+/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);                                                   */
+/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);                                                                */
+/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);                                                  */
+/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);                                                      */
+/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);                                                     */
+/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);                                                      */
+/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);                                                    */
+/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);                                         */
+/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);                                           */
+/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);                                                                */
+/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);                                                             */
+/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);                                                             */
+/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);                                                     */
+/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);                                                                */
+/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);                                                            */
+/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);                                          */
+/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);                                                      */
+/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);                                                           */
+/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);                                             */
+/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);                                             */
+/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);                                                   */
+/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);                                              */
+/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);                                              */
+/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                                                                */
+/**  VOID    _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr);                                                 */
+/**  VOID    _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr));          */
+/**  VOID    _tx_misra_queue_not_used(TX_QUEUE *queue_ptr);                                                                         */
+/**  VOID    _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr));                           */
+/**  VOID    _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr);                                                             */
+/**  VOID    _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr));             */
+/**  VOID    _tx_misra_thread_not_used(TX_THREAD *thread_ptr);                                                                      */
+/**  VOID    _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id));  */
+/**                                                                                                                                 */
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
+        .text
+        .thumb_func
+_tx_misra_pointer_to_ulong_convert:
+_tx_misra_ulong_to_pointer_convert:
+_tx_misra_indirect_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_indirect_uchar_pointer_convert:
+_tx_misra_block_pool_to_uchar_pointer_convert:
+_tx_misra_void_to_block_pool_pointer_convert:
+_tx_misra_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_block_pool_pointer_convert:
+_tx_misra_void_to_indirect_uchar_pointer_convert:
+_tx_misra_void_to_byte_pool_pointer_convert:
+_tx_misra_byte_pool_to_uchar_pointer_convert:
+_tx_misra_uchar_to_align_type_pointer_convert:
+_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
+_tx_misra_void_to_event_flags_pointer_convert:
+_tx_misra_void_to_ulong_pointer_convert:
+_tx_misra_void_to_mutex_pointer_convert:
+_tx_misra_void_to_queue_pointer_convert:
+_tx_misra_void_to_semaphore_pointer_convert:
+_tx_misra_uchar_to_void_pointer_convert:
+_tx_misra_ulong_to_thread_pointer_convert:
+_tx_misra_timer_indirect_to_void_pointer_convert:
+_tx_misra_const_char_to_char_pointer_convert:
+_tx_misra_void_to_thread_pointer_convert:
+#ifdef TX_ENABLE_EVENT_TRACE
+_tx_misra_object_to_uchar_pointer_convert:
+_tx_misra_uchar_to_object_pointer_convert:
+_tx_misra_uchar_to_header_pointer_convert:
+_tx_misra_uchar_to_entry_pointer_convert:
+_tx_misra_entry_to_uchar_pointer_convert:
+#endif
+_tx_misra_char_to_uchar_pointer_convert:
+_tx_misra_event_flags_group_not_used:
+_tx_misra_event_flags_set_notify_not_used:
+_tx_misra_queue_not_used:
+_tx_misra_queue_send_notify_not_used:
+_tx_misra_semaphore_not_used:
+_tx_misra_semaphore_put_notify_not_used:
+_tx_misra_thread_entry_exit_notify_not_used:
+_tx_misra_thread_not_used:
+
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  *_tx_misra_ulong_pointer_add(ULONG *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_add:
+        ADD      R0,R0,R1, LSL #+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  *_tx_misra_ulong_pointer_sub(ULONG *ptr, ULONG amount);       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_sub:
+        MVNS     R2,#+3
+        MULS     R1,R2,R1
+        ADD      R0,R0,R1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_ulong_pointer_dif(ULONG *ptr1, ULONG *ptr2);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ulong_pointer_dif:
+        SUBS     R0,R0,R1
+        ASRS     R0,R0,#+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_message_copy(ULONG **source, ULONG **destination,    */
+/**                                                           UINT size); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_message_copy:
+        PUSH     {R4,R5}
+        LDR      R3,[R0, #+0]
+        LDR      R4,[R1, #+0]
+        LDR      R5,[R3, #+0]
+        STR      R5,[R4, #+0]
+        ADDS     R4,R4,#+4
+        ADDS     R3,R3,#+4
+        CMP      R2,#+2
+        BCC.N    _tx_misra_message_copy_0
+        SUBS     R2,R2,#+1
+        B.N      _tx_misra_message_copy_1
+_tx_misra_message_copy_2:
+        LDR      R5,[R3, #+0]
+        STR      R5,[R4, #+0]
+        ADDS     R4,R4,#+4
+        ADDS     R3,R3,#+4
+        SUBS     R2,R2,#+1
+_tx_misra_message_copy_1:
+        CMP      R2,#+0
+        BNE.N    _tx_misra_message_copy_2
+_tx_misra_message_copy_0:
+        STR      R3,[R0, #+0]
+        STR      R4,[R1, #+0]
+        POP      {R4,R5}
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_timer_pointer_dif(TX_TIMER_INTERNAL **ptr1,         */
+/**                                           TX_TIMER_INTERNAL **ptr2);  */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_timer_pointer_dif:
+        SUBS     R0,R0,R1
+        ASRS     R0,R0,#+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  TX_TIMER_INTERNAL **_tx_misra_timer_pointer_add(TX_TIMER_INTERNAL    */
+/**                                                  **ptr1, ULONG size); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_timer_pointer_add:
+        ADD      R0,R0,R1, LSL #+2
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_user_timer_pointer_get(TX_TIMER_INTERNAL             */
+/**                              *internal_timer, TX_TIMER **user_timer); */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_user_timer_pointer_get:
+        SUBS    R0,#8
+        STR     R0,[R1, #+0]
+        BX      LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_thread_stack_check(TX_THREAD *thread_ptr,            */
+/**                                              VOID **highest_stack);   */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_thread_stack_check:
+        PUSH     {R3-R5,LR}
+        MOVS     R4,R0
+        MOVS     R5,R1
+        BL       _tx_thread_interrupt_disable
+        CMP      R4,#+0
+        BEQ.N    _tx_misra_thread_stack_check_0
+        LDR      R1,[R4, #+0]
+        LDR      R2,=0x54485244
+        CMP      R1,R2
+        BNE.N    _tx_misra_thread_stack_check_0
+        LDR      R1,[R4, #+8]
+        LDR      R2,[R5, #+0]
+        CMP      R1,R2
+        BCS.N    _tx_misra_thread_stack_check_1
+        LDR      R1,[R4, #+8]
+        STR      R1,[R5, #+0]
+_tx_misra_thread_stack_check_1:
+        LDR      R1,[R4, #+12]
+        LDR      R1,[R1, #+0]
+        CMP      R1,#-269488145
+        BNE.N    _tx_misra_thread_stack_check_2
+        LDR      R1,[R4, #+16]
+        LDR      R1,[R1, #+1]
+        CMP      R1,#-269488145
+        BNE.N    _tx_misra_thread_stack_check_2
+        LDR      R1,[R5, #+0]
+        LDR      R2,[R4, #+12]
+        CMP      R1,R2
+        BCS.N    _tx_misra_thread_stack_check_3
+_tx_misra_thread_stack_check_2:
+        BL       _tx_thread_interrupt_restore
+        MOVS     R0,R4
+        BL       _tx_thread_stack_error_handler
+        BL       _tx_thread_interrupt_disable
+_tx_misra_thread_stack_check_3:
+        LDR      R1,[R5, #+0]
+        LDR      R1,[R1, #-4]
+        CMP      R1,#-269488145
+        BEQ.N    _tx_misra_thread_stack_check_0
+        BL       _tx_thread_interrupt_restore
+        MOVS     R0,R4
+        BL       _tx_thread_stack_analyze
+        BL       _tx_thread_interrupt_disable
+_tx_misra_thread_stack_check_0:
+        BL       _tx_thread_interrupt_restore
+        POP      {R0,R4,R5,PC}    // return
+
+#ifdef TX_ENABLE_EVENT_TRACE
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  VOID  _tx_misra_trace_event_insert(ULONG event_id,                   */
+/**           VOID *info_field_1, ULONG info_field_2, ULONG info_field_3, */
+/**           ULONG info_field_4, ULONG filter, ULONG time_stamp);        */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_trace_event_insert:
+        PUSH     {R3-R7,LR}
+        LDR.N    R4,DataTable2_1
+        LDR      R4,[R4, #+0]
+        CMP      R4,#+0
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R5,DataTable2_2
+        LDR      R5,[R5, #+0]
+        LDR      R6,[SP, #+28]
+        TST      R5,R6
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R5,DataTable2_3
+        LDR      R5,[R5, #+0]
+        LDR.N    R6,DataTable2_4
+        LDR      R6,[R6, #+0]
+        CMP      R5,#+0
+        BNE.N    _tx_misra_trace_event_insert_1
+        LDR      R5,[R6, #+44]
+        LDR      R7,[R6, #+60]
+        LSLS     R7,R7,#+16
+        ORRS     R7,R7,#0x80000000
+        ORRS     R5,R7,R5
+        B.N      _tx_misra_trace_event_insert_2
+_tx_misra_trace_event_insert_1:
+        CMP      R5,#-252645136
+        BCS.N    _tx_misra_trace_event_insert_3
+        MOVS     R5,R6
+        MOVS     R6,#-1
+        B.N      _tx_misra_trace_event_insert_2
+_tx_misra_trace_event_insert_3:
+        MOVS     R6,#-252645136
+        MOVS     R5,#+0
+_tx_misra_trace_event_insert_2:
+        STR      R6,[R4, #+0]
+        STR      R5,[R4, #+4]
+        STR      R0,[R4, #+8]
+        LDR      R0,[SP, #+32]
+        STR      R0,[R4, #+12]
+        STR      R1,[R4, #+16]
+        STR      R2,[R4, #+20]
+        STR      R3,[R4, #+24]
+        LDR      R0,[SP, #+24]
+        STR      R0,[R4, #+28]
+        ADDS     R4,R4,#+32
+        LDR.N    R0,DataTable2_5
+        LDR      R0,[R0, #+0]
+        CMP      R4,R0
+        BCC.N    _tx_misra_trace_event_insert_4
+        LDR.N    R0,DataTable2_6
+        LDR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_1
+        STR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        STR      R4,[R0, #+32]
+        LDR.N    R0,DataTable2_8
+        LDR      R0,[R0, #+0]
+        CMP      R0,#+0
+        BEQ.N    _tx_misra_trace_event_insert_0
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        LDR.N    R1,DataTable2_8
+        LDR      R1,[R1, #+0]
+        BLX      R1
+        B.N      _tx_misra_trace_event_insert_0
+_tx_misra_trace_event_insert_4:
+        LDR.N    R0,DataTable2_1
+        STR      R4,[R0, #+0]
+        LDR.N    R0,DataTable2_7
+        LDR      R0,[R0, #+0]
+        STR      R4,[R0, #+32]
+_tx_misra_trace_event_insert_0:
+        POP      {R0,R4-R7,PC}    // return
+
+
+        .data
+DataTable2_1:
+        .word     _tx_trace_buffer_current_ptr
+
+        .data
+DataTable2_2:
+        .word     _tx_trace_event_enable_bits
+
+        .data
+DataTable2_5:
+        .word     _tx_trace_buffer_end_ptr
+
+        .data
+DataTable2_6:
+        .word     _tx_trace_buffer_start_ptr
+
+        .data
+DataTable2_7:
+        .word     _tx_trace_header_ptr
+
+        .data
+DataTable2_8:
+        .word     _tx_trace_full_notify_function
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  ULONG  _tx_misra_time_stamp_get(VOID);                               */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_time_stamp_get:
+        MOVS     R0,#+0
+        BX       LR               // return
+
+#endif
+
+        .data
+DataTable2_3:
+        .word     _tx_thread_system_state
+
+        .data
+DataTable2_4:
+        .word     _tx_thread_current_ptr
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UINT  _tx_misra_always_true(void);                                   */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_always_true:
+        MOVS     R0,#+1
+        BX       LR               // return
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/**  UINT  _tx_misra_status_get(UINT status);                             */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_status_get:
+        MOVS     R0,#+0
+        BX       LR               // return
+
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_ipsr_get(void);                                                          */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_ipsr_get:
+        MRS      R0, IPSR
+        BX       LR               // return
+
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_control_get(void);                                                       */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_control_get:
+        MRS      R0, CONTROL
+        BX       LR               // return
+
+        
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  void   _tx_misra_control_set(ULONG value);                                                */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_control_set:
+        MSR      CONTROL, R0
+        BX       LR               // return
+
+        
+#ifdef __ARM_FP
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_fpccr_get(void);                                                         */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_fpccr_get:
+        LDR      r0, =0xE000EF34  // Build FPCCR address
+        LDR      r0, [r0]         // Load FPCCR value
+        BX       LR               // return
+        
+        
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  void   _tx_misra_vfp_touch(void);                                                         */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        .text
+        .thumb_func
+_tx_misra_vfp_touch:
+        vmov.f32 s0, s0
+        BX       LR               // return
+        
+#endif
+        
+
+        .data
+        .word 0

ports/cortex_m33/gnu/src/tx_thread_secure_stack.c

@@ -167,7 +167,7 @@ INT     index;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_mode_stack_allocate             Cortex-M33/GNU    */
-/*                                                           6.1.10       */
+/*                                                           6.1.11a      */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -207,11 +207,15 @@ INT     index;
 /*  01-31-2022      Himanshu Gupta          Modified comments(s), updated */
 /*                                            secure stack allocation,    */
 /*                                            resulting in version 6.1.10 */
+/*  05-02-2022      Scott Larson            Modified comment(s), added    */
+/*                                            TX_INTERRUPT_SAVE_AREA,     */
+/*                                            resulting in version 6.1.11a*/
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
 UINT    _tx_thread_secure_mode_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size)
 {
+TX_INTERRUPT_SAVE_AREA
 UINT    status;
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
 UCHAR   *stack_mem;

ports/cortex_m33/gnu/src/tx_thread_secure_stack_initialize.S

@@ -26,7 +26,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_stack_initialize                Cortex-M33/GNU    */
-/*                                                           6.1.7        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -49,13 +49,17 @@
 /*                                                                        */
 /*  CALLED BY                                                             */
 /*                                                                        */
-/*    TX_INITIALIZE_KERNEL_ENTER_EXTENSION                                */
+/*    TX_PORT_SPECIFIC_PRE_INITIALIZATION                                 */
 /*                                                                        */
 /*  RELEASE HISTORY                                                       */
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
 /*  06-02-2021      Scott Larson            Initial Version 6.1.7         */
+/*  07-29-2022      Scott Larson            Modified comments and changed */
+/*                                            secure stack initialization */
+/*                                            macro to port-specific,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 // VOID   _tx_thread_secure_stack_initialize(VOID)

ports/cortex_m33/iar/inc/tx_port.h

@@ -25,8 +25,8 @@
 /*                                                                        */
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
-/*    tx_port.h                                          Cortex-M33       */
-/*                                                           6.1.11       */
+/*    tx_port.h                                         Cortex-M33/IAR    */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -61,16 +61,21 @@
 /*                                            added symbol to enable      */
 /*                                            stack error handler,        */
 /*                                            resulting in version 6.1.7  */
-/*  10-15-2021     Scott Larson             Modified comment(s), improved */
+/*  10-15-2021      Scott Larson            Modified comment(s), improved */
 /*                                            stack check error handling, */
 /*                                            resulting in version 6.1.9  */
-/*  01-31-2022     Scott Larson             Modified comment(s), unified  */
+/*  01-31-2022      Scott Larson            Modified comment(s), unified  */
 /*                                            this file across compilers, */
 /*                                            fixed predefined macro,     */
 /*                                            resulting in version 6.1.10 */
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and changed */
+/*                                            secure stack initialization */
+/*                                            macro to port-specific,     */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -188,6 +193,12 @@ UINT    _tx_thread_secure_stack_free(struct TX_THREAD_STRUCT *tx_thread);
 #define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
 
 /* Define various constants for the ThreadX Cortex-M port.  */
 
@@ -524,7 +535,7 @@ ULONG   _tx_misra_ipsr_get(VOID);
 #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE)
 /* Initialize secure stacks for threads calling secure functions. */
 extern void    _tx_thread_secure_stack_initialize(void);
-#define TX_INITIALIZE_KERNEL_ENTER_EXTENSION            _tx_thread_secure_stack_initialize();
+#define TX_PORT_SPECIFIC_PRE_INITIALIZATION             _tx_thread_secure_stack_initialize();
 #endif
 
 /* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to
@@ -637,7 +648,7 @@ VOID                                            _tx_thread_interrupt_restore(UIN
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33 Version 6.1.10 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33/IAR Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m33/iar/src/tx_misra.s

@@ -96,8 +96,24 @@
         PUBLIC _tx_misra_void_to_uchar_pointer_convert
         PUBLIC _tx_misra_void_to_ulong_pointer_convert
         PUBLIC _tx_misra_ipsr_get
-        PUBLIC _tx_version_id
+        PUBLIC _tx_misra_control_get
+        PUBLIC _tx_misra_control_set
+#ifdef __ARMVFP__
+        PUBLIC _tx_misra_fpccr_get
+        PUBLIC _tx_misra_vfp_touch
+#endif
 
+        PUBLIC _tx_misra_event_flags_group_not_used
+        PUBLIC _tx_misra_event_flags_set_notify_not_used
+        PUBLIC _tx_misra_queue_not_used
+        PUBLIC _tx_misra_queue_send_notify_not_used
+        PUBLIC _tx_misra_semaphore_not_used
+        PUBLIC _tx_misra_semaphore_put_notify_not_used
+        PUBLIC _tx_misra_thread_entry_exit_notify_not_used
+        PUBLIC _tx_misra_thread_not_used
+
+#ifdef TX_MISRA_ENABLE
+        PUBLIC _tx_version_id
 
         SECTION `.data`:DATA:REORDER:NOROOT(2)
         DATA
@@ -109,11 +125,12 @@ _tx_version_id:
         DC8 45H, 78H, 70H, 72H, 65H, 73H, 73H, 20H
         DC8 4CH, 6FH, 67H, 69H, 63H, 20H, 49H, 6EH
         DC8 63H, 2EH, 20H, 2AH, 20H, 54H, 68H, 72H
-        DC8 65H, 61H, 64H, 58H, 20H, 36H, 2EH, 30H
+        DC8 65H, 61H, 64H, 58H, 20H, 36H, 2EH, 31H
         DC8 20H, 4DH, 49H, 53H, 52H, 41H, 20H, 43H
         DC8 20H, 43H, 6FH, 6DH, 70H, 6CH, 69H, 61H
         DC8 6EH, 74H, 20H, 2AH, 0
         DC8 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+#endif //TX_MISRA_ENABLE
 
 /**************************************************************************/
 /**************************************************************************/
@@ -133,7 +150,7 @@ _tx_misra_memset:
         MOVS     R1,R0
         MOVS     R0,R4
         BL       __aeabi_memset
-        POP      {R4,PC}          ;; return
+        POP      {R4,PC}          // return
 
 /**************************************************************************/
 /**************************************************************************/
@@ -147,7 +164,7 @@ _tx_misra_memset:
         THUMB
 _tx_misra_uchar_pointer_add:
         ADD      R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -163,7 +180,7 @@ _tx_misra_uchar_pointer_add:
 _tx_misra_uchar_pointer_sub:
         RSBS     R1,R1,#+0
         ADD      R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -178,21 +195,97 @@ _tx_misra_uchar_pointer_sub:
         THUMB
 _tx_misra_uchar_pointer_dif:
         SUBS     R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
+/**                                                                                                                                 */
+/**  This single function serves all of the below prototypes.                                                                       */
+/**                                                                                                                                 */
+/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                                                                          */
+/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);                                                                        */
+/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);                                                  */
+/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);                                                    */
+/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);                                                    */
+/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);                                                   */
+/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);                                                                */
+/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);                                                  */
+/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);                                                      */
+/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);                                                     */
+/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);                                                      */
+/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);                                                    */
+/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);                                         */
+/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);                                           */
+/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);                                                                */
+/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);                                                             */
+/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);                                                             */
+/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);                                                     */
+/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);                                                                */
+/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);                                                            */
+/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);                                          */
+/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);                                                      */
+/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);                                                           */
+/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);                                             */
+/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);                                             */
+/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);                                                   */
+/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);                                              */
+/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);                                              */
+/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                                                                */
+/**  VOID    _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr);                                                 */
+/**  VOID    _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr));          */
+/**  VOID    _tx_misra_queue_not_used(TX_QUEUE *queue_ptr);                                                                         */
+/**  VOID    _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr));                           */
+/**  VOID    _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr);                                                             */
+/**  VOID    _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr));             */
+/**  VOID    _tx_misra_thread_not_used(TX_THREAD *thread_ptr);                                                                      */
+/**  VOID    _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id));  */
+/**                                                                                                                                 */
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
         SECTION `.text`:CODE:NOROOT(1)
         THUMB
 _tx_misra_pointer_to_ulong_convert:
-        BX       LR               ;; return
+_tx_misra_ulong_to_pointer_convert:
+_tx_misra_indirect_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_indirect_uchar_pointer_convert:
+_tx_misra_block_pool_to_uchar_pointer_convert:
+_tx_misra_void_to_block_pool_pointer_convert:
+_tx_misra_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_block_pool_pointer_convert:
+_tx_misra_void_to_indirect_uchar_pointer_convert:
+_tx_misra_void_to_byte_pool_pointer_convert:
+_tx_misra_byte_pool_to_uchar_pointer_convert:
+_tx_misra_uchar_to_align_type_pointer_convert:
+_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
+_tx_misra_void_to_event_flags_pointer_convert:
+_tx_misra_void_to_ulong_pointer_convert:
+_tx_misra_void_to_mutex_pointer_convert:
+_tx_misra_void_to_queue_pointer_convert:
+_tx_misra_void_to_semaphore_pointer_convert:
+_tx_misra_uchar_to_void_pointer_convert:
+_tx_misra_ulong_to_thread_pointer_convert:
+_tx_misra_timer_indirect_to_void_pointer_convert:
+_tx_misra_const_char_to_char_pointer_convert:
+_tx_misra_void_to_thread_pointer_convert:
+#ifdef TX_ENABLE_EVENT_TRACE
+_tx_misra_object_to_uchar_pointer_convert:
+_tx_misra_uchar_to_object_pointer_convert:
+_tx_misra_uchar_to_header_pointer_convert:
+_tx_misra_uchar_to_entry_pointer_convert:
+_tx_misra_entry_to_uchar_pointer_convert:
+#endif
+_tx_misra_char_to_uchar_pointer_convert:
+_tx_misra_event_flags_group_not_used:
+_tx_misra_event_flags_set_notify_not_used:
+_tx_misra_queue_not_used:
+_tx_misra_queue_send_notify_not_used:
+_tx_misra_semaphore_not_used:
+_tx_misra_semaphore_put_notify_not_used:
+_tx_misra_thread_entry_exit_notify_not_used:
+_tx_misra_thread_not_used:
+
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -207,7 +300,7 @@ _tx_misra_pointer_to_ulong_convert:
         THUMB
 _tx_misra_ulong_pointer_add:
         ADD      R0,R0,R1, LSL #+2
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -224,7 +317,7 @@ _tx_misra_ulong_pointer_sub:
         MVNS     R2,#+3
         MULS     R1,R2,R1
         ADD      R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -240,21 +333,7 @@ _tx_misra_ulong_pointer_sub:
 _tx_misra_ulong_pointer_dif:
         SUBS     R0,R0,R1
         ASRS     R0,R0,#+2
-        BX       LR               ;; return
-
-
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);              */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_ulong_to_pointer_convert:
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -293,7 +372,7 @@ _tx_misra_message_copy:
         STR      R3,[R0, #+0]
         STR      R4,[R1, #+0]
         POP      {R4,R5}
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -310,7 +389,7 @@ _tx_misra_message_copy:
 _tx_misra_timer_pointer_dif:
         SUBS     R0,R0,R1
         ASRS     R0,R0,#+2
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -326,7 +405,7 @@ _tx_misra_timer_pointer_dif:
         THUMB
 _tx_misra_timer_pointer_add:
         ADD      R0,R0,R1, LSL #+2
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -341,12 +420,9 @@ _tx_misra_timer_pointer_add:
         SECTION `.text`:CODE:NOROOT(1)
         THUMB
 _tx_misra_user_timer_pointer_get:
-        ADDS     R2,R0,#+8
-        SUBS     R2,R2,R0
-        RSBS     R2,R2,#+0
-        ADD      R0,R0,R2
-        STR      R0,[R1, #+0]
-        BX       LR               ;; return
+        SUBS    R0,#8
+        STR     R0,[R1, #+0]
+        BX      LR               // return
 
 
 /**************************************************************************/
@@ -368,7 +444,7 @@ _tx_misra_thread_stack_check:
         CMP      R4,#+0
         BEQ.N    ??_tx_misra_thread_stack_check_0
         LDR      R1,[R4, #+0]
-        LDR.N    R2,??DataTable2  ;; 0x54485244
+        LDR.N    R2,??DataTable2  // 0x54485244
         CMP      R1,R2
         BNE.N    ??_tx_misra_thread_stack_check_0
         LDR      R1,[R4, #+8]
@@ -406,7 +482,7 @@ _tx_misra_thread_stack_check:
         BL       _tx_thread_interrupt_disable
 ??_tx_misra_thread_stack_check_0:
         BL       _tx_thread_interrupt_restore
-        POP      {R0,R4,R5,PC}    ;; return
+        POP      {R0,R4,R5,PC}    // return
 
 #ifdef TX_ENABLE_EVENT_TRACE
 
@@ -494,7 +570,7 @@ _tx_misra_trace_event_insert:
         LDR      R0,[R0, #+0]
         STR      R4,[R0, #+32]
 ??_tx_misra_trace_event_insert_0:
-        POP      {R0,R4-R7,PC}    ;; return
+        POP      {R0,R4-R7,PC}    // return
 
 
         SECTION `.text`:CODE:NOROOT(2)
@@ -546,7 +622,7 @@ _tx_misra_trace_event_insert:
         THUMB
 _tx_misra_time_stamp_get:
         MOVS     R0,#+0
-        BX       LR               ;; return
+        BX       LR               // return
 
 #endif
 
@@ -581,203 +657,7 @@ _tx_misra_time_stamp_get:
         THUMB
 _tx_misra_always_true:
         MOVS     R0,#+1
-        BX       LR               ;; return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);        */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_indirect_void_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);       */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_indirect_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/***********************************************************************************/
-/***********************************************************************************/
-/**                                                                                */
-/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);   */
-/**                                                                                */
-/***********************************************************************************/
-/***********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_block_pool_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_block_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/************************************************************************************/
-/************************************************************************************/
-/**                                                                                 */
-/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);  */
-/**                                                                                 */
-/************************************************************************************/
-/************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_block_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/**************************************************************************************/
-/**************************************************************************************/
-/**                                                                                   */
-/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);        */
-/**                                                                                   */
-/**************************************************************************************/
-/**************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_indirect_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);          */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_byte_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_byte_pool_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);         */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_align_type_pointer_convert:
-        BX       LR               ;; return
-
-
-/****************************************************************************************************/
-/****************************************************************************************************/
-/**                                                                                                 */
-/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);         */
-/**                                                                                                 */
-/****************************************************************************************************/
-/****************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/**************************************************************************************************/
-/**************************************************************************************************/
-/**                                                                                               */
-/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);         */
-/**                                                                                               */
-/**************************************************************************************************/
-/**************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_event_flags_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_ulong_pointer_convert:
-        BX       LR               ;; return
-
-
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_mutex_pointer_convert:
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -792,197 +672,12 @@ _tx_misra_void_to_mutex_pointer_convert:
         THUMB
 _tx_misra_status_get:
         MOVS     R0,#+0
-        BX       LR               ;; return
-
-
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_queue_pointer_convert:
-        BX       LR               ;; return
-
-
-/****************************************************************************************/
-/****************************************************************************************/
-/**                                                                                     */
-/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);         */
-/**                                                                                     */
-/****************************************************************************************/
-/****************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_semaphore_pointer_convert:
-        BX       LR               ;; return
-
-
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);      */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_void_pointer_convert:
-        BX       LR               ;; return
-
-
-/*********************************************************************************/
-/*********************************************************************************/
-/**                                                                              */
-/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);         */
-/**                                                                              */
-/*********************************************************************************/
-/*********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_ulong_to_thread_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************************/
-/***************************************************************************************************/
-/**                                                                                                */
-/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);         */
-/**                                                                                                */
-/***************************************************************************************************/
-/***************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_timer_indirect_to_void_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_const_char_to_char_pointer_convert:
-        BX       LR               ;; return
-
-
-/**********************************************************************************/
-/**********************************************************************************/
-/**                                                                               */
-/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);         */
-/**                                                                               */
-/**********************************************************************************/
-/**********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_thread_pointer_convert:
-        BX       LR               ;; return
-
-
-#ifdef TX_ENABLE_EVENT_TRACE
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_object_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_object_pointer_convert:
-        BX       LR               ;; return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_header_pointer_convert:
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /***********************************************************************************************/
 /***********************************************************************************************/
 /**                                                                                            */
-/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_entry_pointer_convert:
-        BX       LR               ;; return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_entry_to_uchar_pointer_convert:
-        BX       LR               ;; return
-#endif
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                           */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_char_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
 /**  ULONG  _tx_misra_ipsr_get(void);                                                          */
 /**                                                                                            */
 /***********************************************************************************************/
@@ -992,9 +687,74 @@ _tx_misra_char_to_uchar_pointer_convert:
         THUMB
 _tx_misra_ipsr_get:
         MRS      R0, IPSR
-        BX       LR               ;; return
+        BX       LR               // return
 
 
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_control_get(void);                                                       */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        SECTION `.text`:CODE:NOROOT(1)
+        THUMB
+_tx_misra_control_get:
+        MRS      R0, CONTROL
+        BX       LR               // return
+
+        
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  void   _tx_misra_control_set(ULONG value);                                                */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        SECTION `.text`:CODE:NOROOT(1)
+        THUMB
+_tx_misra_control_set:
+        MSR      CONTROL, R0
+        BX       LR               // return
+
+        
+#ifdef __ARMVFP__
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  ULONG  _tx_misra_fpccr_get(void);                                                         */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        SECTION `.text`:CODE:NOROOT(2)
+        THUMB
+_tx_misra_fpccr_get:
+        LDR      r0, =0xE000EF34  // Build FPCCR address
+        LDR      r0, [r0]         // Load FPCCR value
+        BX       LR               // return
+        
+        
+/***********************************************************************************************/
+/***********************************************************************************************/
+/**                                                                                            */
+/**  void   _tx_misra_vfp_touch(void);                                                         */
+/**                                                                                            */
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+        SECTION `.text`:CODE:NOROOT(1)
+        THUMB
+_tx_misra_vfp_touch:
+        vmov.f32 s0, s0
+        BX       LR               // return
+        
+#endif
+        
+        
         SECTION `.iar_vfe_header`:DATA:NOALLOC:NOROOT(2)
         SECTION_TYPE SHT_PROGBITS, 0
         DATA

ports/cortex_m33/iar/src/tx_thread_secure_stack.c

@@ -165,7 +165,7 @@ INT     index;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_mode_stack_allocate             Cortex-M33/IAR    */
-/*                                                           6.1.10       */
+/*                                                           6.1.11a      */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -209,11 +209,15 @@ INT     index;
 /*  01-31-2022      Himanshu Gupta          Modified comments(s), updated */
 /*                                            secure stack allocation,    */
 /*                                            resulting in version 6.1.10 */
+/*  05-02-2022      Scott Larson            Modified comment(s), added    */
+/*                                            TX_INTERRUPT_SAVE_AREA,     */
+/*                                            resulting in version 6.1.11a*/
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
 UINT    _tx_thread_secure_mode_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size)
 {
+TX_INTERRUPT_SAVE_AREA
 UINT    status;
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
 UCHAR   *stack_mem;
@@ -314,7 +318,7 @@ INT     secure_context_index;
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_mode_stack_free                 Cortex-M33/IAR    */
-/*                                                           6.1.10       */
+/*                                                           6.1.11a      */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -352,11 +356,15 @@ INT     secure_context_index;
 /*  01-31-2022      Himanshu Gupta          Modified comments(s), updated */
 /*                                            secure stack allocation,    */
 /*                                            resulting in version 6.1.10 */
+/*  05-02-2022      Scott Larson            Modified comment(s), added    */
+/*                                            TX_INTERRUPT_SAVE_AREA,     */
+/*                                            resulting in version 6.1.11a*/
 /*                                                                        */
 /**************************************************************************/
 __attribute__((cmse_nonsecure_entry))
 UINT    _tx_thread_secure_mode_stack_free(TX_THREAD *thread_ptr)
 {
+TX_INTERRUPT_SAVE_AREA
 UINT    status;
 TX_THREAD_SECURE_STACK_INFO *info_ptr;
 INT     secure_context_index;

ports/cortex_m33/iar/src/tx_thread_secure_stack_initialize.s

@@ -27,7 +27,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_secure_stack_initialize                Cortex-M33/IAR    */
-/*                                                           6.1.7        */
+/*                                                           6.1.12       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -50,13 +50,17 @@
 /*                                                                        */
 /*  CALLED BY                                                             */
 /*                                                                        */
-/*    TX_INITIALIZE_KERNEL_ENTER_EXTENSION                                */
+/*    TX_PORT_SPECIFIC_PRE_INITIALIZATION                                 */
 /*                                                                        */
 /*  RELEASE HISTORY                                                       */
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
 /*  06-02-2021      Scott Larson            Initial Version 6.1.7         */
+/*  07-29-2022      Scott Larson            Modified comments and changed */
+/*                                            secure stack initialization */
+/*                                            macro to port-specific,     */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 // VOID   _tx_thread_secure_stack_initialize(VOID)

ports/cortex_m4/ac5/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                         Cortex-M4/AC5     */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -59,6 +59,9 @@
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and         */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -146,6 +149,12 @@ typedef unsigned short                          USHORT;
 #define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
 
 /* Define various constants for the ThreadX Cortex-M port.  */
 
@@ -707,7 +716,7 @@ void    tx_thread_fpu_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M4/AC5 Version 6.1.11 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M4/AC5 Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m4/ac6/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                         Cortex-M4/AC6     */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -59,6 +59,9 @@
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and         */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -146,6 +149,12 @@ typedef unsigned short                          USHORT;
 #define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
 
 /* Define various constants for the ThreadX Cortex-M port.  */
 
@@ -707,7 +716,7 @@ void    tx_thread_fpu_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M4/AC6 Version 6.1.11 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M4/AC6 Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m4/ac6/src/tx_misra.S

@@ -103,6 +103,14 @@
         .global _tx_misra_vfp_touch
 #endif
 
+        .global _tx_misra_event_flags_group_not_used
+        .global _tx_misra_event_flags_set_notify_not_used
+        .global _tx_misra_queue_not_used
+        .global _tx_misra_queue_send_notify_not_used
+        .global _tx_misra_semaphore_not_used
+        .global _tx_misra_semaphore_put_notify_not_used
+        .global _tx_misra_thread_entry_exit_notify_not_used
+        .global _tx_misra_thread_not_used
 
 /**************************************************************************/
 /**************************************************************************/
@@ -172,17 +180,93 @@ _tx_misra_uchar_pointer_dif:
         BX       LR               // return
 
 
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
+/**                                                                                                                                 */
+/**  This single function serves all of the below prototypes.                                                                       */
+/**                                                                                                                                 */
+/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                                                                          */
+/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);                                                                        */
+/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);                                                  */
+/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);                                                    */
+/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);                                                    */
+/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);                                                   */
+/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);                                                                */
+/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);                                                  */
+/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);                                                      */
+/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);                                                     */
+/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);                                                      */
+/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);                                                    */
+/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);                                         */
+/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);                                           */
+/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);                                                                */
+/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);                                                             */
+/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);                                                             */
+/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);                                                     */
+/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);                                                                */
+/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);                                                            */
+/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);                                          */
+/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);                                                      */
+/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);                                                           */
+/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);                                             */
+/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);                                             */
+/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);                                                   */
+/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);                                              */
+/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);                                              */
+/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                                                                */
+/**  VOID    _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr);                                                 */
+/**  VOID    _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr));          */
+/**  VOID    _tx_misra_queue_not_used(TX_QUEUE *queue_ptr);                                                                         */
+/**  VOID    _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr));                           */
+/**  VOID    _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr);                                                             */
+/**  VOID    _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr));             */
+/**  VOID    _tx_misra_thread_not_used(TX_THREAD *thread_ptr);                                                                      */
+/**  VOID    _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id));  */
+/**                                                                                                                                 */
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
         .text
         .thumb_func
 _tx_misra_pointer_to_ulong_convert:
+_tx_misra_ulong_to_pointer_convert:
+_tx_misra_indirect_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_indirect_uchar_pointer_convert:
+_tx_misra_block_pool_to_uchar_pointer_convert:
+_tx_misra_void_to_block_pool_pointer_convert:
+_tx_misra_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_block_pool_pointer_convert:
+_tx_misra_void_to_indirect_uchar_pointer_convert:
+_tx_misra_void_to_byte_pool_pointer_convert:
+_tx_misra_byte_pool_to_uchar_pointer_convert:
+_tx_misra_uchar_to_align_type_pointer_convert:
+_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
+_tx_misra_void_to_event_flags_pointer_convert:
+_tx_misra_void_to_ulong_pointer_convert:
+_tx_misra_void_to_mutex_pointer_convert:
+_tx_misra_void_to_queue_pointer_convert:
+_tx_misra_void_to_semaphore_pointer_convert:
+_tx_misra_uchar_to_void_pointer_convert:
+_tx_misra_ulong_to_thread_pointer_convert:
+_tx_misra_timer_indirect_to_void_pointer_convert:
+_tx_misra_const_char_to_char_pointer_convert:
+_tx_misra_void_to_thread_pointer_convert:
+#ifdef TX_ENABLE_EVENT_TRACE
+_tx_misra_object_to_uchar_pointer_convert:
+_tx_misra_uchar_to_object_pointer_convert:
+_tx_misra_uchar_to_header_pointer_convert:
+_tx_misra_uchar_to_entry_pointer_convert:
+_tx_misra_entry_to_uchar_pointer_convert:
+#endif
+_tx_misra_char_to_uchar_pointer_convert:
+_tx_misra_event_flags_group_not_used:
+_tx_misra_event_flags_set_notify_not_used:
+_tx_misra_queue_not_used:
+_tx_misra_queue_send_notify_not_used:
+_tx_misra_semaphore_not_used:
+_tx_misra_semaphore_put_notify_not_used:
+_tx_misra_thread_entry_exit_notify_not_used:
+_tx_misra_thread_not_used:
+
         BX       LR               // return
 
 
@@ -234,20 +318,6 @@ _tx_misra_ulong_pointer_dif:
         BX       LR               // return
 
 
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);              */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_ulong_to_pointer_convert:
-        BX       LR               // return
-
-
 /**************************************************************************/
 /**************************************************************************/
 /**                                                                       */
@@ -332,12 +402,9 @@ _tx_misra_timer_pointer_add:
         .text
         .thumb_func
 _tx_misra_user_timer_pointer_get:
-        ADDS     R2,R0,#+8
-        SUBS     R2,R2,R0
-        RSBS     R2,R2,#+0
-        ADD      R0,R0,R2
-        STR      R0,[R1, #+0]
-        BX       LR               // return
+        SUBS    R0,#8
+        STR     R0,[R1, #+0]
+        BX      LR               // return
 
 
 /**************************************************************************/
@@ -553,202 +620,6 @@ _tx_misra_always_true:
         BX       LR               // return
 
 
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);        */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_indirect_void_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);       */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_indirect_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/***********************************************************************************/
-/***********************************************************************************/
-/**                                                                                */
-/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);   */
-/**                                                                                */
-/***********************************************************************************/
-/***********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_block_pool_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_block_pool_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/************************************************************************************/
-/************************************************************************************/
-/**                                                                                 */
-/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);  */
-/**                                                                                 */
-/************************************************************************************/
-/************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_block_pool_pointer_convert:
-        BX       LR               // return
-
-
-/**************************************************************************************/
-/**************************************************************************************/
-/**                                                                                   */
-/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);        */
-/**                                                                                   */
-/**************************************************************************************/
-/**************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_indirect_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);          */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_byte_pool_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_byte_pool_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);         */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_align_type_pointer_convert:
-        BX       LR               // return
-
-
-/****************************************************************************************************/
-/****************************************************************************************************/
-/**                                                                                                 */
-/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);         */
-/**                                                                                                 */
-/****************************************************************************************************/
-/****************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
-        BX       LR               // return
-
-
-/**************************************************************************************************/
-/**************************************************************************************************/
-/**                                                                                               */
-/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);         */
-/**                                                                                               */
-/**************************************************************************************************/
-/**************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_event_flags_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_ulong_pointer_convert:
-        BX       LR               // return
-
-
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_mutex_pointer_convert:
-        BX       LR               // return
-
-
 /**************************************************************************/
 /**************************************************************************/
 /**                                                                       */
@@ -764,191 +635,6 @@ _tx_misra_status_get:
         BX       LR               // return
 
 
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_queue_pointer_convert:
-        BX       LR               // return
-
-
-/****************************************************************************************/
-/****************************************************************************************/
-/**                                                                                     */
-/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);         */
-/**                                                                                     */
-/****************************************************************************************/
-/****************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_semaphore_pointer_convert:
-        BX       LR               // return
-
-
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);      */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_void_pointer_convert:
-        BX       LR               // return
-
-
-/*********************************************************************************/
-/*********************************************************************************/
-/**                                                                              */
-/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);         */
-/**                                                                              */
-/*********************************************************************************/
-/*********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_ulong_to_thread_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************************/
-/***************************************************************************************************/
-/**                                                                                                */
-/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);         */
-/**                                                                                                */
-/***************************************************************************************************/
-/***************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_timer_indirect_to_void_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_const_char_to_char_pointer_convert:
-        BX       LR               // return
-
-
-/**********************************************************************************/
-/**********************************************************************************/
-/**                                                                               */
-/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);         */
-/**                                                                               */
-/**********************************************************************************/
-/**********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_thread_pointer_convert:
-        BX       LR               // return
-
-
-#ifdef TX_ENABLE_EVENT_TRACE
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_object_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_object_pointer_convert:
-        BX       LR               // return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_header_pointer_convert:
-        BX       LR               // return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_entry_pointer_convert:
-        BX       LR               // return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_entry_to_uchar_pointer_convert:
-        BX       LR               // return
-#endif
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                           */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_char_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
 /***********************************************************************************************/
 /***********************************************************************************************/
 /**                                                                                            */

ports/cortex_m4/gnu/example_build/build_threadx.bat

@@ -1,199 +1,198 @@
 del tx.a
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb tx_initialize_low_level.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ../src/tx_thread_stack_build.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ../src/tx_thread_schedule.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ../src/tx_thread_system_return.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ../src/tx_thread_context_save.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ../src/tx_thread_context_restore.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ../src/tx_thread_interrupt_control.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ../src/tx_timer_interrupt.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ../src/tx_thread_interrupt_control.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_allocate.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_cleanup.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_initialize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_performance_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_performance_system_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_prioritize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_release.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_allocate.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_cleanup.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_initialize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_performance_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_performance_system_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_prioritize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_search.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_release.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_cleanup.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_initialize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_performance_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_performance_system_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_set.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_set_notify.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_high_level.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_kernel_enter.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_kernel_setup.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_cleanup.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_initialize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_performance_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_performance_system_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_prioritize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_priority_change.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_put.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_cleanup.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_flush.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_front_send.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_initialize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_performance_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_performance_system_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_prioritize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_receive.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_send.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_send_notify.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_ceiling_put.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_cleanup.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_delete.c
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-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_allocate.c
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-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_release.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_set.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_set_notify.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_prioritize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_put.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_flush.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_front_send.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_prioritize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_receive.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_send.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_send_notify.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_ceiling_put.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_prioritize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_put.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_put_notify.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_entry_exit_notify.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_preemption_change.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_priority_change.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_relinquish.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_reset.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_resume.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_suspend.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_terminate.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_time_slice_change.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_wait_abort.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_activate.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_change.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_deactivate.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ../src/tx_thread_stack_build.S
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ../src/tx_thread_schedule.S
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ../src/tx_thread_system_return.S
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ../src/tx_thread_context_save.S
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ../src/tx_thread_context_restore.S
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ../src/tx_thread_interrupt_control.S
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ../src/tx_timer_interrupt.S
+
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_allocate.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_cleanup.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_initialize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_performance_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_performance_system_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_prioritize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_release.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_allocate.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_cleanup.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_initialize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_performance_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_performance_system_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_prioritize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_search.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_release.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_cleanup.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_initialize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_performance_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_performance_system_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_set.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_set_notify.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_high_level.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_kernel_enter.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_kernel_setup.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_cleanup.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_initialize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_performance_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_performance_system_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_prioritize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_priority_change.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_put.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_cleanup.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_flush.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_front_send.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_initialize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_performance_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_performance_system_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_prioritize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_receive.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_send.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_send_notify.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_ceiling_put.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_cleanup.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_initialize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_performance_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_performance_system_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_prioritize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_put.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_put_notify.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_entry_exit_notify.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_identify.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_initialize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_performance_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_performance_system_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_preemption_change.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_priority_change.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_relinquish.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_reset.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_resume.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_shell_entry.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_sleep.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_stack_analyze.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_stack_error_handler.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_stack_error_notify.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_suspend.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_system_preempt_check.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_system_resume.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_system_suspend.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_terminate.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_time_slice.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_time_slice_change.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_timeout.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_wait_abort.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_time_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_time_set.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_activate.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_change.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_deactivate.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_expiration_process.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_initialize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_performance_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_performance_system_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_system_activate.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_system_deactivate.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_thread_entry.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_buffer_full_notify.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_enable.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_event_filter.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_event_unfilter.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_disable.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_initialize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_interrupt_control.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_isr_enter_insert.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_isr_exit_insert.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_object_register.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_object_unregister.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_user_event_insert.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_allocate.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_prioritize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_release.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_allocate.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_prioritize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_release.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_set.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_set_notify.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_prioritize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_put.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_flush.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_front_send.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_prioritize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_receive.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_send.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_send_notify.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_ceiling_put.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_prioritize.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_put.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_put_notify.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_entry_exit_notify.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_info_get.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_preemption_change.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_priority_change.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_relinquish.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_reset.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_resume.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_suspend.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_terminate.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_time_slice_change.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_wait_abort.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_activate.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_change.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_create.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_deactivate.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_delete.c
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_info_get.c
+
 arm-none-eabi-ar -r tx.a tx_thread_stack_build.o tx_thread_schedule.o tx_thread_system_return.o tx_thread_context_save.o tx_thread_context_restore.o tx_timer_interrupt.o tx_thread_interrupt_control.o
-arm-none-eabi-ar -r tx.a tx_thread_interrupt_control.o tx_initialize_low_level.o
 arm-none-eabi-ar -r tx.a tx_block_allocate.o tx_block_pool_cleanup.o tx_block_pool_create.o tx_block_pool_delete.o tx_block_pool_info_get.o
 arm-none-eabi-ar -r tx.a tx_block_pool_initialize.o tx_block_pool_performance_info_get.o tx_block_pool_performance_system_info_get.o tx_block_pool_prioritize.o
 arm-none-eabi-ar -r tx.a tx_block_release.o tx_byte_allocate.o tx_byte_pool_cleanup.o tx_byte_pool_create.o tx_byte_pool_delete.o tx_byte_pool_info_get.o

ports/cortex_m4/gnu/example_build/build_threadx_sample.bat

@@ -1,7 +1,5 @@
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb tx_simulator_startup.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb cortexm4_crt0.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb tx_initialize_low_level.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc sample_threadx.c
-arm-none-eabi-ld -A cortex-m4 -ereset_handler -T sample_threadx.ld tx_simulator_startup.o cortexm4_crt0.o tx_initialize_low_level.o sample_threadx.o tx.a  libc.a -o sample_threadx.out -M > sample_threadx.map
-
-
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb cortexm4_vectors.S
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb cortexm4_crt0.S
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb tx_initialize_low_level.S
+arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc sample_threadx.c
+arm-none-eabi-gcc -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -T sample_threadx.ld -ereset_handler -nostartfiles -o sample_threadx.out -Wl,-Map=sample_threadx.map cortexm4_vectors.o cortexm4_crt0.o tx_initialize_low_level.o sample_threadx.o tx.a

ports/cortex_m4/gnu/example_build/cortexm4_crt0.S

@@ -13,7 +13,6 @@ _start:
   ldr r1, =__stack_end__
   mov sp, r1
 
-
   /* Copy initialised sections into RAM if required. */
   ldr r0, =__data_load_start__
   ldr r1, =__data_start__
@@ -47,7 +46,6 @@ _start:
   mov r2, #0
   bl crt0_memory_set
 
-
   /* Setup heap - not recommended for Threadx but here for compatibility reasons */
   ldr r0, = __heap_start__
   ldr r1, = __heap_end__
@@ -57,7 +55,6 @@ _start:
   add r0, r0, #4
   str r1, [r0]
 
-
   /* constructors in case of using C++ */
   ldr r0, =__ctors_start__
   ldr r1, =__ctors_end__
@@ -72,13 +69,11 @@ crt0_ctor_loop:
   b crt0_ctor_loop
 crt0_ctor_end:
 
-
   /* Setup call frame for main() */
   mov r0, #0
   mov lr, r0
   mov r12, sp
 
-
 start:
   /* Jump to main() */
   mov r0, #0
@@ -93,7 +88,6 @@ crt0_exit_loop:
 
   /* Startup helper functions. */
 
-
 crt0_memory_copy:
   cmp r0, r1
   beq memory_copy_done
@@ -109,7 +103,6 @@ memory_copy_loop:
 memory_copy_done:
   bx lr
 
-
 crt0_memory_set:
   cmp r0, r1
   beq memory_set_done
@@ -119,7 +112,6 @@ crt0_memory_set:
 memory_set_done:
   bx lr
 
-
   /* Setup attibutes of stack and heap sections so they don't take up room in the elf file */
   .section .stack, "wa", %nobits
   .section .stack_process, "wa", %nobits

ports/cortex_m4/gnu/example_build/cortexm4_vectors.S

@@ -1,5 +1,3 @@
-
-
   .global reset_handler
 
   .global __tx_NMIHandler
@@ -10,7 +8,6 @@
   .global __tx_SysTickHandler 
   .global __tx_BadHandler
 
-
   .syntax unified
   .section .vectors, "ax"
   .code 16
@@ -29,7 +26,7 @@ _vectors:
   .word 0 // Reserved
   .word 0 // Reserved
   .word 0 // Reserved
-  .word __tx_SVCallHandler //_SVC_Handler - used by Threadx scheduler //
+  .word __tx_SVCallHandler    //_SVC_Handler - used by Threadx scheduler //
   .word __tx_DBGHandler
   .word 0 // Reserved
   .word __tx_PendSVHandler 
@@ -70,14 +67,10 @@ _vectors:
   .word __tx_BadHandler
   .word __tx_BadHandler
 
-
-
-    .section .init, "ax"
-    .thumb_func
+  .section .init, "ax"
+  .thumb_func
 reset_handler:
-
-// low level hardware config, such as PLL setup goes here
-
+  // low level hardware config, such as PLL setup goes here
   b _start
 
 

ports/cortex_m4/gnu/example_build/sample_threadx.ld

@@ -1,206 +1,125 @@
 MEMORY
 {
-  UNPLACED_SECTIONS (wx) : ORIGIN = 0x100000000, LENGTH = 0
-  CM3_System_Control_Space (wx) : ORIGIN = 0xe000e000, LENGTH = 0x00001000
-  AHB_Peripherals (wx) : ORIGIN = 0x50000000, LENGTH = 0x00200000
-  APB1_Peripherals (wx) : ORIGIN = 0x40080000, LENGTH = 0x00080000
-  APB0_Peripherals (wx) : ORIGIN = 0x40000000, LENGTH = 0x00080000
-  GPIO (wx) : ORIGIN = 0x2009c000, LENGTH = 0x00004000
-  AHBSRAM1 (wx) : ORIGIN = 0x20080000, LENGTH = 0x00004000
-  AHBSRAM0 (wx) : ORIGIN = 0x2007c000, LENGTH = 0x00004000
-  RAM (wx) : ORIGIN = 0x10000000, LENGTH = 0x00008000
-  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000
+  RAM (wx) : ORIGIN = 0x20000000, LENGTH = 0x00800000
+  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00400000
 }
 
+__STACKSIZE__ = 1024;
+__STACKSIZE_PROCESS__ = 0;
+__HEAPSIZE__ = 128;
 
 SECTIONS
 {
-  __CM3_System_Control_Space_segment_start__ = 0xe000e000;
-  __CM3_System_Control_Space_segment_end__ = 0xe000f000;
-  __AHB_Peripherals_segment_start__ = 0x50000000;
-  __AHB_Peripherals_segment_end__ = 0x50200000;
-  __APB1_Peripherals_segment_start__ = 0x40080000;
-  __APB1_Peripherals_segment_end__ = 0x40100000;
-  __APB0_Peripherals_segment_start__ = 0x40000000;
-  __APB0_Peripherals_segment_end__ = 0x40080000;
-  __GPIO_segment_start__ = 0x2009c000;
-  __GPIO_segment_end__ = 0x200a0000;
-  __AHBSRAM1_segment_start__ = 0x20080000;
-  __AHBSRAM1_segment_end__ = 0x20084000;
-  __AHBSRAM0_segment_start__ = 0x2007c000;
-  __AHBSRAM0_segment_end__ = 0x20080000;
-  __RAM_segment_start__ = 0x10000000;
-  __RAM_segment_end__ = 0x10008000;
-  __FLASH_segment_start__ = 0x00000000;
-  __FLASH_segment_end__ = 0x00080000;
-
-  __STACKSIZE__ = 1024;
-  __STACKSIZE_PROCESS__ = 0;
-  __STACKSIZE_IRQ__ = 0;
-  __STACKSIZE_FIQ__ = 0;
-  __STACKSIZE_SVC__ = 0;
-  __STACKSIZE_ABT__ = 0;
-  __STACKSIZE_UND__ = 0;
-  __HEAPSIZE__ = 128;
-
-  __vectors_load_start__ = __FLASH_segment_start__;
-  .vectors __FLASH_segment_start__ : AT(__FLASH_segment_start__)
+  .vectors : 
   {
-    __vectors_start__ = .;
-    *(.vectors .vectors.*)
-  }
-  __vectors_end__ = __vectors_start__ + SIZEOF(.vectors);
+    KEEP(*(.vectors .vectors.*))
+  } > FLASH
 
-  . = ASSERT(__vectors_end__ >= __FLASH_segment_start__ && __vectors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .vectors is too large to fit in FLASH memory segment");
+	.text :
+	{
+		*(.text*)
 
-  __init_load_start__ = ALIGN(__vectors_end__ , 4);
-  .init ALIGN(__vectors_end__ , 4) : AT(ALIGN(__vectors_end__ , 4))
-  {
-    __init_start__ = .;
-    *(.init .init.*)
-  }
-  __init_end__ = __init_start__ + SIZEOF(.init);
+		KEEP(*(.init))
+		KEEP(*(.fini))
 
-  . = ASSERT(__init_end__ >= __FLASH_segment_start__ && __init_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .init is too large to fit in FLASH memory segment");
+		/* .ctors */
+		*crtbegin.o(.ctors)
+		*crtbegin?.o(.ctors)
+		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+    __ctors_start__ = ALIGN(4);
+		*(SORT(.ctors.*))
+		*(.ctors)
+    __ctors_end__ = ALIGN(4);
 
-  __text_load_start__ = ALIGN(__init_end__ , 4);
-  .text ALIGN(__init_end__ , 4) : AT(ALIGN(__init_end__ , 4))
-  {
-    __text_start__ = .;
-    *(.text .text.* .glue_7t .glue_7 .gnu.linkonce.t.* .gcc_except_table)
-  }
-  __text_end__ = __text_start__ + SIZEOF(.text);
+		/* .dtors */
+ 		*crtbegin.o(.dtors)
+ 		*crtbegin?.o(.dtors)
+ 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+    __dtors_start__ = ALIGN(4);
+ 		*(SORT(.dtors.*))
+ 		*(.dtors)
+    __dtors_end__ = ALIGN(4);
 
-  . = ASSERT(__text_end__ >= __FLASH_segment_start__ && __text_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .text is too large to fit in FLASH memory segment");
+		*(.rodata*)
 
-  __dtors_load_start__ = ALIGN(__text_end__ , 4);
-  .dtors ALIGN(__text_end__ , 4) : AT(ALIGN(__text_end__ , 4))
-  {
-    __dtors_start__ = .;
-    KEEP (*(SORT(.dtors.*))) KEEP (*(.dtors))
-  }
-  __dtors_end__ = __dtors_start__ + SIZEOF(.dtors);
+		KEEP(*(.eh_frame*))
+	} > FLASH
 
-  . = ASSERT(__dtors_end__ >= __FLASH_segment_start__ && __dtors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .dtors is too large to fit in FLASH memory segment");
+	.ARM.extab : 
+	{
+		*(.ARM.extab* .gnu.linkonce.armextab.*)
+	} > FLASH
 
-  __ctors_load_start__ = ALIGN(__dtors_end__ , 4);
-  .ctors ALIGN(__dtors_end__ , 4) : AT(ALIGN(__dtors_end__ , 4))
-  {
-    __ctors_start__ = .;
-    KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors))
-  }
-  __ctors_end__ = __ctors_start__ + SIZEOF(.ctors);
+	__exidx_start = .;
+	.ARM.exidx :
+	{
+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
+	} > FLASH
+	__exidx_end = .;
 
-  . = ASSERT(__ctors_end__ >= __FLASH_segment_start__ && __ctors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .ctors is too large to fit in FLASH memory segment");
+	__data_load_start__ = ALIGN (4);
 
-  __rodata_load_start__ = ALIGN(__ctors_end__ , 4);
-  .rodata ALIGN(__ctors_end__ , 4) : AT(ALIGN(__ctors_end__ , 4))
-  {
-    __rodata_start__ = .;
-    *(.rodata .rodata.* .gnu.linkonce.r.*)
-  }
-  __rodata_end__ = __rodata_start__ + SIZEOF(.rodata);
+	.data : AT (__data_load_start__) 
+	{
+		__data_start__ = .;
 
-  . = ASSERT(__rodata_end__ >= __FLASH_segment_start__ && __rodata_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .rodata is too large to fit in FLASH memory segment");
+		*(vtable)
+		*(.data*)
 
-  __fast_load_start__ = ALIGN(__rodata_end__ , 4);
-  .fast ALIGN(__RAM_segment_start__ , 4) : AT(ALIGN(__rodata_end__ , 4))
-  {
-    __fast_start__ = .;
-    *(.fast .fast.*)
-  }
-  __fast_end__ = __fast_start__ + SIZEOF(.fast);
+		. = ALIGN(4);
+		/* preinit data */
+		PROVIDE_HIDDEN (__preinit_array_start = .);
+		KEEP(*(.preinit_array))
+		PROVIDE_HIDDEN (__preinit_array_end = .);
 
-  __fast_load_end__ = __fast_load_start__ + SIZEOF(.fast);
+		. = ALIGN(4);
+		/* init data */
+		PROVIDE_HIDDEN (__init_array_start = .);
+		KEEP(*(SORT(.init_array.*)))
+		KEEP(*(.init_array))
+		PROVIDE_HIDDEN (__init_array_end = .);
 
-  . = ASSERT((__fast_load_start__ + SIZEOF(.fast)) >= __FLASH_segment_start__ && (__fast_load_start__ + SIZEOF(.fast)) <= (__FLASH_segment_start__ + 0x00080000) , "error: .fast is too large to fit in FLASH memory segment");
+		. = ALIGN(4);
+		/* finit data */
+		PROVIDE_HIDDEN (__fini_array_start = .);
+		KEEP(*(SORT(.fini_array.*)))
+		KEEP(*(.fini_array))
+		PROVIDE_HIDDEN (__fini_array_end = .);
 
-  .fast_run ALIGN(__RAM_segment_start__ , 4) (NOLOAD) :
-  {
-    __fast_run_start__ = .;
-    . = MAX(__fast_run_start__ + SIZEOF(.fast), .);
-  }
-  __fast_run_end__ = __fast_run_start__ + SIZEOF(.fast_run);
+		KEEP(*(.jcr*))
+		. = ALIGN(4);
+		/* All data end */
+		
+    __data_end__ = .;
 
-  . = ASSERT(__fast_run_end__ >= __RAM_segment_start__ && __fast_run_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .fast_run is too large to fit in RAM memory segment");
+	} > RAM
 
-  __data_load_start__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4);
-  .data ALIGN(__fast_run_end__ , 4) : AT(ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4))
-  {
-    __data_start__ = .;
-    *(.data .data.* .gnu.linkonce.d.*)
-  }
-  __data_end__ = __data_start__ + SIZEOF(.data);
+	.bss :
+	{
+		. = ALIGN(4);
+		__bss_start__ = .;
+		*(.bss*)
+		*(COMMON)
+		. = ALIGN(4);
+		__bss_end__ = .;
 
-  __data_load_end__ = __data_load_start__ + SIZEOF(.data);
-
-  __FLASH_segment_used_end__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4) + SIZEOF(.data);
-
-  . = ASSERT((__data_load_start__ + SIZEOF(.data)) >= __FLASH_segment_start__ && (__data_load_start__ + SIZEOF(.data)) <= (__FLASH_segment_start__ + 0x00080000) , "error: .data is too large to fit in FLASH memory segment");
-
-  .data_run ALIGN(__fast_run_end__ , 4) (NOLOAD) :
-  {
-    __data_run_start__ = .;
-    . = MAX(__data_run_start__ + SIZEOF(.data), .);
-  }
-  __data_run_end__ = __data_run_start__ + SIZEOF(.data_run);
-
-  . = ASSERT(__data_run_end__ >= __RAM_segment_start__ && __data_run_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .data_run is too large to fit in RAM memory segment");
-
-  __bss_load_start__ = ALIGN(__data_run_end__ , 4);
-  .bss ALIGN(__data_run_end__ , 4) (NOLOAD) : AT(ALIGN(__data_run_end__ , 4))
-  {
-    __bss_start__ = .;
-    *(.bss .bss.* .gnu.linkonce.b.*) *(COMMON)
-  }
-  __bss_end__ = __bss_start__ + SIZEOF(.bss);
-
-  . = ASSERT(__bss_end__ >= __RAM_segment_start__ && __bss_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .bss is too large to fit in RAM memory segment");
-
-  __non_init_load_start__ = ALIGN(__bss_end__ , 4);
-  .non_init ALIGN(__bss_end__ , 4) (NOLOAD) : AT(ALIGN(__bss_end__ , 4))
-  {
-    __non_init_start__ = .;
-    *(.non_init .non_init.*)
-  }
-  __non_init_end__ = __non_init_start__ + SIZEOF(.non_init);
-
-  . = ASSERT(__non_init_end__ >= __RAM_segment_start__ && __non_init_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .non_init is too large to fit in RAM memory segment");
-
-  __heap_load_start__ = ALIGN(__non_init_end__ , 4);
-  .heap ALIGN(__non_init_end__ , 4) (NOLOAD) : AT(ALIGN(__non_init_end__ , 4))
-  {
-    __heap_start__ = .;
+	} > RAM
+	
+	.heap (COPY):
+	{
+    __heap_start__ = ALIGN(4);
     *(.heap)
-    . = ALIGN(MAX(__heap_start__ + __HEAPSIZE__ , .), 4);
-  }
-  __heap_end__ = __heap_start__ + SIZEOF(.heap);
+    . = ALIGN(. + __HEAPSIZE__, 4);
+    __heap_end__ = ALIGN(4);
+	} > RAM
 
-  . = ASSERT(__heap_end__ >= __RAM_segment_start__ && __heap_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .heap is too large to fit in RAM memory segment");
-
-  __stack_load_start__ = ALIGN(__heap_end__ , 4);
-  .stack ALIGN(__heap_end__ , 4) (NOLOAD) : AT(ALIGN(__heap_end__ , 4))
+  .stack ALIGN(4) (NOLOAD) :
   {
-    __stack_start__ = .;
+    __stack_start__ = ALIGN(4);
     *(.stack)
-    . = ALIGN(MAX(__stack_start__ + __STACKSIZE__ , .), 4);
-  }
-  __stack_end__ = __stack_start__ + SIZEOF(.stack);
-
-  . = ASSERT(__stack_end__ >= __RAM_segment_start__ && __stack_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .stack is too large to fit in RAM memory segment");
-
-  __stack_process_load_start__ = ALIGN(__stack_end__ , 4);
-  .stack_process ALIGN(__stack_end__ , 4) (NOLOAD) : AT(ALIGN(__stack_end__ , 4))
-  {
-    __stack_process_start__ = .;
-    *(.stack_process)
-    . = ALIGN(MAX(__stack_process_start__ + __STACKSIZE_PROCESS__ , .), 4);
-  }
-  __stack_process_end__ = __stack_process_start__ + SIZEOF(.stack_process);
-
-  __RAM_segment_used_end__ = ALIGN(__stack_end__ , 4) + SIZEOF(.stack_process);
-
-  . = ASSERT(__stack_process_end__ >= __RAM_segment_start__ && __stack_process_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .stack_process is too large to fit in RAM memory segment");
+    . = ALIGN(. + __STACKSIZE__, 4);
+    __stack_end__ = ALIGN(4);
+  } > RAM
 
+  __RAM_segment_used_end__ = .;
 }
-

ports/cortex_m4/gnu/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                         Cortex-M4/GNU     */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -59,6 +59,9 @@
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and         */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -146,6 +149,12 @@ typedef unsigned short                          USHORT;
 #define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
 
 /* Define various constants for the ThreadX Cortex-M port.  */
 
@@ -707,7 +716,7 @@ void    tx_thread_fpu_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M4/GNU Version 6.1.11 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M4/GNU Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m4/gnu/src/tx_misra.S

@@ -103,6 +103,14 @@
         .global _tx_misra_vfp_touch
 #endif
 
+        .global _tx_misra_event_flags_group_not_used
+        .global _tx_misra_event_flags_set_notify_not_used
+        .global _tx_misra_queue_not_used
+        .global _tx_misra_queue_send_notify_not_used
+        .global _tx_misra_semaphore_not_used
+        .global _tx_misra_semaphore_put_notify_not_used
+        .global _tx_misra_thread_entry_exit_notify_not_used
+        .global _tx_misra_thread_not_used
 
 /**************************************************************************/
 /**************************************************************************/
@@ -172,17 +180,93 @@ _tx_misra_uchar_pointer_dif:
         BX       LR               // return
 
 
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
+/**                                                                                                                                 */
+/**  This single function serves all of the below prototypes.                                                                       */
+/**                                                                                                                                 */
+/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                                                                          */
+/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);                                                                        */
+/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);                                                  */
+/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);                                                    */
+/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);                                                    */
+/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);                                                   */
+/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);                                                                */
+/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);                                                  */
+/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);                                                      */
+/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);                                                     */
+/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);                                                      */
+/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);                                                    */
+/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);                                         */
+/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);                                           */
+/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);                                                                */
+/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);                                                             */
+/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);                                                             */
+/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);                                                     */
+/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);                                                                */
+/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);                                                            */
+/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);                                          */
+/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);                                                      */
+/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);                                                           */
+/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);                                             */
+/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);                                             */
+/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);                                                   */
+/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);                                              */
+/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);                                              */
+/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                                                                */
+/**  VOID    _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr);                                                 */
+/**  VOID    _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr));          */
+/**  VOID    _tx_misra_queue_not_used(TX_QUEUE *queue_ptr);                                                                         */
+/**  VOID    _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr));                           */
+/**  VOID    _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr);                                                             */
+/**  VOID    _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr));             */
+/**  VOID    _tx_misra_thread_not_used(TX_THREAD *thread_ptr);                                                                      */
+/**  VOID    _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id));  */
+/**                                                                                                                                 */
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
         .text
         .thumb_func
 _tx_misra_pointer_to_ulong_convert:
+_tx_misra_ulong_to_pointer_convert:
+_tx_misra_indirect_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_indirect_uchar_pointer_convert:
+_tx_misra_block_pool_to_uchar_pointer_convert:
+_tx_misra_void_to_block_pool_pointer_convert:
+_tx_misra_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_block_pool_pointer_convert:
+_tx_misra_void_to_indirect_uchar_pointer_convert:
+_tx_misra_void_to_byte_pool_pointer_convert:
+_tx_misra_byte_pool_to_uchar_pointer_convert:
+_tx_misra_uchar_to_align_type_pointer_convert:
+_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
+_tx_misra_void_to_event_flags_pointer_convert:
+_tx_misra_void_to_ulong_pointer_convert:
+_tx_misra_void_to_mutex_pointer_convert:
+_tx_misra_void_to_queue_pointer_convert:
+_tx_misra_void_to_semaphore_pointer_convert:
+_tx_misra_uchar_to_void_pointer_convert:
+_tx_misra_ulong_to_thread_pointer_convert:
+_tx_misra_timer_indirect_to_void_pointer_convert:
+_tx_misra_const_char_to_char_pointer_convert:
+_tx_misra_void_to_thread_pointer_convert:
+#ifdef TX_ENABLE_EVENT_TRACE
+_tx_misra_object_to_uchar_pointer_convert:
+_tx_misra_uchar_to_object_pointer_convert:
+_tx_misra_uchar_to_header_pointer_convert:
+_tx_misra_uchar_to_entry_pointer_convert:
+_tx_misra_entry_to_uchar_pointer_convert:
+#endif
+_tx_misra_char_to_uchar_pointer_convert:
+_tx_misra_event_flags_group_not_used:
+_tx_misra_event_flags_set_notify_not_used:
+_tx_misra_queue_not_used:
+_tx_misra_queue_send_notify_not_used:
+_tx_misra_semaphore_not_used:
+_tx_misra_semaphore_put_notify_not_used:
+_tx_misra_thread_entry_exit_notify_not_used:
+_tx_misra_thread_not_used:
+
         BX       LR               // return
 
 
@@ -234,20 +318,6 @@ _tx_misra_ulong_pointer_dif:
         BX       LR               // return
 
 
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);              */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_ulong_to_pointer_convert:
-        BX       LR               // return
-
-
 /**************************************************************************/
 /**************************************************************************/
 /**                                                                       */
@@ -332,12 +402,9 @@ _tx_misra_timer_pointer_add:
         .text
         .thumb_func
 _tx_misra_user_timer_pointer_get:
-        ADDS     R2,R0,#+8
-        SUBS     R2,R2,R0
-        RSBS     R2,R2,#+0
-        ADD      R0,R0,R2
-        STR      R0,[R1, #+0]
-        BX       LR               // return
+        SUBS    R0,#8
+        STR     R0,[R1, #+0]
+        BX      LR               // return
 
 
 /**************************************************************************/
@@ -553,202 +620,6 @@ _tx_misra_always_true:
         BX       LR               // return
 
 
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);        */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_indirect_void_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);       */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_indirect_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/***********************************************************************************/
-/***********************************************************************************/
-/**                                                                                */
-/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);   */
-/**                                                                                */
-/***********************************************************************************/
-/***********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_block_pool_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_block_pool_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/************************************************************************************/
-/************************************************************************************/
-/**                                                                                 */
-/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);  */
-/**                                                                                 */
-/************************************************************************************/
-/************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_block_pool_pointer_convert:
-        BX       LR               // return
-
-
-/**************************************************************************************/
-/**************************************************************************************/
-/**                                                                                   */
-/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);        */
-/**                                                                                   */
-/**************************************************************************************/
-/**************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_indirect_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);          */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_byte_pool_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_byte_pool_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);         */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_align_type_pointer_convert:
-        BX       LR               // return
-
-
-/****************************************************************************************************/
-/****************************************************************************************************/
-/**                                                                                                 */
-/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);         */
-/**                                                                                                 */
-/****************************************************************************************************/
-/****************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
-        BX       LR               // return
-
-
-/**************************************************************************************************/
-/**************************************************************************************************/
-/**                                                                                               */
-/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);         */
-/**                                                                                               */
-/**************************************************************************************************/
-/**************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_event_flags_pointer_convert:
-        BX       LR               // return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_ulong_pointer_convert:
-        BX       LR               // return
-
-
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_mutex_pointer_convert:
-        BX       LR               // return
-
-
 /**************************************************************************/
 /**************************************************************************/
 /**                                                                       */
@@ -764,191 +635,6 @@ _tx_misra_status_get:
         BX       LR               // return
 
 
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_queue_pointer_convert:
-        BX       LR               // return
-
-
-/****************************************************************************************/
-/****************************************************************************************/
-/**                                                                                     */
-/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);         */
-/**                                                                                     */
-/****************************************************************************************/
-/****************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_semaphore_pointer_convert:
-        BX       LR               // return
-
-
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);      */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_void_pointer_convert:
-        BX       LR               // return
-
-
-/*********************************************************************************/
-/*********************************************************************************/
-/**                                                                              */
-/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);         */
-/**                                                                              */
-/*********************************************************************************/
-/*********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_ulong_to_thread_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************************/
-/***************************************************************************************************/
-/**                                                                                                */
-/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);         */
-/**                                                                                                */
-/***************************************************************************************************/
-/***************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_timer_indirect_to_void_pointer_convert:
-        BX       LR               // return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_const_char_to_char_pointer_convert:
-        BX       LR               // return
-
-
-/**********************************************************************************/
-/**********************************************************************************/
-/**                                                                               */
-/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);         */
-/**                                                                               */
-/**********************************************************************************/
-/**********************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_void_to_thread_pointer_convert:
-        BX       LR               // return
-
-
-#ifdef TX_ENABLE_EVENT_TRACE
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_object_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_object_pointer_convert:
-        BX       LR               // return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_header_pointer_convert:
-        BX       LR               // return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_uchar_to_entry_pointer_convert:
-        BX       LR               // return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_entry_to_uchar_pointer_convert:
-        BX       LR               // return
-#endif
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                           */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        .text
-        .thumb_func
-_tx_misra_char_to_uchar_pointer_convert:
-        BX       LR               // return
-
-
 /***********************************************************************************************/
 /***********************************************************************************************/
 /**                                                                                            */

ports/cortex_m4/iar/CMakeLists.txt

@@ -0,0 +1,21 @@
+
+target_sources(${PROJECT_NAME}
+    PRIVATE
+    # {{BEGIN_TARGET_SOURCES}}
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_iar.c
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_restore.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_save.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_control.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_disable.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_restore.S    
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_schedule.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_stack_build.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_system_return.S
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_timer_interrupt.S
+    # {{END_TARGET_SOURCES}}
+)
+
+target_include_directories(${PROJECT_NAME}
+    PUBLIC
+    ${CMAKE_CURRENT_LIST_DIR}/inc
+)

ports/cortex_m4/iar/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                         Cortex-M4/IAR     */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -59,6 +59,9 @@
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and         */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -146,6 +149,12 @@ typedef unsigned short                          USHORT;
 #define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
 
 /* Define various constants for the ThreadX Cortex-M port.  */
 
@@ -707,7 +716,7 @@ void    tx_thread_fpu_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M4/IAR Version 6.1.11 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M4/IAR Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m4/iar/src/tx_misra.s

@@ -102,8 +102,18 @@
         PUBLIC _tx_misra_fpccr_get
         PUBLIC _tx_misra_vfp_touch
 #endif
-        PUBLIC _tx_version_id
 
+        PUBLIC _tx_misra_event_flags_group_not_used
+        PUBLIC _tx_misra_event_flags_set_notify_not_used
+        PUBLIC _tx_misra_queue_not_used
+        PUBLIC _tx_misra_queue_send_notify_not_used
+        PUBLIC _tx_misra_semaphore_not_used
+        PUBLIC _tx_misra_semaphore_put_notify_not_used
+        PUBLIC _tx_misra_thread_entry_exit_notify_not_used
+        PUBLIC _tx_misra_thread_not_used
+
+#ifdef TX_MISRA_ENABLE
+        PUBLIC _tx_version_id
 
         SECTION `.data`:DATA:REORDER:NOROOT(2)
         DATA
@@ -115,11 +125,12 @@ _tx_version_id:
         DC8 45H, 78H, 70H, 72H, 65H, 73H, 73H, 20H
         DC8 4CH, 6FH, 67H, 69H, 63H, 20H, 49H, 6EH
         DC8 63H, 2EH, 20H, 2AH, 20H, 54H, 68H, 72H
-        DC8 65H, 61H, 64H, 58H, 20H, 35H, 2EH, 38H
+        DC8 65H, 61H, 64H, 58H, 20H, 36H, 2EH, 31H
         DC8 20H, 4DH, 49H, 53H, 52H, 41H, 20H, 43H
         DC8 20H, 43H, 6FH, 6DH, 70H, 6CH, 69H, 61H
         DC8 6EH, 74H, 20H, 2AH, 0
         DC8 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+#endif //TX_MISRA_ENABLE
 
 /**************************************************************************/
 /**************************************************************************/
@@ -139,7 +150,7 @@ _tx_misra_memset:
         MOVS     R1,R0
         MOVS     R0,R4
         BL       __aeabi_memset
-        POP      {R4,PC}          ;; return
+        POP      {R4,PC}          // return
 
 /**************************************************************************/
 /**************************************************************************/
@@ -153,7 +164,7 @@ _tx_misra_memset:
         THUMB
 _tx_misra_uchar_pointer_add:
         ADD      R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -169,7 +180,7 @@ _tx_misra_uchar_pointer_add:
 _tx_misra_uchar_pointer_sub:
         RSBS     R1,R1,#+0
         ADD      R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -184,21 +195,97 @@ _tx_misra_uchar_pointer_sub:
         THUMB
 _tx_misra_uchar_pointer_dif:
         SUBS     R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
+/**                                                                                                                                 */
+/**  This single function serves all of the below prototypes.                                                                       */
+/**                                                                                                                                 */
+/**  ULONG  _tx_misra_pointer_to_ulong_convert(VOID *ptr);                                                                          */
+/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);                                                                        */
+/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);                                                  */
+/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);                                                    */
+/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);                                                    */
+/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);                                                   */
+/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);                                                                */
+/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);                                                  */
+/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);                                                      */
+/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);                                                     */
+/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);                                                      */
+/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);                                                    */
+/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);                                         */
+/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);                                           */
+/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);                                                                */
+/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);                                                             */
+/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);                                                             */
+/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);                                                     */
+/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);                                                                */
+/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);                                                            */
+/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);                                          */
+/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);                                                      */
+/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);                                                           */
+/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);                                             */
+/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);                                             */
+/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);                                                   */
+/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);                                              */
+/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);                                              */
+/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                                                                */
+/**  VOID    _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr);                                                 */
+/**  VOID    _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr));          */
+/**  VOID    _tx_misra_queue_not_used(TX_QUEUE *queue_ptr);                                                                         */
+/**  VOID    _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr));                           */
+/**  VOID    _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr);                                                             */
+/**  VOID    _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr));             */
+/**  VOID    _tx_misra_thread_not_used(TX_THREAD *thread_ptr);                                                                      */
+/**  VOID    _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id));  */
+/**                                                                                                                                 */
+/************************************************************************************************************************************/
+/************************************************************************************************************************************/
         SECTION `.text`:CODE:NOROOT(1)
         THUMB
 _tx_misra_pointer_to_ulong_convert:
-        BX       LR               ;; return
+_tx_misra_ulong_to_pointer_convert:
+_tx_misra_indirect_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_indirect_uchar_pointer_convert:
+_tx_misra_block_pool_to_uchar_pointer_convert:
+_tx_misra_void_to_block_pool_pointer_convert:
+_tx_misra_void_to_uchar_pointer_convert:
+_tx_misra_uchar_to_block_pool_pointer_convert:
+_tx_misra_void_to_indirect_uchar_pointer_convert:
+_tx_misra_void_to_byte_pool_pointer_convert:
+_tx_misra_byte_pool_to_uchar_pointer_convert:
+_tx_misra_uchar_to_align_type_pointer_convert:
+_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
+_tx_misra_void_to_event_flags_pointer_convert:
+_tx_misra_void_to_ulong_pointer_convert:
+_tx_misra_void_to_mutex_pointer_convert:
+_tx_misra_void_to_queue_pointer_convert:
+_tx_misra_void_to_semaphore_pointer_convert:
+_tx_misra_uchar_to_void_pointer_convert:
+_tx_misra_ulong_to_thread_pointer_convert:
+_tx_misra_timer_indirect_to_void_pointer_convert:
+_tx_misra_const_char_to_char_pointer_convert:
+_tx_misra_void_to_thread_pointer_convert:
+#ifdef TX_ENABLE_EVENT_TRACE
+_tx_misra_object_to_uchar_pointer_convert:
+_tx_misra_uchar_to_object_pointer_convert:
+_tx_misra_uchar_to_header_pointer_convert:
+_tx_misra_uchar_to_entry_pointer_convert:
+_tx_misra_entry_to_uchar_pointer_convert:
+#endif
+_tx_misra_char_to_uchar_pointer_convert:
+_tx_misra_event_flags_group_not_used:
+_tx_misra_event_flags_set_notify_not_used:
+_tx_misra_queue_not_used:
+_tx_misra_queue_send_notify_not_used:
+_tx_misra_semaphore_not_used:
+_tx_misra_semaphore_put_notify_not_used:
+_tx_misra_thread_entry_exit_notify_not_used:
+_tx_misra_thread_not_used:
+
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -213,7 +300,7 @@ _tx_misra_pointer_to_ulong_convert:
         THUMB
 _tx_misra_ulong_pointer_add:
         ADD      R0,R0,R1, LSL #+2
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -230,7 +317,7 @@ _tx_misra_ulong_pointer_sub:
         MVNS     R2,#+3
         MULS     R1,R2,R1
         ADD      R0,R0,R1
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -246,21 +333,7 @@ _tx_misra_ulong_pointer_sub:
 _tx_misra_ulong_pointer_dif:
         SUBS     R0,R0,R1
         ASRS     R0,R0,#+2
-        BX       LR               ;; return
-
-
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_ulong_to_pointer_convert(ULONG input);              */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_ulong_to_pointer_convert:
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -299,7 +372,7 @@ _tx_misra_message_copy:
         STR      R3,[R0, #+0]
         STR      R4,[R1, #+0]
         POP      {R4,R5}
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -316,7 +389,7 @@ _tx_misra_message_copy:
 _tx_misra_timer_pointer_dif:
         SUBS     R0,R0,R1
         ASRS     R0,R0,#+2
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -332,7 +405,7 @@ _tx_misra_timer_pointer_dif:
         THUMB
 _tx_misra_timer_pointer_add:
         ADD      R0,R0,R1, LSL #+2
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -347,12 +420,9 @@ _tx_misra_timer_pointer_add:
         SECTION `.text`:CODE:NOROOT(1)
         THUMB
 _tx_misra_user_timer_pointer_get:
-        ADDS     R2,R0,#+8
-        SUBS     R2,R2,R0
-        RSBS     R2,R2,#+0
-        ADD      R0,R0,R2
-        STR      R0,[R1, #+0]
-        BX       LR               ;; return
+        SUBS    R0,#8
+        STR     R0,[R1, #+0]
+        BX      LR               // return
 
 
 /**************************************************************************/
@@ -374,7 +444,7 @@ _tx_misra_thread_stack_check:
         CMP      R4,#+0
         BEQ.N    ??_tx_misra_thread_stack_check_0
         LDR      R1,[R4, #+0]
-        LDR.N    R2,??DataTable2  ;; 0x54485244
+        LDR.N    R2,??DataTable2  // 0x54485244
         CMP      R1,R2
         BNE.N    ??_tx_misra_thread_stack_check_0
         LDR      R1,[R4, #+8]
@@ -412,7 +482,7 @@ _tx_misra_thread_stack_check:
         BL       _tx_thread_interrupt_disable
 ??_tx_misra_thread_stack_check_0:
         BL       _tx_thread_interrupt_restore
-        POP      {R0,R4,R5,PC}    ;; return
+        POP      {R0,R4,R5,PC}    // return
 
 #ifdef TX_ENABLE_EVENT_TRACE
 
@@ -500,7 +570,7 @@ _tx_misra_trace_event_insert:
         LDR      R0,[R0, #+0]
         STR      R4,[R0, #+32]
 ??_tx_misra_trace_event_insert_0:
-        POP      {R0,R4-R7,PC}    ;; return
+        POP      {R0,R4-R7,PC}    // return
 
 
         SECTION `.text`:CODE:NOROOT(2)
@@ -552,7 +622,7 @@ _tx_misra_trace_event_insert:
         THUMB
 _tx_misra_time_stamp_get:
         MOVS     R0,#+0
-        BX       LR               ;; return
+        BX       LR               // return
 
 #endif
 
@@ -587,203 +657,7 @@ _tx_misra_time_stamp_get:
         THUMB
 _tx_misra_always_true:
         MOVS     R0,#+1
-        BX       LR               ;; return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  UCHAR  **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr);        */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_indirect_void_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer);       */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_indirect_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/***********************************************************************************/
-/***********************************************************************************/
-/**                                                                                */
-/**  UCHAR  *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool);   */
-/**                                                                                */
-/***********************************************************************************/
-/***********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_block_pool_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_BLOCK_POOL  *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_block_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  UCHAR  *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/************************************************************************************/
-/************************************************************************************/
-/**                                                                                 */
-/**  TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer);  */
-/**                                                                                 */
-/************************************************************************************/
-/************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_block_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/**************************************************************************************/
-/**************************************************************************************/
-/**                                                                                   */
-/**  UCHAR  **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer);        */
-/**                                                                                   */
-/**************************************************************************************/
-/**************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_indirect_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  TX_BYTE_POOL  *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer);          */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_byte_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  UCHAR  *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_byte_pool_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************************/
-/*****************************************************************************************/
-/**                                                                                      */
-/**  ALIGN_TYPE  *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer);         */
-/**                                                                                      */
-/*****************************************************************************************/
-/*****************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_align_type_pointer_convert:
-        BX       LR               ;; return
-
-
-/****************************************************************************************************/
-/****************************************************************************************************/
-/**                                                                                                 */
-/**  TX_BYTE_POOL  **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer);         */
-/**                                                                                                 */
-/****************************************************************************************************/
-/****************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_indirect_byte_pool_pointer_convert:
-        BX       LR               ;; return
-
-
-/**************************************************************************************************/
-/**************************************************************************************************/
-/**                                                                                               */
-/**  TX_EVENT_FLAGS_GROUP  *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer);         */
-/**                                                                                               */
-/**************************************************************************************************/
-/**************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_event_flags_pointer_convert:
-        BX       LR               ;; return
-
-
-/*****************************************************************************/
-/*****************************************************************************/
-/**                                                                          */
-/**  ULONG  *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer);         */
-/**                                                                          */
-/*****************************************************************************/
-/*****************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_ulong_pointer_convert:
-        BX       LR               ;; return
-
-
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_MUTEX  *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_mutex_pointer_convert:
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /**************************************************************************/
@@ -798,192 +672,7 @@ _tx_misra_void_to_mutex_pointer_convert:
         THUMB
 _tx_misra_status_get:
         MOVS     R0,#+0
-        BX       LR               ;; return
-
-
-/********************************************************************************/
-/********************************************************************************/
-/**                                                                             */
-/**  TX_QUEUE  *_tx_misra_void_to_queue_pointer_convert(VOID *pointer);         */
-/**                                                                             */
-/********************************************************************************/
-/********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_queue_pointer_convert:
-        BX       LR               ;; return
-
-
-/****************************************************************************************/
-/****************************************************************************************/
-/**                                                                                     */
-/**  TX_SEMAPHORE  *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer);         */
-/**                                                                                     */
-/****************************************************************************************/
-/****************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_semaphore_pointer_convert:
-        BX       LR               ;; return
-
-
-/**************************************************************************/
-/**************************************************************************/
-/**                                                                       */
-/**  VOID  *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer);      */
-/**                                                                       */
-/**************************************************************************/
-/**************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_void_pointer_convert:
-        BX       LR               ;; return
-
-
-/*********************************************************************************/
-/*********************************************************************************/
-/**                                                                              */
-/**  TX_THREAD  *_tx_misra_ulong_to_thread_pointer_convert(ULONG value);         */
-/**                                                                              */
-/*********************************************************************************/
-/*********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_ulong_to_thread_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************************/
-/***************************************************************************************************/
-/**                                                                                                */
-/**  VOID  *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer);         */
-/**                                                                                                */
-/***************************************************************************************************/
-/***************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_timer_indirect_to_void_pointer_convert:
-        BX       LR               ;; return
-
-
-/***************************************************************************************/
-/***************************************************************************************/
-/**                                                                                    */
-/**  CHAR  *_tx_misra_const_char_to_char_pointer_convert(const char *pointer);         */
-/**                                                                                    */
-/***************************************************************************************/
-/***************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_const_char_to_char_pointer_convert:
-        BX       LR               ;; return
-
-
-/**********************************************************************************/
-/**********************************************************************************/
-/**                                                                               */
-/**  TX_THREAD  *_tx_misra_void_to_thread_pointer_convert(void *pointer);         */
-/**                                                                               */
-/**********************************************************************************/
-/**********************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_void_to_thread_pointer_convert:
-        BX       LR               ;; return
-
-
-#ifdef TX_ENABLE_EVENT_TRACE
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  UCHAR  *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_object_to_uchar_pointer_convert:
-        BX       LR               ;; return
-
-
-/************************************************************************************************/
-/************************************************************************************************/
-/**                                                                                             */
-/**  TX_TRACE_OBJECT_ENTRY  *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer);         */
-/**                                                                                             */
-/************************************************************************************************/
-/************************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_object_pointer_convert:
-        BX       LR               ;; return
-
-
-/******************************************************************************************/
-/******************************************************************************************/
-/**                                                                                       */
-/**  TX_TRACE_HEADER  *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer);         */
-/**                                                                                       */
-/******************************************************************************************/
-/******************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_header_pointer_convert:
-        BX       LR               ;; return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  TX_TRACE_BUFFER_ENTRY  *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_uchar_to_entry_pointer_convert:
-        BX       LR               ;; return
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer);         */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_entry_to_uchar_pointer_convert:
-        BX       LR               ;; return
-#endif
-
-
-/***********************************************************************************************/
-/***********************************************************************************************/
-/**                                                                                            */
-/**  UCHAR  *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer);                           */
-/**                                                                                            */
-/***********************************************************************************************/
-/***********************************************************************************************/
-
-        SECTION `.text`:CODE:NOROOT(1)
-        THUMB
-_tx_misra_char_to_uchar_pointer_convert:
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /***********************************************************************************************/
@@ -998,7 +687,7 @@ _tx_misra_char_to_uchar_pointer_convert:
         THUMB
 _tx_misra_ipsr_get:
         MRS      R0, IPSR
-        BX       LR               ;; return
+        BX       LR               // return
 
 
 /***********************************************************************************************/
@@ -1013,7 +702,7 @@ _tx_misra_ipsr_get:
         THUMB
 _tx_misra_control_get:
         MRS      R0, CONTROL
-        BX       LR               ;; return
+        BX       LR               // return
 
         
 /***********************************************************************************************/
@@ -1028,7 +717,7 @@ _tx_misra_control_get:
         THUMB
 _tx_misra_control_set:
         MSR      CONTROL, R0
-        BX       LR               ;; return
+        BX       LR               // return
 
         
 #ifdef __ARMVFP__
@@ -1044,9 +733,9 @@ _tx_misra_control_set:
         SECTION `.text`:CODE:NOROOT(2)
         THUMB
 _tx_misra_fpccr_get:
-        LDR      r0, =0xE000EF34  ; Build FPCCR address
-        LDR      r0, [r0]         ; Load FPCCR value
-        BX       LR               ;; return
+        LDR      r0, =0xE000EF34  // Build FPCCR address
+        LDR      r0, [r0]         // Load FPCCR value
+        BX       LR               // return
         
         
 /***********************************************************************************************/
@@ -1061,7 +750,7 @@ _tx_misra_fpccr_get:
         THUMB
 _tx_misra_vfp_touch:
         vmov.f32 s0, s0
-        BX       LR               ;; return
+        BX       LR               // return
         
 #endif
         

ports/cortex_m4/keil/inc/tx_port.h

@@ -26,7 +26,7 @@
 /*  PORT SPECIFIC C INFORMATION                            RELEASE        */
 /*                                                                        */
 /*    tx_port.h                                         Cortex-M4/Keil    */
-/*                                                           6.1.11       */
+/*                                                           6.1.12       */
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
@@ -59,6 +59,9 @@
 /*  04-25-2022      Scott Larson            Modified comments and added   */
 /*                                            volatile to registers,      */
 /*                                            resulting in version 6.1.11 */
+/*  07-29-2022      Scott Larson            Modified comments and         */
+/*                                            described BASEPRI usage,    */
+/*                                            resulting in version 6.1.12 */
 /*                                                                        */
 /**************************************************************************/
 
@@ -146,6 +149,12 @@ typedef unsigned short                          USHORT;
 #define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
 
 /* Define various constants for the ThreadX Cortex-M port.  */
 
@@ -707,7 +716,7 @@ void    tx_thread_fpu_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M4/Keil Version 6.1.11 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-M4/Keil Version 6.1.12 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_m55/ac6/CMakeLists.txt

@@ -0,0 +1,21 @@
+target_sources(${PROJECT_NAME} PRIVATE
+    ${CMAKE_CURRENT_LIST_DIR}/src/txe_thread_secure_stack_allocate.c
+    ${CMAKE_CURRENT_LIST_DIR}/src/txe_thread_secure_stack_free.c
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_initialize_low_level.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_restore.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_save.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_control.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_disable.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_restore.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_schedule.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack.c
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack_allocate.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack_free.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_stack_build.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_system_return.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_timer_interrupt.S
+)
+
+target_include_directories(${PROJECT_NAME} PUBLIC
+    inc
+)

ports/cortex_m55/ac6/example_build/AzureRTOS.uvmpw

@@ -0,0 +1,26 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectWorkspace xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_mpw.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <WorkspaceName>WorkSpace</WorkspaceName>
+
+  <project>
+    <PathAndName>.\demo_secure_zone\demo_secure_zone.uvprojx</PathAndName>
+    <NodeIsActive>1</NodeIsActive>
+    <NodeIsExpanded>1</NodeIsExpanded>
+  </project>
+
+  <project>
+    <PathAndName>.\demo_threadx_non-secure_zone\demo_threadx_non-secure_zone.uvprojx</PathAndName>
+    <NodeIsExpanded>1</NodeIsExpanded>
+  </project>
+
+  <project>
+    <PathAndName>.\ThreadX_Library.uvprojx</PathAndName>
+    <NodeIsExpanded>1</NodeIsExpanded>
+  </project>
+
+</ProjectWorkspace>

ports/cortex_m55/ac6/example_build/CS300_ac6.sct

@@ -0,0 +1,137 @@
+#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m55 -xc
+; command above MUST be in first line (no comment above!)
+
+;Note: Add '-mcmse' to first line if your software model is "Secure Mode".
+;      #! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m85 -xc -mcmse
+
+
+/*
+;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
+*/
+
+/*
+ ID      From         To                                   Alias  Security  NSC
+  1  0x0000_0000  0x000F_FFFF    1MB  Code  ITCM             4      NS      n/a
+  2  0x0010_0000  0x002F_FFFF    2MB  Code  SRAM (only 2MB)  5      NS      n/a
+  4  0x1000_0000  0x100F_FFFF    1MB  Code  ITCM             1      S       n/a
+  5  0x1100_0000  0x102F_FFFF    2MB  Code  SRAM (only 2MB)  2      S       CODE NSC
+  7  0x2000_0000  0x203F_FFFF    4MB  SRAM  DTCM (4 x 1MB)  11      NS      n/a
+ 11  0x3000_0000  0x303F_FFFF    4MB  SRAM  DTCM (4 x 1MB)   7      S       n/a
+*/
+
+
+/*--------------------- Flash Configuration ----------------------------------
+; <h> Flash Configuration
+;   <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
+;   <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __ROM_BASE      0x00080000
+#define __ROM_SIZE      0x00080000
+
+/*--------------------- Embedded RAM Configuration ---------------------------
+; <h> RAM Configuration
+;   <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
+;   <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __RAM_BASE      0x20080000
+#define __RAM_SIZE      0x00080000
+
+/*--------------------- Stack / Heap Configuration ---------------------------
+; <h> Stack / Heap Configuration
+;   <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;   <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __STACK_SIZE    0x00000400
+#define __HEAP_SIZE     0x00000C00
+
+/*--------------------- CMSE Veneer Configuration ---------------------------
+; <h> CMSE Veneer Configuration
+;   <o0> CMSE VeneerBase Address     <0x0-0xFFFFFFFF:8>
+;     <i> 0xFFFFFFFF: Place Veneers at the end of Flash (default)
+;   <o1> CMSE Veneer Size (in Bytes) <0x0-0xFFFFFFFF:32>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __CMSEVENEER_BASE    0x10100000
+#define __CMSEVENEER_SIZE    0x00000400
+
+/*
+;------------- <<< end of configuration section >>> ---------------------------
+*/
+
+
+/*----------------------------------------------------------------------------
+  User Stack & Heap boundary definition
+ *----------------------------------------------------------------------------*/
+#define __STACK_TOP    (__RAM_BASE + __RAM_SIZE - __STACKSEAL_SIZE) /* starts at end of RAM - 8 byte stack seal */
+#define __HEAP_BASE    (AlignExpr(+0, 8))                           /* starts after RW_RAM section, 8 byte aligned */
+
+/* ----------------------------------------------------------------------------
+  Stack seal size definition
+ *----------------------------------------------------------------------------*/
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __STACKSEAL_SIZE   ( 8 )
+#else
+#define __STACKSEAL_SIZE   ( 0 )
+#endif
+
+
+/*----------------------------------------------------------------------------
+  Region base & size definition
+ *----------------------------------------------------------------------------*/
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#if defined (__CMSEVENEER_BASE) && (__CMSEVENEER_BASE == 0xFFFFFFFF)
+#define __CV_BASE          ( __ROM_BASE + __ROM_SIZE - __CMSEVENEER_SIZE )
+#else
+#define __CV_BASE          ( __CMSEVENEER_BASE )
+#endif
+#define __CV_SIZE          ( __CMSEVENEER_SIZE )
+#else
+#define __CV_SIZE          ( 0 )
+#endif
+
+#define __RO_BASE          ( __ROM_BASE )
+#define __RO_SIZE          ( __ROM_SIZE - __CV_SIZE )
+
+#define __RW_BASE          ( __RAM_BASE )
+#define __RW_SIZE          ( __RAM_SIZE - __STACK_SIZE - __HEAP_SIZE )
+
+
+/*----------------------------------------------------------------------------
+  Scatter Region definition
+ *----------------------------------------------------------------------------*/
+LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
+  ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+
+  RW_RAM __RW_BASE __RW_SIZE  {                     ; RW data
+   .ANY (+RW +ZI)
+  }
+
+#if __HEAP_SIZE > 0
+  ARM_LIB_HEAP  __HEAP_BASE EMPTY  __HEAP_SIZE  {   ; Reserve empty region for heap
+  }
+#endif
+
+  ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE {   ; Reserve empty region for stack
+  }
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  STACKSEAL +0 EMPTY __STACKSEAL_SIZE {             ; Reserve empty region for stack seal immediately after stack
+  }
+#endif
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+LR_CMSE_VENEER __CV_BASE ALIGN 32 __CV_SIZE  {      ; own load/execution region for CMSE Veneers
+  ER_CMSE_VENEER __CV_BASE __CV_SIZE  {
+   *(Veneer$$CMSE)
+  }
+}
+#endif

ports/cortex_m55/ac6/example_build/CS300_ac6_s.sct

@@ -0,0 +1,137 @@
+#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m55 -xc -mcmse
+; command above MUST be in first line (no comment above!)
+
+;Note: Add '-mcmse' to first line if your software model is "Secure Mode".
+;      #! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m85 -xc -mcmse
+
+
+/*
+;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
+*/
+
+/*
+ ID      From         To                                   Alias  Security  NSC
+  1  0x0000_0000  0x000F_FFFF    1MB  Code  ITCM             4      NS      n/a
+  2  0x0010_0000  0x002F_FFFF    2MB  Code  SRAM (only 2MB)  5      NS      n/a
+  4  0x1000_0000  0x100F_FFFF    1MB  Code  ITCM             1      S       n/a
+  5  0x1100_0000  0x102F_FFFF    2MB  Code  SRAM (only 2MB)  2      S       CODE NSC
+  7  0x2000_0000  0x203F_FFFF    4MB  SRAM  DTCM (4 x 1MB)  11      NS      n/a
+ 11  0x3000_0000  0x303F_FFFF    4MB  SRAM  DTCM (4 x 1MB)   7      S       n/a
+*/
+
+
+/*--------------------- Flash Configuration ----------------------------------
+; <h> Flash Configuration
+;   <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
+;   <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __ROM_BASE      0x10000000
+#define __ROM_SIZE      0x00080000
+
+/*--------------------- Embedded RAM Configuration ---------------------------
+; <h> RAM Configuration
+;   <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
+;   <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __RAM_BASE      0x30000000
+#define __RAM_SIZE      0x00080000
+
+/*--------------------- Stack / Heap Configuration ---------------------------
+; <h> Stack / Heap Configuration
+;   <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;   <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __STACK_SIZE    0x00000400
+#define __HEAP_SIZE     0x00000C00
+
+/*--------------------- CMSE Veneer Configuration ---------------------------
+; <h> CMSE Veneer Configuration
+;   <o0> CMSE VeneerBase Address     <0x0-0xFFFFFFFF:8>
+;     <i> 0xFFFFFFFF: Place Veneers at the end of Flash (default)
+;   <o1> CMSE Veneer Size (in Bytes) <0x0-0xFFFFFFFF:32>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __CMSEVENEER_BASE    0x11000000
+#define __CMSEVENEER_SIZE    0x00000400
+
+/*
+;------------- <<< end of configuration section >>> ---------------------------
+*/
+
+
+/*----------------------------------------------------------------------------
+  User Stack & Heap boundary definition
+ *----------------------------------------------------------------------------*/
+#define __STACK_TOP    (__RAM_BASE + __RAM_SIZE - __STACKSEAL_SIZE) /* starts at end of RAM - 8 byte stack seal */
+#define __HEAP_BASE    (AlignExpr(+0, 8))                           /* starts after RW_RAM section, 8 byte aligned */
+
+/* ----------------------------------------------------------------------------
+  Stack seal size definition
+ *----------------------------------------------------------------------------*/
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#define __STACKSEAL_SIZE   ( 8 )
+#else
+#define __STACKSEAL_SIZE   ( 0 )
+#endif
+
+
+/*----------------------------------------------------------------------------
+  Region base & size definition
+ *----------------------------------------------------------------------------*/
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#if defined (__CMSEVENEER_BASE) && (__CMSEVENEER_BASE == 0xFFFFFFFF)
+#define __CV_BASE          ( __ROM_BASE + __ROM_SIZE - __CMSEVENEER_SIZE )
+#else
+#define __CV_BASE          ( __CMSEVENEER_BASE )
+#endif
+#define __CV_SIZE          ( __CMSEVENEER_SIZE )
+#else
+#define __CV_SIZE          ( 0 )
+#endif
+
+#define __RO_BASE          ( __ROM_BASE )
+#define __RO_SIZE          ( __ROM_SIZE - __CV_SIZE )
+
+#define __RW_BASE          ( __RAM_BASE )
+#define __RW_SIZE          ( __RAM_SIZE - __STACK_SIZE - __HEAP_SIZE )
+
+
+/*----------------------------------------------------------------------------
+  Scatter Region definition
+ *----------------------------------------------------------------------------*/
+LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
+  ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+
+  RW_RAM __RW_BASE __RW_SIZE  {                     ; RW data
+   .ANY (+RW +ZI)
+  }
+
+#if __HEAP_SIZE > 0
+  ARM_LIB_HEAP  __HEAP_BASE EMPTY  __HEAP_SIZE  {   ; Reserve empty region for heap
+  }
+#endif
+
+  ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE {   ; Reserve empty region for stack
+  }
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  STACKSEAL +0 EMPTY __STACKSEAL_SIZE {             ; Reserve empty region for stack seal immediately after stack
+  }
+#endif
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+LR_CMSE_VENEER __CV_BASE ALIGN 32 __CV_SIZE  {      ; own load/execution region for CMSE Veneers
+  ER_CMSE_VENEER __CV_BASE __CV_SIZE  {
+   *(Veneer$$CMSE)
+  }
+}
+#endif

ports/cortex_m55/ac6/example_build/CS300_config.txt

@@ -0,0 +1,19 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#------------------------------------------------------------------------------
+cpu0.semihosting-enable=0                             # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+#cpu0.cpi_div=1                                        # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction)
+#cpu0.cpi_mul=1                                        # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction)
+#cpu0.min_sync_level=3                                 # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
+cpu0.FPU=1                                            # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+cpu0.MVE=2                                            # (int   , init-time) default = '0x1'    : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included
+#cpu0.SAU=8                                            # (int   , init-time) default = '0x8'    : Number of SAU regions (0 => no SAU)
+#cpu0.SECEXT=1                                         # (bool  , init-time) default = '1'      : Whether the ARMv8-M Security Extensions are included
+#cpu0.INITSVTOR=0x10000000                             # (int   , init-time) default = '0x10000000' : Secure vector-table offset at reset
+#cpu0.INITNSVTOR=0x00000000                            # (int   , init-time) default = '0x0'    : Non-Secure vector-table offset at reset
+#NSC_CFG_0=1                                           # (bool  , init-time) default = '0'      : Whether 0x10000000..0x1FFFFFFF is non-secure-callable
+#NSC_CFG_1=0                                           # (bool  , init-time) default = '0'      : Whether 0x30000000..0x3FFFFFFF is non-secure-callable
+#mps3_board.platform_type=1                            # (int   , init-time) default = '0x1'    : 0:Original MPS3; 1:SSE-300
+mps3_board.visualisation.disable-visualisation=1      # (bool  , init-time) default = '0'      : Enable/disable visualisation
+#cpu_core.mps3_board.DISABLE_GATING=1                  # (bool  , init-time) default = '0'      : Disable Memory gating logic
+#------------------------------------------------------------------------------

ports/cortex_m55/ac6/example_build/Debug.ini

@@ -0,0 +1,4 @@
+LOAD "..\\demo_threadx_non-secure_zone\\Objects\\demo_threadx_non-secure_zone.axf" incremental
+LOAD "..\\demo_secure_zone\\Objects\\secure_app.axf" incremental
+RESET
+g, \\secure_app\main_s\main