Add error handling in lock initialization in the Xtensa port (#340)

* Add error handling in lock initialization.

* Update release data and version.

.github/workflows/cache-update.yml

@@ -1,28 +0,0 @@
-name: cache-update
-
-on:
-  schedule:
-    - cron: '0 0 */3 * *' # every 30m for testing
-
-# A workflow run is made up of one or more jobs that can run sequentially or in parallel
-jobs:
-  # This workflow contains a single job called "build"
-  build:
-    # The type of runner that the job will run on
-    runs-on: ubuntu-latest
-
-    # Steps represent a sequence of tasks that will be executed as part of the job
-    steps:    # Cache location for arm tools
-    - name: Cache arm-none-eabi-gcc tools
-      id: cache-arm-gcc
-      uses: actions/cache@v1
-      with:
-        path: $HOME/arm-none-eabi-gcc-9-2019-q4
-        key: ${{ runner.os }}-arm-gcc-9-2019-q4
-
-    # Get the arm-non-eabi-gcc toolchain   
-    - name: Install arm-none-eabi-gcc
-      uses: fiam/arm-none-eabi-gcc@v1
-      with:
-          release: '9-2019-q4' # The arm-none-eabi-gcc release to use.
-          directory: $HOME/arm-none-eabi-gcc-9-2019-q4

.github/workflows/ci_cortex_m.yml

@@ -1,6 +1,6 @@
 # This is a basic workflow to help you get started with Actions
 
-name: cortex_m7
+name: cortex_m
 
 # Controls when the action will run. Triggers the workflow on push or pull request
 # events but only for the master branch
@@ -10,9 +10,12 @@ on:
   pull_request:
     branches: [ master ]
     paths:
-      - ".github/workflows/ci_cortex_m7.yml"
+      - ".github/workflows/ci_cortex_m.yml"
       - 'common/**'
       - 'utility/**'
+      - 'ports/cortex_m0/gnu/**'
+      - 'ports/cortex_m3/gnu/**'
+      - 'ports/cortex_m4/gnu/**'
       - 'ports/cortex_m7/gnu/**'
 
 # A workflow run is made up of one or more jobs that can run sequentially or in parallel
@@ -22,13 +25,18 @@ jobs:
     # The type of runner that the job will run on
     runs-on: ubuntu-latest
 
+    strategy:
+      matrix:
+        port: [0, 3, 4, 7]
+
+    name: Cortex M${{ matrix.port }} build
+
     # Steps represent a sequence of tasks that will be executed as part of the job
     steps:
     # Checks-out your repository under $GITHUB_WORKSPACE, so your job can access it
-    - name: Checkout sources recursively
-      uses: actions/checkout@v2
+    - name: Check out the repository
+      uses: actions/checkout@v4
       with:
-        token: ${{ secrets.REPO_SCOPED_TOKEN }}
         submodules: true
 
     # Store the arm compilers in the cache to speed up builds
@@ -57,7 +65,7 @@ jobs:
 
     # Prepare the build system
     - name: Prepare build system
-      run: cmake -Bbuild -DCMAKE_TOOLCHAIN_FILE=./cmake/cortex_m7.cmake -GNinja .
+      run: cmake -Bbuild -DCMAKE_TOOLCHAIN_FILE=./cmake/cortex_m${{ matrix.port }}.cmake -GNinja .
       env:
         PATH: "$HOME/arm-none-eabi-gcc-9-2019-q4/bin:$PATH"
 

.github/workflows/ci_cortex_m0.yml

@@ -1,69 +0,0 @@
-# This is a basic workflow to help you get started with Actions
-
-name: cortex_m0
-
-# Controls when the action will run. Triggers the workflow on push or pull request
-# events but only for the master branch
-on:
-  push:
-    branches: [ master ]
-  pull_request:
-    branches: [ master ]
-    paths:
-      - ".github/workflows/ci_cortex_m0.yml"
-      - 'common/**'
-      - 'utility/**'
-      - 'ports/cortex_m0/gnu/**'
-
-# A workflow run is made up of one or more jobs that can run sequentially or in parallel
-jobs:
-  # This workflow contains a single job called "build"
-  build:
-    # The type of runner that the job will run on
-    runs-on: ubuntu-latest
-
-    # Steps represent a sequence of tasks that will be executed as part of the job
-    steps:
-    # Checks-out your repository under $GITHUB_WORKSPACE, so your job can access it
-    - name: Checkout sources recursively
-      uses: actions/checkout@v2
-      with:
-        token: ${{ secrets.REPO_SCOPED_TOKEN }}
-        submodules: true
-
-    # Store the arm compilers in the cache to speed up builds
-    - name: Cache arm-none-eabi-gcc tools
-      id: cache-arm-gcc
-      uses: actions/cache@v1
-      with:
-        path: $HOME/arm-none-eabi-gcc-9-2019-q4
-        key: ${{ runner.os }}-arm-gcc-9-2019-q4
-
-    # Get the arm-non-eabi-gcc toolchain   
-    - name: Install arm-none-eabi-gcc
-      uses: fiam/arm-none-eabi-gcc@v1
-      if: steps.cache-arm-gcc.outputs.cache-hit != 'true'
-      with:
-          release: '9-2019-q4' # The arm-none-eabi-gcc release to use.
-          directory: $HOME/arm-none-eabi-gcc-9-2019-q4
-
-    # Get CMake into the environment
-    - name: Install cmake 3.19.1
-      uses: lukka/get-cmake@v3.19.1
-
-    # Get Ninja into the environment
-    - name: Install ninja-build
-      uses: seanmiddleditch/gha-setup-ninja@v3
-
-    # Prepare the build system
-    - name: Prepare build system
-      run: cmake -Bbuild -DCMAKE_TOOLCHAIN_FILE=./cmake/cortex_m0.cmake -GNinja .
-      env:
-        PATH: "$HOME/arm-none-eabi-gcc-9-2019-q4/bin:$PATH"
-
-    - name: Compile and link
-      run: cmake --build ./build
-      env:
-        PATH: "$HOME/arm-none-eabi-gcc-9-2019-q4/bin:$PATH"
-
-

.github/workflows/ci_cortex_m3.yml

@@ -1,69 +0,0 @@
-# This is a basic workflow to help you get started with Actions
-
-name: cortex_m3
-
-# Controls when the action will run. Triggers the workflow on push or pull request
-# events but only for the master branch
-on:
-  push:
-    branches: [ master ]
-  pull_request:
-    branches: [ master ]
-    paths:
-      - ".github/workflows/ci_cortex_m3.yml"
-      - 'common/**'
-      - 'utility/**'
-      - 'ports/cortex_m3/gnu/**'
-
-# A workflow run is made up of one or more jobs that can run sequentially or in parallel
-jobs:
-  # This workflow contains a single job called "build"
-  build:
-    # The type of runner that the job will run on
-    runs-on: ubuntu-latest
-
-    # Steps represent a sequence of tasks that will be executed as part of the job
-    steps:
-    # Checks-out your repository under $GITHUB_WORKSPACE, so your job can access it
-    - name: Checkout sources recursively
-      uses: actions/checkout@v2
-      with:
-        token: ${{ secrets.REPO_SCOPED_TOKEN }}
-        submodules: true
-
-    # Store the arm compilers in the cache to speed up builds
-    - name: Cache arm-none-eabi-gcc tools
-      id: cache-arm-gcc
-      uses: actions/cache@v1
-      with:
-        path: $HOME/arm-none-eabi-gcc-9-2019-q4
-        key: ${{ runner.os }}-arm-gcc-9-2019-q4
-
-    # Get the arm-non-eabi-gcc toolchain   
-    - name: Install arm-none-eabi-gcc
-      uses: fiam/arm-none-eabi-gcc@v1
-      if: steps.cache-arm-gcc.outputs.cache-hit != 'true'
-      with:
-          release: '9-2019-q4' # The arm-none-eabi-gcc release to use.
-          directory: $HOME/arm-none-eabi-gcc-9-2019-q4
-
-    # Get CMake into the environment
-    - name: Install cmake 3.19.1
-      uses: lukka/get-cmake@v3.19.1
-
-    # Get Ninja into the environment
-    - name: Install ninja-build
-      uses: seanmiddleditch/gha-setup-ninja@v3
-
-    # Prepare the build system
-    - name: Prepare build system
-      run: cmake -Bbuild -DCMAKE_TOOLCHAIN_FILE=./cmake/cortex_m3.cmake -GNinja .
-      env:
-        PATH: "$HOME/arm-none-eabi-gcc-9-2019-q4/bin:$PATH"
-
-    - name: Compile and link
-      run: cmake --build ./build
-      env:
-        PATH: "$HOME/arm-none-eabi-gcc-9-2019-q4/bin:$PATH"
-
-

.github/workflows/ci_cortex_m4.yml

@@ -1,69 +0,0 @@
-# This is a basic workflow to help you get started with Actions
-
-name: cortex_m4
-
-# Controls when the action will run. Triggers the workflow on push or pull request
-# events but only for the master branch
-on:
-  push:
-    branches: [ master ]
-  pull_request:
-    branches: [ master ]
-    paths:
-      - ".github/workflows/ci_cortex_m4.yml"
-      - 'common/**'
-      - 'utility/**'
-      - 'ports/cortex_m4/gnu/**'
-
-# A workflow run is made up of one or more jobs that can run sequentially or in parallel
-jobs:
-  # This workflow contains a single job called "build"
-  build:
-    # The type of runner that the job will run on
-    runs-on: ubuntu-latest
-
-    # Steps represent a sequence of tasks that will be executed as part of the job
-    steps:
-    # Checks-out your repository under $GITHUB_WORKSPACE, so your job can access it
-    - name: Checkout sources recursively
-      uses: actions/checkout@v2
-      with:
-        token: ${{ secrets.REPO_SCOPED_TOKEN }}
-        submodules: true
-
-    # Store the arm compilers in the cache to speed up builds
-    - name: Cache arm-none-eabi-gcc tools
-      id: cache-arm-gcc
-      uses: actions/cache@v1
-      with:
-        path: $HOME/arm-none-eabi-gcc-9-2019-q4
-        key: ${{ runner.os }}-arm-gcc-9-2019-q4
-
-    # Get the arm-non-eabi-gcc toolchain   
-    - name: Install arm-none-eabi-gcc
-      uses: fiam/arm-none-eabi-gcc@v1
-      if: steps.cache-arm-gcc.outputs.cache-hit != 'true'
-      with:
-          release: '9-2019-q4' # The arm-none-eabi-gcc release to use.
-          directory: $HOME/arm-none-eabi-gcc-9-2019-q4
-
-    # Get CMake into the environment
-    - name: Install cmake 3.19.1
-      uses: lukka/get-cmake@v3.19.1
-
-    # Get Ninja into the environment
-    - name: Install ninja-build
-      uses: seanmiddleditch/gha-setup-ninja@v3
-
-    # Prepare the build system
-    - name: Prepare build system
-      run: cmake -Bbuild -DCMAKE_TOOLCHAIN_FILE=./cmake/cortex_m4.cmake -GNinja .
-      env:
-        PATH: "$HOME/arm-none-eabi-gcc-9-2019-q4/bin:$PATH"
-
-    - name: Compile and link
-      run: cmake --build ./build
-      env:
-        PATH: "$HOME/arm-none-eabi-gcc-9-2019-q4/bin:$PATH"
-
-

.github/workflows/regression_template.yml

@@ -0,0 +1,197 @@
+# This is a basic workflow that is manually triggered
+
+name: regression_template
+
+on:
+  workflow_call:
+    inputs:
+      install_script:
+        default: './scripts/install.sh'
+        required: false
+        type: string
+      build_script:
+        default: './scripts/build.sh'
+        required: false
+        type: string
+      test_script:
+        default: './scripts/test.sh'
+        required: false
+        type: string
+      cmake_path:
+        default: './test/cmake'
+        required: false
+        type: string
+      skip_test:
+        default: false
+        required: false
+        type: boolean
+      skip_coverage:
+        default: false
+        required: false
+        type: boolean
+      coverage_name:
+        default: 'default_build_coverage'
+        required: false
+        type: string
+      skip_deploy:
+        default: false
+        required: false
+        type: boolean
+      deploy_list:
+        default: ''
+        required: false
+        type: string
+      result_affix:
+        default: ''
+        required: false
+        type: string
+
+# A workflow run is made up of one or more jobs that can run sequentially or in parallel
+jobs:
+  # This workflow contains a single job called "linux_job"
+  run_tests:
+    if: ${{ !inputs.skip_test}}
+    permissions:
+      contents: read
+      issues: read
+      checks: write
+      pull-requests: write
+      
+    # The type of runner that the job will run on
+    runs-on: ubuntu-latest
+
+    # Steps represent a sequence of tasks that will be executed as part of the job
+    steps:
+    - name: Check out the repository
+      uses: actions/checkout@v4
+      with:
+        submodules: true
+    
+    - name: Install softwares
+      run: ${{ inputs.install_script }}
+
+    - name: Build
+      run: ${{ inputs.build_script }}
+
+    - name: Test
+      run: ${{ inputs.test_script }}
+      
+    - name: Publish Test Results
+      uses: EnricoMi/publish-unit-test-result-action@v2.11.0
+      if: always()
+      with:
+        check_name: Test Results ${{ inputs.result_affix }}
+        files: |
+          ${{ inputs.cmake_path }}/build/*/*.xml
+          
+    - name: Upload Test Results
+      if: success() || failure()
+      uses: actions/upload-artifact@v3.1.3
+      with:
+        name: test_reports ${{ inputs.result_affix }}
+        path: |
+          ${{ inputs.cmake_path }}/build/*.txt
+          ${{ inputs.cmake_path }}/build/*/Testing/**/*.xml
+          ${{ inputs.cmake_path }}/build/**/regression/output_files/*.bin
+    
+    - name: Configure GitHub Pages
+      uses: actions/configure-pages@v3.0.6
+
+    - name: Generate Code Coverage Results Summary
+      if: (!inputs.skip_coverage)
+      uses: irongut/CodeCoverageSummary@v1.3.0
+      with:
+        filename: ${{ inputs.cmake_path }}/coverage_report/${{ inputs.coverage_name }}.xml
+        format: markdown
+        badge: true
+        hide_complexity: true
+        output: file
+
+    - name: Write Code Coverage Summary
+      if: (!inputs.skip_coverage)
+      run: |
+        echo "## Coverage Report ${{ inputs.result_affix }}" >> $GITHUB_STEP_SUMMARY
+        cat code-coverage-results.md >> $GITHUB_STEP_SUMMARY
+
+    - name: Create CheckRun for Code Coverage
+      if: ((github.event_name == 'push') || (github.event_name == 'workflow_dispatch') || (github.event.pull_request.head.repo.full_name == github.repository)) && (!inputs.skip_coverage)
+      uses: LouisBrunner/checks-action@v1.6.2
+      with:
+        token: ${{ secrets.GITHUB_TOKEN }}
+        name: Code Coverage ${{ inputs.result_affix }}
+        conclusion: ${{ job.status }}
+        output: |
+          {"summary":"Coverage Report"}
+        output_text_description_file: code-coverage-results.md
+
+    - name: Add Code Coverage PR Comment
+      if: ((github.event_name == 'push') || (github.event.pull_request.head.repo.full_name == github.repository)) && (!inputs.skip_coverage)
+      uses: marocchino/sticky-pull-request-comment@v2
+      with:
+        header: Code Coverage ${{ inputs.result_affix }}
+        path: code-coverage-results.md
+
+    # Add sudo to move coverage folder created by root user
+    - name: Prepare Coverage GitHub Pages
+      if: (!inputs.skip_coverage)
+      run: >-
+        if [ "${{ inputs.result_affix }}" != "" ] && ${{ inputs.skip_deploy }}; then
+          sudo mv ${{ inputs.cmake_path }}/coverage_report/${{ inputs.coverage_name }} \
+            ${{ inputs.cmake_path }}/coverage_report/${{ inputs.result_affix }}
+        fi
+          
+    - name: Upload Code Coverage Artifacts
+      uses: actions/upload-artifact@v3.1.3
+      if: (inputs.skip_deploy && !inputs.skip_coverage)
+      with:
+        name: coverage_report
+        path: ${{ inputs.cmake_path }}/coverage_report
+        retention-days: 1
+          
+    - name: Upload Code Coverage Pages
+      uses: actions/upload-pages-artifact@v2.0.0
+      if: (!inputs.skip_deploy && !inputs.skip_coverage)
+      with:
+        path: ${{ inputs.cmake_path }}/coverage_report/${{ inputs.coverage_name }}
+  
+  deploy_code_coverage:
+    runs-on: ubuntu-latest
+    if: ((github.event_name == 'push') || (github.event_name == 'workflow_dispatch')) && !inputs.skip_coverage && !inputs.skip_deploy && !failure() && !cancelled()
+    needs: run_tests
+    environment:
+      name: github-pages
+      url: ${{ steps.deployment.outputs.page_url }}
+    permissions:
+      pages: write
+      id-token: write
+
+    steps:
+    - uses: actions/download-artifact@v3
+      if: ${{ inputs.skip_test }}
+      with:
+        name: coverage_report
+
+    - name: Upload Code Coverage Pages
+      uses: actions/upload-pages-artifact@v2.0.0
+      if: ${{ inputs.skip_test }}
+      with:
+        path: .
+
+    - name: Delete Duplicate Code Coverage Artifact 
+      uses: geekyeggo/delete-artifact@v2
+      with:
+          name: coverage_report
+
+    - name: Deploy GitHub Pages site
+      id: deployment
+      uses: actions/deploy-pages@v1.2.9
+
+    - name: Write Code Coverage Report URL
+      run: >-
+        if [ "${{ inputs.deploy_list }}" != "" ]; then
+          for i in ${{ inputs.deploy_list }}; do            
+            echo 'Coverage report for ' $i ':${{ steps.deployment.outputs.page_url }}'$i >>  $GITHUB_STEP_SUMMARY
+          done
+        else
+          echo 'Coverage report: ${{ steps.deployment.outputs.page_url }}' >>  $GITHUB_STEP_SUMMARY
+        fi

.github/workflows/regression_test.yml

@@ -0,0 +1,35 @@
+name: regression_test
+
+# Controls when the action will run. Triggers the workflow on push or pull request
+# events but only for the master branch
+on:
+  workflow_dispatch:
+  push:
+    branches: [ master ]
+  pull_request:
+    branches: [ master ]
+
+# A workflow run is made up of one or more jobs that can run sequentially or in parallel
+jobs:
+  tx:
+    uses: ./.github/workflows/regression_template.yml
+    with:
+      build_script: ./scripts/build_tx.sh
+      test_script: ./scripts/test_tx.sh
+      cmake_path: ./test/tx/cmake
+      result_affix: ThreadX
+      skip_deploy: true
+  smp:
+    uses: ./.github/workflows/regression_template.yml
+    with:
+      build_script: ./scripts/build_smp.sh
+      test_script: ./scripts/test_smp.sh
+      cmake_path: ./test/smp/cmake
+      result_affix: SMP
+      skip_deploy: true
+  deploy:
+    needs: [tx, smp]
+    uses: ./.github/workflows/regression_template.yml
+    with:
+      skip_test: true
+      deploy_list: "ThreadX SMP"

.pipelines/smp.yml

@@ -1,80 +0,0 @@
-trigger:
-- master
-
-pr:
-  branches:
-    include:
-      - master
-  paths:
-    include: 
-      - ".pipelines/tx.yml"
-      - "common_smp/**"
-      - "samples/**"
-      - "test/tx/**"
-      - "utility/**"
-      - "ports_smp/linux/gnu/**"
-
-
-pool:
-  vmImage: "ubuntu-22.04"
-
-steps:
-  - task: PipAuthenticate@1
-    displayName: 'Pip Authenticate'
-    inputs:
-      # Provide list of feed names which you want to authenticate.
-      # Project scoped feeds must include the project name in addition to the feed name.
-      artifactFeeds: 'X-Ware/X-Ware_PublicPackages'
-
-  - bash: sudo $(Build.SourcesDirectory)/scripts/install.sh
-    displayName: 'Install softwares'
-
-  - task: Bash@3
-    displayName: 'SDL check'
-    inputs:
-      filePath: '$(Build.SourcesDirectory)/scripts/sdl_check.sh'
-
-  - task: Bash@3
-    displayName: 'Build'
-    inputs:
-      filePath: '$(Build.SourcesDirectory)/scripts/build_smp.sh'
-
-  - task: Bash@3
-    displayName: 'Test'
-    inputs:
-      filePath: '$(Build.SourcesDirectory)/scripts/test_smp.sh'
-
-  - task: PublishTestResults@2
-    condition: succeededOrFailed()
-    displayName: 'PublishTestResults'
-    inputs:
-      testResultsFormat: 'cTest'
-      testResultsFiles: '*/Testing/**/*.xml'
-      searchFolder: '$(Build.SourcesDirectory)/test/smp/cmake/build'
-      testRunTitle: 'SMP-Tests'
-      buildConfiguration: 'Release'
-
-  - task: CopyFiles@2
-    condition: succeededOrFailed()
-    displayName: 'CopyTestReports'
-    inputs:
-      SourceFolder: '$(Build.SourcesDirectory)/test/smp/cmake'
-      Contents: |
-        build/*.txt
-        build/*/Testing/**/*.xml
-        coverage_report/**/*
-      TargetFolder: '$(build.artifactstagingdirectory)/test_reports_SMP'
-
-  - task: PublishBuildArtifacts@1
-    condition: succeededOrFailed()
-    displayName: 'PublishBuildArtifacts'
-    inputs:
-      pathToPublish: $(build.artifactstagingdirectory)
-
-  - task: PublishCodeCoverageResults@1
-    condition: succeededOrFailed()
-    displayName: 'Test SMP (PublishCodeCoverageResults)'
-    inputs:
-      codeCoverageTool: 'Cobertura'
-      summaryFileLocation: '$(Build.SourcesDirectory)/test/smp/cmake/coverage_report/default_build_coverage.xml'
-      pathToSources: '$(Build.SourcesDirectory)/test/smp/cmake'

.pipelines/tx.yml

@@ -1,79 +0,0 @@
-trigger:
-- master
-
-pr:
-  branches:
-    include:
-      - master
-  paths:
-    include: 
-      - ".pipelines/tx.yml"
-      - "common/**"
-      - "samples/**"
-      - "test/tx/**"
-      - "utility/**"
-      - "ports/linux/gnu/**"
-
-pool:
-  vmImage: "ubuntu-22.04"
-
-steps:
-  - task: PipAuthenticate@1
-    displayName: 'Pip Authenticate'
-    inputs:
-      # Provide list of feed names which you want to authenticate.
-      # Project scoped feeds must include the project name in addition to the feed name.
-      artifactFeeds: 'X-Ware/X-Ware_PublicPackages'
-
-  - bash: sudo $(Build.SourcesDirectory)/scripts/install.sh
-    displayName: 'Install softwares'
-
-  - task: Bash@3
-    displayName: 'SDL check'
-    inputs:
-      filePath: '$(Build.SourcesDirectory)/scripts/sdl_check.sh'
-
-  - task: Bash@3
-    displayName: 'Build'
-    inputs:
-      filePath: '$(Build.SourcesDirectory)/scripts/build_tx.sh'
-
-  - task: Bash@3
-    displayName: 'Test'
-    inputs:
-      filePath: '$(Build.SourcesDirectory)/scripts/test_tx.sh'
-
-  - task: PublishTestResults@2
-    condition: succeededOrFailed()
-    displayName: 'PublishTestResults'
-    inputs:
-      testResultsFormat: 'cTest'
-      testResultsFiles: '*/Testing/**/*.xml'
-      searchFolder: '$(Build.SourcesDirectory)/test/tx/cmake/build'
-      testRunTitle: 'TX-Tests'
-      buildConfiguration: 'Release'
-
-  - task: CopyFiles@2
-    condition: succeededOrFailed()
-    displayName: 'CopyTestReports'
-    inputs:
-      SourceFolder: '$(Build.SourcesDirectory)/test/tx/cmake'
-      Contents: |
-        build/*.txt
-        build/*/Testing/**/*.xml
-        coverage_report/**/*
-      TargetFolder: '$(build.artifactstagingdirectory)/test_reports_TX'
-
-  - task: PublishBuildArtifacts@1
-    condition: succeededOrFailed()
-    displayName: 'PublishBuildArtifacts'
-    inputs:
-      pathToPublish: $(build.artifactstagingdirectory)
-
-  - task: PublishCodeCoverageResults@1
-    condition: succeededOrFailed()
-    displayName: 'Test TX (PublishCodeCoverageResults)'
-    inputs:
-      codeCoverageTool: 'Cobertura'
-      summaryFileLocation: '$(Build.SourcesDirectory)/test/tx/cmake/coverage_report/default_build_coverage.xml'
-      pathToSources: '$(Build.SourcesDirectory)/test/tx/cmake'

common/inc/tx_api.h

@@ -26,7 +26,7 @@
 /*  APPLICATION INTERFACE DEFINITION                       RELEASE        */
 /*                                                                        */
 /*    tx_api.h                                            PORTABLE C      */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -101,6 +101,9 @@
 /*                                            added option for random     */
 /*                                            number stack filling,       */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023      Tiejun Zhou             Modified comment(s),          */
+/*                                            update version number,      */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
 
@@ -139,7 +142,7 @@ extern   "C" {
 
 #define AZURE_RTOS_THREADX
 #define THREADX_MAJOR_VERSION           6
-#define THREADX_MINOR_VERSION           3
+#define THREADX_MINOR_VERSION           4
 #define THREADX_PATCH_VERSION           0
 
 /* Define the following symbol for backward compatibility */

common_smp/inc/tx_api.h

@@ -26,7 +26,7 @@
 /*  APPLICATION INTERFACE DEFINITION                       RELEASE        */
 /*                                                                        */
 /*    tx_api.h                                            PORTABLE SMP    */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -89,6 +89,9 @@
 /*                                            added option for random     */
 /*                                            number stack filling,       */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023      Tiejun Zhou             Modified comment(s),          */
+/*                                            update version number,      */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
 
@@ -140,7 +143,7 @@ extern   "C" {
 
 #define AZURE_RTOS_THREADX
 #define THREADX_MAJOR_VERSION           6
-#define THREADX_MINOR_VERSION           3
+#define THREADX_MINOR_VERSION           4
 #define THREADX_PATCH_VERSION           0
 
 /* Define the following symbol for backward compatibility */

ports/arc_em/metaware/inc/tx_port.h

@@ -322,7 +322,7 @@ void    _tx_initialize_start_interrupts(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] = 
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARCv2_EM/MetaWare Version 6.3.0 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARCv2_EM/MetaWare Version 6.4.0 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/arc_hs/metaware/inc/tx_port.h

@@ -336,7 +336,7 @@ VOID  tx_thread_register_bank_assign(VOID *thread_ptr, UINT register_bank);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] = 
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARC_HS/MetaWare Version 6.3.0 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARC_HS/MetaWare Version 6.4.0 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/arm11/ac5/inc/tx_port.h

@@ -320,7 +320,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] = 
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARM11/AC5 Version 6.3.0 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARM11/AC5 Version 6.4.0 *";
 #else
 extern  CHAR                    _tx_version_id[];
 #endif

ports/arm11/gnu/inc/tx_port.h

@@ -309,7 +309,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] = 
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARM11/GNU Version 6.3.0 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARM11/GNU Version 6.4.0 *";
 #else
 extern  CHAR                    _tx_version_id[];
 #endif

ports/arm11/iar/inc/tx_port.h

@@ -375,7 +375,7 @@ void  _tx_thread_interrupt_restore(UINT old_posture);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] = 
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARM11/IAR Version 6.3.0 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARM11/IAR Version 6.4.0 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/arm9/ac5/inc/tx_port.h

@@ -322,7 +322,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] = 
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX  ARM9/AC5 Version 6.3.0 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX  ARM9/AC5 Version 6.4.0 *";
 #else
 extern  CHAR                    _tx_version_id[];
 #endif

ports/arm9/gnu/inc/tx_port.h

@@ -309,7 +309,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] = 
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARM9/GNU Version 6.3.0 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARM9/GNU Version 6.4.0 *";
 #else
 extern  CHAR                    _tx_version_id[];
 #endif

ports/arm9/iar/inc/tx_port.h

@@ -375,7 +375,7 @@ void  _tx_thread_interrupt_restore(UINT old_posture);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] = 
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARM9/IAR Version 6.3.0 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARM9/IAR Version 6.4.0 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/c667x/ccs/inc/tx_port.h

@@ -271,7 +271,7 @@ unsigned int  _tx_thread_interrupt_control(unsigned int);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] = 
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX C667x/TI Version 6.3.0 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX C667x/TI Version 6.4.0 *";
 #else
 extern  CHAR                    _tx_version_id[];
 #endif

ports/cortex_a12/ac6/inc/tx_port.h

@@ -321,7 +321,7 @@ void    tx_thread_vfp_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARMv7-A Version 6.3.0 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARMv7-A Version 6.4.0 *";
 #else
 extern  CHAR                    _tx_version_id[];
 #endif

ports/cortex_a12/ac6/src/tx_thread_context_restore.S

@@ -23,16 +23,16 @@
 #include "tx_user.h"
 #endif
 
-    .arm
-
-#ifdef TX_ENABLE_FIQ_SUPPORT
-SVC_MODE        =     0xD3               // Disable IRQ/FIQ, SVC mode
-IRQ_MODE        =     0xD2               // Disable IRQ/FIQ, IRQ mode
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
 #else
-SVC_MODE        =     0x93               // Disable IRQ, SVC mode
-IRQ_MODE        =     0x92               // Disable IRQ, IRQ mode
+    .arm
 #endif
 
+SVC_MODE        =     0x13               // SVC mode
+IRQ_MODE        =     0x12               // IRQ mode
+
     .global     _tx_thread_system_state
     .global     _tx_thread_current_ptr
     .global     _tx_thread_execute_ptr
@@ -45,7 +45,6 @@ IRQ_MODE        =     0x92               // Disable IRQ, IRQ mode
 /* No 16-bit Thumb mode veneer code is needed for _tx_thread_context_restore
    since it will never be called 16-bit mode.  */
 
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -53,7 +52,7 @@ IRQ_MODE        =     0x92               // Disable IRQ, IRQ mode
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_context_restore                            ARMv7-A       */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -94,6 +93,9 @@ IRQ_MODE        =     0x92               // Disable IRQ, IRQ mode
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
     .global _tx_thread_context_restore
@@ -129,9 +131,9 @@ _tx_thread_context_restore:
     /* Just recover the saved registers and return to the point of
        interrupt.  */
 
-    LDMIA   sp!, {r0, r10, r12, lr}         // Recover SPSR, POI, and scratch regs
+    POP     {r0, r10, r12, lr}              // Recover SPSR, POI, and scratch regs
     MSR     SPSR_cxsf, r0                   // Put SPSR back
-    LDMIA   sp!, {r0-r3}                    // Recover r0-r3
+    POP     {r0-r3}                         // Recover r0-r3
     MOVS    pc, lr                          // Return to point of interrupt
 
 __tx_thread_not_nested_restore:
@@ -160,26 +162,23 @@ __tx_thread_no_preempt_restore:
    /* Pickup the saved stack pointer.  */
 
    /* Recover the saved context and return to the point of interrupt.  */
-    LDMIA   sp!, {r0, r10, r12, lr}         // Recover SPSR, POI, and scratch regs
+    POP     {r0, r10, r12, lr}              // Recover SPSR, POI, and scratch regs
     MSR     SPSR_cxsf, r0                   // Put SPSR back
-    LDMIA   sp!, {r0-r3}                    // Recover r0-r3
+    POP     {r0-r3}                         // Recover r0-r3
     MOVS    pc, lr                          // Return to point of interrupt
 
 __tx_thread_preempt_restore:
 
-    LDMIA   sp!, {r3, r10, r12, lr}         // Recover temporarily saved registers
+    POP     {r3, r10, r12, lr}              // Recover temporarily saved registers
     MOV     r1, lr                          // Save lr (point of interrupt)
-    MOV     r2, #SVC_MODE                   // Build SVC mode CPSR
-    MSR     CPSR_c, r2                      // Enter SVC mode
+    CPS     #SVC_MODE                       // Enter SVC mode
     STR     r1, [sp, #-4]!                  // Save point of interrupt
-    STMDB   sp!, {r4-r12, lr}               // Save upper half of registers
+    PUSH    {r4-r12, lr}                    // Save upper half of registers
     MOV     r4, r3                          // Save SPSR in r4
-    MOV     r2, #IRQ_MODE                   // Build IRQ mode CPSR
-    MSR     CPSR_c, r2                      // Enter IRQ mode
-    LDMIA   sp!, {r0-r3}                    // Recover r0-r3
-    MOV     r5, #SVC_MODE                   // Build SVC mode CPSR
-    MSR     CPSR_c, r5                      // Enter SVC mode
-    STMDB   sp!, {r0-r3}                    // Save r0-r3 on thread's stack
+    CPS     #IRQ_MODE                       // Enter IRQ mode
+    POP     {r0-r3}                         // Recover r0-r3
+    CPS     #SVC_MODE                       // Enter SVC mode
+    PUSH    {r0-r3}                         // Save r0-r3 on thread's stack
 
     LDR     r1, =_tx_thread_current_ptr     // Pickup address of current thread ptr
     LDR     r0, [r1]                        // Pickup current thread pointer
@@ -192,13 +191,11 @@ __tx_thread_preempt_restore:
     STR     r2, [sp, #-4]!                  // Save FPSCR
     VSTMDB  sp!, {D16-D31}                  // Save D16-D31
     VSTMDB  sp!, {D0-D15}                   // Save D0-D15
-
 _tx_skip_irq_vfp_save:
-
 #endif
 
     MOV     r3, #1                          // Build interrupt stack type
-    STMDB   sp!, {r3, r4}                   // Save interrupt stack type and SPSR
+    PUSH    {r3, r4}                        // Save interrupt stack type and SPSR
     STR     sp, [r0, #8]                    // Save stack pointer in thread control
                                             //   block
 
@@ -223,6 +220,5 @@ __tx_thread_dont_save_ts:
 __tx_thread_idle_system_restore:
 
     /* Just return back to the scheduler!  */
-    MOV     r0, #SVC_MODE                   // Build SVC mode CPSR
-    MSR     CPSR_c, r0                      // Enter SVC mode
+    CPS     #SVC_MODE                       // Enter SVC mode
     B       _tx_thread_schedule             // Return to scheduler

ports/cortex_a12/ac6/src/tx_thread_context_save.S

@@ -23,6 +23,13 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
     .global     _tx_thread_system_state
     .global     _tx_thread_current_ptr
     .global     __tx_irq_processing_return
@@ -31,7 +38,6 @@
 /* No 16-bit Thumb mode veneer code is needed for _tx_thread_context_save
    since it will never be called 16-bit mode.  */
 
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -39,7 +45,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_context_save                              ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -79,6 +85,9 @@
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
     .global _tx_thread_context_save
@@ -90,7 +99,7 @@ _tx_thread_context_save:
 
     /* Check for a nested interrupt condition.  */
 
-    STMDB   sp!, {r0-r3}                    // Save some working registers
+    PUSH    {r0-r3}                         // Save some working registers
 #ifdef TX_ENABLE_FIQ_SUPPORT
     CPSID   if                              // Disable FIQ interrupts
 #endif
@@ -101,15 +110,15 @@ _tx_thread_context_save:
 
     /* Nested interrupt condition.  */
 
-    ADD     r2, r2, #1                      // Increment the interrupt counter
+    ADD     r2, #1                          // Increment the interrupt counter
     STR     r2, [r3]                        // Store it back in the variable
 
    /* Save the rest of the scratch registers on the stack and return to the
       calling ISR.  */
 
     MRS     r0, SPSR                        // Pickup saved SPSR
-    SUB     lr, lr, #4                      // Adjust point of interrupt
-    STMDB   sp!, {r0, r10, r12, lr}         // Store other registers
+    SUB     lr, #4                          // Adjust point of interrupt
+    PUSH    {r0, r10, r12, lr}              // Store other registers
 
     /* Return to the ISR.  */
 
@@ -129,7 +138,7 @@ _tx_thread_context_save:
 __tx_thread_not_nested_save:
 
     /* Otherwise, not nested, check to see if a thread was running.  */
-    ADD     r2, r2, #1                      // Increment the interrupt counter
+    ADD     r2, #1                          // Increment the interrupt counter
     STR     r2, [r3]                        // Store it back in the variable
     LDR     r1, =_tx_thread_current_ptr     // Pickup address of current thread ptr
     LDR     r0, [r1]                        // Pickup current thread pointer
@@ -140,8 +149,8 @@ __tx_thread_not_nested_save:
     /* Save minimal context of interrupted thread.  */
 
     MRS     r2, SPSR                        // Pickup saved SPSR
-    SUB     lr, lr, #4                      // Adjust point of interrupt
-    STMDB   sp!, {r2, r10, r12, lr}         // Store other registers
+    SUB     lr, #4                          // Adjust point of interrupt
+    PUSH    {r2, r10, r12, lr}              // Store other registers
 
     MOV     r10, #0                         // Clear stack limit
 
@@ -174,5 +183,5 @@ __tx_thread_idle_system_save:
     POP     {lr}                            // Recover ISR lr
 #endif
 
-    ADD     sp, sp, #16                     // Recover saved registers
+    ADD     sp, #16                         // Recover saved registers
     B       __tx_irq_processing_return      // Continue IRQ processing

ports/cortex_a12/ac6/src/tx_thread_fiq_nesting_end.S

@@ -23,6 +23,13 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
 #ifdef TX_ENABLE_FIQ_SUPPORT
 DISABLE_INTS    =       0xC0                    // Disable IRQ/FIQ interrupts
 #else
@@ -31,11 +38,6 @@ DISABLE_INTS    =       0x80                    // Disable IRQ interrupts
 MODE_MASK       =       0x1F                    // Mode mask
 FIQ_MODE_BITS   =       0x11                    // FIQ mode bits
 
-
-/* No 16-bit Thumb mode veneer code is needed for _tx_thread_fiq_nesting_end
-   since it will never be called 16-bit mode.  */
-
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -43,7 +45,7 @@ FIQ_MODE_BITS   =       0x11                    // FIQ mode bits
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_fiq_nesting_end                           ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -88,8 +90,14 @@ FIQ_MODE_BITS   =       0x11                    // FIQ mode bits
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_fiq_nesting_end
     .type    _tx_thread_fiq_nesting_end,function
 _tx_thread_fiq_nesting_end:
@@ -103,8 +111,4 @@ _tx_thread_fiq_nesting_end:
     ORR     r0, r0, #FIQ_MODE_BITS              // Build IRQ mode CPSR
     MSR     CPSR_c, r0                          // Reenter IRQ mode
 
-#ifdef __THUMB_INTERWORK
     BX      r3                                  // Return to caller
-#else
-    MOV     pc, r3                              // Return to caller
-#endif

ports/cortex_a12/ac6/src/tx_thread_fiq_nesting_start.S

@@ -23,15 +23,17 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
 FIQ_DISABLE     =       0x40                    // FIQ disable bit
 MODE_MASK       =       0x1F                    // Mode mask
 SYS_MODE_BITS   =       0x1F                    // System mode bits
 
-
-/* No 16-bit Thumb mode veneer code is needed for _tx_thread_fiq_nesting_start
-   since it will never be called 16-bit mode.  */
-
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -39,7 +41,7 @@ SYS_MODE_BITS   =       0x1F                    // System mode bits
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_fiq_nesting_start                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -81,8 +83,14 @@ SYS_MODE_BITS   =       0x1F                    // System mode bits
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_fiq_nesting_start
     .type    _tx_thread_fiq_nesting_start,function
 _tx_thread_fiq_nesting_start:
@@ -95,8 +103,4 @@ _tx_thread_fiq_nesting_start:
                                                 //   and push r1 just to keep 8-byte alignment
     BIC     r0, r0, #FIQ_DISABLE                // Build enable FIQ CPSR
     MSR     CPSR_c, r0                          // Enter system mode
-#ifdef __THUMB_INTERWORK
     BX      r3                                  // Return to caller
-#else
-    MOV     pc, r3                              // Return to caller
-#endif

ports/cortex_a12/ac6/src/tx_thread_interrupt_control.S

@@ -23,25 +23,18 @@
 #include "tx_user.h"
 #endif
 
-INT_MASK        =   0x03F
-
-
-/* Define the 16-bit Thumb mode veneer for _tx_thread_interrupt_control for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .global $_tx_thread_interrupt_control
-$_tx_thread_interrupt_control:
+    .syntax unified
+#if defined(THUMB_MODE)
     .thumb
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
+#else
     .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_interrupt_control     // Call _tx_thread_interrupt_control function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
+#endif
 
+INT_MASK        =   0x0C0
+IRQ_MASK        =   0x080
+#ifdef TX_ENABLE_FIQ_SUPPORT
+FIQ_MASK        =   0x040
+#endif
 
     .text
     .align 2
@@ -50,7 +43,7 @@ $_tx_thread_interrupt_control:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_interrupt_control                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -86,25 +79,35 @@ $_tx_thread_interrupt_control:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_thread_interrupt_control
     .type   _tx_thread_interrupt_control,function
 _tx_thread_interrupt_control:
+    MRS     r1, CPSR                            // Pickup current CPSR
 
-    /* Pickup current interrupt lockout posture.  */
-
-    MRS     r3, CPSR                    // Pickup current CPSR
-    MOV     r2, #INT_MASK               // Build interrupt mask
-    AND     r1, r3, r2                  // Clear interrupt lockout bits
-    ORR     r1, r1, r0                  // Or-in new interrupt lockout bits
-
-    /* Apply the new interrupt posture.  */
-
-    MSR     CPSR_c, r1                  // Setup new CPSR
-    BIC     r0, r3, r2                  // Return previous interrupt mask
-#ifdef __THUMB_INTERWORK
-    BX      lr                          // Return to caller
+#ifdef TX_ENABLE_FIQ_SUPPORT
+    CPSID   if                                  // Disable IRQ and FIQ
 #else
-    MOV     pc, lr                      // Return to caller
+    CPSID   i                                   // Disable IRQ
 #endif
+
+    TST     r0, #IRQ_MASK
+    BNE     no_irq
+    CPSIE   i
+no_irq:
+#ifdef TX_ENABLE_FIQ_SUPPORT
+    TST     r0, #FIQ_MASK
+    BNE     no_fiq
+    CPSIE   f
+no_fiq:
+#endif
+
+    AND     r0, r1, #INT_MASK
+    BX      lr

ports/cortex_a12/ac6/src/tx_thread_interrupt_disable.S

@@ -23,22 +23,12 @@
 #include "tx_user.h"
 #endif
 
-/* Define the 16-bit Thumb mode veneer for _tx_thread_interrupt_disable for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .global $_tx_thread_interrupt_disable
-$_tx_thread_interrupt_disable:
+    .syntax unified
+#if defined(THUMB_MODE)
     .thumb
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
+#else
     .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_interrupt_disable     // Call _tx_thread_interrupt_disable function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
-
+#endif
 
     .text
     .align 2
@@ -47,7 +37,7 @@ $_tx_thread_interrupt_disable:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_interrupt_disable                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -82,8 +72,14 @@ $_tx_thread_interrupt_disable:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_thread_interrupt_disable
     .type   _tx_thread_interrupt_disable,function
 _tx_thread_interrupt_disable:
@@ -100,8 +96,4 @@ _tx_thread_interrupt_disable:
     CPSID   i                                   // Disable IRQ
 #endif
 
-#ifdef __THUMB_INTERWORK
     BX      lr                                  // Return to caller
-#else
-    MOV     pc, lr                              // Return to caller
-#endif

ports/cortex_a12/ac6/src/tx_thread_interrupt_restore.S

@@ -23,22 +23,17 @@
 #include "tx_user.h"
 #endif
 
-/* Define the 16-bit Thumb mode veneer for _tx_thread_interrupt_restore for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .global $_tx_thread_interrupt_restore
-$_tx_thread_interrupt_restore:
+    .syntax unified
+#if defined(THUMB_MODE)
     .thumb
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
+#else
     .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_interrupt_restore     // Call _tx_thread_interrupt_restore function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
+#endif
 
+IRQ_MASK        =   0x080
+#ifdef TX_ENABLE_FIQ_SUPPORT
+FIQ_MASK        =   0x040
+#endif
 
     .text
     .align 2
@@ -47,7 +42,7 @@ $_tx_thread_interrupt_restore:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_interrupt_restore                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -83,17 +78,27 @@ $_tx_thread_interrupt_restore:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_interrupt_restore
     .type    _tx_thread_interrupt_restore,function
 _tx_thread_interrupt_restore:
 
-    /* Apply the new interrupt posture.  */
-
-    MSR     CPSR_c, r0                          // Setup new CPSR
-#ifdef __THUMB_INTERWORK
-    BX      lr                                  // Return to caller
-#else
-    MOV     pc, lr                              // Return to caller
+    TST     r0, #IRQ_MASK
+    BNE     no_irq
+    CPSIE   i
+no_irq:
+#ifdef TX_ENABLE_FIQ_SUPPORT
+    TST     r0, #FIQ_MASK
+    BNE     no_fiq
+    CPSIE   f
+no_fiq:
 #endif
+
+    BX      lr                                  // Return to caller

ports/cortex_a12/ac6/src/tx_thread_irq_nesting_end.S

@@ -23,6 +23,13 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
 #ifdef TX_ENABLE_FIQ_SUPPORT
 DISABLE_INTS    =       0xC0                    // Disable IRQ/FIQ interrupts
 #else
@@ -31,11 +38,6 @@ DISABLE_INTS    =       0x80                    // Disable IRQ interrupts
 MODE_MASK       =       0x1F                    // Mode mask
 IRQ_MODE_BITS   =       0x12                    // IRQ mode bits
 
-
-/* No 16-bit Thumb mode veneer code is needed for _tx_thread_irq_nesting_end
-   since it will never be called 16-bit mode.  */
-
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -43,7 +45,7 @@ IRQ_MODE_BITS   =       0x12                    // IRQ mode bits
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_irq_nesting_end                           ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -88,8 +90,14 @@ IRQ_MODE_BITS   =       0x12                    // IRQ mode bits
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_irq_nesting_end
     .type    _tx_thread_irq_nesting_end,function
 _tx_thread_irq_nesting_end:
@@ -102,8 +110,4 @@ _tx_thread_irq_nesting_end:
     BIC     r0, r0, #MODE_MASK                  // Clear mode bits
     ORR     r0, r0, #IRQ_MODE_BITS              // Build IRQ mode CPSR
     MSR     CPSR_c, r0                          // Reenter IRQ mode
-#ifdef __THUMB_INTERWORK
     BX      r3                                  // Return to caller
-#else
-    MOV     pc, r3                              // Return to caller
-#endif

ports/cortex_a12/ac6/src/tx_thread_irq_nesting_start.S

@@ -23,15 +23,17 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
 IRQ_DISABLE     =       0x80                    // IRQ disable bit
 MODE_MASK       =       0x1F                    // Mode mask
 SYS_MODE_BITS   =       0x1F                    // System mode bits
 
-
-/* No 16-bit Thumb mode veneer code is needed for _tx_thread_irq_nesting_start
-   since it will never be called 16-bit mode.  */
-
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -39,7 +41,7 @@ SYS_MODE_BITS   =       0x1F                    // System mode bits
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_irq_nesting_start                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -81,8 +83,14 @@ SYS_MODE_BITS   =       0x1F                    // System mode bits
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_irq_nesting_start
     .type    _tx_thread_irq_nesting_start,function
 _tx_thread_irq_nesting_start:
@@ -95,8 +103,4 @@ _tx_thread_irq_nesting_start:
                                                 //   and push r1 just to keep 8-byte alignment
     BIC     r0, r0, #IRQ_DISABLE                // Build enable IRQ CPSR
     MSR     CPSR_c, r0                          // Enter system mode
-#ifdef __THUMB_INTERWORK
     BX      r3                                  // Return to caller
-#else
-    MOV     pc, r3                              // Return to caller
-#endif

ports/cortex_a12/ac6/src/tx_thread_schedule.S

@@ -23,37 +23,29 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
     .global     _tx_thread_execute_ptr
     .global     _tx_thread_current_ptr
     .global     _tx_timer_time_slice
 
-
-/* Define the 16-bit Thumb mode veneer for _tx_thread_schedule for
-   applications calling this function from to 16-bit Thumb mode.  */
-
     .text
     .align 2
-    .global $_tx_thread_schedule
-    .type   $_tx_thread_schedule,function
-$_tx_thread_schedule:
-         .thumb
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
-    .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_schedule              // Call _tx_thread_schedule function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
 
+#define IRQ_MODE    0x12            // IRQ mode
+#define SVC_MODE    0x13            // SVC mode
 
-    .text
-    .align 2
 /**************************************************************************/
 /*                                                                        */
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_schedule                                  ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -95,8 +87,14 @@ $_tx_thread_schedule:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_thread_schedule
     .type  _tx_thread_schedule,function
 _tx_thread_schedule:
@@ -140,11 +138,11 @@ __tx_thread_schedule_loop:
 
     /* Setup time-slice, if present.  */
 
-    LDR     r2, =_tx_timer_time_slice       // Pickup address of time-slice
-                                            //   variable
-    LDR     sp, [r0, #8]                    // Switch stack pointers
+    LDR     r2, =_tx_timer_time_slice       // Pickup address of time-slice variable
     STR     r3, [r2]                        // Setup time-slice
 
+    LDR     sp, [r0, #8]                    // Switch stack pointers
+
 #if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
 
     /* Call the thread entry function to indicate the thread is executing. */
@@ -154,16 +152,25 @@ __tx_thread_schedule_loop:
     MOV     r0, r5                          // Restore r0
 #endif
 
-    /* Determine if an interrupt frame or a synchronous task suspension frame
-       is present.  */
+    /* Determine if an interrupt frame or a synchronous task suspension frame is present. */
 
-    LDMIA   sp!, {r4, r5}                   // Pickup the stack type and saved CPSR
+    POP     {r4, r5}                        // Pickup the stack type and saved CPSR
     CMP     r4, #0                          // Check for synchronous context switch
     BEQ     _tx_solicited_return
+
+#if !defined(THUMB_MODE)
     MSR     SPSR_cxsf, r5                   // Setup SPSR for return
+#else
+    CPS     #IRQ_MODE                       // Enter IRQ mode
+    MSR     SPSR_cxsf, r5                   // Setup SPSR for return
+    LDR     r1, [r0, #8]                    // Get thread SP
+    LDR     lr, [r1, #0x40]                 // Get thread PC
+    CPS     #SVC_MODE                       // Enter SVC mode
+#endif
+
 #ifdef TX_ENABLE_VFP_SUPPORT
-    LDR     r1, [r0, #144]                  // Pickup the VFP enabled flag
-    CMP     r1, #0                          // Is the VFP enabled?
+    LDR     r2, [r0, #144]                  // Pickup the VFP enabled flag
+    CMP     r2, #0                          // Is the VFP enabled?
     BEQ     _tx_skip_interrupt_vfp_restore  // No, skip VFP interrupt restore
     VLDMIA  sp!, {D0-D15}                   // Recover D0-D15
     VLDMIA  sp!, {D16-D31}                  // Recover D16-D31
@@ -171,7 +178,15 @@ __tx_thread_schedule_loop:
     VMSR    FPSCR, r4                       // Restore FPSCR
 _tx_skip_interrupt_vfp_restore:
 #endif
+
+#if !defined(THUMB_MODE)
     LDMIA   sp!, {r0-r12, lr, pc}^          // Return to point of thread interrupt
+#else
+    POP     {r0-r12, lr}                    // Restore registers
+    ADD     sp, #4                          // Fix stack pointer (skip PC saved on stack)
+    CPS     #IRQ_MODE                       // Enter IRQ mode
+    SUBS    pc, lr, #0                      // Return to point of thread interrupt
+#endif
 
 _tx_solicited_return:
 
@@ -185,52 +200,63 @@ _tx_solicited_return:
     VMSR    FPSCR, r4                       // Restore FPSCR
 _tx_skip_solicited_vfp_restore:
 #endif
+
     MSR     CPSR_cxsf, r5                   // Recover CPSR
-    LDMIA   sp!, {r4-r11, lr}               // Return to thread synchronously
-#ifdef __THUMB_INTERWORK
+    POP     {r4-r11, lr}                    // Restore registers
     BX      lr                              // Return to caller
-#else
-    MOV     pc, lr                          // Return to caller
-#endif
 
 #ifdef TX_ENABLE_VFP_SUPPORT
 
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global tx_thread_vfp_enable
     .type  tx_thread_vfp_enable,function
 tx_thread_vfp_enable:
-    MRS     r2, CPSR                        // Pickup the CPSR
+    MRS     r0, CPSR                            // Pickup current CPSR
 #ifdef TX_ENABLE_FIQ_SUPPORT
-    CPSID   if                              // Enable IRQ and FIQ interrupts
+    CPSID   if                                  // Disable IRQ and FIQ
 #else
-    CPSID   i                               // Enable IRQ interrupts
+    CPSID   i                                   // Disable IRQ
 #endif
-    LDR     r0, =_tx_thread_current_ptr     // Build current thread pointer address
-    LDR     r1, [r0]                        // Pickup current thread pointer
+    LDR     r2, =_tx_thread_current_ptr     // Build current thread pointer address
+    LDR     r1, [r2]                        // Pickup current thread pointer
     CMP     r1, #0                          // Check for NULL thread pointer
-    BEQ     __tx_no_thread_to_enable        // If NULL, skip VFP enable
-    MOV     r0, #1                          // Build enable value
-    STR     r0, [r1, #144]                  // Set the VFP enable flag (tx_thread_vfp_enable field in TX_THREAD)
-__tx_no_thread_to_enable:
-    MSR     CPSR_cxsf, r2                   // Recover CPSR
-    BX      LR                              // Return to caller
+    BEQ     restore_ints                    // If NULL, skip VFP enable
+    MOV     r2, #1                          // Build enable value
+    STR     r2, [r1, #144]                  // Set the VFP enable flag (tx_thread_vfp_enable field in TX_THREAD)
+    B       restore_ints
 
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global tx_thread_vfp_disable
     .type  tx_thread_vfp_disable,function
 tx_thread_vfp_disable:
-    MRS     r2, CPSR                        // Pickup the CPSR
+    MRS     r0, CPSR                            // Pickup current CPSR
 #ifdef TX_ENABLE_FIQ_SUPPORT
-    CPSID   if                              // Enable IRQ and FIQ interrupts
+    CPSID   if                                  // Disable IRQ and FIQ
 #else
-    CPSID   i                               // Enable IRQ interrupts
+    CPSID   i                                   // Disable IRQ
 #endif
-    LDR     r0, =_tx_thread_current_ptr     // Build current thread pointer address
-    LDR     r1, [r0]                        // Pickup current thread pointer
+    LDR     r2, =_tx_thread_current_ptr     // Build current thread pointer address
+    LDR     r1, [r2]                        // Pickup current thread pointer
     CMP     r1, #0                          // Check for NULL thread pointer
-    BEQ     __tx_no_thread_to_disable       // If NULL, skip VFP disable
-    MOV     r0, #0                          // Build disable value
-    STR     r0, [r1, #144]                  // Clear the VFP enable flag (tx_thread_vfp_enable field in TX_THREAD)
-__tx_no_thread_to_disable:
-    MSR     CPSR_cxsf, r2                   // Recover CPSR
-    BX      LR                              // Return to caller
+    BEQ     restore_ints                    // If NULL, skip VFP disable
+    MOV     r2, #0                          // Build disable value
+    STR     r2, [r1, #144]                  // Clear the VFP enable flag (tx_thread_vfp_enable field in TX_THREAD)
+
+restore_ints:
+    TST     r0, #IRQ_MASK
+    BNE     no_irq
+    CPSIE   i
+no_irq:
+#ifdef TX_ENABLE_FIQ_SUPPORT
+    TST     r0, #FIQ_MASK
+    BNE     no_fiq
+    CPSIE   f
+no_fiq:
+#endif
+    BX      lr
 
 #endif

ports/cortex_a12/ac6/src/tx_thread_stack_build.S

@@ -23,33 +23,22 @@
 #include "tx_user.h"
 #endif
 
-    .arm
-
-SVC_MODE        =       0x13                    // SVC mode
-#ifdef TX_ENABLE_FIQ_SUPPORT
-CPSR_MASK       =       0xDF                    // Mask initial CPSR, IRQ & FIQ interrupts enabled
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
 #else
-CPSR_MASK       =       0x9F                    // Mask initial CPSR, IRQ interrupts enabled
+    .arm
 #endif
 
+SVC_MODE        =       0x13                    // SVC mode
 
-/* Define the 16-bit Thumb mode veneer for _tx_thread_stack_build for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .thumb
-    .global $_tx_thread_stack_build
-    .type    $_tx_thread_stack_build,function
-$_tx_thread_stack_build:
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
-    .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_stack_build           // Call _tx_thread_stack_build function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
+THUMB_MASK      =       0x20                    // Thumb bit mask
 
+#ifdef TX_ENABLE_FIQ_SUPPORT
+CPSR_MASK       =       0xFF                    // Mask initial CPSR, T, IRQ & FIQ interrupts enabled
+#else
+CPSR_MASK       =       0xBF                    // Mask initial CPSR, T, IRQ interrupts enabled
+#endif
 
     .text
     .align 2
@@ -58,7 +47,7 @@ $_tx_thread_stack_build:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_stack_build                               ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -96,8 +85,14 @@ $_tx_thread_stack_build:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_stack_build
     .type    _tx_thread_stack_build,function
 _tx_thread_stack_build:
@@ -135,6 +130,15 @@ _tx_thread_stack_build:
 
     MOV     r3, #1                          // Build interrupt stack type
     STR     r3, [r2, #0]                    // Store stack type
+
+    MRS     r3, CPSR                        // Pickup CPSR
+    BIC     r3, #CPSR_MASK                  // Mask mode bits of CPSR
+    ORR     r3, #SVC_MODE                   // Build CPSR, SYS mode, interrupts enabled
+    TST     r1, #1                          // Check if the initial PC is a Thumb function
+    IT      NE
+    ORRNE   r3, #THUMB_MASK                 // If the initial PC is a thumb function, CPSR must reflect this
+    STR     r3, [r2, #4]                    // Store initial CPSR
+
     MOV     r3, #0                          // Build initial register value
     STR     r3, [r2, #8]                    // Store initial r0
     STR     r3, [r2, #12]                   // Store initial r1
@@ -146,26 +150,20 @@ _tx_thread_stack_build:
     STR     r3, [r2, #36]                   // Store initial r7
     STR     r3, [r2, #40]                   // Store initial r8
     STR     r3, [r2, #44]                   // Store initial r9
-    LDR     r3, [r0, #12]                   // Pickup stack starting address
-    STR     r3, [r2, #48]                   // Store initial r10 (sl)
-    LDR     r3,=_tx_thread_schedule         // Pickup address of _tx_thread_schedule for GDB backtrace
-    STR     r3, [r2, #60]                   // Store initial r14 (lr)
-    MOV     r3, #0                          // Build initial register value
     STR     r3, [r2, #52]                   // Store initial r11
     STR     r3, [r2, #56]                   // Store initial r12
-    STR     r1, [r2, #64]                   // Store initial pc
     STR     r3, [r2, #68]                   // 0 for back-trace
-    MRS     r1, CPSR                        // Pickup CPSR
-    BIC     r1, r1, #CPSR_MASK              // Mask mode bits of CPSR
-    ORR     r3, r1, #SVC_MODE               // Build CPSR, SVC mode, interrupts enabled
-    STR     r3, [r2, #4]                    // Store initial CPSR
+
+    LDR     r3, [r0, #12]                   // Pickup stack starting address
+    STR     r3, [r2, #48]                   // Store initial r10 (sl)
+
+    LDR     r3,=_tx_thread_schedule         // Pickup address of _tx_thread_schedule for GDB backtrace
+    STR     r3, [r2, #60]                   // Store initial r14 (lr)
+
+    STR     r1, [r2, #64]                   // Store initial pc
 
     /* Setup stack pointer.  */
 
     STR     r2, [r0, #8]                    // Save stack pointer in thread's
                                             //   control block
-#ifdef __THUMB_INTERWORK
     BX      lr                              // Return to caller
-#else
-    MOV     pc, lr                          // Return to caller
-#endif

ports/cortex_a12/ac6/src/tx_thread_system_return.S

@@ -23,33 +23,17 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
     .arm
-
+#endif
 
     .global     _tx_thread_current_ptr
     .global     _tx_timer_time_slice
     .global     _tx_thread_schedule
 
-
-
-/* Define the 16-bit Thumb mode veneer for _tx_thread_system_return for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align  2
-    .global $_tx_thread_system_return
-    .type   $_tx_thread_system_return,function
-$_tx_thread_system_return:
-    .thumb
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
-    .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_system_return         // Call _tx_thread_system_return function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
-
-
     .text
     .align  2
 /**************************************************************************/
@@ -57,7 +41,7 @@ $_tx_thread_system_return:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_system_return                             ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -98,15 +82,21 @@ $_tx_thread_system_return:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_thread_system_return
     .type   _tx_thread_system_return,function
 _tx_thread_system_return:
 
     /* Save minimal context on the stack.  */
 
-    STMDB   sp!, {r4-r11, lr}           // Save minimal context
+    PUSH    {r4-r11, lr}                // Save minimal context
 
     LDR     r4, =_tx_thread_current_ptr // Pickup address of current ptr
     LDR     r5, [r4]                    // Pickup current thread pointer
@@ -123,8 +113,11 @@ _tx_skip_solicited_vfp_save:
 #endif
 
     MOV     r0, #0                      // Build a solicited stack type
-    MRS     r1, CPSR                    // Pickup the CPSR
-    STMDB   sp!, {r0-r1}                // Save type and CPSR
+    MRS     r1, CPSR                    // Pickup the CPSR, T bit is always cleared by hardware
+    TST     lr, #1                      // Check if calling function is in Thumb mode
+    IT      NE
+    ORRNE   r1, #0x20                   // Set the T bit so that the correct mode is set on return
+    PUSH    {r0-r1}                     // Save type and CPSR
 
    /* Lockout interrupts.  */
 

ports/cortex_a12/ac6/src/tx_timer_interrupt.S

@@ -23,8 +23,12 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
     .arm
-
+#endif
 
 /* Define Assembly language external references...  */
 
@@ -37,26 +41,6 @@
     .global     _tx_timer_expired
     .global     _tx_thread_time_slice
 
-
-
-/* Define the 16-bit Thumb mode veneer for _tx_timer_interrupt for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .thumb
-    .global $_tx_timer_interrupt
-    .type   $_tx_timer_interrupt,function
-$_tx_timer_interrupt:
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
-    .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_timer_interrupt              // Call _tx_timer_interrupt function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
-
-
     .text
     .align 2
 /**************************************************************************/
@@ -64,7 +48,7 @@ $_tx_timer_interrupt:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_timer_interrupt                                  ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -104,8 +88,14 @@ $_tx_timer_interrupt:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_timer_interrupt
     .type   _tx_timer_interrupt,function
 _tx_timer_interrupt:
@@ -197,7 +187,7 @@ __tx_timer_done:
 
 __tx_something_expired:
 
-    STMDB   sp!, {r0, lr}                       // Save the lr register on the stack
+    PUSH    {r0, lr}                            // Save the lr register on the stack
                                                 //   and save r0 just to keep 8-byte alignment
 
     /* Did a timer expire?  */
@@ -225,13 +215,9 @@ __tx_timer_dont_activate:
 
 __tx_timer_not_ts_expiration:
 
-    LDMIA   sp!, {r0, lr}                       // Recover lr register (r0 is just there for
+    POP     {r0, lr}                            // Recover lr register (r0 is just there for
                                                 //   the 8-byte stack alignment
 
 __tx_timer_nothing_expired:
 
-#ifdef __THUMB_INTERWORK
     BX      lr                                  // Return to caller
-#else
-    MOV     pc, lr                              // Return to caller
-#endif

ports/cortex_a12/gnu/example_build/crt0.S

@@ -1,15 +1,30 @@
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
 /* .text is used instead of .section .text so it works with arm-aout too.  */
     .text
-    .code 32
     .align  0
 
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _mainCRTStartup
+_mainCRTStartup:
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _start
+_start:
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global start
 start:
-_start:
-_mainCRTStartup:
 
 /* Start by setting up a stack */
     /*  Set up the stack pointer to a fixed value */
@@ -69,24 +84,12 @@ _mainCRTStartup:
     .word   _fini
 #endif  */
     /* Return ...  */
-#ifdef __APCS_26__
-    movs    pc, lr
-#else
-#ifdef __THUMB_INTERWORK
     bx  lr
-#else
-    mov pc, lr
-#endif
-#endif
 
     .global  _fini
     .type    _fini,function
 _fini:
-#ifdef __THUMB_INTERWORK
     BX      lr                                  // Return to caller
-#else
-    MOV     pc, lr                              // Return to caller
-#endif
 
 /*  Workspace for Angel calls.  */
     .data

ports/cortex_a12/gnu/inc/tx_port.h

@@ -321,7 +321,7 @@ void    tx_thread_vfp_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARMv7-A Version 6.3.0 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARMv7-A Version 6.4.0 *";
 #else
 extern  CHAR                    _tx_version_id[];
 #endif

ports/cortex_a12/gnu/src/tx_thread_context_restore.S

@@ -23,16 +23,16 @@
 #include "tx_user.h"
 #endif
 
-    .arm
-
-#ifdef TX_ENABLE_FIQ_SUPPORT
-SVC_MODE        =     0xD3               // Disable IRQ/FIQ, SVC mode
-IRQ_MODE        =     0xD2               // Disable IRQ/FIQ, IRQ mode
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
 #else
-SVC_MODE        =     0x93               // Disable IRQ, SVC mode
-IRQ_MODE        =     0x92               // Disable IRQ, IRQ mode
+    .arm
 #endif
 
+SVC_MODE        =     0x13               // SVC mode
+IRQ_MODE        =     0x12               // IRQ mode
+
     .global     _tx_thread_system_state
     .global     _tx_thread_current_ptr
     .global     _tx_thread_execute_ptr
@@ -45,7 +45,6 @@ IRQ_MODE        =     0x92               // Disable IRQ, IRQ mode
 /* No 16-bit Thumb mode veneer code is needed for _tx_thread_context_restore
    since it will never be called 16-bit mode.  */
 
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -53,7 +52,7 @@ IRQ_MODE        =     0x92               // Disable IRQ, IRQ mode
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_context_restore                            ARMv7-A       */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -94,6 +93,9 @@ IRQ_MODE        =     0x92               // Disable IRQ, IRQ mode
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
     .global _tx_thread_context_restore
@@ -129,9 +131,9 @@ _tx_thread_context_restore:
     /* Just recover the saved registers and return to the point of
        interrupt.  */
 
-    LDMIA   sp!, {r0, r10, r12, lr}         // Recover SPSR, POI, and scratch regs
+    POP     {r0, r10, r12, lr}              // Recover SPSR, POI, and scratch regs
     MSR     SPSR_cxsf, r0                   // Put SPSR back
-    LDMIA   sp!, {r0-r3}                    // Recover r0-r3
+    POP     {r0-r3}                         // Recover r0-r3
     MOVS    pc, lr                          // Return to point of interrupt
 
 __tx_thread_not_nested_restore:
@@ -160,26 +162,23 @@ __tx_thread_no_preempt_restore:
    /* Pickup the saved stack pointer.  */
 
    /* Recover the saved context and return to the point of interrupt.  */
-    LDMIA   sp!, {r0, r10, r12, lr}         // Recover SPSR, POI, and scratch regs
+    POP     {r0, r10, r12, lr}              // Recover SPSR, POI, and scratch regs
     MSR     SPSR_cxsf, r0                   // Put SPSR back
-    LDMIA   sp!, {r0-r3}                    // Recover r0-r3
+    POP     {r0-r3}                         // Recover r0-r3
     MOVS    pc, lr                          // Return to point of interrupt
 
 __tx_thread_preempt_restore:
 
-    LDMIA   sp!, {r3, r10, r12, lr}         // Recover temporarily saved registers
+    POP     {r3, r10, r12, lr}              // Recover temporarily saved registers
     MOV     r1, lr                          // Save lr (point of interrupt)
-    MOV     r2, #SVC_MODE                   // Build SVC mode CPSR
-    MSR     CPSR_c, r2                      // Enter SVC mode
+    CPS     #SVC_MODE                       // Enter SVC mode
     STR     r1, [sp, #-4]!                  // Save point of interrupt
-    STMDB   sp!, {r4-r12, lr}               // Save upper half of registers
+    PUSH    {r4-r12, lr}                    // Save upper half of registers
     MOV     r4, r3                          // Save SPSR in r4
-    MOV     r2, #IRQ_MODE                   // Build IRQ mode CPSR
-    MSR     CPSR_c, r2                      // Enter IRQ mode
-    LDMIA   sp!, {r0-r3}                    // Recover r0-r3
-    MOV     r5, #SVC_MODE                   // Build SVC mode CPSR
-    MSR     CPSR_c, r5                      // Enter SVC mode
-    STMDB   sp!, {r0-r3}                    // Save r0-r3 on thread's stack
+    CPS     #IRQ_MODE                       // Enter IRQ mode
+    POP     {r0-r3}                         // Recover r0-r3
+    CPS     #SVC_MODE                       // Enter SVC mode
+    PUSH    {r0-r3}                         // Save r0-r3 on thread's stack
 
     LDR     r1, =_tx_thread_current_ptr     // Pickup address of current thread ptr
     LDR     r0, [r1]                        // Pickup current thread pointer
@@ -192,13 +191,11 @@ __tx_thread_preempt_restore:
     STR     r2, [sp, #-4]!                  // Save FPSCR
     VSTMDB  sp!, {D16-D31}                  // Save D16-D31
     VSTMDB  sp!, {D0-D15}                   // Save D0-D15
-
 _tx_skip_irq_vfp_save:
-
 #endif
 
     MOV     r3, #1                          // Build interrupt stack type
-    STMDB   sp!, {r3, r4}                   // Save interrupt stack type and SPSR
+    PUSH    {r3, r4}                        // Save interrupt stack type and SPSR
     STR     sp, [r0, #8]                    // Save stack pointer in thread control
                                             //   block
 
@@ -223,6 +220,5 @@ __tx_thread_dont_save_ts:
 __tx_thread_idle_system_restore:
 
     /* Just return back to the scheduler!  */
-    MOV     r0, #SVC_MODE                   // Build SVC mode CPSR
-    MSR     CPSR_c, r0                      // Enter SVC mode
+    CPS     #SVC_MODE                       // Enter SVC mode
     B       _tx_thread_schedule             // Return to scheduler

ports/cortex_a12/gnu/src/tx_thread_context_save.S

@@ -23,6 +23,13 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
     .global     _tx_thread_system_state
     .global     _tx_thread_current_ptr
     .global     __tx_irq_processing_return
@@ -31,7 +38,6 @@
 /* No 16-bit Thumb mode veneer code is needed for _tx_thread_context_save
    since it will never be called 16-bit mode.  */
 
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -39,7 +45,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_context_save                              ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -79,6 +85,9 @@
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
     .global _tx_thread_context_save
@@ -90,7 +99,7 @@ _tx_thread_context_save:
 
     /* Check for a nested interrupt condition.  */
 
-    STMDB   sp!, {r0-r3}                    // Save some working registers
+    PUSH    {r0-r3}                         // Save some working registers
 #ifdef TX_ENABLE_FIQ_SUPPORT
     CPSID   if                              // Disable FIQ interrupts
 #endif
@@ -101,15 +110,15 @@ _tx_thread_context_save:
 
     /* Nested interrupt condition.  */
 
-    ADD     r2, r2, #1                      // Increment the interrupt counter
+    ADD     r2, #1                          // Increment the interrupt counter
     STR     r2, [r3]                        // Store it back in the variable
 
    /* Save the rest of the scratch registers on the stack and return to the
       calling ISR.  */
 
     MRS     r0, SPSR                        // Pickup saved SPSR
-    SUB     lr, lr, #4                      // Adjust point of interrupt
-    STMDB   sp!, {r0, r10, r12, lr}         // Store other registers
+    SUB     lr, #4                          // Adjust point of interrupt
+    PUSH    {r0, r10, r12, lr}              // Store other registers
 
     /* Return to the ISR.  */
 
@@ -129,7 +138,7 @@ _tx_thread_context_save:
 __tx_thread_not_nested_save:
 
     /* Otherwise, not nested, check to see if a thread was running.  */
-    ADD     r2, r2, #1                      // Increment the interrupt counter
+    ADD     r2, #1                          // Increment the interrupt counter
     STR     r2, [r3]                        // Store it back in the variable
     LDR     r1, =_tx_thread_current_ptr     // Pickup address of current thread ptr
     LDR     r0, [r1]                        // Pickup current thread pointer
@@ -140,8 +149,8 @@ __tx_thread_not_nested_save:
     /* Save minimal context of interrupted thread.  */
 
     MRS     r2, SPSR                        // Pickup saved SPSR
-    SUB     lr, lr, #4                      // Adjust point of interrupt
-    STMDB   sp!, {r2, r10, r12, lr}         // Store other registers
+    SUB     lr, #4                          // Adjust point of interrupt
+    PUSH    {r2, r10, r12, lr}              // Store other registers
 
     MOV     r10, #0                         // Clear stack limit
 
@@ -174,5 +183,5 @@ __tx_thread_idle_system_save:
     POP     {lr}                            // Recover ISR lr
 #endif
 
-    ADD     sp, sp, #16                     // Recover saved registers
+    ADD     sp, #16                         // Recover saved registers
     B       __tx_irq_processing_return      // Continue IRQ processing

ports/cortex_a12/gnu/src/tx_thread_fiq_nesting_end.S

@@ -23,6 +23,13 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
 #ifdef TX_ENABLE_FIQ_SUPPORT
 DISABLE_INTS    =       0xC0                    // Disable IRQ/FIQ interrupts
 #else
@@ -31,11 +38,6 @@ DISABLE_INTS    =       0x80                    // Disable IRQ interrupts
 MODE_MASK       =       0x1F                    // Mode mask
 FIQ_MODE_BITS   =       0x11                    // FIQ mode bits
 
-
-/* No 16-bit Thumb mode veneer code is needed for _tx_thread_fiq_nesting_end
-   since it will never be called 16-bit mode.  */
-
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -43,7 +45,7 @@ FIQ_MODE_BITS   =       0x11                    // FIQ mode bits
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_fiq_nesting_end                           ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -88,8 +90,14 @@ FIQ_MODE_BITS   =       0x11                    // FIQ mode bits
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_fiq_nesting_end
     .type    _tx_thread_fiq_nesting_end,function
 _tx_thread_fiq_nesting_end:
@@ -103,8 +111,4 @@ _tx_thread_fiq_nesting_end:
     ORR     r0, r0, #FIQ_MODE_BITS              // Build IRQ mode CPSR
     MSR     CPSR_c, r0                          // Reenter IRQ mode
 
-#ifdef __THUMB_INTERWORK
     BX      r3                                  // Return to caller
-#else
-    MOV     pc, r3                              // Return to caller
-#endif

ports/cortex_a12/gnu/src/tx_thread_fiq_nesting_start.S

@@ -23,15 +23,17 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
 FIQ_DISABLE     =       0x40                    // FIQ disable bit
 MODE_MASK       =       0x1F                    // Mode mask
 SYS_MODE_BITS   =       0x1F                    // System mode bits
 
-
-/* No 16-bit Thumb mode veneer code is needed for _tx_thread_fiq_nesting_start
-   since it will never be called 16-bit mode.  */
-
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -39,7 +41,7 @@ SYS_MODE_BITS   =       0x1F                    // System mode bits
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_fiq_nesting_start                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -81,8 +83,14 @@ SYS_MODE_BITS   =       0x1F                    // System mode bits
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_fiq_nesting_start
     .type    _tx_thread_fiq_nesting_start,function
 _tx_thread_fiq_nesting_start:
@@ -95,8 +103,4 @@ _tx_thread_fiq_nesting_start:
                                                 //   and push r1 just to keep 8-byte alignment
     BIC     r0, r0, #FIQ_DISABLE                // Build enable FIQ CPSR
     MSR     CPSR_c, r0                          // Enter system mode
-#ifdef __THUMB_INTERWORK
     BX      r3                                  // Return to caller
-#else
-    MOV     pc, r3                              // Return to caller
-#endif

ports/cortex_a12/gnu/src/tx_thread_interrupt_control.S

@@ -23,25 +23,18 @@
 #include "tx_user.h"
 #endif
 
-INT_MASK        =   0x03F
-
-
-/* Define the 16-bit Thumb mode veneer for _tx_thread_interrupt_control for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .global $_tx_thread_interrupt_control
-$_tx_thread_interrupt_control:
+    .syntax unified
+#if defined(THUMB_MODE)
     .thumb
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
+#else
     .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_interrupt_control     // Call _tx_thread_interrupt_control function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
+#endif
 
+INT_MASK        =   0x0C0
+IRQ_MASK        =   0x080
+#ifdef TX_ENABLE_FIQ_SUPPORT
+FIQ_MASK        =   0x040
+#endif
 
     .text
     .align 2
@@ -50,7 +43,7 @@ $_tx_thread_interrupt_control:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_interrupt_control                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -86,25 +79,35 @@ $_tx_thread_interrupt_control:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_thread_interrupt_control
     .type   _tx_thread_interrupt_control,function
 _tx_thread_interrupt_control:
+    MRS     r1, CPSR                            // Pickup current CPSR
 
-    /* Pickup current interrupt lockout posture.  */
-
-    MRS     r3, CPSR                    // Pickup current CPSR
-    MOV     r2, #INT_MASK               // Build interrupt mask
-    AND     r1, r3, r2                  // Clear interrupt lockout bits
-    ORR     r1, r1, r0                  // Or-in new interrupt lockout bits
-
-    /* Apply the new interrupt posture.  */
-
-    MSR     CPSR_c, r1                  // Setup new CPSR
-    BIC     r0, r3, r2                  // Return previous interrupt mask
-#ifdef __THUMB_INTERWORK
-    BX      lr                          // Return to caller
+#ifdef TX_ENABLE_FIQ_SUPPORT
+    CPSID   if                                  // Disable IRQ and FIQ
 #else
-    MOV     pc, lr                      // Return to caller
+    CPSID   i                                   // Disable IRQ
 #endif
+
+    TST     r0, #IRQ_MASK
+    BNE     no_irq
+    CPSIE   i
+no_irq:
+#ifdef TX_ENABLE_FIQ_SUPPORT
+    TST     r0, #FIQ_MASK
+    BNE     no_fiq
+    CPSIE   f
+no_fiq:
+#endif
+
+    AND     r0, r1, #INT_MASK
+    BX      lr

ports/cortex_a12/gnu/src/tx_thread_interrupt_disable.S

@@ -23,22 +23,12 @@
 #include "tx_user.h"
 #endif
 
-/* Define the 16-bit Thumb mode veneer for _tx_thread_interrupt_disable for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .global $_tx_thread_interrupt_disable
-$_tx_thread_interrupt_disable:
+    .syntax unified
+#if defined(THUMB_MODE)
     .thumb
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
+#else
     .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_interrupt_disable     // Call _tx_thread_interrupt_disable function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
-
+#endif
 
     .text
     .align 2
@@ -47,7 +37,7 @@ $_tx_thread_interrupt_disable:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_interrupt_disable                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -82,8 +72,14 @@ $_tx_thread_interrupt_disable:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_thread_interrupt_disable
     .type   _tx_thread_interrupt_disable,function
 _tx_thread_interrupt_disable:
@@ -100,8 +96,4 @@ _tx_thread_interrupt_disable:
     CPSID   i                                   // Disable IRQ
 #endif
 
-#ifdef __THUMB_INTERWORK
     BX      lr                                  // Return to caller
-#else
-    MOV     pc, lr                              // Return to caller
-#endif

ports/cortex_a12/gnu/src/tx_thread_interrupt_restore.S

@@ -23,22 +23,17 @@
 #include "tx_user.h"
 #endif
 
-/* Define the 16-bit Thumb mode veneer for _tx_thread_interrupt_restore for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .global $_tx_thread_interrupt_restore
-$_tx_thread_interrupt_restore:
+    .syntax unified
+#if defined(THUMB_MODE)
     .thumb
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
+#else
     .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_interrupt_restore     // Call _tx_thread_interrupt_restore function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
+#endif
 
+IRQ_MASK        =   0x080
+#ifdef TX_ENABLE_FIQ_SUPPORT
+FIQ_MASK        =   0x040
+#endif
 
     .text
     .align 2
@@ -47,7 +42,7 @@ $_tx_thread_interrupt_restore:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_interrupt_restore                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -83,17 +78,27 @@ $_tx_thread_interrupt_restore:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_interrupt_restore
     .type    _tx_thread_interrupt_restore,function
 _tx_thread_interrupt_restore:
 
-    /* Apply the new interrupt posture.  */
-
-    MSR     CPSR_c, r0                          // Setup new CPSR
-#ifdef __THUMB_INTERWORK
-    BX      lr                                  // Return to caller
-#else
-    MOV     pc, lr                              // Return to caller
+    TST     r0, #IRQ_MASK
+    BNE     no_irq
+    CPSIE   i
+no_irq:
+#ifdef TX_ENABLE_FIQ_SUPPORT
+    TST     r0, #FIQ_MASK
+    BNE     no_fiq
+    CPSIE   f
+no_fiq:
 #endif
+
+    BX      lr                                  // Return to caller

ports/cortex_a12/gnu/src/tx_thread_irq_nesting_end.S

@@ -23,6 +23,13 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
 #ifdef TX_ENABLE_FIQ_SUPPORT
 DISABLE_INTS    =       0xC0                    // Disable IRQ/FIQ interrupts
 #else
@@ -31,11 +38,6 @@ DISABLE_INTS    =       0x80                    // Disable IRQ interrupts
 MODE_MASK       =       0x1F                    // Mode mask
 IRQ_MODE_BITS   =       0x12                    // IRQ mode bits
 
-
-/* No 16-bit Thumb mode veneer code is needed for _tx_thread_irq_nesting_end
-   since it will never be called 16-bit mode.  */
-
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -43,7 +45,7 @@ IRQ_MODE_BITS   =       0x12                    // IRQ mode bits
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_irq_nesting_end                           ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -88,8 +90,14 @@ IRQ_MODE_BITS   =       0x12                    // IRQ mode bits
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_irq_nesting_end
     .type    _tx_thread_irq_nesting_end,function
 _tx_thread_irq_nesting_end:
@@ -102,8 +110,4 @@ _tx_thread_irq_nesting_end:
     BIC     r0, r0, #MODE_MASK                  // Clear mode bits
     ORR     r0, r0, #IRQ_MODE_BITS              // Build IRQ mode CPSR
     MSR     CPSR_c, r0                          // Reenter IRQ mode
-#ifdef __THUMB_INTERWORK
     BX      r3                                  // Return to caller
-#else
-    MOV     pc, r3                              // Return to caller
-#endif

ports/cortex_a12/gnu/src/tx_thread_irq_nesting_start.S

@@ -23,15 +23,17 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
 IRQ_DISABLE     =       0x80                    // IRQ disable bit
 MODE_MASK       =       0x1F                    // Mode mask
 SYS_MODE_BITS   =       0x1F                    // System mode bits
 
-
-/* No 16-bit Thumb mode veneer code is needed for _tx_thread_irq_nesting_start
-   since it will never be called 16-bit mode.  */
-
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -39,7 +41,7 @@ SYS_MODE_BITS   =       0x1F                    // System mode bits
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_irq_nesting_start                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -81,8 +83,14 @@ SYS_MODE_BITS   =       0x1F                    // System mode bits
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_irq_nesting_start
     .type    _tx_thread_irq_nesting_start,function
 _tx_thread_irq_nesting_start:
@@ -95,8 +103,4 @@ _tx_thread_irq_nesting_start:
                                                 //   and push r1 just to keep 8-byte alignment
     BIC     r0, r0, #IRQ_DISABLE                // Build enable IRQ CPSR
     MSR     CPSR_c, r0                          // Enter system mode
-#ifdef __THUMB_INTERWORK
     BX      r3                                  // Return to caller
-#else
-    MOV     pc, r3                              // Return to caller
-#endif

ports/cortex_a12/gnu/src/tx_thread_schedule.S

@@ -23,37 +23,29 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
     .global     _tx_thread_execute_ptr
     .global     _tx_thread_current_ptr
     .global     _tx_timer_time_slice
 
-
-/* Define the 16-bit Thumb mode veneer for _tx_thread_schedule for
-   applications calling this function from to 16-bit Thumb mode.  */
-
     .text
     .align 2
-    .global $_tx_thread_schedule
-    .type   $_tx_thread_schedule,function
-$_tx_thread_schedule:
-         .thumb
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
-    .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_schedule              // Call _tx_thread_schedule function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
 
+#define IRQ_MODE    0x12            // IRQ mode
+#define SVC_MODE    0x13            // SVC mode
 
-    .text
-    .align 2
 /**************************************************************************/
 /*                                                                        */
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_schedule                                  ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -95,8 +87,14 @@ $_tx_thread_schedule:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_thread_schedule
     .type  _tx_thread_schedule,function
 _tx_thread_schedule:
@@ -140,11 +138,11 @@ __tx_thread_schedule_loop:
 
     /* Setup time-slice, if present.  */
 
-    LDR     r2, =_tx_timer_time_slice       // Pickup address of time-slice
-                                            //   variable
-    LDR     sp, [r0, #8]                    // Switch stack pointers
+    LDR     r2, =_tx_timer_time_slice       // Pickup address of time-slice variable
     STR     r3, [r2]                        // Setup time-slice
 
+    LDR     sp, [r0, #8]                    // Switch stack pointers
+
 #if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
 
     /* Call the thread entry function to indicate the thread is executing. */
@@ -154,16 +152,25 @@ __tx_thread_schedule_loop:
     MOV     r0, r5                          // Restore r0
 #endif
 
-    /* Determine if an interrupt frame or a synchronous task suspension frame
-       is present.  */
+    /* Determine if an interrupt frame or a synchronous task suspension frame is present. */
 
-    LDMIA   sp!, {r4, r5}                   // Pickup the stack type and saved CPSR
+    POP     {r4, r5}                        // Pickup the stack type and saved CPSR
     CMP     r4, #0                          // Check for synchronous context switch
     BEQ     _tx_solicited_return
+
+#if !defined(THUMB_MODE)
     MSR     SPSR_cxsf, r5                   // Setup SPSR for return
+#else
+    CPS     #IRQ_MODE                       // Enter IRQ mode
+    MSR     SPSR_cxsf, r5                   // Setup SPSR for return
+    LDR     r1, [r0, #8]                    // Get thread SP
+    LDR     lr, [r1, #0x40]                 // Get thread PC
+    CPS     #SVC_MODE                       // Enter SVC mode
+#endif
+
 #ifdef TX_ENABLE_VFP_SUPPORT
-    LDR     r1, [r0, #144]                  // Pickup the VFP enabled flag
-    CMP     r1, #0                          // Is the VFP enabled?
+    LDR     r2, [r0, #144]                  // Pickup the VFP enabled flag
+    CMP     r2, #0                          // Is the VFP enabled?
     BEQ     _tx_skip_interrupt_vfp_restore  // No, skip VFP interrupt restore
     VLDMIA  sp!, {D0-D15}                   // Recover D0-D15
     VLDMIA  sp!, {D16-D31}                  // Recover D16-D31
@@ -171,7 +178,15 @@ __tx_thread_schedule_loop:
     VMSR    FPSCR, r4                       // Restore FPSCR
 _tx_skip_interrupt_vfp_restore:
 #endif
+
+#if !defined(THUMB_MODE)
     LDMIA   sp!, {r0-r12, lr, pc}^          // Return to point of thread interrupt
+#else
+    POP     {r0-r12, lr}                    // Restore registers
+    ADD     sp, #4                          // Fix stack pointer (skip PC saved on stack)
+    CPS     #IRQ_MODE                       // Enter IRQ mode
+    SUBS    pc, lr, #0                      // Return to point of thread interrupt
+#endif
 
 _tx_solicited_return:
 
@@ -185,52 +200,63 @@ _tx_solicited_return:
     VMSR    FPSCR, r4                       // Restore FPSCR
 _tx_skip_solicited_vfp_restore:
 #endif
+
     MSR     CPSR_cxsf, r5                   // Recover CPSR
-    LDMIA   sp!, {r4-r11, lr}               // Return to thread synchronously
-#ifdef __THUMB_INTERWORK
+    POP     {r4-r11, lr}                    // Restore registers
     BX      lr                              // Return to caller
-#else
-    MOV     pc, lr                          // Return to caller
-#endif
 
 #ifdef TX_ENABLE_VFP_SUPPORT
 
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global tx_thread_vfp_enable
     .type  tx_thread_vfp_enable,function
 tx_thread_vfp_enable:
-    MRS     r2, CPSR                        // Pickup the CPSR
+    MRS     r0, CPSR                            // Pickup current CPSR
 #ifdef TX_ENABLE_FIQ_SUPPORT
-    CPSID   if                              // Enable IRQ and FIQ interrupts
+    CPSID   if                                  // Disable IRQ and FIQ
 #else
-    CPSID   i                               // Enable IRQ interrupts
+    CPSID   i                                   // Disable IRQ
 #endif
-    LDR     r0, =_tx_thread_current_ptr     // Build current thread pointer address
-    LDR     r1, [r0]                        // Pickup current thread pointer
+    LDR     r2, =_tx_thread_current_ptr     // Build current thread pointer address
+    LDR     r1, [r2]                        // Pickup current thread pointer
     CMP     r1, #0                          // Check for NULL thread pointer
-    BEQ     __tx_no_thread_to_enable        // If NULL, skip VFP enable
-    MOV     r0, #1                          // Build enable value
-    STR     r0, [r1, #144]                  // Set the VFP enable flag (tx_thread_vfp_enable field in TX_THREAD)
-__tx_no_thread_to_enable:
-    MSR     CPSR_cxsf, r2                   // Recover CPSR
-    BX      LR                              // Return to caller
+    BEQ     restore_ints                    // If NULL, skip VFP enable
+    MOV     r2, #1                          // Build enable value
+    STR     r2, [r1, #144]                  // Set the VFP enable flag (tx_thread_vfp_enable field in TX_THREAD)
+    B       restore_ints
 
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global tx_thread_vfp_disable
     .type  tx_thread_vfp_disable,function
 tx_thread_vfp_disable:
-    MRS     r2, CPSR                        // Pickup the CPSR
+    MRS     r0, CPSR                            // Pickup current CPSR
 #ifdef TX_ENABLE_FIQ_SUPPORT
-    CPSID   if                              // Enable IRQ and FIQ interrupts
+    CPSID   if                                  // Disable IRQ and FIQ
 #else
-    CPSID   i                               // Enable IRQ interrupts
+    CPSID   i                                   // Disable IRQ
 #endif
-    LDR     r0, =_tx_thread_current_ptr     // Build current thread pointer address
-    LDR     r1, [r0]                        // Pickup current thread pointer
+    LDR     r2, =_tx_thread_current_ptr     // Build current thread pointer address
+    LDR     r1, [r2]                        // Pickup current thread pointer
     CMP     r1, #0                          // Check for NULL thread pointer
-    BEQ     __tx_no_thread_to_disable       // If NULL, skip VFP disable
-    MOV     r0, #0                          // Build disable value
-    STR     r0, [r1, #144]                  // Clear the VFP enable flag (tx_thread_vfp_enable field in TX_THREAD)
-__tx_no_thread_to_disable:
-    MSR     CPSR_cxsf, r2                   // Recover CPSR
-    BX      LR                              // Return to caller
+    BEQ     restore_ints                    // If NULL, skip VFP disable
+    MOV     r2, #0                          // Build disable value
+    STR     r2, [r1, #144]                  // Clear the VFP enable flag (tx_thread_vfp_enable field in TX_THREAD)
+
+restore_ints:
+    TST     r0, #IRQ_MASK
+    BNE     no_irq
+    CPSIE   i
+no_irq:
+#ifdef TX_ENABLE_FIQ_SUPPORT
+    TST     r0, #FIQ_MASK
+    BNE     no_fiq
+    CPSIE   f
+no_fiq:
+#endif
+    BX      lr
 
 #endif

ports/cortex_a12/gnu/src/tx_thread_stack_build.S

@@ -23,33 +23,22 @@
 #include "tx_user.h"
 #endif
 
-    .arm
-
-SVC_MODE        =       0x13                    // SVC mode
-#ifdef TX_ENABLE_FIQ_SUPPORT
-CPSR_MASK       =       0xDF                    // Mask initial CPSR, IRQ & FIQ interrupts enabled
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
 #else
-CPSR_MASK       =       0x9F                    // Mask initial CPSR, IRQ interrupts enabled
+    .arm
 #endif
 
+SVC_MODE        =       0x13                    // SVC mode
 
-/* Define the 16-bit Thumb mode veneer for _tx_thread_stack_build for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .thumb
-    .global $_tx_thread_stack_build
-    .type    $_tx_thread_stack_build,function
-$_tx_thread_stack_build:
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
-    .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_stack_build           // Call _tx_thread_stack_build function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
+THUMB_MASK      =       0x20                    // Thumb bit mask
 
+#ifdef TX_ENABLE_FIQ_SUPPORT
+CPSR_MASK       =       0xFF                    // Mask initial CPSR, T, IRQ & FIQ interrupts enabled
+#else
+CPSR_MASK       =       0xBF                    // Mask initial CPSR, T, IRQ interrupts enabled
+#endif
 
     .text
     .align 2
@@ -58,7 +47,7 @@ $_tx_thread_stack_build:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_stack_build                               ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -96,8 +85,14 @@ $_tx_thread_stack_build:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_stack_build
     .type    _tx_thread_stack_build,function
 _tx_thread_stack_build:
@@ -135,6 +130,15 @@ _tx_thread_stack_build:
 
     MOV     r3, #1                          // Build interrupt stack type
     STR     r3, [r2, #0]                    // Store stack type
+
+    MRS     r3, CPSR                        // Pickup CPSR
+    BIC     r3, #CPSR_MASK                  // Mask mode bits of CPSR
+    ORR     r3, #SVC_MODE                   // Build CPSR, SYS mode, interrupts enabled
+    TST     r1, #1                          // Check if the initial PC is a Thumb function
+    IT      NE
+    ORRNE   r3, #THUMB_MASK                 // If the initial PC is a thumb function, CPSR must reflect this
+    STR     r3, [r2, #4]                    // Store initial CPSR
+
     MOV     r3, #0                          // Build initial register value
     STR     r3, [r2, #8]                    // Store initial r0
     STR     r3, [r2, #12]                   // Store initial r1
@@ -146,26 +150,20 @@ _tx_thread_stack_build:
     STR     r3, [r2, #36]                   // Store initial r7
     STR     r3, [r2, #40]                   // Store initial r8
     STR     r3, [r2, #44]                   // Store initial r9
-    LDR     r3, [r0, #12]                   // Pickup stack starting address
-    STR     r3, [r2, #48]                   // Store initial r10 (sl)
-    LDR     r3,=_tx_thread_schedule         // Pickup address of _tx_thread_schedule for GDB backtrace
-    STR     r3, [r2, #60]                   // Store initial r14 (lr)
-    MOV     r3, #0                          // Build initial register value
     STR     r3, [r2, #52]                   // Store initial r11
     STR     r3, [r2, #56]                   // Store initial r12
-    STR     r1, [r2, #64]                   // Store initial pc
     STR     r3, [r2, #68]                   // 0 for back-trace
-    MRS     r1, CPSR                        // Pickup CPSR
-    BIC     r1, r1, #CPSR_MASK              // Mask mode bits of CPSR
-    ORR     r3, r1, #SVC_MODE               // Build CPSR, SVC mode, interrupts enabled
-    STR     r3, [r2, #4]                    // Store initial CPSR
+
+    LDR     r3, [r0, #12]                   // Pickup stack starting address
+    STR     r3, [r2, #48]                   // Store initial r10 (sl)
+
+    LDR     r3,=_tx_thread_schedule         // Pickup address of _tx_thread_schedule for GDB backtrace
+    STR     r3, [r2, #60]                   // Store initial r14 (lr)
+
+    STR     r1, [r2, #64]                   // Store initial pc
 
     /* Setup stack pointer.  */
 
     STR     r2, [r0, #8]                    // Save stack pointer in thread's
                                             //   control block
-#ifdef __THUMB_INTERWORK
     BX      lr                              // Return to caller
-#else
-    MOV     pc, lr                          // Return to caller
-#endif

ports/cortex_a12/gnu/src/tx_thread_system_return.S

@@ -23,33 +23,17 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
     .arm
-
+#endif
 
     .global     _tx_thread_current_ptr
     .global     _tx_timer_time_slice
     .global     _tx_thread_schedule
 
-
-
-/* Define the 16-bit Thumb mode veneer for _tx_thread_system_return for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align  2
-    .global $_tx_thread_system_return
-    .type   $_tx_thread_system_return,function
-$_tx_thread_system_return:
-    .thumb
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
-    .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_system_return         // Call _tx_thread_system_return function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
-
-
     .text
     .align  2
 /**************************************************************************/
@@ -57,7 +41,7 @@ $_tx_thread_system_return:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_system_return                             ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -98,15 +82,21 @@ $_tx_thread_system_return:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_thread_system_return
     .type   _tx_thread_system_return,function
 _tx_thread_system_return:
 
     /* Save minimal context on the stack.  */
 
-    STMDB   sp!, {r4-r11, lr}           // Save minimal context
+    PUSH    {r4-r11, lr}                // Save minimal context
 
     LDR     r4, =_tx_thread_current_ptr // Pickup address of current ptr
     LDR     r5, [r4]                    // Pickup current thread pointer
@@ -123,8 +113,11 @@ _tx_skip_solicited_vfp_save:
 #endif
 
     MOV     r0, #0                      // Build a solicited stack type
-    MRS     r1, CPSR                    // Pickup the CPSR
-    STMDB   sp!, {r0-r1}                // Save type and CPSR
+    MRS     r1, CPSR                    // Pickup the CPSR, T bit is always cleared by hardware
+    TST     lr, #1                      // Check if calling function is in Thumb mode
+    IT      NE
+    ORRNE   r1, #0x20                   // Set the T bit so that the correct mode is set on return
+    PUSH    {r0-r1}                     // Save type and CPSR
 
    /* Lockout interrupts.  */
 

ports/cortex_a12/gnu/src/tx_timer_interrupt.S

@@ -23,8 +23,12 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
     .arm
-
+#endif
 
 /* Define Assembly language external references...  */
 
@@ -37,26 +41,6 @@
     .global     _tx_timer_expired
     .global     _tx_thread_time_slice
 
-
-
-/* Define the 16-bit Thumb mode veneer for _tx_timer_interrupt for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .thumb
-    .global $_tx_timer_interrupt
-    .type   $_tx_timer_interrupt,function
-$_tx_timer_interrupt:
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
-    .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_timer_interrupt              // Call _tx_timer_interrupt function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
-
-
     .text
     .align 2
 /**************************************************************************/
@@ -64,7 +48,7 @@ $_tx_timer_interrupt:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_timer_interrupt                                  ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -104,8 +88,14 @@ $_tx_timer_interrupt:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_timer_interrupt
     .type   _tx_timer_interrupt,function
 _tx_timer_interrupt:
@@ -197,7 +187,7 @@ __tx_timer_done:
 
 __tx_something_expired:
 
-    STMDB   sp!, {r0, lr}                       // Save the lr register on the stack
+    PUSH    {r0, lr}                            // Save the lr register on the stack
                                                 //   and save r0 just to keep 8-byte alignment
 
     /* Did a timer expire?  */
@@ -225,13 +215,9 @@ __tx_timer_dont_activate:
 
 __tx_timer_not_ts_expiration:
 
-    LDMIA   sp!, {r0, lr}                       // Recover lr register (r0 is just there for
+    POP     {r0, lr}                            // Recover lr register (r0 is just there for
                                                 //   the 8-byte stack alignment
 
 __tx_timer_nothing_expired:
 
-#ifdef __THUMB_INTERWORK
     BX      lr                                  // Return to caller
-#else
-    MOV     pc, lr                              // Return to caller
-#endif

ports/cortex_a15/ac6/inc/tx_port.h

@@ -321,7 +321,7 @@ void    tx_thread_vfp_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARMv7-A Version 6.3.0 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARMv7-A Version 6.4.0 *";
 #else
 extern  CHAR                    _tx_version_id[];
 #endif

ports/cortex_a15/ac6/src/tx_thread_context_restore.S

@@ -23,16 +23,16 @@
 #include "tx_user.h"
 #endif
 
-    .arm
-
-#ifdef TX_ENABLE_FIQ_SUPPORT
-SVC_MODE        =     0xD3               // Disable IRQ/FIQ, SVC mode
-IRQ_MODE        =     0xD2               // Disable IRQ/FIQ, IRQ mode
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
 #else
-SVC_MODE        =     0x93               // Disable IRQ, SVC mode
-IRQ_MODE        =     0x92               // Disable IRQ, IRQ mode
+    .arm
 #endif
 
+SVC_MODE        =     0x13               // SVC mode
+IRQ_MODE        =     0x12               // IRQ mode
+
     .global     _tx_thread_system_state
     .global     _tx_thread_current_ptr
     .global     _tx_thread_execute_ptr
@@ -45,7 +45,6 @@ IRQ_MODE        =     0x92               // Disable IRQ, IRQ mode
 /* No 16-bit Thumb mode veneer code is needed for _tx_thread_context_restore
    since it will never be called 16-bit mode.  */
 
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -53,7 +52,7 @@ IRQ_MODE        =     0x92               // Disable IRQ, IRQ mode
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_context_restore                            ARMv7-A       */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -94,6 +93,9 @@ IRQ_MODE        =     0x92               // Disable IRQ, IRQ mode
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
     .global _tx_thread_context_restore
@@ -129,9 +131,9 @@ _tx_thread_context_restore:
     /* Just recover the saved registers and return to the point of
        interrupt.  */
 
-    LDMIA   sp!, {r0, r10, r12, lr}         // Recover SPSR, POI, and scratch regs
+    POP     {r0, r10, r12, lr}              // Recover SPSR, POI, and scratch regs
     MSR     SPSR_cxsf, r0                   // Put SPSR back
-    LDMIA   sp!, {r0-r3}                    // Recover r0-r3
+    POP     {r0-r3}                         // Recover r0-r3
     MOVS    pc, lr                          // Return to point of interrupt
 
 __tx_thread_not_nested_restore:
@@ -160,26 +162,23 @@ __tx_thread_no_preempt_restore:
    /* Pickup the saved stack pointer.  */
 
    /* Recover the saved context and return to the point of interrupt.  */
-    LDMIA   sp!, {r0, r10, r12, lr}         // Recover SPSR, POI, and scratch regs
+    POP     {r0, r10, r12, lr}              // Recover SPSR, POI, and scratch regs
     MSR     SPSR_cxsf, r0                   // Put SPSR back
-    LDMIA   sp!, {r0-r3}                    // Recover r0-r3
+    POP     {r0-r3}                         // Recover r0-r3
     MOVS    pc, lr                          // Return to point of interrupt
 
 __tx_thread_preempt_restore:
 
-    LDMIA   sp!, {r3, r10, r12, lr}         // Recover temporarily saved registers
+    POP     {r3, r10, r12, lr}              // Recover temporarily saved registers
     MOV     r1, lr                          // Save lr (point of interrupt)
-    MOV     r2, #SVC_MODE                   // Build SVC mode CPSR
-    MSR     CPSR_c, r2                      // Enter SVC mode
+    CPS     #SVC_MODE                       // Enter SVC mode
     STR     r1, [sp, #-4]!                  // Save point of interrupt
-    STMDB   sp!, {r4-r12, lr}               // Save upper half of registers
+    PUSH    {r4-r12, lr}                    // Save upper half of registers
     MOV     r4, r3                          // Save SPSR in r4
-    MOV     r2, #IRQ_MODE                   // Build IRQ mode CPSR
-    MSR     CPSR_c, r2                      // Enter IRQ mode
-    LDMIA   sp!, {r0-r3}                    // Recover r0-r3
-    MOV     r5, #SVC_MODE                   // Build SVC mode CPSR
-    MSR     CPSR_c, r5                      // Enter SVC mode
-    STMDB   sp!, {r0-r3}                    // Save r0-r3 on thread's stack
+    CPS     #IRQ_MODE                       // Enter IRQ mode
+    POP     {r0-r3}                         // Recover r0-r3
+    CPS     #SVC_MODE                       // Enter SVC mode
+    PUSH    {r0-r3}                         // Save r0-r3 on thread's stack
 
     LDR     r1, =_tx_thread_current_ptr     // Pickup address of current thread ptr
     LDR     r0, [r1]                        // Pickup current thread pointer
@@ -192,13 +191,11 @@ __tx_thread_preempt_restore:
     STR     r2, [sp, #-4]!                  // Save FPSCR
     VSTMDB  sp!, {D16-D31}                  // Save D16-D31
     VSTMDB  sp!, {D0-D15}                   // Save D0-D15
-
 _tx_skip_irq_vfp_save:
-
 #endif
 
     MOV     r3, #1                          // Build interrupt stack type
-    STMDB   sp!, {r3, r4}                   // Save interrupt stack type and SPSR
+    PUSH    {r3, r4}                        // Save interrupt stack type and SPSR
     STR     sp, [r0, #8]                    // Save stack pointer in thread control
                                             //   block
 
@@ -223,6 +220,5 @@ __tx_thread_dont_save_ts:
 __tx_thread_idle_system_restore:
 
     /* Just return back to the scheduler!  */
-    MOV     r0, #SVC_MODE                   // Build SVC mode CPSR
-    MSR     CPSR_c, r0                      // Enter SVC mode
+    CPS     #SVC_MODE                       // Enter SVC mode
     B       _tx_thread_schedule             // Return to scheduler

ports/cortex_a15/ac6/src/tx_thread_context_save.S

@@ -23,6 +23,13 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
     .global     _tx_thread_system_state
     .global     _tx_thread_current_ptr
     .global     __tx_irq_processing_return
@@ -31,7 +38,6 @@
 /* No 16-bit Thumb mode veneer code is needed for _tx_thread_context_save
    since it will never be called 16-bit mode.  */
 
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -39,7 +45,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_context_save                              ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -79,6 +85,9 @@
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
     .global _tx_thread_context_save
@@ -90,7 +99,7 @@ _tx_thread_context_save:
 
     /* Check for a nested interrupt condition.  */
 
-    STMDB   sp!, {r0-r3}                    // Save some working registers
+    PUSH    {r0-r3}                         // Save some working registers
 #ifdef TX_ENABLE_FIQ_SUPPORT
     CPSID   if                              // Disable FIQ interrupts
 #endif
@@ -101,15 +110,15 @@ _tx_thread_context_save:
 
     /* Nested interrupt condition.  */
 
-    ADD     r2, r2, #1                      // Increment the interrupt counter
+    ADD     r2, #1                          // Increment the interrupt counter
     STR     r2, [r3]                        // Store it back in the variable
 
    /* Save the rest of the scratch registers on the stack and return to the
       calling ISR.  */
 
     MRS     r0, SPSR                        // Pickup saved SPSR
-    SUB     lr, lr, #4                      // Adjust point of interrupt
-    STMDB   sp!, {r0, r10, r12, lr}         // Store other registers
+    SUB     lr, #4                          // Adjust point of interrupt
+    PUSH    {r0, r10, r12, lr}              // Store other registers
 
     /* Return to the ISR.  */
 
@@ -129,7 +138,7 @@ _tx_thread_context_save:
 __tx_thread_not_nested_save:
 
     /* Otherwise, not nested, check to see if a thread was running.  */
-    ADD     r2, r2, #1                      // Increment the interrupt counter
+    ADD     r2, #1                          // Increment the interrupt counter
     STR     r2, [r3]                        // Store it back in the variable
     LDR     r1, =_tx_thread_current_ptr     // Pickup address of current thread ptr
     LDR     r0, [r1]                        // Pickup current thread pointer
@@ -140,8 +149,8 @@ __tx_thread_not_nested_save:
     /* Save minimal context of interrupted thread.  */
 
     MRS     r2, SPSR                        // Pickup saved SPSR
-    SUB     lr, lr, #4                      // Adjust point of interrupt
-    STMDB   sp!, {r2, r10, r12, lr}         // Store other registers
+    SUB     lr, #4                          // Adjust point of interrupt
+    PUSH    {r2, r10, r12, lr}              // Store other registers
 
     MOV     r10, #0                         // Clear stack limit
 
@@ -174,5 +183,5 @@ __tx_thread_idle_system_save:
     POP     {lr}                            // Recover ISR lr
 #endif
 
-    ADD     sp, sp, #16                     // Recover saved registers
+    ADD     sp, #16                         // Recover saved registers
     B       __tx_irq_processing_return      // Continue IRQ processing

ports/cortex_a15/ac6/src/tx_thread_fiq_nesting_end.S

@@ -23,6 +23,13 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
 #ifdef TX_ENABLE_FIQ_SUPPORT
 DISABLE_INTS    =       0xC0                    // Disable IRQ/FIQ interrupts
 #else
@@ -31,11 +38,6 @@ DISABLE_INTS    =       0x80                    // Disable IRQ interrupts
 MODE_MASK       =       0x1F                    // Mode mask
 FIQ_MODE_BITS   =       0x11                    // FIQ mode bits
 
-
-/* No 16-bit Thumb mode veneer code is needed for _tx_thread_fiq_nesting_end
-   since it will never be called 16-bit mode.  */
-
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -43,7 +45,7 @@ FIQ_MODE_BITS   =       0x11                    // FIQ mode bits
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_fiq_nesting_end                           ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -88,8 +90,14 @@ FIQ_MODE_BITS   =       0x11                    // FIQ mode bits
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_fiq_nesting_end
     .type    _tx_thread_fiq_nesting_end,function
 _tx_thread_fiq_nesting_end:
@@ -103,8 +111,4 @@ _tx_thread_fiq_nesting_end:
     ORR     r0, r0, #FIQ_MODE_BITS              // Build IRQ mode CPSR
     MSR     CPSR_c, r0                          // Reenter IRQ mode
 
-#ifdef __THUMB_INTERWORK
     BX      r3                                  // Return to caller
-#else
-    MOV     pc, r3                              // Return to caller
-#endif

ports/cortex_a15/ac6/src/tx_thread_fiq_nesting_start.S

@@ -23,15 +23,17 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
 FIQ_DISABLE     =       0x40                    // FIQ disable bit
 MODE_MASK       =       0x1F                    // Mode mask
 SYS_MODE_BITS   =       0x1F                    // System mode bits
 
-
-/* No 16-bit Thumb mode veneer code is needed for _tx_thread_fiq_nesting_start
-   since it will never be called 16-bit mode.  */
-
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -39,7 +41,7 @@ SYS_MODE_BITS   =       0x1F                    // System mode bits
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_fiq_nesting_start                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -81,8 +83,14 @@ SYS_MODE_BITS   =       0x1F                    // System mode bits
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_fiq_nesting_start
     .type    _tx_thread_fiq_nesting_start,function
 _tx_thread_fiq_nesting_start:
@@ -95,8 +103,4 @@ _tx_thread_fiq_nesting_start:
                                                 //   and push r1 just to keep 8-byte alignment
     BIC     r0, r0, #FIQ_DISABLE                // Build enable FIQ CPSR
     MSR     CPSR_c, r0                          // Enter system mode
-#ifdef __THUMB_INTERWORK
     BX      r3                                  // Return to caller
-#else
-    MOV     pc, r3                              // Return to caller
-#endif

ports/cortex_a15/ac6/src/tx_thread_interrupt_control.S

@@ -23,25 +23,18 @@
 #include "tx_user.h"
 #endif
 
-INT_MASK        =   0x03F
-
-
-/* Define the 16-bit Thumb mode veneer for _tx_thread_interrupt_control for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .global $_tx_thread_interrupt_control
-$_tx_thread_interrupt_control:
+    .syntax unified
+#if defined(THUMB_MODE)
     .thumb
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
+#else
     .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_interrupt_control     // Call _tx_thread_interrupt_control function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
+#endif
 
+INT_MASK        =   0x0C0
+IRQ_MASK        =   0x080
+#ifdef TX_ENABLE_FIQ_SUPPORT
+FIQ_MASK        =   0x040
+#endif
 
     .text
     .align 2
@@ -50,7 +43,7 @@ $_tx_thread_interrupt_control:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_interrupt_control                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -86,25 +79,35 @@ $_tx_thread_interrupt_control:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_thread_interrupt_control
     .type   _tx_thread_interrupt_control,function
 _tx_thread_interrupt_control:
+    MRS     r1, CPSR                            // Pickup current CPSR
 
-    /* Pickup current interrupt lockout posture.  */
-
-    MRS     r3, CPSR                    // Pickup current CPSR
-    MOV     r2, #INT_MASK               // Build interrupt mask
-    AND     r1, r3, r2                  // Clear interrupt lockout bits
-    ORR     r1, r1, r0                  // Or-in new interrupt lockout bits
-
-    /* Apply the new interrupt posture.  */
-
-    MSR     CPSR_c, r1                  // Setup new CPSR
-    BIC     r0, r3, r2                  // Return previous interrupt mask
-#ifdef __THUMB_INTERWORK
-    BX      lr                          // Return to caller
+#ifdef TX_ENABLE_FIQ_SUPPORT
+    CPSID   if                                  // Disable IRQ and FIQ
 #else
-    MOV     pc, lr                      // Return to caller
+    CPSID   i                                   // Disable IRQ
 #endif
+
+    TST     r0, #IRQ_MASK
+    BNE     no_irq
+    CPSIE   i
+no_irq:
+#ifdef TX_ENABLE_FIQ_SUPPORT
+    TST     r0, #FIQ_MASK
+    BNE     no_fiq
+    CPSIE   f
+no_fiq:
+#endif
+
+    AND     r0, r1, #INT_MASK
+    BX      lr

ports/cortex_a15/ac6/src/tx_thread_interrupt_disable.S

@@ -23,22 +23,12 @@
 #include "tx_user.h"
 #endif
 
-/* Define the 16-bit Thumb mode veneer for _tx_thread_interrupt_disable for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .global $_tx_thread_interrupt_disable
-$_tx_thread_interrupt_disable:
+    .syntax unified
+#if defined(THUMB_MODE)
     .thumb
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
+#else
     .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_interrupt_disable     // Call _tx_thread_interrupt_disable function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
-
+#endif
 
     .text
     .align 2
@@ -47,7 +37,7 @@ $_tx_thread_interrupt_disable:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_interrupt_disable                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -82,8 +72,14 @@ $_tx_thread_interrupt_disable:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_thread_interrupt_disable
     .type   _tx_thread_interrupt_disable,function
 _tx_thread_interrupt_disable:
@@ -100,8 +96,4 @@ _tx_thread_interrupt_disable:
     CPSID   i                                   // Disable IRQ
 #endif
 
-#ifdef __THUMB_INTERWORK
     BX      lr                                  // Return to caller
-#else
-    MOV     pc, lr                              // Return to caller
-#endif

ports/cortex_a15/ac6/src/tx_thread_interrupt_restore.S

@@ -23,22 +23,17 @@
 #include "tx_user.h"
 #endif
 
-/* Define the 16-bit Thumb mode veneer for _tx_thread_interrupt_restore for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .global $_tx_thread_interrupt_restore
-$_tx_thread_interrupt_restore:
+    .syntax unified
+#if defined(THUMB_MODE)
     .thumb
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
+#else
     .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_interrupt_restore     // Call _tx_thread_interrupt_restore function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
+#endif
 
+IRQ_MASK        =   0x080
+#ifdef TX_ENABLE_FIQ_SUPPORT
+FIQ_MASK        =   0x040
+#endif
 
     .text
     .align 2
@@ -47,7 +42,7 @@ $_tx_thread_interrupt_restore:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_interrupt_restore                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -83,17 +78,27 @@ $_tx_thread_interrupt_restore:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_interrupt_restore
     .type    _tx_thread_interrupt_restore,function
 _tx_thread_interrupt_restore:
 
-    /* Apply the new interrupt posture.  */
-
-    MSR     CPSR_c, r0                          // Setup new CPSR
-#ifdef __THUMB_INTERWORK
-    BX      lr                                  // Return to caller
-#else
-    MOV     pc, lr                              // Return to caller
+    TST     r0, #IRQ_MASK
+    BNE     no_irq
+    CPSIE   i
+no_irq:
+#ifdef TX_ENABLE_FIQ_SUPPORT
+    TST     r0, #FIQ_MASK
+    BNE     no_fiq
+    CPSIE   f
+no_fiq:
 #endif
+
+    BX      lr                                  // Return to caller

ports/cortex_a15/ac6/src/tx_thread_irq_nesting_end.S

@@ -23,6 +23,13 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
 #ifdef TX_ENABLE_FIQ_SUPPORT
 DISABLE_INTS    =       0xC0                    // Disable IRQ/FIQ interrupts
 #else
@@ -31,11 +38,6 @@ DISABLE_INTS    =       0x80                    // Disable IRQ interrupts
 MODE_MASK       =       0x1F                    // Mode mask
 IRQ_MODE_BITS   =       0x12                    // IRQ mode bits
 
-
-/* No 16-bit Thumb mode veneer code is needed for _tx_thread_irq_nesting_end
-   since it will never be called 16-bit mode.  */
-
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -43,7 +45,7 @@ IRQ_MODE_BITS   =       0x12                    // IRQ mode bits
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_irq_nesting_end                           ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -88,8 +90,14 @@ IRQ_MODE_BITS   =       0x12                    // IRQ mode bits
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_irq_nesting_end
     .type    _tx_thread_irq_nesting_end,function
 _tx_thread_irq_nesting_end:
@@ -102,8 +110,4 @@ _tx_thread_irq_nesting_end:
     BIC     r0, r0, #MODE_MASK                  // Clear mode bits
     ORR     r0, r0, #IRQ_MODE_BITS              // Build IRQ mode CPSR
     MSR     CPSR_c, r0                          // Reenter IRQ mode
-#ifdef __THUMB_INTERWORK
     BX      r3                                  // Return to caller
-#else
-    MOV     pc, r3                              // Return to caller
-#endif

ports/cortex_a15/ac6/src/tx_thread_irq_nesting_start.S

@@ -23,15 +23,17 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
 IRQ_DISABLE     =       0x80                    // IRQ disable bit
 MODE_MASK       =       0x1F                    // Mode mask
 SYS_MODE_BITS   =       0x1F                    // System mode bits
 
-
-/* No 16-bit Thumb mode veneer code is needed for _tx_thread_irq_nesting_start
-   since it will never be called 16-bit mode.  */
-
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -39,7 +41,7 @@ SYS_MODE_BITS   =       0x1F                    // System mode bits
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_irq_nesting_start                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -81,8 +83,14 @@ SYS_MODE_BITS   =       0x1F                    // System mode bits
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_irq_nesting_start
     .type    _tx_thread_irq_nesting_start,function
 _tx_thread_irq_nesting_start:
@@ -95,8 +103,4 @@ _tx_thread_irq_nesting_start:
                                                 //   and push r1 just to keep 8-byte alignment
     BIC     r0, r0, #IRQ_DISABLE                // Build enable IRQ CPSR
     MSR     CPSR_c, r0                          // Enter system mode
-#ifdef __THUMB_INTERWORK
     BX      r3                                  // Return to caller
-#else
-    MOV     pc, r3                              // Return to caller
-#endif

ports/cortex_a15/ac6/src/tx_thread_schedule.S

@@ -23,37 +23,29 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
     .global     _tx_thread_execute_ptr
     .global     _tx_thread_current_ptr
     .global     _tx_timer_time_slice
 
-
-/* Define the 16-bit Thumb mode veneer for _tx_thread_schedule for
-   applications calling this function from to 16-bit Thumb mode.  */
-
     .text
     .align 2
-    .global $_tx_thread_schedule
-    .type   $_tx_thread_schedule,function
-$_tx_thread_schedule:
-         .thumb
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
-    .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_schedule              // Call _tx_thread_schedule function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
 
+#define IRQ_MODE    0x12            // IRQ mode
+#define SVC_MODE    0x13            // SVC mode
 
-    .text
-    .align 2
 /**************************************************************************/
 /*                                                                        */
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_schedule                                  ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -95,8 +87,14 @@ $_tx_thread_schedule:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_thread_schedule
     .type  _tx_thread_schedule,function
 _tx_thread_schedule:
@@ -140,11 +138,11 @@ __tx_thread_schedule_loop:
 
     /* Setup time-slice, if present.  */
 
-    LDR     r2, =_tx_timer_time_slice       // Pickup address of time-slice
-                                            //   variable
-    LDR     sp, [r0, #8]                    // Switch stack pointers
+    LDR     r2, =_tx_timer_time_slice       // Pickup address of time-slice variable
     STR     r3, [r2]                        // Setup time-slice
 
+    LDR     sp, [r0, #8]                    // Switch stack pointers
+
 #if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
 
     /* Call the thread entry function to indicate the thread is executing. */
@@ -154,16 +152,25 @@ __tx_thread_schedule_loop:
     MOV     r0, r5                          // Restore r0
 #endif
 
-    /* Determine if an interrupt frame or a synchronous task suspension frame
-       is present.  */
+    /* Determine if an interrupt frame or a synchronous task suspension frame is present. */
 
-    LDMIA   sp!, {r4, r5}                   // Pickup the stack type and saved CPSR
+    POP     {r4, r5}                        // Pickup the stack type and saved CPSR
     CMP     r4, #0                          // Check for synchronous context switch
     BEQ     _tx_solicited_return
+
+#if !defined(THUMB_MODE)
     MSR     SPSR_cxsf, r5                   // Setup SPSR for return
+#else
+    CPS     #IRQ_MODE                       // Enter IRQ mode
+    MSR     SPSR_cxsf, r5                   // Setup SPSR for return
+    LDR     r1, [r0, #8]                    // Get thread SP
+    LDR     lr, [r1, #0x40]                 // Get thread PC
+    CPS     #SVC_MODE                       // Enter SVC mode
+#endif
+
 #ifdef TX_ENABLE_VFP_SUPPORT
-    LDR     r1, [r0, #144]                  // Pickup the VFP enabled flag
-    CMP     r1, #0                          // Is the VFP enabled?
+    LDR     r2, [r0, #144]                  // Pickup the VFP enabled flag
+    CMP     r2, #0                          // Is the VFP enabled?
     BEQ     _tx_skip_interrupt_vfp_restore  // No, skip VFP interrupt restore
     VLDMIA  sp!, {D0-D15}                   // Recover D0-D15
     VLDMIA  sp!, {D16-D31}                  // Recover D16-D31
@@ -171,7 +178,15 @@ __tx_thread_schedule_loop:
     VMSR    FPSCR, r4                       // Restore FPSCR
 _tx_skip_interrupt_vfp_restore:
 #endif
+
+#if !defined(THUMB_MODE)
     LDMIA   sp!, {r0-r12, lr, pc}^          // Return to point of thread interrupt
+#else
+    POP     {r0-r12, lr}                    // Restore registers
+    ADD     sp, #4                          // Fix stack pointer (skip PC saved on stack)
+    CPS     #IRQ_MODE                       // Enter IRQ mode
+    SUBS    pc, lr, #0                      // Return to point of thread interrupt
+#endif
 
 _tx_solicited_return:
 
@@ -185,52 +200,63 @@ _tx_solicited_return:
     VMSR    FPSCR, r4                       // Restore FPSCR
 _tx_skip_solicited_vfp_restore:
 #endif
+
     MSR     CPSR_cxsf, r5                   // Recover CPSR
-    LDMIA   sp!, {r4-r11, lr}               // Return to thread synchronously
-#ifdef __THUMB_INTERWORK
+    POP     {r4-r11, lr}                    // Restore registers
     BX      lr                              // Return to caller
-#else
-    MOV     pc, lr                          // Return to caller
-#endif
 
 #ifdef TX_ENABLE_VFP_SUPPORT
 
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global tx_thread_vfp_enable
     .type  tx_thread_vfp_enable,function
 tx_thread_vfp_enable:
-    MRS     r2, CPSR                        // Pickup the CPSR
+    MRS     r0, CPSR                            // Pickup current CPSR
 #ifdef TX_ENABLE_FIQ_SUPPORT
-    CPSID   if                              // Enable IRQ and FIQ interrupts
+    CPSID   if                                  // Disable IRQ and FIQ
 #else
-    CPSID   i                               // Enable IRQ interrupts
+    CPSID   i                                   // Disable IRQ
 #endif
-    LDR     r0, =_tx_thread_current_ptr     // Build current thread pointer address
-    LDR     r1, [r0]                        // Pickup current thread pointer
+    LDR     r2, =_tx_thread_current_ptr     // Build current thread pointer address
+    LDR     r1, [r2]                        // Pickup current thread pointer
     CMP     r1, #0                          // Check for NULL thread pointer
-    BEQ     __tx_no_thread_to_enable        // If NULL, skip VFP enable
-    MOV     r0, #1                          // Build enable value
-    STR     r0, [r1, #144]                  // Set the VFP enable flag (tx_thread_vfp_enable field in TX_THREAD)
-__tx_no_thread_to_enable:
-    MSR     CPSR_cxsf, r2                   // Recover CPSR
-    BX      LR                              // Return to caller
+    BEQ     restore_ints                    // If NULL, skip VFP enable
+    MOV     r2, #1                          // Build enable value
+    STR     r2, [r1, #144]                  // Set the VFP enable flag (tx_thread_vfp_enable field in TX_THREAD)
+    B       restore_ints
 
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global tx_thread_vfp_disable
     .type  tx_thread_vfp_disable,function
 tx_thread_vfp_disable:
-    MRS     r2, CPSR                        // Pickup the CPSR
+    MRS     r0, CPSR                            // Pickup current CPSR
 #ifdef TX_ENABLE_FIQ_SUPPORT
-    CPSID   if                              // Enable IRQ and FIQ interrupts
+    CPSID   if                                  // Disable IRQ and FIQ
 #else
-    CPSID   i                               // Enable IRQ interrupts
+    CPSID   i                                   // Disable IRQ
 #endif
-    LDR     r0, =_tx_thread_current_ptr     // Build current thread pointer address
-    LDR     r1, [r0]                        // Pickup current thread pointer
+    LDR     r2, =_tx_thread_current_ptr     // Build current thread pointer address
+    LDR     r1, [r2]                        // Pickup current thread pointer
     CMP     r1, #0                          // Check for NULL thread pointer
-    BEQ     __tx_no_thread_to_disable       // If NULL, skip VFP disable
-    MOV     r0, #0                          // Build disable value
-    STR     r0, [r1, #144]                  // Clear the VFP enable flag (tx_thread_vfp_enable field in TX_THREAD)
-__tx_no_thread_to_disable:
-    MSR     CPSR_cxsf, r2                   // Recover CPSR
-    BX      LR                              // Return to caller
+    BEQ     restore_ints                    // If NULL, skip VFP disable
+    MOV     r2, #0                          // Build disable value
+    STR     r2, [r1, #144]                  // Clear the VFP enable flag (tx_thread_vfp_enable field in TX_THREAD)
+
+restore_ints:
+    TST     r0, #IRQ_MASK
+    BNE     no_irq
+    CPSIE   i
+no_irq:
+#ifdef TX_ENABLE_FIQ_SUPPORT
+    TST     r0, #FIQ_MASK
+    BNE     no_fiq
+    CPSIE   f
+no_fiq:
+#endif
+    BX      lr
 
 #endif

ports/cortex_a15/ac6/src/tx_thread_stack_build.S

@@ -23,33 +23,22 @@
 #include "tx_user.h"
 #endif
 
-    .arm
-
-SVC_MODE        =       0x13                    // SVC mode
-#ifdef TX_ENABLE_FIQ_SUPPORT
-CPSR_MASK       =       0xDF                    // Mask initial CPSR, IRQ & FIQ interrupts enabled
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
 #else
-CPSR_MASK       =       0x9F                    // Mask initial CPSR, IRQ interrupts enabled
+    .arm
 #endif
 
+SVC_MODE        =       0x13                    // SVC mode
 
-/* Define the 16-bit Thumb mode veneer for _tx_thread_stack_build for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .thumb
-    .global $_tx_thread_stack_build
-    .type    $_tx_thread_stack_build,function
-$_tx_thread_stack_build:
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
-    .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_stack_build           // Call _tx_thread_stack_build function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
+THUMB_MASK      =       0x20                    // Thumb bit mask
 
+#ifdef TX_ENABLE_FIQ_SUPPORT
+CPSR_MASK       =       0xFF                    // Mask initial CPSR, T, IRQ & FIQ interrupts enabled
+#else
+CPSR_MASK       =       0xBF                    // Mask initial CPSR, T, IRQ interrupts enabled
+#endif
 
     .text
     .align 2
@@ -58,7 +47,7 @@ $_tx_thread_stack_build:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_stack_build                               ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -96,8 +85,14 @@ $_tx_thread_stack_build:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_stack_build
     .type    _tx_thread_stack_build,function
 _tx_thread_stack_build:
@@ -135,6 +130,15 @@ _tx_thread_stack_build:
 
     MOV     r3, #1                          // Build interrupt stack type
     STR     r3, [r2, #0]                    // Store stack type
+
+    MRS     r3, CPSR                        // Pickup CPSR
+    BIC     r3, #CPSR_MASK                  // Mask mode bits of CPSR
+    ORR     r3, #SVC_MODE                   // Build CPSR, SYS mode, interrupts enabled
+    TST     r1, #1                          // Check if the initial PC is a Thumb function
+    IT      NE
+    ORRNE   r3, #THUMB_MASK                 // If the initial PC is a thumb function, CPSR must reflect this
+    STR     r3, [r2, #4]                    // Store initial CPSR
+
     MOV     r3, #0                          // Build initial register value
     STR     r3, [r2, #8]                    // Store initial r0
     STR     r3, [r2, #12]                   // Store initial r1
@@ -146,26 +150,20 @@ _tx_thread_stack_build:
     STR     r3, [r2, #36]                   // Store initial r7
     STR     r3, [r2, #40]                   // Store initial r8
     STR     r3, [r2, #44]                   // Store initial r9
-    LDR     r3, [r0, #12]                   // Pickup stack starting address
-    STR     r3, [r2, #48]                   // Store initial r10 (sl)
-    LDR     r3,=_tx_thread_schedule         // Pickup address of _tx_thread_schedule for GDB backtrace
-    STR     r3, [r2, #60]                   // Store initial r14 (lr)
-    MOV     r3, #0                          // Build initial register value
     STR     r3, [r2, #52]                   // Store initial r11
     STR     r3, [r2, #56]                   // Store initial r12
-    STR     r1, [r2, #64]                   // Store initial pc
     STR     r3, [r2, #68]                   // 0 for back-trace
-    MRS     r1, CPSR                        // Pickup CPSR
-    BIC     r1, r1, #CPSR_MASK              // Mask mode bits of CPSR
-    ORR     r3, r1, #SVC_MODE               // Build CPSR, SVC mode, interrupts enabled
-    STR     r3, [r2, #4]                    // Store initial CPSR
+
+    LDR     r3, [r0, #12]                   // Pickup stack starting address
+    STR     r3, [r2, #48]                   // Store initial r10 (sl)
+
+    LDR     r3,=_tx_thread_schedule         // Pickup address of _tx_thread_schedule for GDB backtrace
+    STR     r3, [r2, #60]                   // Store initial r14 (lr)
+
+    STR     r1, [r2, #64]                   // Store initial pc
 
     /* Setup stack pointer.  */
 
     STR     r2, [r0, #8]                    // Save stack pointer in thread's
                                             //   control block
-#ifdef __THUMB_INTERWORK
     BX      lr                              // Return to caller
-#else
-    MOV     pc, lr                          // Return to caller
-#endif

ports/cortex_a15/ac6/src/tx_thread_system_return.S

@@ -23,33 +23,17 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
     .arm
-
+#endif
 
     .global     _tx_thread_current_ptr
     .global     _tx_timer_time_slice
     .global     _tx_thread_schedule
 
-
-
-/* Define the 16-bit Thumb mode veneer for _tx_thread_system_return for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align  2
-    .global $_tx_thread_system_return
-    .type   $_tx_thread_system_return,function
-$_tx_thread_system_return:
-    .thumb
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
-    .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_system_return         // Call _tx_thread_system_return function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
-
-
     .text
     .align  2
 /**************************************************************************/
@@ -57,7 +41,7 @@ $_tx_thread_system_return:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_system_return                             ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -98,15 +82,21 @@ $_tx_thread_system_return:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_thread_system_return
     .type   _tx_thread_system_return,function
 _tx_thread_system_return:
 
     /* Save minimal context on the stack.  */
 
-    STMDB   sp!, {r4-r11, lr}           // Save minimal context
+    PUSH    {r4-r11, lr}                // Save minimal context
 
     LDR     r4, =_tx_thread_current_ptr // Pickup address of current ptr
     LDR     r5, [r4]                    // Pickup current thread pointer
@@ -123,8 +113,11 @@ _tx_skip_solicited_vfp_save:
 #endif
 
     MOV     r0, #0                      // Build a solicited stack type
-    MRS     r1, CPSR                    // Pickup the CPSR
-    STMDB   sp!, {r0-r1}                // Save type and CPSR
+    MRS     r1, CPSR                    // Pickup the CPSR, T bit is always cleared by hardware
+    TST     lr, #1                      // Check if calling function is in Thumb mode
+    IT      NE
+    ORRNE   r1, #0x20                   // Set the T bit so that the correct mode is set on return
+    PUSH    {r0-r1}                     // Save type and CPSR
 
    /* Lockout interrupts.  */
 

ports/cortex_a15/ac6/src/tx_timer_interrupt.S

@@ -23,8 +23,12 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
     .arm
-
+#endif
 
 /* Define Assembly language external references...  */
 
@@ -37,26 +41,6 @@
     .global     _tx_timer_expired
     .global     _tx_thread_time_slice
 
-
-
-/* Define the 16-bit Thumb mode veneer for _tx_timer_interrupt for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .thumb
-    .global $_tx_timer_interrupt
-    .type   $_tx_timer_interrupt,function
-$_tx_timer_interrupt:
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
-    .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_timer_interrupt              // Call _tx_timer_interrupt function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
-
-
     .text
     .align 2
 /**************************************************************************/
@@ -64,7 +48,7 @@ $_tx_timer_interrupt:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_timer_interrupt                                  ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -104,8 +88,14 @@ $_tx_timer_interrupt:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_timer_interrupt
     .type   _tx_timer_interrupt,function
 _tx_timer_interrupt:
@@ -197,7 +187,7 @@ __tx_timer_done:
 
 __tx_something_expired:
 
-    STMDB   sp!, {r0, lr}                       // Save the lr register on the stack
+    PUSH    {r0, lr}                            // Save the lr register on the stack
                                                 //   and save r0 just to keep 8-byte alignment
 
     /* Did a timer expire?  */
@@ -225,13 +215,9 @@ __tx_timer_dont_activate:
 
 __tx_timer_not_ts_expiration:
 
-    LDMIA   sp!, {r0, lr}                       // Recover lr register (r0 is just there for
+    POP     {r0, lr}                            // Recover lr register (r0 is just there for
                                                 //   the 8-byte stack alignment
 
 __tx_timer_nothing_expired:
 
-#ifdef __THUMB_INTERWORK
     BX      lr                                  // Return to caller
-#else
-    MOV     pc, lr                              // Return to caller
-#endif

ports/cortex_a15/gnu/example_build/crt0.S

@@ -1,15 +1,30 @@
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
 /* .text is used instead of .section .text so it works with arm-aout too.  */
     .text
-    .code 32
     .align  0
 
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _mainCRTStartup
+_mainCRTStartup:
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _start
+_start:
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global start
 start:
-_start:
-_mainCRTStartup:
 
 /* Start by setting up a stack */
     /*  Set up the stack pointer to a fixed value */
@@ -69,24 +84,12 @@ _mainCRTStartup:
     .word   _fini
 #endif  */
     /* Return ...  */
-#ifdef __APCS_26__
-    movs    pc, lr
-#else
-#ifdef __THUMB_INTERWORK
     bx  lr
-#else
-    mov pc, lr
-#endif
-#endif
 
     .global  _fini
     .type    _fini,function
 _fini:
-#ifdef __THUMB_INTERWORK
     BX      lr                                  // Return to caller
-#else
-    MOV     pc, lr                              // Return to caller
-#endif
 
 /*  Workspace for Angel calls.  */
     .data

ports/cortex_a15/gnu/inc/tx_port.h

@@ -321,7 +321,7 @@ void    tx_thread_vfp_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARMv7-A Version 6.3.0 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARMv7-A Version 6.4.0 *";
 #else
 extern  CHAR                    _tx_version_id[];
 #endif

ports/cortex_a15/gnu/src/tx_thread_context_restore.S

@@ -23,16 +23,16 @@
 #include "tx_user.h"
 #endif
 
-    .arm
-
-#ifdef TX_ENABLE_FIQ_SUPPORT
-SVC_MODE        =     0xD3               // Disable IRQ/FIQ, SVC mode
-IRQ_MODE        =     0xD2               // Disable IRQ/FIQ, IRQ mode
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
 #else
-SVC_MODE        =     0x93               // Disable IRQ, SVC mode
-IRQ_MODE        =     0x92               // Disable IRQ, IRQ mode
+    .arm
 #endif
 
+SVC_MODE        =     0x13               // SVC mode
+IRQ_MODE        =     0x12               // IRQ mode
+
     .global     _tx_thread_system_state
     .global     _tx_thread_current_ptr
     .global     _tx_thread_execute_ptr
@@ -45,7 +45,6 @@ IRQ_MODE        =     0x92               // Disable IRQ, IRQ mode
 /* No 16-bit Thumb mode veneer code is needed for _tx_thread_context_restore
    since it will never be called 16-bit mode.  */
 
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -53,7 +52,7 @@ IRQ_MODE        =     0x92               // Disable IRQ, IRQ mode
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_context_restore                            ARMv7-A       */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -94,6 +93,9 @@ IRQ_MODE        =     0x92               // Disable IRQ, IRQ mode
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
     .global _tx_thread_context_restore
@@ -129,9 +131,9 @@ _tx_thread_context_restore:
     /* Just recover the saved registers and return to the point of
        interrupt.  */
 
-    LDMIA   sp!, {r0, r10, r12, lr}         // Recover SPSR, POI, and scratch regs
+    POP     {r0, r10, r12, lr}              // Recover SPSR, POI, and scratch regs
     MSR     SPSR_cxsf, r0                   // Put SPSR back
-    LDMIA   sp!, {r0-r3}                    // Recover r0-r3
+    POP     {r0-r3}                         // Recover r0-r3
     MOVS    pc, lr                          // Return to point of interrupt
 
 __tx_thread_not_nested_restore:
@@ -160,26 +162,23 @@ __tx_thread_no_preempt_restore:
    /* Pickup the saved stack pointer.  */
 
    /* Recover the saved context and return to the point of interrupt.  */
-    LDMIA   sp!, {r0, r10, r12, lr}         // Recover SPSR, POI, and scratch regs
+    POP     {r0, r10, r12, lr}              // Recover SPSR, POI, and scratch regs
     MSR     SPSR_cxsf, r0                   // Put SPSR back
-    LDMIA   sp!, {r0-r3}                    // Recover r0-r3
+    POP     {r0-r3}                         // Recover r0-r3
     MOVS    pc, lr                          // Return to point of interrupt
 
 __tx_thread_preempt_restore:
 
-    LDMIA   sp!, {r3, r10, r12, lr}         // Recover temporarily saved registers
+    POP     {r3, r10, r12, lr}              // Recover temporarily saved registers
     MOV     r1, lr                          // Save lr (point of interrupt)
-    MOV     r2, #SVC_MODE                   // Build SVC mode CPSR
-    MSR     CPSR_c, r2                      // Enter SVC mode
+    CPS     #SVC_MODE                       // Enter SVC mode
     STR     r1, [sp, #-4]!                  // Save point of interrupt
-    STMDB   sp!, {r4-r12, lr}               // Save upper half of registers
+    PUSH    {r4-r12, lr}                    // Save upper half of registers
     MOV     r4, r3                          // Save SPSR in r4
-    MOV     r2, #IRQ_MODE                   // Build IRQ mode CPSR
-    MSR     CPSR_c, r2                      // Enter IRQ mode
-    LDMIA   sp!, {r0-r3}                    // Recover r0-r3
-    MOV     r5, #SVC_MODE                   // Build SVC mode CPSR
-    MSR     CPSR_c, r5                      // Enter SVC mode
-    STMDB   sp!, {r0-r3}                    // Save r0-r3 on thread's stack
+    CPS     #IRQ_MODE                       // Enter IRQ mode
+    POP     {r0-r3}                         // Recover r0-r3
+    CPS     #SVC_MODE                       // Enter SVC mode
+    PUSH    {r0-r3}                         // Save r0-r3 on thread's stack
 
     LDR     r1, =_tx_thread_current_ptr     // Pickup address of current thread ptr
     LDR     r0, [r1]                        // Pickup current thread pointer
@@ -192,13 +191,11 @@ __tx_thread_preempt_restore:
     STR     r2, [sp, #-4]!                  // Save FPSCR
     VSTMDB  sp!, {D16-D31}                  // Save D16-D31
     VSTMDB  sp!, {D0-D15}                   // Save D0-D15
-
 _tx_skip_irq_vfp_save:
-
 #endif
 
     MOV     r3, #1                          // Build interrupt stack type
-    STMDB   sp!, {r3, r4}                   // Save interrupt stack type and SPSR
+    PUSH    {r3, r4}                        // Save interrupt stack type and SPSR
     STR     sp, [r0, #8]                    // Save stack pointer in thread control
                                             //   block
 
@@ -223,6 +220,5 @@ __tx_thread_dont_save_ts:
 __tx_thread_idle_system_restore:
 
     /* Just return back to the scheduler!  */
-    MOV     r0, #SVC_MODE                   // Build SVC mode CPSR
-    MSR     CPSR_c, r0                      // Enter SVC mode
+    CPS     #SVC_MODE                       // Enter SVC mode
     B       _tx_thread_schedule             // Return to scheduler

ports/cortex_a15/gnu/src/tx_thread_context_save.S

@@ -23,6 +23,13 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
     .global     _tx_thread_system_state
     .global     _tx_thread_current_ptr
     .global     __tx_irq_processing_return
@@ -31,7 +38,6 @@
 /* No 16-bit Thumb mode veneer code is needed for _tx_thread_context_save
    since it will never be called 16-bit mode.  */
 
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -39,7 +45,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_context_save                              ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -79,6 +85,9 @@
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
     .global _tx_thread_context_save
@@ -90,7 +99,7 @@ _tx_thread_context_save:
 
     /* Check for a nested interrupt condition.  */
 
-    STMDB   sp!, {r0-r3}                    // Save some working registers
+    PUSH    {r0-r3}                         // Save some working registers
 #ifdef TX_ENABLE_FIQ_SUPPORT
     CPSID   if                              // Disable FIQ interrupts
 #endif
@@ -101,15 +110,15 @@ _tx_thread_context_save:
 
     /* Nested interrupt condition.  */
 
-    ADD     r2, r2, #1                      // Increment the interrupt counter
+    ADD     r2, #1                          // Increment the interrupt counter
     STR     r2, [r3]                        // Store it back in the variable
 
    /* Save the rest of the scratch registers on the stack and return to the
       calling ISR.  */
 
     MRS     r0, SPSR                        // Pickup saved SPSR
-    SUB     lr, lr, #4                      // Adjust point of interrupt
-    STMDB   sp!, {r0, r10, r12, lr}         // Store other registers
+    SUB     lr, #4                          // Adjust point of interrupt
+    PUSH    {r0, r10, r12, lr}              // Store other registers
 
     /* Return to the ISR.  */
 
@@ -129,7 +138,7 @@ _tx_thread_context_save:
 __tx_thread_not_nested_save:
 
     /* Otherwise, not nested, check to see if a thread was running.  */
-    ADD     r2, r2, #1                      // Increment the interrupt counter
+    ADD     r2, #1                          // Increment the interrupt counter
     STR     r2, [r3]                        // Store it back in the variable
     LDR     r1, =_tx_thread_current_ptr     // Pickup address of current thread ptr
     LDR     r0, [r1]                        // Pickup current thread pointer
@@ -140,8 +149,8 @@ __tx_thread_not_nested_save:
     /* Save minimal context of interrupted thread.  */
 
     MRS     r2, SPSR                        // Pickup saved SPSR
-    SUB     lr, lr, #4                      // Adjust point of interrupt
-    STMDB   sp!, {r2, r10, r12, lr}         // Store other registers
+    SUB     lr, #4                          // Adjust point of interrupt
+    PUSH    {r2, r10, r12, lr}              // Store other registers
 
     MOV     r10, #0                         // Clear stack limit
 
@@ -174,5 +183,5 @@ __tx_thread_idle_system_save:
     POP     {lr}                            // Recover ISR lr
 #endif
 
-    ADD     sp, sp, #16                     // Recover saved registers
+    ADD     sp, #16                         // Recover saved registers
     B       __tx_irq_processing_return      // Continue IRQ processing

ports/cortex_a15/gnu/src/tx_thread_fiq_nesting_end.S

@@ -23,6 +23,13 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
 #ifdef TX_ENABLE_FIQ_SUPPORT
 DISABLE_INTS    =       0xC0                    // Disable IRQ/FIQ interrupts
 #else
@@ -31,11 +38,6 @@ DISABLE_INTS    =       0x80                    // Disable IRQ interrupts
 MODE_MASK       =       0x1F                    // Mode mask
 FIQ_MODE_BITS   =       0x11                    // FIQ mode bits
 
-
-/* No 16-bit Thumb mode veneer code is needed for _tx_thread_fiq_nesting_end
-   since it will never be called 16-bit mode.  */
-
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -43,7 +45,7 @@ FIQ_MODE_BITS   =       0x11                    // FIQ mode bits
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_fiq_nesting_end                           ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -88,8 +90,14 @@ FIQ_MODE_BITS   =       0x11                    // FIQ mode bits
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_fiq_nesting_end
     .type    _tx_thread_fiq_nesting_end,function
 _tx_thread_fiq_nesting_end:
@@ -103,8 +111,4 @@ _tx_thread_fiq_nesting_end:
     ORR     r0, r0, #FIQ_MODE_BITS              // Build IRQ mode CPSR
     MSR     CPSR_c, r0                          // Reenter IRQ mode
 
-#ifdef __THUMB_INTERWORK
     BX      r3                                  // Return to caller
-#else
-    MOV     pc, r3                              // Return to caller
-#endif

ports/cortex_a15/gnu/src/tx_thread_fiq_nesting_start.S

@@ -23,15 +23,17 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
 FIQ_DISABLE     =       0x40                    // FIQ disable bit
 MODE_MASK       =       0x1F                    // Mode mask
 SYS_MODE_BITS   =       0x1F                    // System mode bits
 
-
-/* No 16-bit Thumb mode veneer code is needed for _tx_thread_fiq_nesting_start
-   since it will never be called 16-bit mode.  */
-
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -39,7 +41,7 @@ SYS_MODE_BITS   =       0x1F                    // System mode bits
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_fiq_nesting_start                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -81,8 +83,14 @@ SYS_MODE_BITS   =       0x1F                    // System mode bits
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_fiq_nesting_start
     .type    _tx_thread_fiq_nesting_start,function
 _tx_thread_fiq_nesting_start:
@@ -95,8 +103,4 @@ _tx_thread_fiq_nesting_start:
                                                 //   and push r1 just to keep 8-byte alignment
     BIC     r0, r0, #FIQ_DISABLE                // Build enable FIQ CPSR
     MSR     CPSR_c, r0                          // Enter system mode
-#ifdef __THUMB_INTERWORK
     BX      r3                                  // Return to caller
-#else
-    MOV     pc, r3                              // Return to caller
-#endif

ports/cortex_a15/gnu/src/tx_thread_interrupt_control.S

@@ -23,25 +23,18 @@
 #include "tx_user.h"
 #endif
 
-INT_MASK        =   0x03F
-
-
-/* Define the 16-bit Thumb mode veneer for _tx_thread_interrupt_control for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .global $_tx_thread_interrupt_control
-$_tx_thread_interrupt_control:
+    .syntax unified
+#if defined(THUMB_MODE)
     .thumb
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
+#else
     .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_interrupt_control     // Call _tx_thread_interrupt_control function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
+#endif
 
+INT_MASK        =   0x0C0
+IRQ_MASK        =   0x080
+#ifdef TX_ENABLE_FIQ_SUPPORT
+FIQ_MASK        =   0x040
+#endif
 
     .text
     .align 2
@@ -50,7 +43,7 @@ $_tx_thread_interrupt_control:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_interrupt_control                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -86,25 +79,35 @@ $_tx_thread_interrupt_control:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_thread_interrupt_control
     .type   _tx_thread_interrupt_control,function
 _tx_thread_interrupt_control:
+    MRS     r1, CPSR                            // Pickup current CPSR
 
-    /* Pickup current interrupt lockout posture.  */
-
-    MRS     r3, CPSR                    // Pickup current CPSR
-    MOV     r2, #INT_MASK               // Build interrupt mask
-    AND     r1, r3, r2                  // Clear interrupt lockout bits
-    ORR     r1, r1, r0                  // Or-in new interrupt lockout bits
-
-    /* Apply the new interrupt posture.  */
-
-    MSR     CPSR_c, r1                  // Setup new CPSR
-    BIC     r0, r3, r2                  // Return previous interrupt mask
-#ifdef __THUMB_INTERWORK
-    BX      lr                          // Return to caller
+#ifdef TX_ENABLE_FIQ_SUPPORT
+    CPSID   if                                  // Disable IRQ and FIQ
 #else
-    MOV     pc, lr                      // Return to caller
+    CPSID   i                                   // Disable IRQ
 #endif
+
+    TST     r0, #IRQ_MASK
+    BNE     no_irq
+    CPSIE   i
+no_irq:
+#ifdef TX_ENABLE_FIQ_SUPPORT
+    TST     r0, #FIQ_MASK
+    BNE     no_fiq
+    CPSIE   f
+no_fiq:
+#endif
+
+    AND     r0, r1, #INT_MASK
+    BX      lr

ports/cortex_a15/gnu/src/tx_thread_interrupt_disable.S

@@ -23,22 +23,12 @@
 #include "tx_user.h"
 #endif
 
-/* Define the 16-bit Thumb mode veneer for _tx_thread_interrupt_disable for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .global $_tx_thread_interrupt_disable
-$_tx_thread_interrupt_disable:
+    .syntax unified
+#if defined(THUMB_MODE)
     .thumb
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
+#else
     .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_interrupt_disable     // Call _tx_thread_interrupt_disable function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
-
+#endif
 
     .text
     .align 2
@@ -47,7 +37,7 @@ $_tx_thread_interrupt_disable:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_interrupt_disable                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -82,8 +72,14 @@ $_tx_thread_interrupt_disable:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_thread_interrupt_disable
     .type   _tx_thread_interrupt_disable,function
 _tx_thread_interrupt_disable:
@@ -100,8 +96,4 @@ _tx_thread_interrupt_disable:
     CPSID   i                                   // Disable IRQ
 #endif
 
-#ifdef __THUMB_INTERWORK
     BX      lr                                  // Return to caller
-#else
-    MOV     pc, lr                              // Return to caller
-#endif

ports/cortex_a15/gnu/src/tx_thread_interrupt_restore.S

@@ -23,22 +23,17 @@
 #include "tx_user.h"
 #endif
 
-/* Define the 16-bit Thumb mode veneer for _tx_thread_interrupt_restore for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .global $_tx_thread_interrupt_restore
-$_tx_thread_interrupt_restore:
+    .syntax unified
+#if defined(THUMB_MODE)
     .thumb
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
+#else
     .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_interrupt_restore     // Call _tx_thread_interrupt_restore function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
+#endif
 
+IRQ_MASK        =   0x080
+#ifdef TX_ENABLE_FIQ_SUPPORT
+FIQ_MASK        =   0x040
+#endif
 
     .text
     .align 2
@@ -47,7 +42,7 @@ $_tx_thread_interrupt_restore:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_interrupt_restore                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -83,17 +78,27 @@ $_tx_thread_interrupt_restore:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_interrupt_restore
     .type    _tx_thread_interrupt_restore,function
 _tx_thread_interrupt_restore:
 
-    /* Apply the new interrupt posture.  */
-
-    MSR     CPSR_c, r0                          // Setup new CPSR
-#ifdef __THUMB_INTERWORK
-    BX      lr                                  // Return to caller
-#else
-    MOV     pc, lr                              // Return to caller
+    TST     r0, #IRQ_MASK
+    BNE     no_irq
+    CPSIE   i
+no_irq:
+#ifdef TX_ENABLE_FIQ_SUPPORT
+    TST     r0, #FIQ_MASK
+    BNE     no_fiq
+    CPSIE   f
+no_fiq:
 #endif
+
+    BX      lr                                  // Return to caller

ports/cortex_a15/gnu/src/tx_thread_irq_nesting_end.S

@@ -23,6 +23,13 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
 #ifdef TX_ENABLE_FIQ_SUPPORT
 DISABLE_INTS    =       0xC0                    // Disable IRQ/FIQ interrupts
 #else
@@ -31,11 +38,6 @@ DISABLE_INTS    =       0x80                    // Disable IRQ interrupts
 MODE_MASK       =       0x1F                    // Mode mask
 IRQ_MODE_BITS   =       0x12                    // IRQ mode bits
 
-
-/* No 16-bit Thumb mode veneer code is needed for _tx_thread_irq_nesting_end
-   since it will never be called 16-bit mode.  */
-
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -43,7 +45,7 @@ IRQ_MODE_BITS   =       0x12                    // IRQ mode bits
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_irq_nesting_end                           ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -88,8 +90,14 @@ IRQ_MODE_BITS   =       0x12                    // IRQ mode bits
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_irq_nesting_end
     .type    _tx_thread_irq_nesting_end,function
 _tx_thread_irq_nesting_end:
@@ -102,8 +110,4 @@ _tx_thread_irq_nesting_end:
     BIC     r0, r0, #MODE_MASK                  // Clear mode bits
     ORR     r0, r0, #IRQ_MODE_BITS              // Build IRQ mode CPSR
     MSR     CPSR_c, r0                          // Reenter IRQ mode
-#ifdef __THUMB_INTERWORK
     BX      r3                                  // Return to caller
-#else
-    MOV     pc, r3                              // Return to caller
-#endif

ports/cortex_a15/gnu/src/tx_thread_irq_nesting_start.S

@@ -23,15 +23,17 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
 IRQ_DISABLE     =       0x80                    // IRQ disable bit
 MODE_MASK       =       0x1F                    // Mode mask
 SYS_MODE_BITS   =       0x1F                    // System mode bits
 
-
-/* No 16-bit Thumb mode veneer code is needed for _tx_thread_irq_nesting_start
-   since it will never be called 16-bit mode.  */
-
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -39,7 +41,7 @@ SYS_MODE_BITS   =       0x1F                    // System mode bits
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_irq_nesting_start                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -81,8 +83,14 @@ SYS_MODE_BITS   =       0x1F                    // System mode bits
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_irq_nesting_start
     .type    _tx_thread_irq_nesting_start,function
 _tx_thread_irq_nesting_start:
@@ -95,8 +103,4 @@ _tx_thread_irq_nesting_start:
                                                 //   and push r1 just to keep 8-byte alignment
     BIC     r0, r0, #IRQ_DISABLE                // Build enable IRQ CPSR
     MSR     CPSR_c, r0                          // Enter system mode
-#ifdef __THUMB_INTERWORK
     BX      r3                                  // Return to caller
-#else
-    MOV     pc, r3                              // Return to caller
-#endif

ports/cortex_a15/gnu/src/tx_thread_schedule.S

@@ -23,37 +23,29 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
     .global     _tx_thread_execute_ptr
     .global     _tx_thread_current_ptr
     .global     _tx_timer_time_slice
 
-
-/* Define the 16-bit Thumb mode veneer for _tx_thread_schedule for
-   applications calling this function from to 16-bit Thumb mode.  */
-
     .text
     .align 2
-    .global $_tx_thread_schedule
-    .type   $_tx_thread_schedule,function
-$_tx_thread_schedule:
-         .thumb
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
-    .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_schedule              // Call _tx_thread_schedule function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
 
+#define IRQ_MODE    0x12            // IRQ mode
+#define SVC_MODE    0x13            // SVC mode
 
-    .text
-    .align 2
 /**************************************************************************/
 /*                                                                        */
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_schedule                                  ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -95,8 +87,14 @@ $_tx_thread_schedule:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_thread_schedule
     .type  _tx_thread_schedule,function
 _tx_thread_schedule:
@@ -140,11 +138,11 @@ __tx_thread_schedule_loop:
 
     /* Setup time-slice, if present.  */
 
-    LDR     r2, =_tx_timer_time_slice       // Pickup address of time-slice
-                                            //   variable
-    LDR     sp, [r0, #8]                    // Switch stack pointers
+    LDR     r2, =_tx_timer_time_slice       // Pickup address of time-slice variable
     STR     r3, [r2]                        // Setup time-slice
 
+    LDR     sp, [r0, #8]                    // Switch stack pointers
+
 #if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
 
     /* Call the thread entry function to indicate the thread is executing. */
@@ -154,16 +152,25 @@ __tx_thread_schedule_loop:
     MOV     r0, r5                          // Restore r0
 #endif
 
-    /* Determine if an interrupt frame or a synchronous task suspension frame
-       is present.  */
+    /* Determine if an interrupt frame or a synchronous task suspension frame is present. */
 
-    LDMIA   sp!, {r4, r5}                   // Pickup the stack type and saved CPSR
+    POP     {r4, r5}                        // Pickup the stack type and saved CPSR
     CMP     r4, #0                          // Check for synchronous context switch
     BEQ     _tx_solicited_return
+
+#if !defined(THUMB_MODE)
     MSR     SPSR_cxsf, r5                   // Setup SPSR for return
+#else
+    CPS     #IRQ_MODE                       // Enter IRQ mode
+    MSR     SPSR_cxsf, r5                   // Setup SPSR for return
+    LDR     r1, [r0, #8]                    // Get thread SP
+    LDR     lr, [r1, #0x40]                 // Get thread PC
+    CPS     #SVC_MODE                       // Enter SVC mode
+#endif
+
 #ifdef TX_ENABLE_VFP_SUPPORT
-    LDR     r1, [r0, #144]                  // Pickup the VFP enabled flag
-    CMP     r1, #0                          // Is the VFP enabled?
+    LDR     r2, [r0, #144]                  // Pickup the VFP enabled flag
+    CMP     r2, #0                          // Is the VFP enabled?
     BEQ     _tx_skip_interrupt_vfp_restore  // No, skip VFP interrupt restore
     VLDMIA  sp!, {D0-D15}                   // Recover D0-D15
     VLDMIA  sp!, {D16-D31}                  // Recover D16-D31
@@ -171,7 +178,15 @@ __tx_thread_schedule_loop:
     VMSR    FPSCR, r4                       // Restore FPSCR
 _tx_skip_interrupt_vfp_restore:
 #endif
+
+#if !defined(THUMB_MODE)
     LDMIA   sp!, {r0-r12, lr, pc}^          // Return to point of thread interrupt
+#else
+    POP     {r0-r12, lr}                    // Restore registers
+    ADD     sp, #4                          // Fix stack pointer (skip PC saved on stack)
+    CPS     #IRQ_MODE                       // Enter IRQ mode
+    SUBS    pc, lr, #0                      // Return to point of thread interrupt
+#endif
 
 _tx_solicited_return:
 
@@ -185,52 +200,63 @@ _tx_solicited_return:
     VMSR    FPSCR, r4                       // Restore FPSCR
 _tx_skip_solicited_vfp_restore:
 #endif
+
     MSR     CPSR_cxsf, r5                   // Recover CPSR
-    LDMIA   sp!, {r4-r11, lr}               // Return to thread synchronously
-#ifdef __THUMB_INTERWORK
+    POP     {r4-r11, lr}                    // Restore registers
     BX      lr                              // Return to caller
-#else
-    MOV     pc, lr                          // Return to caller
-#endif
 
 #ifdef TX_ENABLE_VFP_SUPPORT
 
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global tx_thread_vfp_enable
     .type  tx_thread_vfp_enable,function
 tx_thread_vfp_enable:
-    MRS     r2, CPSR                        // Pickup the CPSR
+    MRS     r0, CPSR                            // Pickup current CPSR
 #ifdef TX_ENABLE_FIQ_SUPPORT
-    CPSID   if                              // Enable IRQ and FIQ interrupts
+    CPSID   if                                  // Disable IRQ and FIQ
 #else
-    CPSID   i                               // Enable IRQ interrupts
+    CPSID   i                                   // Disable IRQ
 #endif
-    LDR     r0, =_tx_thread_current_ptr     // Build current thread pointer address
-    LDR     r1, [r0]                        // Pickup current thread pointer
+    LDR     r2, =_tx_thread_current_ptr     // Build current thread pointer address
+    LDR     r1, [r2]                        // Pickup current thread pointer
     CMP     r1, #0                          // Check for NULL thread pointer
-    BEQ     __tx_no_thread_to_enable        // If NULL, skip VFP enable
-    MOV     r0, #1                          // Build enable value
-    STR     r0, [r1, #144]                  // Set the VFP enable flag (tx_thread_vfp_enable field in TX_THREAD)
-__tx_no_thread_to_enable:
-    MSR     CPSR_cxsf, r2                   // Recover CPSR
-    BX      LR                              // Return to caller
+    BEQ     restore_ints                    // If NULL, skip VFP enable
+    MOV     r2, #1                          // Build enable value
+    STR     r2, [r1, #144]                  // Set the VFP enable flag (tx_thread_vfp_enable field in TX_THREAD)
+    B       restore_ints
 
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global tx_thread_vfp_disable
     .type  tx_thread_vfp_disable,function
 tx_thread_vfp_disable:
-    MRS     r2, CPSR                        // Pickup the CPSR
+    MRS     r0, CPSR                            // Pickup current CPSR
 #ifdef TX_ENABLE_FIQ_SUPPORT
-    CPSID   if                              // Enable IRQ and FIQ interrupts
+    CPSID   if                                  // Disable IRQ and FIQ
 #else
-    CPSID   i                               // Enable IRQ interrupts
+    CPSID   i                                   // Disable IRQ
 #endif
-    LDR     r0, =_tx_thread_current_ptr     // Build current thread pointer address
-    LDR     r1, [r0]                        // Pickup current thread pointer
+    LDR     r2, =_tx_thread_current_ptr     // Build current thread pointer address
+    LDR     r1, [r2]                        // Pickup current thread pointer
     CMP     r1, #0                          // Check for NULL thread pointer
-    BEQ     __tx_no_thread_to_disable       // If NULL, skip VFP disable
-    MOV     r0, #0                          // Build disable value
-    STR     r0, [r1, #144]                  // Clear the VFP enable flag (tx_thread_vfp_enable field in TX_THREAD)
-__tx_no_thread_to_disable:
-    MSR     CPSR_cxsf, r2                   // Recover CPSR
-    BX      LR                              // Return to caller
+    BEQ     restore_ints                    // If NULL, skip VFP disable
+    MOV     r2, #0                          // Build disable value
+    STR     r2, [r1, #144]                  // Clear the VFP enable flag (tx_thread_vfp_enable field in TX_THREAD)
+
+restore_ints:
+    TST     r0, #IRQ_MASK
+    BNE     no_irq
+    CPSIE   i
+no_irq:
+#ifdef TX_ENABLE_FIQ_SUPPORT
+    TST     r0, #FIQ_MASK
+    BNE     no_fiq
+    CPSIE   f
+no_fiq:
+#endif
+    BX      lr
 
 #endif

ports/cortex_a15/gnu/src/tx_thread_stack_build.S

@@ -23,33 +23,22 @@
 #include "tx_user.h"
 #endif
 
-    .arm
-
-SVC_MODE        =       0x13                    // SVC mode
-#ifdef TX_ENABLE_FIQ_SUPPORT
-CPSR_MASK       =       0xDF                    // Mask initial CPSR, IRQ & FIQ interrupts enabled
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
 #else
-CPSR_MASK       =       0x9F                    // Mask initial CPSR, IRQ interrupts enabled
+    .arm
 #endif
 
+SVC_MODE        =       0x13                    // SVC mode
 
-/* Define the 16-bit Thumb mode veneer for _tx_thread_stack_build for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .thumb
-    .global $_tx_thread_stack_build
-    .type    $_tx_thread_stack_build,function
-$_tx_thread_stack_build:
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
-    .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_stack_build           // Call _tx_thread_stack_build function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
+THUMB_MASK      =       0x20                    // Thumb bit mask
 
+#ifdef TX_ENABLE_FIQ_SUPPORT
+CPSR_MASK       =       0xFF                    // Mask initial CPSR, T, IRQ & FIQ interrupts enabled
+#else
+CPSR_MASK       =       0xBF                    // Mask initial CPSR, T, IRQ interrupts enabled
+#endif
 
     .text
     .align 2
@@ -58,7 +47,7 @@ $_tx_thread_stack_build:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_stack_build                               ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -96,8 +85,14 @@ $_tx_thread_stack_build:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_stack_build
     .type    _tx_thread_stack_build,function
 _tx_thread_stack_build:
@@ -135,6 +130,15 @@ _tx_thread_stack_build:
 
     MOV     r3, #1                          // Build interrupt stack type
     STR     r3, [r2, #0]                    // Store stack type
+
+    MRS     r3, CPSR                        // Pickup CPSR
+    BIC     r3, #CPSR_MASK                  // Mask mode bits of CPSR
+    ORR     r3, #SVC_MODE                   // Build CPSR, SYS mode, interrupts enabled
+    TST     r1, #1                          // Check if the initial PC is a Thumb function
+    IT      NE
+    ORRNE   r3, #THUMB_MASK                 // If the initial PC is a thumb function, CPSR must reflect this
+    STR     r3, [r2, #4]                    // Store initial CPSR
+
     MOV     r3, #0                          // Build initial register value
     STR     r3, [r2, #8]                    // Store initial r0
     STR     r3, [r2, #12]                   // Store initial r1
@@ -146,26 +150,20 @@ _tx_thread_stack_build:
     STR     r3, [r2, #36]                   // Store initial r7
     STR     r3, [r2, #40]                   // Store initial r8
     STR     r3, [r2, #44]                   // Store initial r9
-    LDR     r3, [r0, #12]                   // Pickup stack starting address
-    STR     r3, [r2, #48]                   // Store initial r10 (sl)
-    LDR     r3,=_tx_thread_schedule         // Pickup address of _tx_thread_schedule for GDB backtrace
-    STR     r3, [r2, #60]                   // Store initial r14 (lr)
-    MOV     r3, #0                          // Build initial register value
     STR     r3, [r2, #52]                   // Store initial r11
     STR     r3, [r2, #56]                   // Store initial r12
-    STR     r1, [r2, #64]                   // Store initial pc
     STR     r3, [r2, #68]                   // 0 for back-trace
-    MRS     r1, CPSR                        // Pickup CPSR
-    BIC     r1, r1, #CPSR_MASK              // Mask mode bits of CPSR
-    ORR     r3, r1, #SVC_MODE               // Build CPSR, SVC mode, interrupts enabled
-    STR     r3, [r2, #4]                    // Store initial CPSR
+
+    LDR     r3, [r0, #12]                   // Pickup stack starting address
+    STR     r3, [r2, #48]                   // Store initial r10 (sl)
+
+    LDR     r3,=_tx_thread_schedule         // Pickup address of _tx_thread_schedule for GDB backtrace
+    STR     r3, [r2, #60]                   // Store initial r14 (lr)
+
+    STR     r1, [r2, #64]                   // Store initial pc
 
     /* Setup stack pointer.  */
 
     STR     r2, [r0, #8]                    // Save stack pointer in thread's
                                             //   control block
-#ifdef __THUMB_INTERWORK
     BX      lr                              // Return to caller
-#else
-    MOV     pc, lr                          // Return to caller
-#endif

ports/cortex_a15/gnu/src/tx_thread_system_return.S

@@ -23,33 +23,17 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
     .arm
-
+#endif
 
     .global     _tx_thread_current_ptr
     .global     _tx_timer_time_slice
     .global     _tx_thread_schedule
 
-
-
-/* Define the 16-bit Thumb mode veneer for _tx_thread_system_return for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align  2
-    .global $_tx_thread_system_return
-    .type   $_tx_thread_system_return,function
-$_tx_thread_system_return:
-    .thumb
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
-    .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_system_return         // Call _tx_thread_system_return function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
-
-
     .text
     .align  2
 /**************************************************************************/
@@ -57,7 +41,7 @@ $_tx_thread_system_return:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_system_return                             ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -98,15 +82,21 @@ $_tx_thread_system_return:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_thread_system_return
     .type   _tx_thread_system_return,function
 _tx_thread_system_return:
 
     /* Save minimal context on the stack.  */
 
-    STMDB   sp!, {r4-r11, lr}           // Save minimal context
+    PUSH    {r4-r11, lr}                // Save minimal context
 
     LDR     r4, =_tx_thread_current_ptr // Pickup address of current ptr
     LDR     r5, [r4]                    // Pickup current thread pointer
@@ -123,8 +113,11 @@ _tx_skip_solicited_vfp_save:
 #endif
 
     MOV     r0, #0                      // Build a solicited stack type
-    MRS     r1, CPSR                    // Pickup the CPSR
-    STMDB   sp!, {r0-r1}                // Save type and CPSR
+    MRS     r1, CPSR                    // Pickup the CPSR, T bit is always cleared by hardware
+    TST     lr, #1                      // Check if calling function is in Thumb mode
+    IT      NE
+    ORRNE   r1, #0x20                   // Set the T bit so that the correct mode is set on return
+    PUSH    {r0-r1}                     // Save type and CPSR
 
    /* Lockout interrupts.  */
 

ports/cortex_a15/gnu/src/tx_timer_interrupt.S

@@ -23,8 +23,12 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
     .arm
-
+#endif
 
 /* Define Assembly language external references...  */
 
@@ -37,26 +41,6 @@
     .global     _tx_timer_expired
     .global     _tx_thread_time_slice
 
-
-
-/* Define the 16-bit Thumb mode veneer for _tx_timer_interrupt for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .thumb
-    .global $_tx_timer_interrupt
-    .type   $_tx_timer_interrupt,function
-$_tx_timer_interrupt:
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
-    .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_timer_interrupt              // Call _tx_timer_interrupt function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
-
-
     .text
     .align 2
 /**************************************************************************/
@@ -64,7 +48,7 @@ $_tx_timer_interrupt:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_timer_interrupt                                  ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -104,8 +88,14 @@ $_tx_timer_interrupt:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_timer_interrupt
     .type   _tx_timer_interrupt,function
 _tx_timer_interrupt:
@@ -197,7 +187,7 @@ __tx_timer_done:
 
 __tx_something_expired:
 
-    STMDB   sp!, {r0, lr}                       // Save the lr register on the stack
+    PUSH    {r0, lr}                            // Save the lr register on the stack
                                                 //   and save r0 just to keep 8-byte alignment
 
     /* Did a timer expire?  */
@@ -225,13 +215,9 @@ __tx_timer_dont_activate:
 
 __tx_timer_not_ts_expiration:
 
-    LDMIA   sp!, {r0, lr}                       // Recover lr register (r0 is just there for
+    POP     {r0, lr}                            // Recover lr register (r0 is just there for
                                                 //   the 8-byte stack alignment
 
 __tx_timer_nothing_expired:
 
-#ifdef __THUMB_INTERWORK
     BX      lr                                  // Return to caller
-#else
-    MOV     pc, lr                              // Return to caller
-#endif

ports/cortex_a15/iar/inc/tx_port.h

@@ -385,7 +385,7 @@ void    tx_thread_vfp_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] = 
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-A15/IAR Version 6.3.0 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Cortex-A15/IAR Version 6.4.0 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];

ports/cortex_a17/ac6/inc/tx_port.h

@@ -321,7 +321,7 @@ void    tx_thread_vfp_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARMv7-A Version 6.3.0 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARMv7-A Version 6.4.0 *";
 #else
 extern  CHAR                    _tx_version_id[];
 #endif

ports/cortex_a17/ac6/src/tx_thread_context_restore.S

@@ -23,16 +23,16 @@
 #include "tx_user.h"
 #endif
 
-    .arm
-
-#ifdef TX_ENABLE_FIQ_SUPPORT
-SVC_MODE        =     0xD3               // Disable IRQ/FIQ, SVC mode
-IRQ_MODE        =     0xD2               // Disable IRQ/FIQ, IRQ mode
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
 #else
-SVC_MODE        =     0x93               // Disable IRQ, SVC mode
-IRQ_MODE        =     0x92               // Disable IRQ, IRQ mode
+    .arm
 #endif
 
+SVC_MODE        =     0x13               // SVC mode
+IRQ_MODE        =     0x12               // IRQ mode
+
     .global     _tx_thread_system_state
     .global     _tx_thread_current_ptr
     .global     _tx_thread_execute_ptr
@@ -45,7 +45,6 @@ IRQ_MODE        =     0x92               // Disable IRQ, IRQ mode
 /* No 16-bit Thumb mode veneer code is needed for _tx_thread_context_restore
    since it will never be called 16-bit mode.  */
 
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -53,7 +52,7 @@ IRQ_MODE        =     0x92               // Disable IRQ, IRQ mode
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_context_restore                            ARMv7-A       */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -94,6 +93,9 @@ IRQ_MODE        =     0x92               // Disable IRQ, IRQ mode
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
     .global _tx_thread_context_restore
@@ -129,9 +131,9 @@ _tx_thread_context_restore:
     /* Just recover the saved registers and return to the point of
        interrupt.  */
 
-    LDMIA   sp!, {r0, r10, r12, lr}         // Recover SPSR, POI, and scratch regs
+    POP     {r0, r10, r12, lr}              // Recover SPSR, POI, and scratch regs
     MSR     SPSR_cxsf, r0                   // Put SPSR back
-    LDMIA   sp!, {r0-r3}                    // Recover r0-r3
+    POP     {r0-r3}                         // Recover r0-r3
     MOVS    pc, lr                          // Return to point of interrupt
 
 __tx_thread_not_nested_restore:
@@ -160,26 +162,23 @@ __tx_thread_no_preempt_restore:
    /* Pickup the saved stack pointer.  */
 
    /* Recover the saved context and return to the point of interrupt.  */
-    LDMIA   sp!, {r0, r10, r12, lr}         // Recover SPSR, POI, and scratch regs
+    POP     {r0, r10, r12, lr}              // Recover SPSR, POI, and scratch regs
     MSR     SPSR_cxsf, r0                   // Put SPSR back
-    LDMIA   sp!, {r0-r3}                    // Recover r0-r3
+    POP     {r0-r3}                         // Recover r0-r3
     MOVS    pc, lr                          // Return to point of interrupt
 
 __tx_thread_preempt_restore:
 
-    LDMIA   sp!, {r3, r10, r12, lr}         // Recover temporarily saved registers
+    POP     {r3, r10, r12, lr}              // Recover temporarily saved registers
     MOV     r1, lr                          // Save lr (point of interrupt)
-    MOV     r2, #SVC_MODE                   // Build SVC mode CPSR
-    MSR     CPSR_c, r2                      // Enter SVC mode
+    CPS     #SVC_MODE                       // Enter SVC mode
     STR     r1, [sp, #-4]!                  // Save point of interrupt
-    STMDB   sp!, {r4-r12, lr}               // Save upper half of registers
+    PUSH    {r4-r12, lr}                    // Save upper half of registers
     MOV     r4, r3                          // Save SPSR in r4
-    MOV     r2, #IRQ_MODE                   // Build IRQ mode CPSR
-    MSR     CPSR_c, r2                      // Enter IRQ mode
-    LDMIA   sp!, {r0-r3}                    // Recover r0-r3
-    MOV     r5, #SVC_MODE                   // Build SVC mode CPSR
-    MSR     CPSR_c, r5                      // Enter SVC mode
-    STMDB   sp!, {r0-r3}                    // Save r0-r3 on thread's stack
+    CPS     #IRQ_MODE                       // Enter IRQ mode
+    POP     {r0-r3}                         // Recover r0-r3
+    CPS     #SVC_MODE                       // Enter SVC mode
+    PUSH    {r0-r3}                         // Save r0-r3 on thread's stack
 
     LDR     r1, =_tx_thread_current_ptr     // Pickup address of current thread ptr
     LDR     r0, [r1]                        // Pickup current thread pointer
@@ -192,13 +191,11 @@ __tx_thread_preempt_restore:
     STR     r2, [sp, #-4]!                  // Save FPSCR
     VSTMDB  sp!, {D16-D31}                  // Save D16-D31
     VSTMDB  sp!, {D0-D15}                   // Save D0-D15
-
 _tx_skip_irq_vfp_save:
-
 #endif
 
     MOV     r3, #1                          // Build interrupt stack type
-    STMDB   sp!, {r3, r4}                   // Save interrupt stack type and SPSR
+    PUSH    {r3, r4}                        // Save interrupt stack type and SPSR
     STR     sp, [r0, #8]                    // Save stack pointer in thread control
                                             //   block
 
@@ -223,6 +220,5 @@ __tx_thread_dont_save_ts:
 __tx_thread_idle_system_restore:
 
     /* Just return back to the scheduler!  */
-    MOV     r0, #SVC_MODE                   // Build SVC mode CPSR
-    MSR     CPSR_c, r0                      // Enter SVC mode
+    CPS     #SVC_MODE                       // Enter SVC mode
     B       _tx_thread_schedule             // Return to scheduler

ports/cortex_a17/ac6/src/tx_thread_context_save.S

@@ -23,6 +23,13 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
     .global     _tx_thread_system_state
     .global     _tx_thread_current_ptr
     .global     __tx_irq_processing_return
@@ -31,7 +38,6 @@
 /* No 16-bit Thumb mode veneer code is needed for _tx_thread_context_save
    since it will never be called 16-bit mode.  */
 
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -39,7 +45,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_context_save                              ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -79,6 +85,9 @@
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
     .global _tx_thread_context_save
@@ -90,7 +99,7 @@ _tx_thread_context_save:
 
     /* Check for a nested interrupt condition.  */
 
-    STMDB   sp!, {r0-r3}                    // Save some working registers
+    PUSH    {r0-r3}                         // Save some working registers
 #ifdef TX_ENABLE_FIQ_SUPPORT
     CPSID   if                              // Disable FIQ interrupts
 #endif
@@ -101,15 +110,15 @@ _tx_thread_context_save:
 
     /* Nested interrupt condition.  */
 
-    ADD     r2, r2, #1                      // Increment the interrupt counter
+    ADD     r2, #1                          // Increment the interrupt counter
     STR     r2, [r3]                        // Store it back in the variable
 
    /* Save the rest of the scratch registers on the stack and return to the
       calling ISR.  */
 
     MRS     r0, SPSR                        // Pickup saved SPSR
-    SUB     lr, lr, #4                      // Adjust point of interrupt
-    STMDB   sp!, {r0, r10, r12, lr}         // Store other registers
+    SUB     lr, #4                          // Adjust point of interrupt
+    PUSH    {r0, r10, r12, lr}              // Store other registers
 
     /* Return to the ISR.  */
 
@@ -129,7 +138,7 @@ _tx_thread_context_save:
 __tx_thread_not_nested_save:
 
     /* Otherwise, not nested, check to see if a thread was running.  */
-    ADD     r2, r2, #1                      // Increment the interrupt counter
+    ADD     r2, #1                          // Increment the interrupt counter
     STR     r2, [r3]                        // Store it back in the variable
     LDR     r1, =_tx_thread_current_ptr     // Pickup address of current thread ptr
     LDR     r0, [r1]                        // Pickup current thread pointer
@@ -140,8 +149,8 @@ __tx_thread_not_nested_save:
     /* Save minimal context of interrupted thread.  */
 
     MRS     r2, SPSR                        // Pickup saved SPSR
-    SUB     lr, lr, #4                      // Adjust point of interrupt
-    STMDB   sp!, {r2, r10, r12, lr}         // Store other registers
+    SUB     lr, #4                          // Adjust point of interrupt
+    PUSH    {r2, r10, r12, lr}              // Store other registers
 
     MOV     r10, #0                         // Clear stack limit
 
@@ -174,5 +183,5 @@ __tx_thread_idle_system_save:
     POP     {lr}                            // Recover ISR lr
 #endif
 
-    ADD     sp, sp, #16                     // Recover saved registers
+    ADD     sp, #16                         // Recover saved registers
     B       __tx_irq_processing_return      // Continue IRQ processing

ports/cortex_a17/ac6/src/tx_thread_fiq_nesting_end.S

@@ -23,6 +23,13 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
 #ifdef TX_ENABLE_FIQ_SUPPORT
 DISABLE_INTS    =       0xC0                    // Disable IRQ/FIQ interrupts
 #else
@@ -31,11 +38,6 @@ DISABLE_INTS    =       0x80                    // Disable IRQ interrupts
 MODE_MASK       =       0x1F                    // Mode mask
 FIQ_MODE_BITS   =       0x11                    // FIQ mode bits
 
-
-/* No 16-bit Thumb mode veneer code is needed for _tx_thread_fiq_nesting_end
-   since it will never be called 16-bit mode.  */
-
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -43,7 +45,7 @@ FIQ_MODE_BITS   =       0x11                    // FIQ mode bits
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_fiq_nesting_end                           ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -88,8 +90,14 @@ FIQ_MODE_BITS   =       0x11                    // FIQ mode bits
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_fiq_nesting_end
     .type    _tx_thread_fiq_nesting_end,function
 _tx_thread_fiq_nesting_end:
@@ -103,8 +111,4 @@ _tx_thread_fiq_nesting_end:
     ORR     r0, r0, #FIQ_MODE_BITS              // Build IRQ mode CPSR
     MSR     CPSR_c, r0                          // Reenter IRQ mode
 
-#ifdef __THUMB_INTERWORK
     BX      r3                                  // Return to caller
-#else
-    MOV     pc, r3                              // Return to caller
-#endif

ports/cortex_a17/ac6/src/tx_thread_fiq_nesting_start.S

@@ -23,15 +23,17 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
 FIQ_DISABLE     =       0x40                    // FIQ disable bit
 MODE_MASK       =       0x1F                    // Mode mask
 SYS_MODE_BITS   =       0x1F                    // System mode bits
 
-
-/* No 16-bit Thumb mode veneer code is needed for _tx_thread_fiq_nesting_start
-   since it will never be called 16-bit mode.  */
-
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -39,7 +41,7 @@ SYS_MODE_BITS   =       0x1F                    // System mode bits
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_fiq_nesting_start                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -81,8 +83,14 @@ SYS_MODE_BITS   =       0x1F                    // System mode bits
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_fiq_nesting_start
     .type    _tx_thread_fiq_nesting_start,function
 _tx_thread_fiq_nesting_start:
@@ -95,8 +103,4 @@ _tx_thread_fiq_nesting_start:
                                                 //   and push r1 just to keep 8-byte alignment
     BIC     r0, r0, #FIQ_DISABLE                // Build enable FIQ CPSR
     MSR     CPSR_c, r0                          // Enter system mode
-#ifdef __THUMB_INTERWORK
     BX      r3                                  // Return to caller
-#else
-    MOV     pc, r3                              // Return to caller
-#endif

ports/cortex_a17/ac6/src/tx_thread_interrupt_control.S

@@ -23,25 +23,18 @@
 #include "tx_user.h"
 #endif
 
-INT_MASK        =   0x03F
-
-
-/* Define the 16-bit Thumb mode veneer for _tx_thread_interrupt_control for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .global $_tx_thread_interrupt_control
-$_tx_thread_interrupt_control:
+    .syntax unified
+#if defined(THUMB_MODE)
     .thumb
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
+#else
     .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_interrupt_control     // Call _tx_thread_interrupt_control function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
+#endif
 
+INT_MASK        =   0x0C0
+IRQ_MASK        =   0x080
+#ifdef TX_ENABLE_FIQ_SUPPORT
+FIQ_MASK        =   0x040
+#endif
 
     .text
     .align 2
@@ -50,7 +43,7 @@ $_tx_thread_interrupt_control:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_interrupt_control                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -86,25 +79,35 @@ $_tx_thread_interrupt_control:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_thread_interrupt_control
     .type   _tx_thread_interrupt_control,function
 _tx_thread_interrupt_control:
+    MRS     r1, CPSR                            // Pickup current CPSR
 
-    /* Pickup current interrupt lockout posture.  */
-
-    MRS     r3, CPSR                    // Pickup current CPSR
-    MOV     r2, #INT_MASK               // Build interrupt mask
-    AND     r1, r3, r2                  // Clear interrupt lockout bits
-    ORR     r1, r1, r0                  // Or-in new interrupt lockout bits
-
-    /* Apply the new interrupt posture.  */
-
-    MSR     CPSR_c, r1                  // Setup new CPSR
-    BIC     r0, r3, r2                  // Return previous interrupt mask
-#ifdef __THUMB_INTERWORK
-    BX      lr                          // Return to caller
+#ifdef TX_ENABLE_FIQ_SUPPORT
+    CPSID   if                                  // Disable IRQ and FIQ
 #else
-    MOV     pc, lr                      // Return to caller
+    CPSID   i                                   // Disable IRQ
 #endif
+
+    TST     r0, #IRQ_MASK
+    BNE     no_irq
+    CPSIE   i
+no_irq:
+#ifdef TX_ENABLE_FIQ_SUPPORT
+    TST     r0, #FIQ_MASK
+    BNE     no_fiq
+    CPSIE   f
+no_fiq:
+#endif
+
+    AND     r0, r1, #INT_MASK
+    BX      lr

ports/cortex_a17/ac6/src/tx_thread_interrupt_disable.S

@@ -23,22 +23,12 @@
 #include "tx_user.h"
 #endif
 
-/* Define the 16-bit Thumb mode veneer for _tx_thread_interrupt_disable for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .global $_tx_thread_interrupt_disable
-$_tx_thread_interrupt_disable:
+    .syntax unified
+#if defined(THUMB_MODE)
     .thumb
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
+#else
     .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_interrupt_disable     // Call _tx_thread_interrupt_disable function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
-
+#endif
 
     .text
     .align 2
@@ -47,7 +37,7 @@ $_tx_thread_interrupt_disable:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_interrupt_disable                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -82,8 +72,14 @@ $_tx_thread_interrupt_disable:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_thread_interrupt_disable
     .type   _tx_thread_interrupt_disable,function
 _tx_thread_interrupt_disable:
@@ -100,8 +96,4 @@ _tx_thread_interrupt_disable:
     CPSID   i                                   // Disable IRQ
 #endif
 
-#ifdef __THUMB_INTERWORK
     BX      lr                                  // Return to caller
-#else
-    MOV     pc, lr                              // Return to caller
-#endif

ports/cortex_a17/ac6/src/tx_thread_interrupt_restore.S

@@ -23,22 +23,17 @@
 #include "tx_user.h"
 #endif
 
-/* Define the 16-bit Thumb mode veneer for _tx_thread_interrupt_restore for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .global $_tx_thread_interrupt_restore
-$_tx_thread_interrupt_restore:
+    .syntax unified
+#if defined(THUMB_MODE)
     .thumb
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
+#else
     .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_interrupt_restore     // Call _tx_thread_interrupt_restore function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
+#endif
 
+IRQ_MASK        =   0x080
+#ifdef TX_ENABLE_FIQ_SUPPORT
+FIQ_MASK        =   0x040
+#endif
 
     .text
     .align 2
@@ -47,7 +42,7 @@ $_tx_thread_interrupt_restore:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_interrupt_restore                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -83,17 +78,27 @@ $_tx_thread_interrupt_restore:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_interrupt_restore
     .type    _tx_thread_interrupt_restore,function
 _tx_thread_interrupt_restore:
 
-    /* Apply the new interrupt posture.  */
-
-    MSR     CPSR_c, r0                          // Setup new CPSR
-#ifdef __THUMB_INTERWORK
-    BX      lr                                  // Return to caller
-#else
-    MOV     pc, lr                              // Return to caller
+    TST     r0, #IRQ_MASK
+    BNE     no_irq
+    CPSIE   i
+no_irq:
+#ifdef TX_ENABLE_FIQ_SUPPORT
+    TST     r0, #FIQ_MASK
+    BNE     no_fiq
+    CPSIE   f
+no_fiq:
 #endif
+
+    BX      lr                                  // Return to caller

ports/cortex_a17/ac6/src/tx_thread_irq_nesting_end.S

@@ -23,6 +23,13 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
 #ifdef TX_ENABLE_FIQ_SUPPORT
 DISABLE_INTS    =       0xC0                    // Disable IRQ/FIQ interrupts
 #else
@@ -31,11 +38,6 @@ DISABLE_INTS    =       0x80                    // Disable IRQ interrupts
 MODE_MASK       =       0x1F                    // Mode mask
 IRQ_MODE_BITS   =       0x12                    // IRQ mode bits
 
-
-/* No 16-bit Thumb mode veneer code is needed for _tx_thread_irq_nesting_end
-   since it will never be called 16-bit mode.  */
-
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -43,7 +45,7 @@ IRQ_MODE_BITS   =       0x12                    // IRQ mode bits
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_irq_nesting_end                           ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -88,8 +90,14 @@ IRQ_MODE_BITS   =       0x12                    // IRQ mode bits
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_irq_nesting_end
     .type    _tx_thread_irq_nesting_end,function
 _tx_thread_irq_nesting_end:
@@ -102,8 +110,4 @@ _tx_thread_irq_nesting_end:
     BIC     r0, r0, #MODE_MASK                  // Clear mode bits
     ORR     r0, r0, #IRQ_MODE_BITS              // Build IRQ mode CPSR
     MSR     CPSR_c, r0                          // Reenter IRQ mode
-#ifdef __THUMB_INTERWORK
     BX      r3                                  // Return to caller
-#else
-    MOV     pc, r3                              // Return to caller
-#endif

ports/cortex_a17/ac6/src/tx_thread_irq_nesting_start.S

@@ -23,15 +23,17 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
 IRQ_DISABLE     =       0x80                    // IRQ disable bit
 MODE_MASK       =       0x1F                    // Mode mask
 SYS_MODE_BITS   =       0x1F                    // System mode bits
 
-
-/* No 16-bit Thumb mode veneer code is needed for _tx_thread_irq_nesting_start
-   since it will never be called 16-bit mode.  */
-
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -39,7 +41,7 @@ SYS_MODE_BITS   =       0x1F                    // System mode bits
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_irq_nesting_start                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -81,8 +83,14 @@ SYS_MODE_BITS   =       0x1F                    // System mode bits
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_irq_nesting_start
     .type    _tx_thread_irq_nesting_start,function
 _tx_thread_irq_nesting_start:
@@ -95,8 +103,4 @@ _tx_thread_irq_nesting_start:
                                                 //   and push r1 just to keep 8-byte alignment
     BIC     r0, r0, #IRQ_DISABLE                // Build enable IRQ CPSR
     MSR     CPSR_c, r0                          // Enter system mode
-#ifdef __THUMB_INTERWORK
     BX      r3                                  // Return to caller
-#else
-    MOV     pc, r3                              // Return to caller
-#endif

ports/cortex_a17/ac6/src/tx_thread_schedule.S

@@ -23,37 +23,29 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
     .global     _tx_thread_execute_ptr
     .global     _tx_thread_current_ptr
     .global     _tx_timer_time_slice
 
-
-/* Define the 16-bit Thumb mode veneer for _tx_thread_schedule for
-   applications calling this function from to 16-bit Thumb mode.  */
-
     .text
     .align 2
-    .global $_tx_thread_schedule
-    .type   $_tx_thread_schedule,function
-$_tx_thread_schedule:
-         .thumb
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
-    .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_schedule              // Call _tx_thread_schedule function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
 
+#define IRQ_MODE    0x12            // IRQ mode
+#define SVC_MODE    0x13            // SVC mode
 
-    .text
-    .align 2
 /**************************************************************************/
 /*                                                                        */
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_schedule                                  ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -95,8 +87,14 @@ $_tx_thread_schedule:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_thread_schedule
     .type  _tx_thread_schedule,function
 _tx_thread_schedule:
@@ -140,11 +138,11 @@ __tx_thread_schedule_loop:
 
     /* Setup time-slice, if present.  */
 
-    LDR     r2, =_tx_timer_time_slice       // Pickup address of time-slice
-                                            //   variable
-    LDR     sp, [r0, #8]                    // Switch stack pointers
+    LDR     r2, =_tx_timer_time_slice       // Pickup address of time-slice variable
     STR     r3, [r2]                        // Setup time-slice
 
+    LDR     sp, [r0, #8]                    // Switch stack pointers
+
 #if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
 
     /* Call the thread entry function to indicate the thread is executing. */
@@ -154,16 +152,25 @@ __tx_thread_schedule_loop:
     MOV     r0, r5                          // Restore r0
 #endif
 
-    /* Determine if an interrupt frame or a synchronous task suspension frame
-       is present.  */
+    /* Determine if an interrupt frame or a synchronous task suspension frame is present. */
 
-    LDMIA   sp!, {r4, r5}                   // Pickup the stack type and saved CPSR
+    POP     {r4, r5}                        // Pickup the stack type and saved CPSR
     CMP     r4, #0                          // Check for synchronous context switch
     BEQ     _tx_solicited_return
+
+#if !defined(THUMB_MODE)
     MSR     SPSR_cxsf, r5                   // Setup SPSR for return
+#else
+    CPS     #IRQ_MODE                       // Enter IRQ mode
+    MSR     SPSR_cxsf, r5                   // Setup SPSR for return
+    LDR     r1, [r0, #8]                    // Get thread SP
+    LDR     lr, [r1, #0x40]                 // Get thread PC
+    CPS     #SVC_MODE                       // Enter SVC mode
+#endif
+
 #ifdef TX_ENABLE_VFP_SUPPORT
-    LDR     r1, [r0, #144]                  // Pickup the VFP enabled flag
-    CMP     r1, #0                          // Is the VFP enabled?
+    LDR     r2, [r0, #144]                  // Pickup the VFP enabled flag
+    CMP     r2, #0                          // Is the VFP enabled?
     BEQ     _tx_skip_interrupt_vfp_restore  // No, skip VFP interrupt restore
     VLDMIA  sp!, {D0-D15}                   // Recover D0-D15
     VLDMIA  sp!, {D16-D31}                  // Recover D16-D31
@@ -171,7 +178,15 @@ __tx_thread_schedule_loop:
     VMSR    FPSCR, r4                       // Restore FPSCR
 _tx_skip_interrupt_vfp_restore:
 #endif
+
+#if !defined(THUMB_MODE)
     LDMIA   sp!, {r0-r12, lr, pc}^          // Return to point of thread interrupt
+#else
+    POP     {r0-r12, lr}                    // Restore registers
+    ADD     sp, #4                          // Fix stack pointer (skip PC saved on stack)
+    CPS     #IRQ_MODE                       // Enter IRQ mode
+    SUBS    pc, lr, #0                      // Return to point of thread interrupt
+#endif
 
 _tx_solicited_return:
 
@@ -185,52 +200,63 @@ _tx_solicited_return:
     VMSR    FPSCR, r4                       // Restore FPSCR
 _tx_skip_solicited_vfp_restore:
 #endif
+
     MSR     CPSR_cxsf, r5                   // Recover CPSR
-    LDMIA   sp!, {r4-r11, lr}               // Return to thread synchronously
-#ifdef __THUMB_INTERWORK
+    POP     {r4-r11, lr}                    // Restore registers
     BX      lr                              // Return to caller
-#else
-    MOV     pc, lr                          // Return to caller
-#endif
 
 #ifdef TX_ENABLE_VFP_SUPPORT
 
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global tx_thread_vfp_enable
     .type  tx_thread_vfp_enable,function
 tx_thread_vfp_enable:
-    MRS     r2, CPSR                        // Pickup the CPSR
+    MRS     r0, CPSR                            // Pickup current CPSR
 #ifdef TX_ENABLE_FIQ_SUPPORT
-    CPSID   if                              // Enable IRQ and FIQ interrupts
+    CPSID   if                                  // Disable IRQ and FIQ
 #else
-    CPSID   i                               // Enable IRQ interrupts
+    CPSID   i                                   // Disable IRQ
 #endif
-    LDR     r0, =_tx_thread_current_ptr     // Build current thread pointer address
-    LDR     r1, [r0]                        // Pickup current thread pointer
+    LDR     r2, =_tx_thread_current_ptr     // Build current thread pointer address
+    LDR     r1, [r2]                        // Pickup current thread pointer
     CMP     r1, #0                          // Check for NULL thread pointer
-    BEQ     __tx_no_thread_to_enable        // If NULL, skip VFP enable
-    MOV     r0, #1                          // Build enable value
-    STR     r0, [r1, #144]                  // Set the VFP enable flag (tx_thread_vfp_enable field in TX_THREAD)
-__tx_no_thread_to_enable:
-    MSR     CPSR_cxsf, r2                   // Recover CPSR
-    BX      LR                              // Return to caller
+    BEQ     restore_ints                    // If NULL, skip VFP enable
+    MOV     r2, #1                          // Build enable value
+    STR     r2, [r1, #144]                  // Set the VFP enable flag (tx_thread_vfp_enable field in TX_THREAD)
+    B       restore_ints
 
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global tx_thread_vfp_disable
     .type  tx_thread_vfp_disable,function
 tx_thread_vfp_disable:
-    MRS     r2, CPSR                        // Pickup the CPSR
+    MRS     r0, CPSR                            // Pickup current CPSR
 #ifdef TX_ENABLE_FIQ_SUPPORT
-    CPSID   if                              // Enable IRQ and FIQ interrupts
+    CPSID   if                                  // Disable IRQ and FIQ
 #else
-    CPSID   i                               // Enable IRQ interrupts
+    CPSID   i                                   // Disable IRQ
 #endif
-    LDR     r0, =_tx_thread_current_ptr     // Build current thread pointer address
-    LDR     r1, [r0]                        // Pickup current thread pointer
+    LDR     r2, =_tx_thread_current_ptr     // Build current thread pointer address
+    LDR     r1, [r2]                        // Pickup current thread pointer
     CMP     r1, #0                          // Check for NULL thread pointer
-    BEQ     __tx_no_thread_to_disable       // If NULL, skip VFP disable
-    MOV     r0, #0                          // Build disable value
-    STR     r0, [r1, #144]                  // Clear the VFP enable flag (tx_thread_vfp_enable field in TX_THREAD)
-__tx_no_thread_to_disable:
-    MSR     CPSR_cxsf, r2                   // Recover CPSR
-    BX      LR                              // Return to caller
+    BEQ     restore_ints                    // If NULL, skip VFP disable
+    MOV     r2, #0                          // Build disable value
+    STR     r2, [r1, #144]                  // Clear the VFP enable flag (tx_thread_vfp_enable field in TX_THREAD)
+
+restore_ints:
+    TST     r0, #IRQ_MASK
+    BNE     no_irq
+    CPSIE   i
+no_irq:
+#ifdef TX_ENABLE_FIQ_SUPPORT
+    TST     r0, #FIQ_MASK
+    BNE     no_fiq
+    CPSIE   f
+no_fiq:
+#endif
+    BX      lr
 
 #endif

ports/cortex_a17/ac6/src/tx_thread_stack_build.S

@@ -23,33 +23,22 @@
 #include "tx_user.h"
 #endif
 
-    .arm
-
-SVC_MODE        =       0x13                    // SVC mode
-#ifdef TX_ENABLE_FIQ_SUPPORT
-CPSR_MASK       =       0xDF                    // Mask initial CPSR, IRQ & FIQ interrupts enabled
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
 #else
-CPSR_MASK       =       0x9F                    // Mask initial CPSR, IRQ interrupts enabled
+    .arm
 #endif
 
+SVC_MODE        =       0x13                    // SVC mode
 
-/* Define the 16-bit Thumb mode veneer for _tx_thread_stack_build for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .thumb
-    .global $_tx_thread_stack_build
-    .type    $_tx_thread_stack_build,function
-$_tx_thread_stack_build:
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
-    .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_stack_build           // Call _tx_thread_stack_build function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
+THUMB_MASK      =       0x20                    // Thumb bit mask
 
+#ifdef TX_ENABLE_FIQ_SUPPORT
+CPSR_MASK       =       0xFF                    // Mask initial CPSR, T, IRQ & FIQ interrupts enabled
+#else
+CPSR_MASK       =       0xBF                    // Mask initial CPSR, T, IRQ interrupts enabled
+#endif
 
     .text
     .align 2
@@ -58,7 +47,7 @@ $_tx_thread_stack_build:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_stack_build                               ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -96,8 +85,14 @@ $_tx_thread_stack_build:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_stack_build
     .type    _tx_thread_stack_build,function
 _tx_thread_stack_build:
@@ -135,6 +130,15 @@ _tx_thread_stack_build:
 
     MOV     r3, #1                          // Build interrupt stack type
     STR     r3, [r2, #0]                    // Store stack type
+
+    MRS     r3, CPSR                        // Pickup CPSR
+    BIC     r3, #CPSR_MASK                  // Mask mode bits of CPSR
+    ORR     r3, #SVC_MODE                   // Build CPSR, SYS mode, interrupts enabled
+    TST     r1, #1                          // Check if the initial PC is a Thumb function
+    IT      NE
+    ORRNE   r3, #THUMB_MASK                 // If the initial PC is a thumb function, CPSR must reflect this
+    STR     r3, [r2, #4]                    // Store initial CPSR
+
     MOV     r3, #0                          // Build initial register value
     STR     r3, [r2, #8]                    // Store initial r0
     STR     r3, [r2, #12]                   // Store initial r1
@@ -146,26 +150,20 @@ _tx_thread_stack_build:
     STR     r3, [r2, #36]                   // Store initial r7
     STR     r3, [r2, #40]                   // Store initial r8
     STR     r3, [r2, #44]                   // Store initial r9
-    LDR     r3, [r0, #12]                   // Pickup stack starting address
-    STR     r3, [r2, #48]                   // Store initial r10 (sl)
-    LDR     r3,=_tx_thread_schedule         // Pickup address of _tx_thread_schedule for GDB backtrace
-    STR     r3, [r2, #60]                   // Store initial r14 (lr)
-    MOV     r3, #0                          // Build initial register value
     STR     r3, [r2, #52]                   // Store initial r11
     STR     r3, [r2, #56]                   // Store initial r12
-    STR     r1, [r2, #64]                   // Store initial pc
     STR     r3, [r2, #68]                   // 0 for back-trace
-    MRS     r1, CPSR                        // Pickup CPSR
-    BIC     r1, r1, #CPSR_MASK              // Mask mode bits of CPSR
-    ORR     r3, r1, #SVC_MODE               // Build CPSR, SVC mode, interrupts enabled
-    STR     r3, [r2, #4]                    // Store initial CPSR
+
+    LDR     r3, [r0, #12]                   // Pickup stack starting address
+    STR     r3, [r2, #48]                   // Store initial r10 (sl)
+
+    LDR     r3,=_tx_thread_schedule         // Pickup address of _tx_thread_schedule for GDB backtrace
+    STR     r3, [r2, #60]                   // Store initial r14 (lr)
+
+    STR     r1, [r2, #64]                   // Store initial pc
 
     /* Setup stack pointer.  */
 
     STR     r2, [r0, #8]                    // Save stack pointer in thread's
                                             //   control block
-#ifdef __THUMB_INTERWORK
     BX      lr                              // Return to caller
-#else
-    MOV     pc, lr                          // Return to caller
-#endif

ports/cortex_a17/ac6/src/tx_thread_system_return.S

@@ -23,33 +23,17 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
     .arm
-
+#endif
 
     .global     _tx_thread_current_ptr
     .global     _tx_timer_time_slice
     .global     _tx_thread_schedule
 
-
-
-/* Define the 16-bit Thumb mode veneer for _tx_thread_system_return for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align  2
-    .global $_tx_thread_system_return
-    .type   $_tx_thread_system_return,function
-$_tx_thread_system_return:
-    .thumb
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
-    .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_system_return         // Call _tx_thread_system_return function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
-
-
     .text
     .align  2
 /**************************************************************************/
@@ -57,7 +41,7 @@ $_tx_thread_system_return:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_system_return                             ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -98,15 +82,21 @@ $_tx_thread_system_return:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_thread_system_return
     .type   _tx_thread_system_return,function
 _tx_thread_system_return:
 
     /* Save minimal context on the stack.  */
 
-    STMDB   sp!, {r4-r11, lr}           // Save minimal context
+    PUSH    {r4-r11, lr}                // Save minimal context
 
     LDR     r4, =_tx_thread_current_ptr // Pickup address of current ptr
     LDR     r5, [r4]                    // Pickup current thread pointer
@@ -123,8 +113,11 @@ _tx_skip_solicited_vfp_save:
 #endif
 
     MOV     r0, #0                      // Build a solicited stack type
-    MRS     r1, CPSR                    // Pickup the CPSR
-    STMDB   sp!, {r0-r1}                // Save type and CPSR
+    MRS     r1, CPSR                    // Pickup the CPSR, T bit is always cleared by hardware
+    TST     lr, #1                      // Check if calling function is in Thumb mode
+    IT      NE
+    ORRNE   r1, #0x20                   // Set the T bit so that the correct mode is set on return
+    PUSH    {r0-r1}                     // Save type and CPSR
 
    /* Lockout interrupts.  */
 

ports/cortex_a17/ac6/src/tx_timer_interrupt.S

@@ -23,8 +23,12 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
     .arm
-
+#endif
 
 /* Define Assembly language external references...  */
 
@@ -37,26 +41,6 @@
     .global     _tx_timer_expired
     .global     _tx_thread_time_slice
 
-
-
-/* Define the 16-bit Thumb mode veneer for _tx_timer_interrupt for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .thumb
-    .global $_tx_timer_interrupt
-    .type   $_tx_timer_interrupt,function
-$_tx_timer_interrupt:
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
-    .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_timer_interrupt              // Call _tx_timer_interrupt function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
-
-
     .text
     .align 2
 /**************************************************************************/
@@ -64,7 +48,7 @@ $_tx_timer_interrupt:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_timer_interrupt                                  ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -104,8 +88,14 @@ $_tx_timer_interrupt:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_timer_interrupt
     .type   _tx_timer_interrupt,function
 _tx_timer_interrupt:
@@ -197,7 +187,7 @@ __tx_timer_done:
 
 __tx_something_expired:
 
-    STMDB   sp!, {r0, lr}                       // Save the lr register on the stack
+    PUSH    {r0, lr}                            // Save the lr register on the stack
                                                 //   and save r0 just to keep 8-byte alignment
 
     /* Did a timer expire?  */
@@ -225,13 +215,9 @@ __tx_timer_dont_activate:
 
 __tx_timer_not_ts_expiration:
 
-    LDMIA   sp!, {r0, lr}                       // Recover lr register (r0 is just there for
+    POP     {r0, lr}                            // Recover lr register (r0 is just there for
                                                 //   the 8-byte stack alignment
 
 __tx_timer_nothing_expired:
 
-#ifdef __THUMB_INTERWORK
     BX      lr                                  // Return to caller
-#else
-    MOV     pc, lr                              // Return to caller
-#endif

ports/cortex_a17/gnu/example_build/crt0.S

@@ -1,15 +1,30 @@
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
 /* .text is used instead of .section .text so it works with arm-aout too.  */
     .text
-    .code 32
     .align  0
 
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _mainCRTStartup
+_mainCRTStartup:
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _start
+_start:
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global start
 start:
-_start:
-_mainCRTStartup:
 
 /* Start by setting up a stack */
     /*  Set up the stack pointer to a fixed value */
@@ -69,24 +84,12 @@ _mainCRTStartup:
     .word   _fini
 #endif  */
     /* Return ...  */
-#ifdef __APCS_26__
-    movs    pc, lr
-#else
-#ifdef __THUMB_INTERWORK
     bx  lr
-#else
-    mov pc, lr
-#endif
-#endif
 
     .global  _fini
     .type    _fini,function
 _fini:
-#ifdef __THUMB_INTERWORK
     BX      lr                                  // Return to caller
-#else
-    MOV     pc, lr                              // Return to caller
-#endif
 
 /*  Workspace for Angel calls.  */
     .data

ports/cortex_a17/gnu/inc/tx_port.h

@@ -321,7 +321,7 @@ void    tx_thread_vfp_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARMv7-A Version 6.3.0 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX ARMv7-A Version 6.4.0 *";
 #else
 extern  CHAR                    _tx_version_id[];
 #endif

ports/cortex_a17/gnu/src/tx_thread_context_restore.S

@@ -23,16 +23,16 @@
 #include "tx_user.h"
 #endif
 
-    .arm
-
-#ifdef TX_ENABLE_FIQ_SUPPORT
-SVC_MODE        =     0xD3               // Disable IRQ/FIQ, SVC mode
-IRQ_MODE        =     0xD2               // Disable IRQ/FIQ, IRQ mode
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
 #else
-SVC_MODE        =     0x93               // Disable IRQ, SVC mode
-IRQ_MODE        =     0x92               // Disable IRQ, IRQ mode
+    .arm
 #endif
 
+SVC_MODE        =     0x13               // SVC mode
+IRQ_MODE        =     0x12               // IRQ mode
+
     .global     _tx_thread_system_state
     .global     _tx_thread_current_ptr
     .global     _tx_thread_execute_ptr
@@ -45,7 +45,6 @@ IRQ_MODE        =     0x92               // Disable IRQ, IRQ mode
 /* No 16-bit Thumb mode veneer code is needed for _tx_thread_context_restore
    since it will never be called 16-bit mode.  */
 
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -53,7 +52,7 @@ IRQ_MODE        =     0x92               // Disable IRQ, IRQ mode
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_context_restore                            ARMv7-A       */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -94,6 +93,9 @@ IRQ_MODE        =     0x92               // Disable IRQ, IRQ mode
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
     .global _tx_thread_context_restore
@@ -129,9 +131,9 @@ _tx_thread_context_restore:
     /* Just recover the saved registers and return to the point of
        interrupt.  */
 
-    LDMIA   sp!, {r0, r10, r12, lr}         // Recover SPSR, POI, and scratch regs
+    POP     {r0, r10, r12, lr}              // Recover SPSR, POI, and scratch regs
     MSR     SPSR_cxsf, r0                   // Put SPSR back
-    LDMIA   sp!, {r0-r3}                    // Recover r0-r3
+    POP     {r0-r3}                         // Recover r0-r3
     MOVS    pc, lr                          // Return to point of interrupt
 
 __tx_thread_not_nested_restore:
@@ -160,26 +162,23 @@ __tx_thread_no_preempt_restore:
    /* Pickup the saved stack pointer.  */
 
    /* Recover the saved context and return to the point of interrupt.  */
-    LDMIA   sp!, {r0, r10, r12, lr}         // Recover SPSR, POI, and scratch regs
+    POP     {r0, r10, r12, lr}              // Recover SPSR, POI, and scratch regs
     MSR     SPSR_cxsf, r0                   // Put SPSR back
-    LDMIA   sp!, {r0-r3}                    // Recover r0-r3
+    POP     {r0-r3}                         // Recover r0-r3
     MOVS    pc, lr                          // Return to point of interrupt
 
 __tx_thread_preempt_restore:
 
-    LDMIA   sp!, {r3, r10, r12, lr}         // Recover temporarily saved registers
+    POP     {r3, r10, r12, lr}              // Recover temporarily saved registers
     MOV     r1, lr                          // Save lr (point of interrupt)
-    MOV     r2, #SVC_MODE                   // Build SVC mode CPSR
-    MSR     CPSR_c, r2                      // Enter SVC mode
+    CPS     #SVC_MODE                       // Enter SVC mode
     STR     r1, [sp, #-4]!                  // Save point of interrupt
-    STMDB   sp!, {r4-r12, lr}               // Save upper half of registers
+    PUSH    {r4-r12, lr}                    // Save upper half of registers
     MOV     r4, r3                          // Save SPSR in r4
-    MOV     r2, #IRQ_MODE                   // Build IRQ mode CPSR
-    MSR     CPSR_c, r2                      // Enter IRQ mode
-    LDMIA   sp!, {r0-r3}                    // Recover r0-r3
-    MOV     r5, #SVC_MODE                   // Build SVC mode CPSR
-    MSR     CPSR_c, r5                      // Enter SVC mode
-    STMDB   sp!, {r0-r3}                    // Save r0-r3 on thread's stack
+    CPS     #IRQ_MODE                       // Enter IRQ mode
+    POP     {r0-r3}                         // Recover r0-r3
+    CPS     #SVC_MODE                       // Enter SVC mode
+    PUSH    {r0-r3}                         // Save r0-r3 on thread's stack
 
     LDR     r1, =_tx_thread_current_ptr     // Pickup address of current thread ptr
     LDR     r0, [r1]                        // Pickup current thread pointer
@@ -192,13 +191,11 @@ __tx_thread_preempt_restore:
     STR     r2, [sp, #-4]!                  // Save FPSCR
     VSTMDB  sp!, {D16-D31}                  // Save D16-D31
     VSTMDB  sp!, {D0-D15}                   // Save D0-D15
-
 _tx_skip_irq_vfp_save:
-
 #endif
 
     MOV     r3, #1                          // Build interrupt stack type
-    STMDB   sp!, {r3, r4}                   // Save interrupt stack type and SPSR
+    PUSH    {r3, r4}                        // Save interrupt stack type and SPSR
     STR     sp, [r0, #8]                    // Save stack pointer in thread control
                                             //   block
 
@@ -223,6 +220,5 @@ __tx_thread_dont_save_ts:
 __tx_thread_idle_system_restore:
 
     /* Just return back to the scheduler!  */
-    MOV     r0, #SVC_MODE                   // Build SVC mode CPSR
-    MSR     CPSR_c, r0                      // Enter SVC mode
+    CPS     #SVC_MODE                       // Enter SVC mode
     B       _tx_thread_schedule             // Return to scheduler

ports/cortex_a17/gnu/src/tx_thread_context_save.S

@@ -23,6 +23,13 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
     .global     _tx_thread_system_state
     .global     _tx_thread_current_ptr
     .global     __tx_irq_processing_return
@@ -31,7 +38,6 @@
 /* No 16-bit Thumb mode veneer code is needed for _tx_thread_context_save
    since it will never be called 16-bit mode.  */
 
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -39,7 +45,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_context_save                              ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -79,6 +85,9 @@
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
     .global _tx_thread_context_save
@@ -90,7 +99,7 @@ _tx_thread_context_save:
 
     /* Check for a nested interrupt condition.  */
 
-    STMDB   sp!, {r0-r3}                    // Save some working registers
+    PUSH    {r0-r3}                         // Save some working registers
 #ifdef TX_ENABLE_FIQ_SUPPORT
     CPSID   if                              // Disable FIQ interrupts
 #endif
@@ -101,15 +110,15 @@ _tx_thread_context_save:
 
     /* Nested interrupt condition.  */
 
-    ADD     r2, r2, #1                      // Increment the interrupt counter
+    ADD     r2, #1                          // Increment the interrupt counter
     STR     r2, [r3]                        // Store it back in the variable
 
    /* Save the rest of the scratch registers on the stack and return to the
       calling ISR.  */
 
     MRS     r0, SPSR                        // Pickup saved SPSR
-    SUB     lr, lr, #4                      // Adjust point of interrupt
-    STMDB   sp!, {r0, r10, r12, lr}         // Store other registers
+    SUB     lr, #4                          // Adjust point of interrupt
+    PUSH    {r0, r10, r12, lr}              // Store other registers
 
     /* Return to the ISR.  */
 
@@ -129,7 +138,7 @@ _tx_thread_context_save:
 __tx_thread_not_nested_save:
 
     /* Otherwise, not nested, check to see if a thread was running.  */
-    ADD     r2, r2, #1                      // Increment the interrupt counter
+    ADD     r2, #1                          // Increment the interrupt counter
     STR     r2, [r3]                        // Store it back in the variable
     LDR     r1, =_tx_thread_current_ptr     // Pickup address of current thread ptr
     LDR     r0, [r1]                        // Pickup current thread pointer
@@ -140,8 +149,8 @@ __tx_thread_not_nested_save:
     /* Save minimal context of interrupted thread.  */
 
     MRS     r2, SPSR                        // Pickup saved SPSR
-    SUB     lr, lr, #4                      // Adjust point of interrupt
-    STMDB   sp!, {r2, r10, r12, lr}         // Store other registers
+    SUB     lr, #4                          // Adjust point of interrupt
+    PUSH    {r2, r10, r12, lr}              // Store other registers
 
     MOV     r10, #0                         // Clear stack limit
 
@@ -174,5 +183,5 @@ __tx_thread_idle_system_save:
     POP     {lr}                            // Recover ISR lr
 #endif
 
-    ADD     sp, sp, #16                     // Recover saved registers
+    ADD     sp, #16                         // Recover saved registers
     B       __tx_irq_processing_return      // Continue IRQ processing

ports/cortex_a17/gnu/src/tx_thread_fiq_nesting_end.S

@@ -23,6 +23,13 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
 #ifdef TX_ENABLE_FIQ_SUPPORT
 DISABLE_INTS    =       0xC0                    // Disable IRQ/FIQ interrupts
 #else
@@ -31,11 +38,6 @@ DISABLE_INTS    =       0x80                    // Disable IRQ interrupts
 MODE_MASK       =       0x1F                    // Mode mask
 FIQ_MODE_BITS   =       0x11                    // FIQ mode bits
 
-
-/* No 16-bit Thumb mode veneer code is needed for _tx_thread_fiq_nesting_end
-   since it will never be called 16-bit mode.  */
-
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -43,7 +45,7 @@ FIQ_MODE_BITS   =       0x11                    // FIQ mode bits
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_fiq_nesting_end                           ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -88,8 +90,14 @@ FIQ_MODE_BITS   =       0x11                    // FIQ mode bits
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_fiq_nesting_end
     .type    _tx_thread_fiq_nesting_end,function
 _tx_thread_fiq_nesting_end:
@@ -103,8 +111,4 @@ _tx_thread_fiq_nesting_end:
     ORR     r0, r0, #FIQ_MODE_BITS              // Build IRQ mode CPSR
     MSR     CPSR_c, r0                          // Reenter IRQ mode
 
-#ifdef __THUMB_INTERWORK
     BX      r3                                  // Return to caller
-#else
-    MOV     pc, r3                              // Return to caller
-#endif

ports/cortex_a17/gnu/src/tx_thread_fiq_nesting_start.S

@@ -23,15 +23,17 @@
 #include "tx_user.h"
 #endif
 
+    .syntax unified
+#if defined(THUMB_MODE)
+    .thumb
+#else
+    .arm
+#endif
+
 FIQ_DISABLE     =       0x40                    // FIQ disable bit
 MODE_MASK       =       0x1F                    // Mode mask
 SYS_MODE_BITS   =       0x1F                    // System mode bits
 
-
-/* No 16-bit Thumb mode veneer code is needed for _tx_thread_fiq_nesting_start
-   since it will never be called 16-bit mode.  */
-
-    .arm
     .text
     .align 2
 /**************************************************************************/
@@ -39,7 +41,7 @@ SYS_MODE_BITS   =       0x1F                    // System mode bits
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_fiq_nesting_start                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -81,8 +83,14 @@ SYS_MODE_BITS   =       0x1F                    // System mode bits
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global  _tx_thread_fiq_nesting_start
     .type    _tx_thread_fiq_nesting_start,function
 _tx_thread_fiq_nesting_start:
@@ -95,8 +103,4 @@ _tx_thread_fiq_nesting_start:
                                                 //   and push r1 just to keep 8-byte alignment
     BIC     r0, r0, #FIQ_DISABLE                // Build enable FIQ CPSR
     MSR     CPSR_c, r0                          // Enter system mode
-#ifdef __THUMB_INTERWORK
     BX      r3                                  // Return to caller
-#else
-    MOV     pc, r3                              // Return to caller
-#endif

ports/cortex_a17/gnu/src/tx_thread_interrupt_control.S

@@ -23,25 +23,18 @@
 #include "tx_user.h"
 #endif
 
-INT_MASK        =   0x03F
-
-
-/* Define the 16-bit Thumb mode veneer for _tx_thread_interrupt_control for
-   applications calling this function from to 16-bit Thumb mode.  */
-
-    .text
-    .align 2
-    .global $_tx_thread_interrupt_control
-$_tx_thread_interrupt_control:
+    .syntax unified
+#if defined(THUMB_MODE)
     .thumb
-     BX        pc                               // Switch to 32-bit mode
-     NOP                                        //
+#else
     .arm
-     STMFD     sp!, {lr}                        // Save return address
-     BL        _tx_thread_interrupt_control     // Call _tx_thread_interrupt_control function
-     LDMFD     sp!, {lr}                        // Recover saved return address
-     BX        lr                               // Return to 16-bit caller
+#endif
 
+INT_MASK        =   0x0C0
+IRQ_MASK        =   0x080
+#ifdef TX_ENABLE_FIQ_SUPPORT
+FIQ_MASK        =   0x040
+#endif
 
     .text
     .align 2
@@ -50,7 +43,7 @@ $_tx_thread_interrupt_control:
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_interrupt_control                         ARMv7-A        */
-/*                                                           6.3.0        */
+/*                                                           6.4.0        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -86,25 +79,35 @@ $_tx_thread_interrupt_control:
 /*  10-31-2023     Tiejun Zhou              Modified comment(s), added    */
 /*                                            #include tx_user.h,         */
 /*                                            resulting in version 6.3.0  */
+/*  12-31-2023     Yajun Xia                Modified comment(s),          */
+/*                                            Added thumb mode support,   */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
+#if defined(THUMB_MODE)
+    .thumb_func
+#endif
     .global _tx_thread_interrupt_control
     .type   _tx_thread_interrupt_control,function
 _tx_thread_interrupt_control:
+    MRS     r1, CPSR                            // Pickup current CPSR
 
-    /* Pickup current interrupt lockout posture.  */
-
-    MRS     r3, CPSR                    // Pickup current CPSR
-    MOV     r2, #INT_MASK               // Build interrupt mask
-    AND     r1, r3, r2                  // Clear interrupt lockout bits
-    ORR     r1, r1, r0                  // Or-in new interrupt lockout bits
-
-    /* Apply the new interrupt posture.  */
-
-    MSR     CPSR_c, r1                  // Setup new CPSR
-    BIC     r0, r3, r2                  // Return previous interrupt mask
-#ifdef __THUMB_INTERWORK
-    BX      lr                          // Return to caller
+#ifdef TX_ENABLE_FIQ_SUPPORT
+    CPSID   if                                  // Disable IRQ and FIQ
 #else
-    MOV     pc, lr                      // Return to caller
+    CPSID   i                                   // Disable IRQ
 #endif
+
+    TST     r0, #IRQ_MASK
+    BNE     no_irq
+    CPSIE   i
+no_irq:
+#ifdef TX_ENABLE_FIQ_SUPPORT
+    TST     r0, #FIQ_MASK
+    BNE     no_fiq
+    CPSIE   f
+no_fiq:
+#endif
+
+    AND     r0, r1, #INT_MASK
+    BX      lr