151 lines
7.3 KiB
ArmAsm
151 lines
7.3 KiB
ArmAsm
;/***************************************************************************
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; * Copyright (c) 2024 Microsoft Corporation
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; *
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; * This program and the accompanying materials are made available under the
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; * terms of the MIT License which is available at
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; * https://opensource.org/licenses/MIT.
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; *
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; * SPDX-License-Identifier: MIT
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; **************************************************************************/
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;
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;
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;/**************************************************************************/
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;/**************************************************************************/
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;/** */
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;/** ThreadX Component */
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;/** */
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;/** Thread */
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;/** */
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;/**************************************************************************/
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;/**************************************************************************/
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;
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section .text:CODE:ROOT
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;/**************************************************************************/
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;/* */
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;/* FUNCTION RELEASE */
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;/* */
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;/* _tx_thread_stack_build RXv3/IAR */
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;/* 6.1.11 */
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;/* AUTHOR */
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;/* */
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;/* William E. Lamie, Microsoft Corporation */
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;/* */
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;/* DESCRIPTION */
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;/* */
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;/* This function builds a stack frame on the supplied thread's stack. */
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;/* The stack frame results in a fake interrupt return to the supplied */
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;/* function pointer. */
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;/* */
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;/* INPUT */
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;/* */
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;/* thread_ptr Pointer to thread control blk */
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;/* function_ptr Pointer to return function */
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;/* */
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;/* OUTPUT */
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;/* */
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;/* None */
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;/* */
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;/* CALLS */
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;/* */
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;/* None */
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;/* */
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;/* CALLED BY */
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;/* */
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;/* _tx_thread_create Create thread service */
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;/* */
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;/* RELEASE HISTORY */
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;/* */
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;/* DATE NAME DESCRIPTION */
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;/* */
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;/* 06-02-2021 William E. Lamie Initial Version 6.1.7 */
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;/* 10-15-2021 William E. Lamie Modified comment(s), */
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;/* resulting in version 6.1.9 */
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;/* 01-31-2022 William E. Lamie Modified comment(s), */
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;/* resulting in version 6.1.10 */
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;/* 04-25-2022 William E. Lamie Modified comment(s), */
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;/* resulting in version 6.1.11 */
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;/* */
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;/**************************************************************************/
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public __tx_thread_stack_build
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__tx_thread_stack_build:
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;
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;
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; /* Build an interrupt frame. The form of the fake interrupt stack
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; on the Renesas RX should look like the following after it is built:
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;
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; Stack Top: ACC0
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; ACC1
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; R6
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; R7
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; R8
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; R9
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; R10
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; R11
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; R12
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; R13
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; FPSW
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; R14
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; R15
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; R3
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; R4
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; R5
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; R1
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; R2
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; PC
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; PSW
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;
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; Stack Bottom: (higher memory address) */
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;
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MOV.L 16[R1],R3 ; Pickup end of stack area
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BCLR #0, R3 ; Mask for 4-byte alignment
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BCLR #1, R3
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;
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; /* Build the stack frame. */
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;
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MOV.L #30000h, R4
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MOV.L R4, [-R3] ; Initial PSW (SVC mode, U flag set)
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MOV.L R2, [-R3] ; Initial PC
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MOV.L #0, R4
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MOV.L R4,[-R3] ; Initial R2 ...
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MOV.L R4,[-R3] ; Initial R1 ...
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MOV.L R4,[-R3] ; Initial R5 ...
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MOV.L R4,[-R3] ; Initial R4 ...
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MOV.L R4,[-R3] ; Initial R3 ...
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MOV.L R4,[-R3] ; Initial R15 ...
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MOV.L R4,[-R3] ; Initial R14 ...
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MVFC FPSW, r4
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MOV.L R4, [-R3] ; Initial FPSW
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MOV.L #0, R4
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MOV.L R4,[-R3] ; Initial R13 ...
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MOV.L R4,[-R3] ; Initial R12 ...
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MOV.L R4,[-R3] ; Initial R11 ...
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MOV.L R4,[-R3] ; Initial R10 ...
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MOV.L R4,[-R3] ; Initial R9 ...
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MOV.L R4,[-R3] ; Initial R8 ...
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MOV.L R4,[-R3] ; Initial R7 ...
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MOV.L R4,[-R3] ; Initial R6 ...
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MOV.L R4,[-R3] ; Accumulator 1
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MOV.L R4,[-R3]
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MOV.L R4,[-R3]
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MOV.L R4,[-R3] ; Accumulator 0
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MOV.L R4,[-R3]
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MOV.L R4,[-R3]
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; /* Setup stack pointer. */
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; thread_ptr -> tx_thread_stack_ptr = R1;
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MOV.L R3, 8[R1]
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; Store initial SP in thread control block
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RTS
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;}
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END
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