112 lines
5.9 KiB
ArmAsm
112 lines
5.9 KiB
ArmAsm
/***************************************************************************
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* Copyright (c) 2024 Microsoft Corporation
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*
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* This program and the accompanying materials are made available under the
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* terms of the MIT License which is available at
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* https://opensource.org/licenses/MIT.
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*
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* SPDX-License-Identifier: MIT
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**************************************************************************/
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/**************************************************************************/
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/**************************************************************************/
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/** */
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/** ThreadX Component */
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/** */
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/** Initialize */
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/** */
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/**************************************************************************/
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/**************************************************************************/
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.section .data
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.global __tx_free_memory_start
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__tx_free_memory_start:
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.section .text
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/**************************************************************************/
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/* */
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/* FUNCTION RELEASE */
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/* */
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/* _tx_initialize_low_level RISC-V64/GNU */
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/* 6.2.1 */
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/* AUTHOR */
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/* */
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/* Scott Larson, Microsoft Corporation */
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/* */
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/* DESCRIPTION */
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/* */
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/* This function is responsible for any low-level processor */
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/* initialization, including setting up interrupt vectors, setting */
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/* up a periodic timer interrupt source, saving the system stack */
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/* pointer for use in ISR processing later, and finding the first */
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/* available RAM memory address for tx_application_define. */
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/* */
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/* INPUT */
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/* */
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/* None */
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/* */
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/* OUTPUT */
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/* */
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/* None */
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/* */
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/* CALLS */
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/* */
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/* None */
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/* */
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/* CALLED BY */
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/* */
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/* _tx_initialize_kernel_enter ThreadX entry function */
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/* */
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/* RELEASE HISTORY */
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/* */
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/* DATE NAME DESCRIPTION */
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/* */
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/* 03-08-2023 Scott Larson Initial Version 6.2.1 */
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/* */
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/**************************************************************************/
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/* VOID _tx_initialize_low_level(VOID)
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{ */
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.global _tx_initialize_low_level
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.weak _tx_initialize_low_level
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_tx_initialize_low_level:
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sd sp, _tx_thread_system_stack_ptr, t0 // Save system stack pointer
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la t0, __tx_free_memory_start // Pickup first free address
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sd t0, _tx_initialize_unused_memory, t1 // Save unused memory address
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#ifdef __riscv_flen
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fscsr x0
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#endif
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ret
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/* Define the actual timer interrupt/exception handler. */
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.global timer1_plic_IRQHandler
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//.global __minterrupt_000007
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//EXTWEAK __require_minterrupt_vector_table
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timer1_plic_IRQHandler:
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//__minterrupt_000007:
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//REQUIRE __require_minterrupt_vector_table
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/* Before calling _tx_thread_context_save, we have to allocate an interrupt
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stack frame and save the current value of x1 (ra). */
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//#if defined(__riscv_float_abi_single) || defined(__riscv_float_abi_double)
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// addi sp, sp, -520 // Allocate space for all registers - with floating point enabled
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//#else
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// addi sp, sp, -256 // Allocate space for all registers - without floating point enabled
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//#endif
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// sd x1, 224(sp) // Store RA
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// call _tx_thread_context_save // Call ThreadX context save
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/* Call the ThreadX timer routine. */
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call _tx_timer_interrupt // Call timer interrupt handler
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call timer1_interrupt
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ret
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/* Timer interrupt processing is done, jump to ThreadX context restore. */
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// j _tx_thread_context_restore // Jump to ThreadX context restore function. Note: this does not return!
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