95 lines
5.0 KiB
NASM
95 lines
5.0 KiB
NASM
;/***************************************************************************
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; * Copyright (c) 2024 Microsoft Corporation
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; *
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; * This program and the accompanying materials are made available under the
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; * terms of the MIT License which is available at
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; * https://opensource.org/licenses/MIT.
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; *
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; * SPDX-License-Identifier: MIT
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; **************************************************************************/
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;
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;
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;/**************************************************************************/
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;/**************************************************************************/
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;/** */
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;/** ThreadX Component */
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;/** */
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;/** Thread */
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;/** */
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;/**************************************************************************/
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;/**************************************************************************/
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;
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;#define TX_SOURCE_CODE
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;
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;
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;/* Include necessary system files. */
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;
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;#include "tx_api.h"
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;#include "tx_thread.h"
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;
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;
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FP .set A15
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DP .set B14
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SP .set B15
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;
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;
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.sect ".text"
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;/**************************************************************************/
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;/* */
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;/* FUNCTION RELEASE */
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;/* */
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;/* _tx_thread_interrupt_control C667x/TI */
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;/* 6.1 */
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;/* AUTHOR */
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;/* */
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;/* William E. Lamie, Microsoft Corporation */
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;/* */
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;/* DESCRIPTION */
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;/* */
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;/* This function is responsible for changing the interrupt lockout */
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;/* posture of the system. */
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;/* */
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;/* INPUT */
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;/* */
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;/* new_posture New interrupt lockout posture */
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;/* */
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;/* OUTPUT */
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;/* */
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;/* old_posture Old interrupt lockout posture */
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;/* */
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;/* CALLS */
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;/* */
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;/* None */
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;/* */
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;/* CALLED BY */
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;/* */
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;/* Application Code */
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;/* */
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;/* RELEASE HISTORY */
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;/* */
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;/* DATE NAME DESCRIPTION */
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;/* */
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;/* 09-30-2020 William E. Lamie Initial Version 6.1 */
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;/* */
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;/**************************************************************************/
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;UINT _tx_thread_interrupt_control(UINT new_posture)
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;{
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.global _tx_thread_interrupt_control
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_tx_thread_interrupt_control:
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;
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; /* Pickup current interrupt lockout posture. */
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;
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MVC CSR,B0 ; Pickup current CSR
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;
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; /* Apply the new interrupt posture. */
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;
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B B3 ; Return to caller
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AND -2,B0,B0 ; Clear GIE bit
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OR A4,B0,B0 ; Build new interrupt posture
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MVC CSR,B1 ; Return previous posture
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MVC B0,CSR ; Apply new interrupt posture
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AND 1,B1,A4 ; Clear non-GIE bits
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;
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;}
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