191 lines
7.3 KiB
C
191 lines
7.3 KiB
C
/**************************************************************************/
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/* Copyright (c) Cadence Design Systems, Inc. */
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/* */
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/* Permission is hereby granted, free of charge, to any person obtaining */
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/* a copy of this software and associated documentation files (the */
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/* "Software"), to deal in the Software without restriction, including */
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/* without limitation the rights to use, copy, modify, merge, publish, */
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/* distribute, sublicense, and/or sell copies of the Software, and to */
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/* permit persons to whom the Software is furnished to do so, subject to */
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/* the following conditions: */
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/* */
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/* The above copyright notice and this permission notice shall be */
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/* included in all copies or substantial portions of the Software. */
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/* */
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/* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, */
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/* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF */
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/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. */
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/* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY */
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/* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, */
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/* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE */
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/* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
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/**************************************************************************/
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#include "tx_api.h"
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#include "tx_port.h"
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#include "xtensa_api.h"
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#if XCHAL_HAVE_ISL || XCHAL_HAVE_KSL || XCHAL_HAVE_PSL
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#include <xtensa/tie/xt_exception_dispatch.h>
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#endif
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#if XCHAL_HAVE_XEA3
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int32_t xt_sw_intnum = -1;
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int32_t xt_timer_intnum = -1;
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#endif
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/**************************************************************************/
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/* */
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/* DESCRIPTION */
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/* */
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/* This function is responsible for any low-level processor */
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/* initialization, including setting up interrupt vectors, setting */
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/* up a periodic timer interrupt source, saving the system stack */
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/* pointer for use in ISR processing later, and finding the first */
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/* available RAM memory address for tx_application_define. */
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/* It also sets the default heap region for the optional C library. */
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/* */
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/* RELEASE HISTORY */
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/* */
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/* DATE NAME DESCRIPTION */
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/* */
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/* 12-31-2020 Cadence Design Systems Initial Version 6.1.3 */
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/* 04-25-2022 Scott Larson Modified comments and updated */
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/* function names, */
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/* resulting in version 6.1.11 */
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/* */
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/**************************************************************************/
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VOID _tx_initialize_low_level(VOID)
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{
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extern char _xt_interrupt_stack_top;
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extern void _tx_timer_interrupt(void *);
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extern void * _tx_thread_system_stack_ptr;
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extern void * _tx_initialize_unused_memory;
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extern char _end;
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#ifdef TX_THREAD_SAFE_CLIB
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extern char __stack;
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extern void _tx_clib_init(void);
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#endif
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#if XCHAL_CP_NUM > 0
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extern void _xt_coproc_init(void);
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extern void _xt_coproc_exc(XtExcFrame * fp);
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#endif
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#ifdef TX_ENABLE_STACK_CHECKING
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extern VOID _tx_xtensa_stack_error_handler(TX_THREAD * thread);
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#endif
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#if XCHAL_HAVE_XEA3
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extern void xt_sched_handler(void * arg);
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int32_t i;
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#endif
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TX_INTERRUPT_SAVE_AREA
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/* Disable interrupts - don't want any that interact with ThreadX yet. */
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TX_DISABLE
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/*
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Disable stack limit checking if present. Whatever was set up earlier
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is not going to work for us.
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*/
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#if XCHAL_HAVE_KSL
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XT_WSR_KSL(0);
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#endif
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#if XCHAL_HAVE_ISL
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XT_WSR_ISL(0);
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#endif
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/* Save the system stack pointer. */
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_tx_thread_system_stack_ptr = &(_xt_interrupt_stack_top);
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/* Save the first available memory address. */
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_tx_initialize_unused_memory = (void *)(((UINT)&_end + 15) & ~0xF);
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#ifdef TX_THREAD_SAFE_CLIB
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/*
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Pre-allocate default memory region for the C library heap.
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Bisect the region from first available memory to end of system memory,
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align to 16 byte boundary, and allocate the heap in the upper half.
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*/
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_tx_clib_heap_end = &(__stack);
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_tx_clib_heap_start =
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(void *)(((UINT)_tx_initialize_unused_memory/2 + (UINT)_tx_clib_heap_end/2) & ~0xF);
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#endif
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#if XCHAL_CP_NUM > 0
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/*
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Initialize co-processor management for threads. Leave CPENABLE alone.
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This is called from a normal Xtensa single-threaded run-time environment
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before multi-threading has commenced. All co-processors are enabled.
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It is important NOT to clear CPENABLE yet because tx_application_define()
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is user code which might use a co-processor. The co-processor exception
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handler does not expect to be called outside a thread.
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*/
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_xt_coproc_init();
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#if XCHAL_HAVE_XEA3
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/* Install the coprocessor exception handler. */
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xt_set_exception_handler(EXCCAUSE_CP_DISABLED, _xt_coproc_exc);
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#endif
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#endif
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#if XCHAL_HAVE_XEA3
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/* Select a software interrupt to use for scheduling. */
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for (i = 0; i < XCHAL_NUM_INTERRUPTS; i++) {
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if ((Xthal_inttype[i] == XTHAL_INTTYPE_SOFTWARE) && (Xthal_intlevel[i] == 1)) {
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xt_sw_intnum = i;
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break;
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}
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}
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if (xt_sw_intnum == -1) {
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__asm__ volatile ("break 1, 1");
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}
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/* Set the interrupt handler and enable the interrupt. */
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xt_set_interrupt_handler(xt_sw_intnum, xt_sched_handler, 0);
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xt_interrupt_enable(xt_sw_intnum);
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#endif
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#ifndef TX_NO_TIMER
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/* Compute tick divisor if clock freq is not compile-time constant. */
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#ifndef XT_CLOCK_FREQ
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xt_tick_divisor_init();
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#endif
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/* Set up the periodic tick timer (assume enough time to complete init). */
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#ifdef XT_CLOCK_FREQ
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XT_WSR_CCOMPARE(XT_RSR_CCOUNT() + XT_TICK_DIVISOR);
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#else
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XT_WSR_CCOMPARE(XT_RSR_CCOUNT() + xt_tick_divisor);
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#endif
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#if XCHAL_HAVE_XEA3
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xt_timer_intnum = XT_TIMER_INTNUM;
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xt_set_interrupt_handler(xt_timer_intnum, _tx_timer_interrupt, 0);
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#endif
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/* Enable the timer interrupt at the device level. */
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xt_interrupt_enable(XT_TIMER_INTNUM);
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#endif /* TX_NO_TIMER */
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/* Initialize C library thread safety support. */
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#ifdef TX_THREAD_SAFE_CLIB
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_tx_clib_init();
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#endif
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/* Install stack overflow notification callback. */
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#ifdef TX_ENABLE_STACK_CHECKING
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tx_thread_stack_error_notify(_tx_xtensa_stack_error_handler);
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#endif
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}
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