162 lines
4.7 KiB
ArmAsm
162 lines
4.7 KiB
ArmAsm
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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;; Part one of the system initialization code,
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;; contains low-level
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;; initialization.
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;;
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;; Copyright 2007 IAR Systems. All rights reserved.
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;;
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;; $Revision: 14520 $
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;;
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MODULE ?cstartup
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;; Forward declaration of sections.
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SECTION IRQ_STACK:DATA:NOROOT(3)
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SECTION FIQ_STACK:DATA:NOROOT(3)
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SECTION CSTACK:DATA:NOROOT(3)
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;
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; The module in this file are included in the libraries, and may be
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; replaced by any user-defined modules that define the PUBLIC symbol
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; __iar_program_start or a user defined start symbol.
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;
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; To override the cstartup defined in the library, simply add your
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; modified version to the workbench project.
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SECTION .intvec:CODE:NOROOT(2)
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PUBLIC __vector
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PUBLIC __vector_0x14
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PUBLIC __iar_program_start
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EXTERN __tx_undefined
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EXTERN __tx_swi_interrupt
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EXTERN __tx_prefetch_handler
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EXTERN __tx_abort_handler
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EXTERN __tx_irq_handler
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EXTERN __tx_fiq_handler
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ARM
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__vector:
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; All default exception handlers (except reset) are
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; defined as weak symbol definitions.
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; If a handler is defined by the application it will take precedence.
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LDR PC,Reset_Addr ; Reset
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LDR PC,Undefined_Addr ; Undefined instructions
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LDR PC,SWI_Addr ; Software interrupt (SWI/SVC)
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LDR PC,Prefetch_Addr ; Prefetch abort
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LDR PC,Abort_Addr ; Data abort
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__vector_0x14:
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DCD 0 ; RESERVED
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LDR PC,IRQ_Addr ; IRQ
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LDR PC,FIQ_Addr ; FIQ
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Reset_Addr: DCD __iar_program_start
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Undefined_Addr: DCD __tx_undefined
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SWI_Addr: DCD __tx_swi_interrupt
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Prefetch_Addr: DCD __tx_prefetch_handler
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Abort_Addr: DCD __tx_abort_handler
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IRQ_Addr: DCD __tx_irq_handler
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FIQ_Addr: DCD __tx_fiq_handler
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; --------------------------------------------------
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; ?cstartup -- low-level system initialization code.
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;
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; After a reser execution starts here, the mode is ARM, supervisor
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; with interrupts disabled.
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;
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SECTION .text:CODE:NOROOT(2)
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; PUBLIC ?cstartup
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EXTERN ?main
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REQUIRE __vector
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ARM
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__iar_program_start:
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?cstartup:
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;
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; Add initialization needed before setup of stackpointers here.
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;
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;
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; Initialize the stack pointers.
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; The pattern below can be used for any of the exception stacks:
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; FIQ, IRQ, SVC, ABT, UND, SYS.
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; The USR mode uses the same stack as SYS.
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; The stack segments must be defined in the linker command file,
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; and be declared above.
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;
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; --------------------
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; Mode, correspords to bits 0-5 in CPSR
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MODE_MSK DEFINE 0x1F ; Bit mask for mode bits in CPSR
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USR_MODE DEFINE 0x10 ; User mode
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FIQ_MODE DEFINE 0x11 ; Fast Interrupt Request mode
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IRQ_MODE DEFINE 0x12 ; Interrupt Request mode
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SVC_MODE DEFINE 0x13 ; Supervisor mode
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ABT_MODE DEFINE 0x17 ; Abort mode
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UND_MODE DEFINE 0x1B ; Undefined Instruction mode
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SYS_MODE DEFINE 0x1F ; System mode
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MRS r0, cpsr ; Original PSR value
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;; Set up the interrupt stack pointer.
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BIC r0, r0, #MODE_MSK ; Clear the mode bits
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ORR r0, r0, #IRQ_MODE ; Set IRQ mode bits
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MSR cpsr_c, r0 ; Change the mode
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LDR sp, =SFE(IRQ_STACK) ; End of IRQ_STACK
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;; Set up the fast interrupt stack pointer.
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BIC r0, r0, #MODE_MSK ; Clear the mode bits
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ORR r0, r0, #FIQ_MODE ; Set FIR mode bits
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MSR cpsr_c, r0 ; Change the mode
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LDR sp, =SFE(FIQ_STACK) ; End of FIQ_STACK
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;; Set up the normal stack pointer.
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BIC r0 ,r0, #MODE_MSK ; Clear the mode bits
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ORR r0 ,r0, #SYS_MODE ; Set System mode bits
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MSR cpsr_c, r0 ; Change the mode
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LDR sp, =SFE(CSTACK) ; End of CSTACK
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#ifdef __ARMVFP__
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;; Enable the VFP coprocessor.
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MOV r0, #0x40000000 ; Set EN bit in VFP
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FMXR fpexc, r0 ; FPEXC, clear others.
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;
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; Disable underflow exceptions by setting flush to zero mode.
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; For full IEEE 754 underflow compliance this code should be removed
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; and the appropriate exception handler installed.
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;
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MOV r0, #0x01000000 ; Set FZ bit in VFP
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FMXR fpscr, r0 ; FPSCR, clear others.
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#endif
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;
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; Add more initialization here
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;
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; Continue to ?main for C-level initialization.
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B ?main
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END
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